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source: soft/giet_vm/giet_python/mapping.py @ 561

Last change on this file since 561 was 560, checked in by alain, 9 years ago
Introducing support for MWR coprocessors in the hard_config.h file
Property svn:executable set to ``*
File size: 100.9 KB

Rev	Line
[425]	1	#!/usr/bin/env python
[305]	2
[319]	3	import sys
	4
[539]	5	###################################################################################
[305]	6	# file : giet_mapping.py
	7	# date : april 2014
	8	# author : Alain Greiner
[539]	9	###################################################################################
[319]	10	# This file contains the classes required to define a mapping for the GIET_VM.
	11	# - A 'Mapping' contains a set of 'Cluster' (hardware architecture)
[520]	12	# a set of 'Vseg' (kernel glogals virtual segments)
	13	# a set of 'Vspace' (one or several user applications)
[512]	14	# - A 'Cluster' contains a set of 'Pseg' (physical segments in cluster)
[319]	15	# a set of 'Proc' (processors in cluster)
	16	# a set of 'Periph' (peripherals in cluster)
[512]	17	# - A 'Vspace' contains a set of 'Vseg' (user virtual segments)
	18	# a set of 'Task' (user parallel tasks)
[441]	19	# - A 'Periph' contains a set of 'Irq' (only for XCU and PIC types )
[539]	20	###################################################################################
[319]	21	# Implementation Note
[512]	22	# The objects used to describe a mapping are distributed in the PYTHON structure:
[319]	23	# For example the psegs set is split in several subsets (one subset per cluster),
	24	# or the tasks set is split in several subsets (one subset per vspace), etc...
	25	# In the C binary data structure used by the giet_vm, all objects of same type
[406]	26	# are stored in a linear array (one single array for all psegs for example).
[539]	27	# For all objects, we compute and store in the PYTHON object a "global index"
[406]	28	# corresponding to the index in this global array, and this index can be used as
[319]	29	# a pseudo-pointer to identify a specific object of a given type.
[539]	30	###################################################################################
[305]	31
[539]	32	###################################################################################
[411]	33	# Various constants
[539]	34	###################################################################################
[411]	35
	36	PADDR_WIDTH = 40 # number of bits for physical address
	37	X_WIDTH = 4 # number of bits encoding x coordinate
	38	Y_WIDTH = 4 # number of bits encoding y coordinate
	39	P_WIDTH = 4 # number of bits encoding local proc_id
[539]	40	VPN_ANTI_MASK = 0x00000FFF # mask vaddr to get offset in small page
	41	BPN_MASK = 0xFFE00000 # mask vaddr to get the BPN in big page
	42	PERI_INCREMENT = 0x10000 # virtual address increment for replicated vsegs
[411]	43	RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address
[539]	44	MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C BLOB
[411]	45
[539]	46	###################################################################################
[520]	47	# These lists must be consistent with values defined in
	48	# mapping_info.h / xml_driver.c /xml_parser.c
[539]	49	###################################################################################
[319]	50	PERIPHTYPES = [
	51	'CMA',
	52	'DMA',
	53	'FBF',
	54	'IOB',
	55	'IOC',
	56	'MMC',
	57	'MWR',
	58	'NIC',
	59	'ROM',
	60	'SIM',
	61	'TIM',
	62	'TTY',
	63	'XCU',
	64	'PIC',
[491]	65	'DROM',
[319]	66	]
	67
[520]	68	IOCSUBTYPES = [
[319]	69	'BDV',
	70	'HBA',
[546]	71	'SDC',
[319]	72	]
	73
[520]	74	MWRSUBTYPES = [
	75	'GCD',
	76	'DCT',
[560]	77	'CPY',
[520]	78	]
	79
[539]	80	###################################################################################
[520]	81	# These lists must be consistent with values defined in
	82	# irq_handler.c / irq_handler.h / xml_driver.c / xml_parser.c
[539]	83	###################################################################################
[319]	84	IRQTYPES = [
	85	'HWI',
	86	'WTI',
	87	'PTI',
	88	]
	89
	90	ISRTYPES = [
	91	'ISR_DEFAULT',
	92	'ISR_TICK',
	93	'ISR_TTY_RX',
	94	'ISR_TTY_TX',
	95	'ISR_BDV',
	96	'ISR_TIMER',
	97	'ISR_WAKUP',
	98	'ISR_NIC_RX',
	99	'ISR_NIC_TX',
	100	'ISR_CMA',
	101	'ISR_MMC',
	102	'ISR_DMA',
[546]	103	'ISR_SDC',
[532]	104	'ISR_MWR',
	105	'ISR_HBA',
[319]	106	]
	107
[512]	108	VSEGTYPES = [
[319]	109	'ELF',
	110	'BLOB',
	111	'PTAB',
	112	'PERI',
	113	'BUFFER',
[512]	114	'SCHED',
[471]	115	'HEAP',
[319]	116	]
	117
	118	VSEGMODES = [
	119	'____',
	120	'___U',
	121	'__W_',
	122	'__WU',
	123	'_X__',
	124	'_X_U',
	125	'_XW_',
	126	'_XWU',
	127	'C___',
	128	'C__U',
	129	'C_W_',
	130	'C_WU',
	131	'CX__',
	132	'CX_U',
	133	'CXW_',
	134	'CXWU',
	135	]
	136
	137	PSEGTYPES = [
	138	'RAM',
	139	'PERI',
	140	]
	141
[539]	142	###################################################################################
[305]	143	class Mapping( object ):
[539]	144	###################################################################################
[305]	145	def __init__( self,
[411]	146	name, # mapping name
	147	x_size, # number of clusters in a row
	148	y_size, # number of clusters in a column
[421]	149	nprocs, # max number of processors per cluster
[411]	150	x_width = X_WIDTH, # number of bits encoding x coordinate
	151	y_width = Y_WIDTH, # number of bits encoding y coordinate
[512]	152	p_width = P_WIDTH, # number of bits encoding lpid
[411]	153	paddr_width = PADDR_WIDTH, # number of bits for physical address
[512]	154	coherence = 1, # hardware cache coherence if non-zero
[411]	155	irq_per_proc = 1, # number or IRQs from XCU to processor
	156	use_ramdisk = False, # use ramdisk when true
	157	x_io = 0, # cluster_io x coordinate
	158	y_io = 0, # cluster_io y coordinate
	159	peri_increment = PERI_INCREMENT, # address increment for globals
	160	reset_address = RESET_ADDRESS, # Processor wired boot_address
	161	ram_base = 0, # RAM physical base in cluster[0,0]
[539]	162	ram_size = 0 ): # RAM size per cluster (bytes)
[305]	163
[411]	164	assert ( x_size <= (1<<X_WIDTH) )
	165	assert ( y_size <= (1<<Y_WIDTH) )
	166	assert ( nprocs <= (1<<P_WIDTH) )
[406]	167
[411]	168	self.signature = MAPPING_SIGNATURE
[319]	169	self.name = name
[497]	170	self.name = name
[406]	171	self.paddr_width = paddr_width
[319]	172	self.coherence = coherence
	173	self.x_size = x_size
	174	self.y_size = y_size
[441]	175	self.nprocs = nprocs
[319]	176	self.x_width = x_width
	177	self.y_width = y_width
[406]	178	self.p_width = p_width
[319]	179	self.irq_per_proc = irq_per_proc
	180	self.use_ramdisk = use_ramdisk
	181	self.x_io = x_io
	182	self.y_io = y_io
[328]	183	self.peri_increment = peri_increment
[319]	184	self.reset_address = reset_address
[356]	185	self.ram_base = ram_base
	186	self.ram_size = ram_size
[305]	187
[319]	188	self.total_vspaces = 0
	189	self.total_globals = 0
	190	self.total_psegs = 0
	191	self.total_vsegs = 0
	192	self.total_tasks = 0
	193	self.total_procs = 0
	194	self.total_irqs = 0
	195	self.total_periphs = 0
[305]	196
[319]	197	self.clusters = []
	198	self.globs = []
	199	self.vspaces = []
[305]	200
[319]	201	for x in xrange( self.x_size ):
	202	for y in xrange( self.y_size ):
	203	cluster = Cluster( x , y )
[406]	204	cluster.index = (x * self.y_size) + y
[319]	205	self.clusters.append( cluster )
[305]	206
	207	return
	208
[319]	209	########################## add a ram pseg in a cluster
[406]	210	def addRam( self,
[319]	211	name, # pseg name
	212	base, # pseg base address
	213	size ): # pseg length (bytes)
[406]	214
[497]	215	# computes cluster index and coordinates from the base address
[356]	216	paddr_lsb_width = self.paddr_width - self.x_width - self.y_width
	217	cluster_xy = base >> paddr_lsb_width
[497]	218	x = cluster_xy >> (self.y_width);
	219	y = cluster_xy & ((1 << self.y_width) - 1)
	220	cluster_id = (x * self.y_size) + y
[305]	221
[411]	222	assert (base & VPN_ANTI_MASK) == 0
[319]	223
	224	assert (x < self.x_size) and (y < self.y_size)
[406]	225
[356]	226	assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base )
	227
	228	assert ( size == self.ram_size )
	229
[319]	230	# add one pseg in the mapping
	231	pseg = Pseg( name, base, size, x, y, 'RAM' )
	232	self.clusters[cluster_id].psegs.append( pseg )
	233	pseg.index = self.total_psegs
	234	self.total_psegs += 1
	235
	236	return pseg
	237
[512]	238	########################## add a peripheral and the associated pseg in a cluster
[406]	239	def addPeriph( self,
[319]	240	name, # associated pseg name
	241	base, # associated pseg base address
	242	size, # associated pseg length (bytes)
[406]	243	ptype, # peripheral type
[319]	244	subtype = 'NONE', # peripheral subtype
	245	channels = 1, # number of channels
[520]	246	arg0 = 0, # optional argument (semantic depends on ptype)
	247	arg1 = 0, # optional argument (semantic depends on ptype)
	248	arg2 = 0, # optional argument (semantic depends on ptype)
	249	arg3 = 0 ): # optional argument (semantic depends on ptype)
[319]	250
[497]	251	# computes cluster index and coordinates from the base address
[319]	252	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
[497]	253	x = cluster_xy >> (self.y_width);
	254	y = cluster_xy & ((1 << self.y_width) - 1)
	255	cluster_id = (x * self.y_size) + y
[305]	256
[319]	257	assert (x < self.x_size) and (y < self.y_size)
	258
[411]	259	assert (base & VPN_ANTI_MASK) == 0
[319]	260
	261	assert ptype in PERIPHTYPES
	262
[520]	263	if (ptype == 'IOC'): assert subtype in IOCSUBTYPES
	264	if (ptype == 'MWR'): assert subtype in MWRSUBTYPES
[319]	265
	266	# add one pseg into mapping
	267	pseg = Pseg( name, base, size, x, y, 'PERI' )
	268	self.clusters[cluster_id].psegs.append( pseg )
	269	pseg.index = self.total_psegs
	270	self.total_psegs += 1
	271
	272	# add one periph into mapping
[520]	273	periph = Periph( pseg, ptype, subtype, channels, arg0, arg1, arg2, arg3 )
[319]	274	self.clusters[cluster_id].periphs.append( periph )
	275	periph.index = self.total_periphs
	276	self.total_periphs += 1
	277
	278	return periph
	279
	280	################################ add an IRQ in a peripheral
	281	def addIrq( self,
	282	periph, # peripheral containing IRQ (PIC or XCU)
	283	index, # peripheral input port index
	284	isrtype, # ISR type
	285	channel = 0 ): # channel for multi-channels ISR
	286
	287	assert isrtype in ISRTYPES
	288
	289	assert index < 32
	290
[406]	291	# add one irq into mapping
[319]	292	irq = Irq( 'HWI', index , isrtype, channel )
	293	periph.irqs.append( irq )
	294	irq.index = self.total_irqs
	295	self.total_irqs += 1
	296
	297	return irq
	298
	299	########################## add a processor in a cluster
[406]	300	def addProc( self,
[319]	301	x, # cluster x coordinate
	302	y, # cluster y coordinate
[520]	303	lpid ): # processor local index
[319]	304
	305	assert (x < self.x_size) and (y < self.y_size)
	306
	307	cluster_id = (x * self.y_size) + y
	308
[406]	309	# add one proc into mapping
[520]	310	proc = Processor( x, y, lpid )
[319]	311	self.clusters[cluster_id].procs.append( proc )
	312	proc.index = self.total_procs
[305]	313	self.total_procs += 1
	314
[319]	315	return proc
	316
[411]	317	############################ add one global vseg into mapping
	318	def addGlobal( self,
	319	name, # vseg name
	320	vbase, # virtual base address
[512]	321	length, # vseg length (bytes)
[411]	322	mode, # CXWU flags
[512]	323	vtype, # vseg type
[411]	324	x, # destination x coordinate
	325	y, # destination y coordinate
	326	pseg, # destination pseg name
	327	identity = False, # identity mapping required if true
	328	local = False, # only mapped in local PTAB if true
[512]	329	big = False, # to be mapped in a big physical page
	330	binpath = '' ): # pathname for binary code if required
[319]	331
[411]	332	# two global vsegs must not overlap if they have different names
	333	for prev in self.globs:
[512]	334	if ( ((prev.vbase + prev.length) > vbase ) and
	335	((vbase + length) > prev.vbase) and
[546]	336	(prev.name[0:15] != name[0:15]) ):
[512]	337	print '[genmap error] in addGlobal()'
	338	print ' global vseg %s overlap %s' % (name, prev.name)
[546]	339	print ' %s : base = %x / size = %x' %(name, vbase, length)
	340	print ' %s : base = %x / size = %x' %(prev.name, prev.vbase, prev.length)
[411]	341	sys.exit(1)
	342
[328]	343	# add one vseg into mapping
[512]	344	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	345	identity = identity, local = local, big = big, binpath = binpath )
[348]	346
[328]	347	self.globs.append( vseg )
	348	self.total_globals += 1
[406]	349	vseg.index = self.total_vsegs
[328]	350	self.total_vsegs += 1
[406]	351
[305]	352	return
	353
[319]	354	################################ add a vspace into mapping
[406]	355	def addVspace( self,
[319]	356	name, # vspace name
[512]	357	startname ): # name of vseg containing start_vector
[319]	358
	359	# add one vspace into mapping
	360	vspace = Vspace( name, startname )
[305]	361	self.vspaces.append( vspace )
[319]	362	vspace.index = self.total_vspaces
	363	self.total_vspaces += 1
	364
	365	return vspace
[406]	366
[512]	367	################################# add a private vseg in a vspace
[319]	368	def addVseg( self,
[406]	369	vspace, # vspace containing the vseg
[319]	370	name, # vseg name
	371	vbase, # virtual base address
[512]	372	length, # vseg length (bytes)
[319]	373	mode, # CXWU flags
[512]	374	vtype, # vseg type
[319]	375	x, # destination x coordinate
	376	y, # destination y coordinate
	377	pseg, # destination pseg name
[411]	378	local = False, # only mapped in local PTAB if true
[512]	379	big = False, # to be mapped in a big physical page
	380	binpath = '' ): # pathname for binary code
[319]	381
	382	assert mode in VSEGMODES
	383
[512]	384	assert vtype in VSEGTYPES
[319]	385
	386	assert (x < self.x_size) and (y < self.y_size)
	387
	388	# add one vseg into mapping
[512]	389	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	390	identity = False, local = local, big = big, binpath = binpath )
[319]	391	vspace.vsegs.append( vseg )
	392	vseg.index = self.total_vsegs
	393	self.total_vsegs += 1
	394
	395	return vseg
	396
[406]	397	################################ add a task in a vspace
	398	def addTask( self,
[319]	399	vspace, # vspace containing task
	400	name, # task name
	401	trdid, # task index in vspace
	402	x, # destination x coordinate
	403	y, # destination y coordinate
	404	lpid, # destination processor local index
[512]	405	stackname, # name of vseg containing stack
	406	heapname, # name of vseg containing heap
[441]	407	startid ): # index in start_vector
[406]	408
[319]	409	assert (x < self.x_size) and (y < self.y_size)
[411]	410	assert lpid < self.nprocs
[319]	411
[406]	412	# add one task into mapping
[441]	413	task = Task( name, trdid, x, y, lpid, stackname, heapname, startid )
[319]	414	vspace.tasks.append( task )
	415	task.index = self.total_tasks
	416	self.total_tasks += 1
	417
	418	return task
	419
	420	#################################
	421	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
	422
	423	byte_stream = bytearray()
	424	length = len( s )
	425	if length < (nbytes - 1):
	426	for b in s:
	427	byte_stream.append( b )
	428	for x in xrange(nbytes-length):
	429	byte_stream.append( '\0' )
	430	else:
[512]	431	print '[genmap error] in str2bytes()'
	432	print ' string %s too long' % s
[319]	433	sys.exit(1)
	434
	435	return byte_stream
	436
	437	###################################
[406]	438	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
[319]	439
	440	byte_stream = bytearray()
	441	for n in xrange( nbytes ):
	442	byte_stream.append( (val >> (n<<3)) & 0xFF )
	443
	444	return byte_stream
	445
[512]	446	################
[411]	447	def xml( self ): # compute string for map.xml file generation
[319]	448
[305]	449	s = '<?xml version="1.0"?>\n\n'
[319]	450	s += '<mapping_info signature = "0x%x"\n' % (self.signature)
[305]	451	s += ' name = "%s"\n' % (self.name)
	452	s += ' x_size = "%d"\n' % (self.x_size)
	453	s += ' y_size = "%d"\n' % (self.y_size)
	454	s += ' x_width = "%d"\n' % (self.x_width)
	455	s += ' y_width = "%d"\n' % (self.y_width)
	456	s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc)
[319]	457	s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk)
[305]	458	s += ' x_io = "%d"\n' % (self.x_io)
	459	s += ' y_io = "%d" >\n' % (self.y_io)
[319]	460	s += '\n'
	461
[305]	462	s += ' <clusterset>\n'
	463	for x in xrange ( self.x_size ):
	464	for y in xrange ( self.y_size ):
[406]	465	cluster_id = (x * self.y_size) + y
[319]	466	s += self.clusters[cluster_id].xml()
[305]	467	s += ' </clusterset>\n'
[319]	468	s += '\n'
	469
[305]	470	s += ' <globalset>\n'
[319]	471	for vseg in self.globs: s += vseg.xml()
[305]	472	s += ' </globalset>\n'
[319]	473	s += '\n'
	474
[305]	475	s += ' <vspaceset>\n'
[319]	476	for vspace in self.vspaces: s += vspace.xml()
[305]	477	s += ' </vspaceset>\n'
[319]	478
[305]	479	s += '</mapping_info>\n'
	480	return s
[319]	481
[512]	482	##########################
[411]	483	def cbin( self, verbose ): # C binary structure for map.bin file generation
[319]	484
	485	byte_stream = bytearray()
	486
	487	# header
	488	byte_stream += self.int2bytes(4, self.signature)
[406]	489	byte_stream += self.int2bytes(4, self.x_size)
	490	byte_stream += self.int2bytes(4, self.y_size)
	491	byte_stream += self.int2bytes(4, self.x_width)
	492	byte_stream += self.int2bytes(4, self.y_width)
	493	byte_stream += self.int2bytes(4, self.x_io)
	494	byte_stream += self.int2bytes(4, self.y_io)
	495	byte_stream += self.int2bytes(4, self.irq_per_proc)
	496	byte_stream += self.int2bytes(4, self.use_ramdisk)
	497	byte_stream += self.int2bytes(4, self.total_globals)
	498	byte_stream += self.int2bytes(4, self.total_vspaces)
	499	byte_stream += self.int2bytes(4, self.total_psegs)
	500	byte_stream += self.int2bytes(4, self.total_vsegs)
	501	byte_stream += self.int2bytes(4, self.total_tasks)
	502	byte_stream += self.int2bytes(4, self.total_procs)
	503	byte_stream += self.int2bytes(4, self.total_irqs)
	504	byte_stream += self.int2bytes(4, self.total_periphs)
[546]	505	byte_stream += self.str2bytes(64, self.name)
[319]	506
	507	if ( verbose ):
[406]	508	print '\n'
[319]	509	print 'name = %s' % self.name
	510	print 'signature = %x' % self.signature
	511	print 'x_size = %d' % self.x_size
	512	print 'y_size = %d' % self.y_size
	513	print 'x_width = %d' % self.x_width
	514	print 'y_width = %d' % self.y_width
[406]	515	print 'x_io = %d' % self.x_io
	516	print 'y_io = %d' % self.y_io
[319]	517	print 'irq_per_proc = %d' % self.irq_per_proc
	518	print 'use_ramdisk = %d' % self.use_ramdisk
	519	print 'total_globals = %d' % self.total_globals
[406]	520	print 'total_psegs = %d' % self.total_psegs
	521	print 'total_vsegs = %d' % self.total_vsegs
	522	print 'total_tasks = %d' % self.total_tasks
	523	print 'total_procs = %d' % self.total_procs
	524	print 'total_irqs = %d' % self.total_irqs
[319]	525	print 'total_periphs = %d' % self.total_periphs
[406]	526	print '\n'
[319]	527
	528	# clusters array
	529	index = 0
	530	for cluster in self.clusters:
	531	byte_stream += cluster.cbin( self, verbose, index )
	532	index += 1
	533
	534	if ( verbose ): print '\n'
	535
	536	# psegs array
	537	index = 0
	538	for cluster in self.clusters:
[406]	539	for pseg in cluster.psegs:
[319]	540	byte_stream += pseg.cbin( self, verbose, index, cluster )
	541	index += 1
	542
	543	if ( verbose ): print '\n'
	544
	545	# vspaces array
	546	index = 0
[406]	547	for vspace in self.vspaces:
	548	byte_stream += vspace.cbin( self, verbose, index )
[319]	549	index += 1
	550
	551	if ( verbose ): print '\n'
	552
	553	# vsegs array
	554	index = 0
	555	for vseg in self.globs:
	556	byte_stream += vseg.cbin( self, verbose, index )
	557	index += 1
	558	for vspace in self.vspaces:
[406]	559	for vseg in vspace.vsegs:
[319]	560	byte_stream += vseg.cbin( self, verbose, index )
	561	index += 1
	562
	563	if ( verbose ): print '\n'
	564
	565	# tasks array
	566	index = 0
	567	for vspace in self.vspaces:
[406]	568	for task in vspace.tasks:
[319]	569	byte_stream += task.cbin( self, verbose, index, vspace )
	570	index += 1
	571
	572	if ( verbose ): print '\n'
	573
	574	# procs array
	575	index = 0
	576	for cluster in self.clusters:
[406]	577	for proc in cluster.procs:
[319]	578	byte_stream += proc.cbin( self, verbose, index )
	579	index += 1
[406]	580
[319]	581	if ( verbose ): print '\n'
	582
	583	# irqs array
[406]	584	index = 0
[319]	585	for cluster in self.clusters:
	586	for periph in cluster.periphs:
	587	for irq in periph.irqs:
	588	byte_stream += irq.cbin( self, verbose, index )
	589	index += 1
	590
	591	if ( verbose ): print '\n'
	592
	593	# periphs array
	594	index = 0
	595	for cluster in self.clusters:
[406]	596	for periph in cluster.periphs:
[319]	597	byte_stream += periph.cbin( self, verbose, index )
	598	index += 1
	599
	600	return byte_stream
	601	# end of cbin()
[406]	602
[539]	603	#######################################################################
	604	def giet_vsegs( self ): # compute string for giet_vsegs.ld file
[319]	605	# required by giet_vm compilation
	606
[406]	607	# search the vsegs required for the giet_vsegs.ld
[319]	608	boot_code_found = False
	609	boot_data_found = False
	610	kernel_uncdata_found = False
	611	kernel_data_found = False
	612	kernel_code_found = False
	613	kernel_init_found = False
	614	for vseg in self.globs:
[348]	615
[539]	616	if ( vseg.name[0:13] == 'seg_boot_code' ):
[406]	617	boot_code_vbase = vseg.vbase
[512]	618	boot_code_size = vseg.length
[319]	619	boot_code_found = True
	620
[539]	621	if ( vseg.name[0:13] == 'seg_boot_data' ):
[406]	622	boot_data_vbase = vseg.vbase
[512]	623	boot_data_size = vseg.length
[319]	624	boot_data_found = True
	625
[539]	626	if ( vseg.name[0:15] == 'seg_kernel_data' ):
[406]	627	kernel_data_vbase = vseg.vbase
[512]	628	kernel_data_size = vseg.length
[319]	629	kernel_data_found = True
	630
[539]	631	if ( vseg.name[0:15] == 'seg_kernel_code' ):
[406]	632	kernel_code_vbase = vseg.vbase
[512]	633	kernel_code_size = vseg.length
[319]	634	kernel_code_found = True
	635
[539]	636	if ( vseg.name[0:15] == 'seg_kernel_init' ):
[406]	637	kernel_init_vbase = vseg.vbase
[512]	638	kernel_init_size = vseg.length
[319]	639	kernel_init_found = True
	640
	641	# check if all required vsegs have been found
[406]	642	if ( boot_code_found == False ):
[512]	643	print '[genmap error] in giet_vsegs()'
	644	print ' seg_boot_code vseg missing'
[319]	645	sys.exit()
	646
[406]	647	if ( boot_data_found == False ):
[512]	648	print '[genmap error] in giet_vsegs()'
	649	print ' seg_boot_data vseg missing'
[319]	650	sys.exit()
	651
[406]	652	if ( kernel_data_found == False ):
[512]	653	print '[genmap error] in giet_vsegs()'
	654	print ' seg_kernel_data vseg missing'
[319]	655	sys.exit()
	656
	657	if ( kernel_code_found == False ):
[512]	658	print '[genmap error] in giet_vsegs()'
	659	print ' seg_kernel_code vseg missing'
[319]	660	sys.exit()
	661
	662	if ( kernel_init_found == False ):
[512]	663	print '[genmap error] in giet_vsegs()'
	664	print ' seg_kernel_init vseg missing'
[319]	665	sys.exit()
	666
	667	# build string
[406]	668	s = '/* Generated by genmap for %s */\n' % self.name
[319]	669	s += '\n'
	670
[406]	671	s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase
	672	s += 'boot_code_size = 0x%x;\n' % boot_code_size
[319]	673	s += '\n'
[406]	674	s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase
	675	s += 'boot_data_size = 0x%x;\n' % boot_data_size
[319]	676	s += '\n'
[406]	677	s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase
	678	s += 'kernel_code_size = 0x%x;\n' % kernel_code_size
[319]	679	s += '\n'
[406]	680	s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase
	681	s += 'kernel_data_size = 0x%x;\n' % kernel_data_size
[319]	682	s += '\n'
[406]	683	s += 'kernel_init_vbase = 0x%x;\n' % kernel_init_vbase
	684	s += 'kernel_init_size = 0x%x;\n' % kernel_init_size
[319]	685	s += '\n'
	686
	687	return s
[406]	688
[539]	689	######################################################################
	690	def hard_config( self ): # compute string for hard_config.h file
[411]	691	# required by
[319]	692	# - top.cpp compilation
	693	# - giet_vm compilation
	694	# - tsar_preloader compilation
	695
	696	nb_total_procs = 0
	697
	698	# for each peripheral type, define default values
[406]	699	# for pbase address, size, number of components, and channels
[319]	700	nb_cma = 0
	701	cma_channels = 0
	702	seg_cma_base = 0xFFFFFFFF
	703	seg_cma_size = 0
	704
	705	nb_dma = 0
	706	dma_channels = 0
	707	seg_dma_base = 0xFFFFFFFF
	708	seg_dma_size = 0
	709
	710	nb_fbf = 0
	711	fbf_channels = 0
	712	seg_fbf_base = 0xFFFFFFFF
	713	seg_fbf_size = 0
[520]	714	fbf_arg0 = 0
	715	fbf_arg1 = 0
[319]	716
	717	nb_iob = 0
	718	iob_channels = 0
	719	seg_iob_base = 0xFFFFFFFF
	720	seg_iob_size = 0
	721
	722	nb_ioc = 0
	723	ioc_channels = 0
	724	seg_ioc_base = 0xFFFFFFFF
	725	seg_ioc_size = 0
[560]	726	use_ioc_bdv = False
	727	use_ioc_sdc = False
	728	use_ioc_hba = False
[319]	729
	730	nb_mmc = 0
	731	mmc_channels = 0
	732	seg_mmc_base = 0xFFFFFFFF
	733	seg_mmc_size = 0
	734
	735	nb_mwr = 0
	736	mwr_channels = 0
	737	seg_mwr_base = 0xFFFFFFFF
	738	seg_mwr_size = 0
[520]	739	mwr_arg0 = 0
	740	mwr_arg1 = 0
	741	mwr_arg2 = 0
	742	mwr_arg3 = 0
[560]	743	use_mwr_gcd = False
	744	use_mwr_dct = False
	745	use_mwr_cpy = False
[319]	746
	747	nb_nic = 0
	748	nic_channels = 0
	749	seg_nic_base = 0xFFFFFFFF
	750	seg_nic_size = 0
	751
	752	nb_pic = 0
	753	pic_channels = 0
	754	seg_pic_base = 0xFFFFFFFF
	755	seg_pic_size = 0
	756
	757	nb_rom = 0
	758	rom_channels = 0
	759	seg_rom_base = 0xFFFFFFFF
	760	seg_rom_size = 0
	761
	762	nb_sim = 0
	763	sim_channels = 0
	764	seg_sim_base = 0xFFFFFFFF
	765	seg_sim_size = 0
	766
	767	nb_tim = 0
	768	tim_channels = 0
	769	seg_tim_base = 0xFFFFFFFF
	770	seg_tim_size = 0
	771
	772	nb_tty = 0
	773	tty_channels = 0
	774	seg_tty_base = 0xFFFFFFFF
	775	seg_tty_size = 0
	776
	777	nb_xcu = 0
	778	xcu_channels = 0
	779	seg_xcu_base = 0xFFFFFFFF
	780	seg_xcu_size = 0
[520]	781	xcu_arg0 = 0
[319]	782
[491]	783	nb_drom = 0
	784	drom_channels = 0
	785	seg_drom_base = 0xFFFFFFFF
	786	seg_drom_size = 0
	787
[319]	788	# get peripherals attributes
	789	for cluster in self.clusters:
	790	for periph in cluster.periphs:
[406]	791	if ( periph.ptype == 'CMA' ):
[319]	792	seg_cma_base = periph.pseg.base & 0xFFFFFFFF
	793	seg_cma_size = periph.pseg.size
	794	cma_channels = periph.channels
	795	nb_cma +=1
	796
[406]	797	elif ( periph.ptype == 'DMA' ):
	798	seg_dma_base = periph.pseg.base & 0xFFFFFFFF
[319]	799	seg_dma_size = periph.pseg.size
	800	dma_channels = periph.channels
	801	nb_dma +=1
	802
[406]	803	elif ( periph.ptype == 'FBF' ):
[319]	804	seg_fbf_base = periph.pseg.base & 0xFFFFFFFF
	805	seg_fbf_size = periph.pseg.size
	806	fbf_channels = periph.channels
[520]	807	fbf_arg0 = periph.arg0
	808	fbf_arg1 = periph.arg1
[319]	809	nb_fbf +=1
	810
	811	elif ( periph.ptype == 'IOB' ):
	812	seg_iob_base = periph.pseg.base & 0xFFFFFFFF
	813	seg_iob_size = periph.pseg.size
	814	iob_channels = periph.channels
	815	nb_iob +=1
	816
[406]	817	elif ( periph.ptype == 'IOC' ):
[319]	818	seg_ioc_base = periph.pseg.base & 0xFFFFFFFF
	819	seg_ioc_size = periph.pseg.size
	820	ioc_channels = periph.channels
	821	nb_ioc += 1
[560]	822	if ( periph.subtype == 'BDV' ): use_ioc_bdv = True
	823	if ( periph.subtype == 'HBA' ): use_ioc_hba = True
	824	if ( periph.subtype == 'SDC' ): use_ioc_sdc = True
[404]	825
[319]	826	elif ( periph.ptype == 'MMC' ):
	827	seg_mmc_base = periph.pseg.base & 0xFFFFFFFF
	828	seg_mmc_size = periph.pseg.size
	829	mmc_channels = periph.channels
	830	nb_mmc +=1
	831
	832	elif ( periph.ptype == 'MWR' ):
	833	seg_mwr_base = periph.pseg.base & 0xFFFFFFFF
[520]	834	seg_mwr_size = periph.pseg.size
[319]	835	mwr_channels = periph.channels
[520]	836	mwr_arg0 = periph.arg0
	837	mwr_arg1 = periph.arg1
	838	mwr_arg2 = periph.arg2
	839	mwr_arg3 = periph.arg3
[319]	840	nb_mwr +=1
[560]	841	if ( periph.subtype == 'GCD' ): use_mwr_gcd = True
	842	if ( periph.subtype == 'DCT' ): use_mwr_dct = True
	843	if ( periph.subtype == 'CPY' ): use_mwr_cpy = True
[319]	844
	845	elif ( periph.ptype == 'ROM' ):
	846	seg_rom_base = periph.pseg.base & 0xFFFFFFFF
	847	seg_rom_size = periph.pseg.size
	848	rom_channels = periph.channels
	849	nb_rom +=1
	850
[491]	851	elif ( periph.ptype == 'DROM' ):
	852	seg_drom_base = periph.pseg.base & 0xFFFFFFFF
	853	seg_drom_size = periph.pseg.size
	854	drom_channels = periph.channels
	855	nb_drom +=1
	856
[319]	857	elif ( periph.ptype == 'SIM' ):
	858	seg_sim_base = periph.pseg.base & 0xFFFFFFFF
	859	seg_sim_size = periph.pseg.size
	860	sim_channels = periph.channels
	861	nb_sim +=1
	862
[406]	863	elif ( periph.ptype == 'NIC' ):
[319]	864	seg_nic_base = periph.pseg.base & 0xFFFFFFFF
	865	seg_nic_size = periph.pseg.size
	866	nic_channels = periph.channels
	867	nb_nic +=1
	868
[406]	869	elif ( periph.ptype == 'PIC' ):
[319]	870	seg_pic_base = periph.pseg.base & 0xFFFFFFFF
	871	seg_pic_size = periph.pseg.size
	872	pic_channels = periph.channels
	873	nb_pic +=1
[406]	874
	875	elif ( periph.ptype == 'TIM' ):
[319]	876	seg_tim_base = periph.pseg.base & 0xFFFFFFFF
	877	seg_tim_size = periph.pseg.size
	878	tim_channels = periph.channels
	879	nb_tim +=1
[406]	880
[319]	881	elif ( periph.ptype == 'TTY' ):
	882	seg_tty_base = periph.pseg.base & 0xFFFFFFFF
	883	seg_tty_size = periph.pseg.size
	884	tty_channels = periph.channels
	885	nb_tty +=1
[406]	886
	887	elif ( periph.ptype == 'XCU' ):
[319]	888	seg_xcu_base = periph.pseg.base & 0xFFFFFFFF
	889	seg_xcu_size = periph.pseg.size
	890	xcu_channels = periph.channels
[520]	891	xcu_arg0 = periph.arg0
[537]	892	xcu_arg1 = periph.arg1
	893	xcu_arg2 = periph.arg2
[319]	894	nb_xcu +=1
[406]	895
[319]	896	# no more than two access to external peripherals
[406]	897	assert ( nb_fbf <= 2 )
	898	assert ( nb_cma <= 2 )
	899	assert ( nb_ioc <= 2 )
	900	assert ( nb_nic <= 2 )
	901	assert ( nb_tim <= 2 )
	902	assert ( nb_tty <= 2 )
[319]	903	assert ( nb_pic <= 2 )
	904
	905	# one and only one type of IOC controller
[560]	906	nb_ioc_types = 0
	907	if use_ioc_hba: nb_ioc_types += 1
	908	if use_ioc_bdv: nb_ioc_types += 1
	909	if use_ioc_sdc: nb_ioc_types += 1
	910	if self.use_ramdisk: nb_ioc_types += 1
	911	assert ( nb_ioc_types == 1 )
[404]	912
[560]	913	# one and only one type of MWR controller
	914	nb_mwr_types = 0
	915	if use_mwr_gcd: nb_mwr_types += 1
	916	if use_mwr_dct: nb_mwr_types += 1
	917	if use_mwr_cpy: nb_mwr_types += 1
	918	if ( nb_mwr > 0 ) : assert ( nb_mwr_types == 1 )
	919
[319]	920	# Compute total number of processors
	921	for cluster in self.clusters:
	922	nb_total_procs += len( cluster.procs )
	923
	924	# Compute physical addresses for BOOT vsegs
	925	boot_mapping_found = False
	926	boot_code_found = False
	927	boot_data_found = False
	928	boot_stack_found = False
	929
	930	for vseg in self.globs:
	931	if ( vseg.name == 'seg_boot_mapping' ):
[406]	932	boot_mapping_base = vseg.vbase
[512]	933	boot_mapping_size = vseg.length
[348]	934	boot_mapping_identity = vseg.identity
[319]	935	boot_mapping_found = True
	936
	937	if ( vseg.name == 'seg_boot_code' ):
[406]	938	boot_code_base = vseg.vbase
[512]	939	boot_code_size = vseg.length
[348]	940	boot_code_identity = vseg.identity
[319]	941	boot_code_found = True
	942
[406]	943	if ( vseg.name == 'seg_boot_data' ):
	944	boot_data_base = vseg.vbase
[512]	945	boot_data_size = vseg.length
[348]	946	boot_data_identity = vseg.identity
[319]	947	boot_data_found = True
	948
	949	if ( vseg.name == 'seg_boot_stack' ):
[406]	950	boot_stack_base = vseg.vbase
[512]	951	boot_stack_size = vseg.length
[348]	952	boot_stack_identity = vseg.identity
[319]	953	boot_stack_found = True
	954
[328]	955	# check that BOOT vsegs are found and identity mapping
[348]	956	if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ):
[512]	957	print '[genmap error] in hard_config()'
	958	print ' seg_boot_mapping missing or not identity mapping'
[319]	959	sys.exit()
	960
[406]	961	if ( (boot_code_found == False) or (boot_code_identity == False) ):
[512]	962	print '[genmap error] in hard_config()'
	963	print ' seg_boot_code missing or not identity mapping'
[319]	964	sys.exit()
	965
[406]	966	if ( (boot_data_found == False) or (boot_data_identity == False) ):
[512]	967	print '[genmap error] in hard_config()'
	968	print ' seg_boot_data missing or not identity mapping'
[319]	969	sys.exit()
	970
[348]	971	if ( (boot_stack_found == False) or (boot_stack_identity == False) ):
[512]	972	print '[genmap error] in giet_vsegs()'
	973	print ' seg_boot_stask missing or not identity mapping'
[319]	974	sys.exit()
	975
	976	# Search RAMDISK global vseg if required
	977	seg_rdk_base = 0xFFFFFFFF
	978	seg_rdk_size = 0
	979	seg_rdk_found = False
	980
	981	if self.use_ramdisk:
	982	for vseg in self.globs:
[497]	983	if ( vseg.name == 'seg_ramdisk' ):
[319]	984	seg_rdk_base = vseg.vbase
[512]	985	seg_rdk_size = vseg.length
[319]	986	seg_rdk_found = True
	987
	988	if ( seg_rdk_found == False ):
	989	print 'Error in hard_config() "seg_ramdisk" not found'
	990	sys.exit(1)
	991
	992	# build string
[406]	993	s = '/* Generated by genmap for %s */\n' % self.name
[319]	994	s += '\n'
	995	s += '#ifndef HARD_CONFIG_H\n'
	996	s += '#define HARD_CONFIG_H\n'
	997	s += '\n'
	998
[406]	999	s += '/* General platform parameters */\n'
[319]	1000	s += '\n'
	1001	s += '#define X_SIZE %d\n' % self.x_size
	1002	s += '#define Y_SIZE %d\n' % self.y_size
	1003	s += '#define X_WIDTH %d\n' % self.x_width
	1004	s += '#define Y_WIDTH %d\n' % self.y_width
[406]	1005	s += '#define P_WIDTH %d\n' % self.p_width
[319]	1006	s += '#define X_IO %d\n' % self.x_io
[406]	1007	s += '#define Y_IO %d\n' % self.y_io
[411]	1008	s += '#define NB_PROCS_MAX %d\n' % self.nprocs
[319]	1009	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc
	1010	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
	1011	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs
	1012	s += '\n'
	1013
[406]	1014	s += '/* Peripherals */\n'
[319]	1015	s += '\n'
	1016	s += '#define NB_TTY_CHANNELS %d\n' % tty_channels
	1017	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
	1018	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
	1019	s += '#define NB_CMA_CHANNELS %d\n' % cma_channels
	1020	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
	1021	s += '#define NB_DMA_CHANNELS %d\n' % dma_channels
	1022	s += '\n'
	1023	s += '#define USE_XCU %d\n' % ( nb_xcu != 0 )
[560]	1024	s += '#define USE_DMA %d\n' % ( nb_dma != 0 )
	1025	s += '\n'
[319]	1026	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
	1027	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
	1028	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
[546]	1029	s += '#define USE_NIC %d\n' % ( nb_nic != 0 )
[319]	1030	s += '\n'
[560]	1031	s += '#define USE_IOC_BDV %d\n' % use_ioc_bdv
	1032	s += '#define USE_IOC_SDC %d\n' % use_ioc_sdc
	1033	s += '#define USE_IOC_HBA %d\n' % use_ioc_hba
[403]	1034	s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk
[319]	1035	s += '\n'
[560]	1036	s += '#define USE_MWR_GCD %d\n' % use_mwr_gcd
	1037	s += '#define USE_MWR_DCT %d\n' % use_mwr_dct
	1038	s += '#define USE_MWR_CPY %d\n' % use_mwr_cpy
	1039	s += '\n'
[520]	1040	s += '#define FBUF_X_SIZE %d\n' % fbf_arg0
	1041	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg1
[328]	1042	s += '\n'
[537]	1043	s += '#define XCU_NB_HWI %d\n' % xcu_arg0
	1044	s += '#define XCU_NB_PTI %d\n' % xcu_arg1
	1045	s += '#define XCU_NB_WTI %d\n' % xcu_arg2
	1046	s += '#define XCU_NB_OUT %d\n' % xcu_channels
[328]	1047	s += '\n'
[520]	1048	s += '#define MWR_TO_COPROC %d\n' % mwr_arg0
	1049	s += '#define MWR_FROM_COPROC %d\n' % mwr_arg1
	1050	s += '#define MWR_CONFIG %d\n' % mwr_arg2
	1051	s += '#define MWR_STATUS %d\n' % mwr_arg3
	1052	s += '\n'
[319]	1053
[356]	1054	s += '/* base addresses and sizes for physical segments */\n'
[319]	1055	s += '\n'
[406]	1056	s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base
	1057	s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size
[356]	1058	s += '\n'
[406]	1059	s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base
	1060	s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size
[319]	1061	s += '\n'
[406]	1062	s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base
	1063	s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size
[319]	1064	s += '\n'
[406]	1065	s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base
	1066	s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size
[319]	1067	s += '\n'
[406]	1068	s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base
	1069	s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size
[319]	1070	s += '\n'
[406]	1071	s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base
	1072	s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size
[319]	1073	s += '\n'
[406]	1074	s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base
	1075	s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size
[319]	1076	s += '\n'
[406]	1077	s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base
	1078	s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size
[319]	1079	s += '\n'
[406]	1080	s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base
	1081	s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size
[319]	1082	s += '\n'
[406]	1083	s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base
	1084	s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size
[319]	1085	s += '\n'
[406]	1086	s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base
	1087	s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size
[319]	1088	s += '\n'
[406]	1089	s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base
	1090	s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size
[319]	1091	s += '\n'
[406]	1092	s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base
	1093	s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size
[319]	1094	s += '\n'
[406]	1095	s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base
	1096	s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size
[319]	1097	s += '\n'
[406]	1098	s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base
	1099	s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size
[319]	1100	s += '\n'
	1101	s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base
	1102	s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size
	1103	s += '\n'
[491]	1104	s += '#define SEG_DROM_BASE 0x%x\n' % seg_drom_base
	1105	s += '#define SEG_DROM_SIZE 0x%x\n' % seg_drom_size
	1106	s += '\n'
[328]	1107	s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment
[319]	1108	s += '\n'
	1109
[326]	1110	s += '/* physical base addresses for identity mapped vsegs */\n'
	1111	s += '/* used by the GietVM OS */\n'
[319]	1112	s += '\n'
	1113	s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base
	1114	s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size
	1115	s += '\n'
	1116	s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base
	1117	s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size
	1118	s += '\n'
	1119	s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base
	1120	s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size
	1121	s += '\n'
	1122	s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base
	1123	s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size
	1124	s += '#endif\n'
[406]	1125
[319]	1126	return s
	1127
	1128	# end of hard_config()
	1129
[539]	1130	#################################################################
	1131	def linux_dts( self ): # compute string for linux.dts file
[424]	1132	# used for linux configuration
[411]	1133	# header
	1134	s = '/dts-v1/;\n'
	1135	s += '\n'
	1136	s += '/{\n'
[421]	1137	s += ' compatible = "tsar,%s";\n' % self.name
[411]	1138	s += ' #address-cells = <2>;\n' # physical address on 64 bits
	1139	s += ' #size-cells = <1>;\n' # segment size on 32 bits
	1140	s += ' model = "%s";\n' % self.name
	1141	s += '\n'
	1142
	1143	# linux globals arguments
	1144	s += ' chosen {\n'
	1145	s += ' linux,stdout-path = &tty;\n'
	1146	s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n'
[424]	1147	s += ' };\n\n'
[411]	1148
	1149	# cpus (for each cluster)
	1150	s += ' cpus {\n'
	1151	s += ' #address-cells = <1>;\n'
	1152	s += ' #size-cells = <0>;\n'
	1153
	1154	for cluster in self.clusters:
	1155	for proc in cluster.procs:
	1156	x = cluster.x
	1157	y = cluster.y
	1158	l = proc.lpid
[421]	1159	proc_id = (((x << self.y_width) + y) << self.p_width) + l
[411]	1160	s += ' cpu@%d_%d_%d {\n' %(x,y,l)
	1161	s += ' device_type = "cpu";\n'
	1162	s += ' compatible = "soclib,mips32el";\n'
	1163	s += ' reg = <0x%x>;\n' % proc_id
	1164	s += ' };\n'
	1165	s += '\n'
	1166
	1167	s += ' };\n\n'
	1168
	1169	# devices (ram or peripheral) are grouped per cluster
[424]	1170	# the "compatible" attribute links a peripheral device
[411]	1171	# to one or several drivers identified by ("major","minor")
	1172
	1173	for cluster in self.clusters:
	1174	x = cluster.x
	1175	y = cluster.y
	1176	found_xcu = False
	1177	found_pic = False
	1178
	1179	s += ' /* cluster[%d,%d] */\n\n' % (x,y)
	1180
	1181	# scan all psegs to find RAM in current cluster
	1182	for pseg in cluster.psegs:
	1183	if ( pseg.segtype == 'RAM' ):
	1184	msb = pseg.base >> 32
	1185	lsb = pseg.base & 0xFFFFFFFF
	1186	size = pseg.size
	1187
[424]	1188	s += ' ram_%d_%d: ram@0x%x {\n' % (x, y, pseg.base)
[411]	1189	s += ' device_type = "memory";\n'
	1190	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1191	s += ' };\n\n'
	1192
	1193	# scan all periphs to find XCU or PIC in current cluster
	1194	for periph in cluster.periphs:
	1195	msb = periph.pseg.base >> 32
	1196	lsb = periph.pseg.base & 0xFFFFFFFF
	1197	size = periph.pseg.size
	1198
	1199	# search XCU (can be replicated)
[424]	1200	if ( (periph.ptype == 'XCU') ):
[411]	1201	found_xcu = True
	1202	xcu = periph
[424]	1203	irq_ctrl_name = 'xcu_%d_%d' % (x, y)
[411]	1204
[424]	1205	s += ' %s: xcu@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
[421]	1206	s += ' compatible = "soclib,vci_xicu","soclib,vci_xicu_timer";\n'
[411]	1207	s += ' interrupt-controller;\n'
	1208	s += ' #interrupt-cells = <1>;\n'
[512]	1209	s += ' clocks = <&freq>;\n' # XCU contains a timer
[424]	1210	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[411]	1211	s += ' };\n\n'
	1212
	1213	# search PIC (non replicated)
[424]	1214	if ( periph.ptype == 'PIC' ):
[411]	1215	found_pic = True
	1216	pic = periph
	1217	irq_ctrl_name = 'pic'
	1218
[424]	1219	s += ' %s: pic@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
[421]	1220	s += ' compatible = "soclib,vci_iopic";\n'
[411]	1221	s += ' interrupt-controller;\n'
	1222	s += ' #interrupt-cells = <1>;\n'
	1223	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1224	s += ' };\n\n'
	1225
	1226	# we need one interrupt controler in any cluster containing peripherals
[512]	1227	if ( (found_xcu == False) and
	1228	(found_pic == False) and
	1229	(len(cluster.periphs) > 0) ):
	1230	print '[genmap error] in linux_dts()'
	1231	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[424]	1232	sys.exit(1)
[411]	1233
	1234	if ( found_pic == True ): irq_ctrl = pic
	1235	else: irq_ctrl = xcu
[424]	1236
[411]	1237	# scan all periphs to find TTY and IOC in current cluster
	1238	for periph in cluster.periphs:
	1239	msb = periph.pseg.base >> 32
	1240	lsb = periph.pseg.base & 0xFFFFFFFF
	1241	size = periph.pseg.size
	1242
	1243	# search TTY (non replicated)
[424]	1244	if ( periph.ptype == 'TTY' ):
[411]	1245
[539]	1246	# get HWI index to XCU or PIC (only TTY0 is used by Linux)
[411]	1247	hwi_id = 0xFFFFFFFF
	1248	for irq in irq_ctrl.irqs:
[512]	1249	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ):
	1250	hwi_id = irq.srcid
	1251
[411]	1252	if ( hwi_id == 0xFFFFFFFF ):
[512]	1253	print '[genmap error] in linux.dts()'
	1254	print ' IRQ_TTY_RX not found'
[411]	1255	sys.exit(1)
	1256
[526]	1257	s += ' tty: tty@0x%x {\n' % (periph.pseg.base)
[421]	1258	s += ' compatible = "soclib,vci_multi_tty";\n'
[411]	1259	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
[424]	1260	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1261	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1262	s += ' };\n\n'
	1263
	1264	# search IOC (non replicated)
[424]	1265	elif ( periph.ptype == 'IOC' ):
[411]	1266
	1267	if ( periph.subtype == 'BDV' ):
	1268
	1269	# get irq line index associated to bdv
	1270	hwi_id = 0xFFFFFFFF
	1271	for irq in irq_ctrl.irqs:
	1272	if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid
[512]	1273
[411]	1274	if ( hwi_id == 0xFFFFFFFF ):
[512]	1275	print '[genmap error] in linux.dts()'
	1276	print ' ISR_BDV not found'
[411]	1277	sys.exit(1)
	1278
[526]	1279	s += ' bdv: bdv@0x%x {\n' % (periph.pseg.base)
[517]	1280	s += ' compatible = "tsar,vci_block_device";\n'
[411]	1281	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
[424]	1282	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1283	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1284	s += ' };\n\n'
	1285
[526]	1286	else:
[539]	1287	print '[genmap warning] in linux_dts() : '
	1288	print ' %s' % (periph.subtype),
[526]	1289	print 'peripheral not supported by LINUX'
[411]	1290
[465]	1291	# XCU or PIC have been already parsed
	1292	elif ( periph.ptype == 'XCU' ) or ( periph.ptype == 'PIC' ):
	1293	pass
	1294
[411]	1295	# other peripherals
[424]	1296	else:
[539]	1297	print '[genmap warning] in linux_dts() : '
	1298	print ' %s peripheral not supported by LINUX' % (periph.ptype)
[424]	1299
	1300	# clocks
[411]	1301	s += ' /* clocks */\n\n'
	1302	s += ' clocks {\n'
[424]	1303	s += ' freq: freq@50MHZ {\n'
[411]	1304	s += ' #clock-cells = <0>;\n'
	1305	s += ' compatible = "fixed-clock";\n'
	1306	s += ' clock-frequency = <50000000>;\n'
	1307	s += ' };\n'
	1308	s += ' };\n\n'
	1309	s += ' cpuclk {\n'
[421]	1310	s += ' compatible = "soclib,mips32_clksrc";\n'
[424]	1311	s += ' clocks = <&freq>;\n'
[411]	1312	s += ' };\n'
	1313	s += '};\n'
	1314
	1315	return s
	1316	# end linux_dts()
	1317
	1318
[539]	1319	#################################################################
	1320	def netbsd_dts( self ): # compute string for netbsd.dts file
[406]	1321	# used for netbsd configuration
[319]	1322	# header
	1323	s = '/dts-v1/;\n'
	1324	s += '\n'
	1325	s += '/{\n'
[406]	1326	s += ' #address-cells = <2>;\n'
	1327	s += ' #size-cells = <1>;\n'
[319]	1328
	1329	# cpus (for each cluster)
	1330	s += ' cpus {\n'
	1331	s += ' #address-cells = <1>;\n'
	1332	s += ' #size-cells = <0>;\n'
	1333
	1334	for cluster in self.clusters:
	1335	for proc in cluster.procs:
[539]	1336	proc_id = (((cluster.x << self.y_width) + cluster.y)
	1337	<< self.p_width) + proc.lpid
[319]	1338
	1339	s += ' Mips,32@0x%x {\n' % proc_id
	1340	s += ' device_type = "cpu";\n'
	1341	s += ' icudev_type = "cpu:mips";\n'
	1342	s += ' name = "Mips,32";\n'
	1343	s += ' reg = <0x%x>;\n' % proc_id
	1344	s += ' };\n'
	1345	s += '\n'
	1346
	1347	s += ' };\n'
	1348
[411]	1349	# physical memory banks (for each cluster)
[319]	1350	for cluster in self.clusters:
	1351	for pseg in cluster.psegs:
	1352
	1353	if ( pseg.segtype == 'RAM' ):
	1354	msb = pseg.base >> 32
	1355	lsb = pseg.base & 0xFFFFFFFF
	1356	size = pseg.size
	1357
	1358	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
	1359	s += ' cached = <1>;\n'
	1360	s += ' device_type = "memory";\n'
[539]	1361	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb,lsb,size)
[319]	1362	s += ' };\n'
	1363
	1364	# peripherals (for each cluster)
	1365	for cluster in self.clusters:
[411]	1366	x = cluster.x
	1367	y = cluster.y
[319]	1368
[406]	1369	# research XCU component
[319]	1370	found_xcu = False
	1371	for periph in cluster.periphs:
[406]	1372	if ( (periph.ptype == 'XCU') ):
[319]	1373	found_xcu = True
	1374	xcu = periph
	1375	msb = periph.pseg.base >> 32
	1376	lsb = periph.pseg.base & 0xFFFFFFFF
	1377	size = periph.pseg.size
	1378
	1379	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1380	s += ' device_type = "soclib:xicu:root";\n'
[539]	1381	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb,lsb,size)
[400]	1382	s += ' input_lines = <%d>;\n' % periph.arg
	1383	s += ' ipis = <%d>;\n' % periph.arg
	1384	s += ' timers = <%d>;\n' % periph.arg
[319]	1385
	1386	output_id = 0 # output index from XCU
	1387	for lpid in xrange ( len(cluster.procs) ): # destination processor index
	1388	for itid in xrange ( self.irq_per_proc ): # input irq index on processor
[406]	1389	cluster_xy = (cluster.x << self.y_width) + cluster.y
	1390	proc_id = (cluster_xy << self.p_width) + lpid
[319]	1391	s += ' out@%d {\n' % output_id
	1392	s += ' device_type = "soclib:xicu:filter";\n'
[411]	1393	s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid)
[406]	1394	s += ' output_line = <%d>;\n' % output_id
[411]	1395	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1396	s += ' };\n'
	1397
	1398	output_id += 1
	1399
	1400	s += ' };\n'
	1401
	1402	# research PIC component
	1403	found_pic = False
	1404	for periph in cluster.periphs:
[406]	1405	if ( periph.ptype == 'PIC' ):
[319]	1406	found_pic = True
	1407	pic = periph
	1408	msb = periph.pseg.base >> 32
	1409	lsb = periph.pseg.base & 0xFFFFFFFF
	1410	size = periph.pseg.size
	1411
	1412	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1413	s += ' device_type = "soclib:pic:root";\n'
	1414	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1415	s += ' input_lines = <%d>;\n' % periph.channels
[319]	1416	s += ' };\n'
	1417
[411]	1418	# at least one interrupt controller
[319]	1419	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
[512]	1420	print '[genmap error] in netbsd_dts()'
	1421	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[406]	1422	sys.exit(1)
	1423
[319]	1424	if ( found_pic == True ): irq_tgt = pic
	1425	else: irq_tgt = xcu
[406]	1426
[319]	1427	# get all others peripherals in cluster
	1428	for periph in cluster.periphs:
	1429	msb = periph.pseg.base >> 32
	1430	lsb = periph.pseg.base & 0xFFFFFFFF
	1431	size = periph.pseg.size
	1432
	1433	# research DMA component
	1434	if ( periph.ptype == 'DMA' ):
	1435
	1436	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[411]	1437	s += ' device_type = "soclib:dma";\n'
	1438	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1439	s += ' channel_count = <%d>;\n' % periph.channels
	1440
	1441	# multi-channels : get HWI index (to XCU) for each channel
	1442	for channel in xrange( periph.channels ):
	1443	hwi_id = 0xFFFFFFFF
	1444	for irq in xcu.irqs:
[539]	1445	if ( (irq.isrtype == 'ISR_DMA') and
	1446	(irq.channel == channel) ):
[319]	1447	hwi_id = irq.srcid
[512]	1448
[319]	1449	if ( hwi_id == 0xFFFFFFFF ):
[512]	1450	print '[genmap error] in netbsd.dts()'
	1451	print ' ISR_DMA channel %d not found' % channel
[319]	1452	sys.exit(1)
	1453
	1454	name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base)
	1455	s += ' irq@%d{\n' % channel
	1456	s += ' device_type = "soclib:periph:irq";\n'
	1457	s += ' output_line = <%d>;\n' % channel
[411]	1458	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1459	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1460	s += ' };\n'
	1461
[406]	1462	s += ' };\n'
[319]	1463
	1464	# research MMC component
	1465	elif ( periph.ptype == 'MMC' ):
	1466
	1467	# get irq line index associated to MMC in XCU
	1468	irq_in = 0xFFFFFFFF
	1469	for irq in xcu.irqs:
	1470	if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid
[512]	1471
[319]	1472	if ( irq_in == 0xFFFFFFFF ):
[512]	1473	print '[genmap error] in netbsd.dts()'
	1474	print ' ISR_MMC not found'
[319]	1475	sys.exit(1)
	1476
	1477	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1478	s += ' device_type = "soclib:mmc";\n'
[411]	1479	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name, irq_tgt.pseg.base, irq_in)
	1480	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1481	s += ' };\n'
[319]	1482
	1483	# research FBF component
[406]	1484	elif ( periph.ptype == 'FBF' ):
[319]	1485
[411]	1486	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1487	s += ' device_type = "soclib:framebuffer";\n'
[539]	1488	s += ' mode = <32>;\n' # bits par pixel
[400]	1489	s += ' width = <%d>;\n' % periph.arg
	1490	s += ' height = <%d>;\n' % periph.arg
[319]	1491	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1492	s += ' };\n'
	1493
	1494	# research IOC component
[406]	1495	elif ( periph.ptype == 'IOC' ):
[319]	1496
	1497	if ( periph.subtype == 'BDV' ):
	1498
	1499	# get irq line index associated to bdv
	1500	irq_in = 0xFFFFFFFF
	1501	for irq in irq_tgt.irqs:
	1502	if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid
	1503	if ( irq_in == 0xFFFFFFFF ):
[512]	1504	print '[genmap error] in netbsd.dts()'
	1505	print ' ISR_BDV not found'
[319]	1506	sys.exit(1)
	1507
[411]	1508	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1509	s += ' device_type = "soclib:blockdevice";\n'
[411]	1510	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1511	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1512	s += ' };\n'
	1513
	1514	elif ( periph.subtype == 'HBA' ):
[512]	1515	print '[genmap error] in netbsd_dts()'
	1516	print ' HBA peripheral not supported by NetBSD'
[319]	1517	sys.exit(1)
	1518
[546]	1519	elif ( periph.subtype == 'SDC' ):
[319]	1520
[546]	1521	# get irq line index associated to sdc
[319]	1522	irq_in = 0xFFFFFFFF
	1523	for irq in irq_tgt.irqs:
[546]	1524	if ( irq.isrtype == 'ISR_SDC' ): irq_in = irq.srcid
[319]	1525	if ( irq_in == 0xFFFFFFFF ):
[512]	1526	print '[genmap error] in netbsd.dts()'
[546]	1527	print ' ISR_SDC not found'
[319]	1528	sys.exit(1)
	1529
	1530	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[546]	1531	s += ' device_type = "soclib:sdc";\n'
[411]	1532	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1533	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1534	s += ' };\n'
	1535
	1536	# research ROM component
	1537	elif ( periph.ptype == 'ROM' ):
	1538
[411]	1539	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1540	s += ' device_type = "rom";\n'
[411]	1541	s += ' cached = <1>;\n'
	1542	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1543	s += ' };\n'
	1544
	1545	# research SIM component
	1546	elif ( periph.ptype == 'SIM' ):
	1547
	1548	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1549	s += ' device_type = "soclib:simhelper";\n'
	1550	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1551	s += ' };\n'
	1552
	1553	# research TTY component
	1554	elif ( periph.ptype == 'TTY' ):
	1555
[411]	1556	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1557	s += ' device_type = "soclib:tty";\n'
[406]	1558	s += ' channel_count = < %d >;\n' % periph.channels
[411]	1559	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1560
	1561	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1562	for channel in xrange( periph.channels ):
	1563	hwi_id = 0xFFFFFFFF
	1564	for irq in irq_tgt.irqs:
[406]	1565	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ):
[319]	1566	hwi_id = irq.srcid
	1567	if ( hwi_id == 0xFFFFFFFF ):
[512]	1568	print '[genmap error] in netbsd.dts()'
	1569	print ' ISR_TTY_RX channel %d not found' % channel
[319]	1570	sys.exit(1)
	1571
	1572	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1573	s += ' irq@%d{\n' % channel
	1574	s += ' device_type = "soclib:periph:irq";\n'
	1575	s += ' output_line = <%d>;\n' % channel
[411]	1576	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1577	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1578	s += ' };\n'
	1579
	1580	s += ' };\n'
[406]	1581
[319]	1582	# research IOB component
	1583	elif ( periph.ptype == 'IOB' ):
	1584
	1585	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1586	s += ' device_type = "soclib:iob";\n'
	1587	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1588	s += ' };\n'
	1589
	1590	# research NIC component
[406]	1591	elif ( periph.ptype == 'NIC' ):
[319]	1592
	1593	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1594	s += ' device_type = "soclib:nic";\n'
	1595	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1596	s += ' channel_count = < %d >;\n' % periph.channels
	1597
	1598	# multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs
	1599	# RX IRQ : (2channel) / TX IRQs : (2channel + 1)
	1600	for channel in xrange( periph.channels ):
	1601	hwi_id = 0xFFFFFFFF
	1602	for irq in irq_tgt.irqs:
[406]	1603	if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ):
[319]	1604	hwi_id = irq.srcid
	1605	if ( hwi_id == 0xFFFFFFFF ):
[512]	1606	print '[genmap error] in netbsd.dts()'
	1607	print ' ISR_NIC_RX channel %d not found' % channel
[319]	1608	sys.exit(1)
	1609
	1610	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1611	s += ' irq_rx@%d{\n' % channel
	1612	s += ' device_type = "soclib:periph:irq";\n'
	1613	s += ' output_line = <%d>;\n' % (2*channel)
	1614	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1615	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1616	s += ' };\n'
	1617
	1618	hwi_id = 0xFFFFFFFF
	1619	for irq in irq_tgt.irqs:
[406]	1620	if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ):
[319]	1621	hwi_id = irq.srcid
	1622	if ( hwi_id == 0xFFFFFFFF ):
[512]	1623	print '[genmap error] in netbsd.dts()'
	1624	print ' ISR_NIC_TX channel %d not found' % channel
[319]	1625	sys.exit(1)
	1626
	1627	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1628	s += ' irq_tx@%d{\n' % channel
	1629	s += ' device_type = "soclib:periph:irq";\n'
	1630	s += ' output_line = <%d>;\n' % (2*channel + 1)
	1631	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1632	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1633	s += ' };\n'
[406]	1634
[319]	1635	s += ' };\n'
	1636
	1637	# research CMA component
[406]	1638	elif ( periph.ptype == 'CMA' ):
[319]	1639
	1640	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1641	s += ' device_type = "soclib:cma";\n'
	1642	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1643	s += ' channel_count = < %d >;\n' % periph.channels
	1644
	1645	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1646	for channel in xrange( periph.channels ):
	1647	hwi_id = 0xFFFFFFFF
	1648	for irq in irq_tgt.irqs:
[406]	1649	if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ):
[319]	1650	hwi_id = irq.srcid
[512]	1651
[319]	1652	if ( hwi_id == 0xFFFFFFFF ):
[512]	1653	print '[genmap error] in netbsd.dts()'
	1654	print ' ISR_CMA channel %d not found' % channel
[319]	1655	sys.exit(1)
	1656
	1657	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1658	s += ' irq@%d{\n' % channel
	1659	s += ' device_type = "soclib:periph:irq";\n'
	1660	s += ' output_line = <%d>;\n' % channel
[411]	1661	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1662	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1663	s += ' };\n'
	1664
	1665	s += ' };\n'
	1666
	1667	# research TIM component
[406]	1668	elif ( periph.ptype == 'TIM' ):
[319]	1669
[512]	1670	print '[genmap error] in netbsd_dts()'
	1671	print ' TIM peripheral not supported by NetBSD'
[319]	1672	sys.exit(1)
	1673
	1674	# research MWR component
	1675	elif ( periph.ptype == 'MWR' ):
	1676
[512]	1677	print '[genmap error] in netbsd_dts()'
	1678	print ' MWR peripheral not supported by NetBSD'
[319]	1679	sys.exit(1)
	1680
	1681	# topology
	1682	s += '\n'
	1683	s += ' topology {\n'
	1684	s += ' #address-cells = <2>;\n'
	1685	s += ' #size-cells = <0>;\n'
	1686	for cluster in self.clusters:
[406]	1687	s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y)
[319]	1688	s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y)
	1689	s += ' devices = <\n'
	1690
[406]	1691	offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width
[319]	1692	for proc in cluster.procs:
	1693	s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid)
	1694	for periph in cluster.periphs:
	1695	s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base)
[492]	1696	for pseg in cluster.psegs:
	1697	if ( pseg.segtype == 'RAM' ):
	1698	s += ' &{/%s@0x%x}\n' % (pseg.name, pseg.base)
[319]	1699
	1700	s += ' >;\n'
	1701	s += ' };\n'
	1702	s += ' };\n'
	1703	s += '};\n'
	1704
	1705	return s
[411]	1706	# end netbsd_dts()
[319]	1707
[539]	1708	######################################################################
	1709	def almos_archinfo( self ): # compute string for arch.info file
[406]	1710	# used for almos configuration
[319]	1711	# header
[327]	1712	s = '# arch.info file generated by genmap for %s\n' % self.name
[319]	1713	s += '\n'
	1714	s += '[HEADER]\n'
	1715	s += ' REVISION=1\n'
	1716	s += ' ARCH=%s\n' % self.name
	1717	s += ' XMAX=%d\n' % self.x_size
	1718	s += ' YMAX=%d\n' % self.y_size
[411]	1719	s += ' CPU_NR=%d\n' % self.nprocs
[319]	1720	s += '\n'
	1721
	1722	# clusters
	1723	cluster_id = 0
	1724	for cluster in self.clusters:
	1725
	1726	ram = None
	1727	nb_cpus = len( cluster.procs )
	1728	nb_devs = len( cluster.periphs )
	1729
	1730	# search a RAM
	1731	for pseg in cluster.psegs:
[406]	1732	if ( pseg.segtype == 'RAM' ):
[319]	1733	ram = pseg
	1734	nb_devs += 1
	1735
	1736	# search XCU to get IRQs indexes if cluster contains peripherals
	1737	if ( len( cluster.periphs ) != 0 ):
	1738	tty_irq_id = None
	1739	bdv_irq_id = None
	1740	dma_irq_id = None
	1741
	1742	for periph in cluster.periphs:
[406]	1743	if ( periph.ptype == 'XCU' ):
[319]	1744	# scan irqs
	1745	for irq in periph.irqs:
[539]	1746	if (irq.isrtype=='ISR_TTY_RX'): tty_irq_id = irq.srcid
	1747	if (irq.isrtype=='ISR_BDV' ): bdv_irq_id = irq.srcid
	1748	if (irq.isrtype=='ISR_DMA' ): dma_irq_id = irq.srcid
[319]	1749
	1750	# Build the cluster description
	1751	s += '[CLUSTER]\n'
[406]	1752	s += ' CID=%d\n' % cluster_id
[539]	1753	s += ' ARCH_CID=0x%x\n' % ((cluster.x<<self.y_width)+cluster.y)
[319]	1754	s += ' CPU_NR=%d\n' % nb_cpus
	1755	s += ' DEV_NR=%d\n' % nb_devs
	1756
[406]	1757
[319]	1758	# Handling RAM when cluster contain a RAM
	1759	if (ram != None ):
	1760	base = ram.base
	1761	size = ram.size
	1762	irqid = -1
[406]	1763	s += ' DEVID=RAM'
[539]	1764	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % (base,size)
[319]	1765
	1766	# Handling peripherals
	1767	for periph in cluster.periphs:
	1768	base = periph.pseg.base
	1769	size = periph.pseg.size
	1770
[406]	1771	if ( periph.ptype == 'XCU' ):
[319]	1772
[406]	1773	s += ' DEVID=XICU'
[539]	1774	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size)
[319]	1775
[406]	1776	elif ( (periph.ptype == 'TTY')
[319]	1777	and (tty_irq_id != None) ):
	1778
[406]	1779	s += ' DEVID=TTY'
[539]	1780	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,tty_irq_id)
[319]	1781
[406]	1782	elif ( (periph.ptype == 'DMA')
[319]	1783	and (dma_irq_id != None) ):
	1784
	1785	s += ' DEVID=DMA'
[539]	1786	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,dma_irq_id)
[319]	1787
	1788	elif ( periph.ptype == 'FBF' ):
	1789
	1790	s += ' DEVID=FB'
[539]	1791	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size )
[319]	1792
	1793	elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV')
	1794	and (bdv_irq_id != None) ):
	1795
[406]	1796	s += ' DEVID=BLKDEV'
[539]	1797	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,bdv_irq_id)
[319]	1798
	1799	elif ( periph.ptype == 'PIC' ):
	1800
[539]	1801	s += ' DEVID=IOPIC'
	1802	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size)
[319]	1803
	1804	else:
	1805	print '# Warning from almos_archinfo() in cluster[%d,%d]' \
	1806	% (cluster.x, cluster.y)
	1807	print '# peripheral type %s/%s not supported yet\n' \
	1808	% ( periph.ptype, periph.subtype )
[406]	1809
[319]	1810	cluster_id += 1
	1811
	1812	return s
	1813
	1814	# end of almos_archinfo()
	1815
	1816
	1817
	1818
	1819
	1820
	1821
	1822
[539]	1823	###################################################################################
[319]	1824	class Cluster ( object ):
[539]	1825	###################################################################################
[319]	1826	def __init__( self,
[406]	1827	x,
[319]	1828	y ):
[406]	1829
[539]	1830	self.index = 0 # global index (set by Mapping constructor)
	1831	self.x = x # x coordinate
	1832	self.y = y # y coordinate
	1833	self.psegs = [] # filled by addRam() or addPeriph()
	1834	self.procs = [] # filled by addProc()
	1835	self.periphs = [] # filled by addPeriph()
[319]	1836
	1837	return
	1838
	1839	################
	1840	def xml( self ): # xml for a cluster
	1841
	1842	s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y)
[406]	1843	for pseg in self.psegs: s += pseg.xml()
[319]	1844	for proc in self.procs: s += proc.xml()
[406]	1845	for peri in self.periphs: s += peri.xml()
[319]	1846	s += ' </cluster>\n'
	1847
	1848	return s
	1849
	1850	#############################################
[539]	1851	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
[319]	1852
	1853	if ( verbose ):
	1854	print '*** cbin for cluster [%d,%d]' % (self.x, self.y)
	1855
	1856	# check index
	1857	if (self.index != expected):
[512]	1858	print '[genmap error] in Cluster.cbin()'
[539]	1859	print ' cluster global index = %d / expected = %d' \
	1860	% (self.index,expected)
[319]	1861	sys.exit(1)
	1862
[406]	1863	# compute global index for first pseg
[319]	1864	if ( len(self.psegs) > 0 ):
	1865	pseg_id = self.psegs[0].index
	1866	else:
	1867	pseg_id = 0
	1868
[406]	1869	# compute global index for first proc
[319]	1870	if ( len(self.procs) > 0 ):
	1871	proc_id = self.procs[0].index
	1872	else:
	1873	proc_id = 0
	1874
[406]	1875	# compute global index for first periph
[319]	1876	if ( len(self.periphs) > 0 ):
	1877	periph_id = self.periphs[0].index
	1878	else:
	1879	periph_id = 0
	1880
	1881	byte_stream = bytearray()
[539]	1882	byte_stream += mapping.int2bytes(4,self.x) # x coordinate
	1883	byte_stream += mapping.int2bytes(4,self.y) # x coordinate
	1884	byte_stream += mapping.int2bytes(4,len(self.psegs)) # psegs in cluster
	1885	byte_stream += mapping.int2bytes(4,pseg_id ) # global index
	1886	byte_stream += mapping.int2bytes(4,len(self.procs)) # procs in cluster
	1887	byte_stream += mapping.int2bytes(4,proc_id ) # global index
	1888	byte_stream += mapping.int2bytes(4,len(self.periphs)) # periphs in cluster
	1889	byte_stream += mapping.int2bytes(4, periph_id ) # global index
[406]	1890
[319]	1891	if ( verbose ):
	1892	print 'nb_psegs = %d' % len( self.psegs )
	1893	print 'pseg_id = %d' % pseg_id
	1894	print 'nb_procs = %d' % len( self.procs )
	1895	print 'proc_id = %d' % proc_id
	1896	print 'nb_periphs = %d' % len( self.periphs )
	1897	print 'periph_id = %d' % periph_id
	1898
	1899	return byte_stream
	1900
[539]	1901	##################################################################################
[305]	1902	class Vspace( object ):
[539]	1903	##################################################################################
[406]	1904	def __init__( self,
	1905	name,
[319]	1906	startname ):
	1907
	1908	self.index = 0 # global index ( set by addVspace() )
	1909	self.name = name # vspace name
[512]	1910	self.startname = startname # name of vseg containing the start_vector
[406]	1911	self.vsegs = []
[305]	1912	self.tasks = []
	1913
	1914	return
	1915
[319]	1916	################
	1917	def xml( self ): # xml for one vspace
	1918
[305]	1919	s = ' <vspace name="%s" startname="%s" >\n' % ( self.name, self.startname )
[319]	1920	for vseg in self.vsegs: s += vseg.xml()
[406]	1921	for task in self.tasks: s += task.xml()
[305]	1922	s += ' </vspace>\n'
[319]	1923
[305]	1924	return s
	1925
[319]	1926	#############################################
[539]	1927	def cbin( self, mapping, verbose, expected ): # C binary for Vspace
[319]	1928
	1929	if ( verbose ):
	1930	print '*** cbin for vspace %s' % (self.name)
	1931
	1932	# check index
	1933	if (self.index != expected):
[512]	1934	print '[genmap error] in Vspace.cbin()'
[539]	1935	print ' vspace global index = %d / expected = %d' \
	1936	%(self.index,expected)
[319]	1937	sys.exit(1)
	1938
[512]	1939	# compute global index for vseg containing start_vector
	1940	vseg_start_id = 0xFFFFFFFF
[319]	1941	for vseg in self.vsegs:
[512]	1942	if ( vseg.name == self.startname ): vseg_start_id = vseg.index
	1943
	1944	if ( vseg_start_id == 0xFFFFFFFF ):
	1945	print '[genmap error] in Vspace.cbin()'
[539]	1946	print ' startname %s not found for vspace %s' \
	1947	%(self.startname,self.name)
[319]	1948	sys.exit(1)
[406]	1949
[512]	1950	# compute first vseg and first task global index
[319]	1951	first_vseg_id = self.vsegs[0].index
	1952	first_task_id = self.tasks[0].index
[406]	1953
[512]	1954	# compute number of tasks and number of vsegs
[319]	1955	nb_vsegs = len( self.vsegs )
	1956	nb_tasks = len( self.tasks )
	1957
	1958	byte_stream = bytearray()
[539]	1959	byte_stream += mapping.str2bytes(32,self.name) # vspace name
	1960	byte_stream += mapping.int2bytes(4, vseg_start_id) # vseg start_vector
	1961	byte_stream += mapping.int2bytes(4, nb_vsegs) # number of vsegs
	1962	byte_stream += mapping.int2bytes(4, nb_tasks) # number of tasks
	1963	byte_stream += mapping.int2bytes(4, first_vseg_id) # global index
	1964	byte_stream += mapping.int2bytes(4, first_task_id) # global index
[319]	1965
	1966	if ( verbose ):
[512]	1967	print 'start_id = %d' % vseg_start_id
[319]	1968	print 'nb_vsegs = %d' % nb_vsegs
	1969	print 'nb_tasks = %d' % nb_tasks
	1970	print 'vseg_id = %d' % first_vseg_id
	1971	print 'task_id = %d' % first_task_id
	1972
	1973	return byte_stream
	1974
[539]	1975	##################################################################################
[305]	1976	class Task( object ):
[539]	1977	##################################################################################
[406]	1978	def __init__( self,
	1979	name,
	1980	trdid,
	1981	x,
[319]	1982	y,
[406]	1983	p,
	1984	stackname,
	1985	heapname,
[441]	1986	startid ):
[319]	1987
	1988	self.index = 0 # global index value set by addTask()
	1989	self.name = name # tsk name
	1990	self.trdid = trdid # task index (unique in vspace)
[406]	1991	self.x = x # cluster x coordinate
	1992	self.y = y # cluster y coordinate
	1993	self.p = p # processor local index
[512]	1994	self.stackname = stackname # name of vseg containing the stack
	1995	self.heapname = heapname # name of vseg containing the heap
[319]	1996	self.startid = startid # index in start_vector
[305]	1997	return
	1998
[539]	1999	######################################
[319]	2000	def xml( self ): # xml for one task
	2001
	2002	s = ' <task name="%s"' % self.name
	2003	s += ' trdid="%d"' % self.trdid
	2004	s += ' x="%d"' % self.x
	2005	s += ' y="%d"' % self.y
	2006	s += ' p="%d"' % self.p
[512]	2007	s += '\n '
[319]	2008	s += ' stackname="%s"' % self.stackname
	2009	s += ' heapname="%s"' % self.heapname
	2010	s += ' startid="%d"' % self.startid
[406]	2011	s += ' />\n'
[319]	2012
[305]	2013	return s
	2014
[539]	2015	##########################################################################
	2016	def cbin( self, mapping, verbose, expected, vspace ): # C binary for Task
[319]	2017
	2018	if ( verbose ):
[539]	2019	print '*** cbin for task %s in vspace %s' \
	2020	% (self.name, vspace.name)
[319]	2021
	2022	# check index
	2023	if (self.index != expected):
[512]	2024	print '[genmap error] in Task.cbin()'
[539]	2025	print ' task global index = %d / expected = %d' \
	2026	%(self.index,expected)
[319]	2027	sys.exit(1)
	2028
	2029	# compute cluster global index
	2030	cluster_id = (self.x * mapping.y_size) + self.y
	2031
[512]	2032	# compute vseg index for stack
	2033	vseg_stack_id = 0xFFFFFFFF
[319]	2034	for vseg in vspace.vsegs:
[512]	2035	if ( vseg.name == self.stackname ): vseg_stack_id = vseg.index
	2036
	2037	if ( vseg_stack_id == 0xFFFFFFFF ):
	2038	print '[genmap error] in Task.cbin()'
	2039	print ' stackname %s not found for task %s in vspace %s' \
[319]	2040	% ( self.stackname, self.name, vspace.name )
	2041	sys.exit(1)
	2042
[512]	2043	# compute vseg index for heap
[453]	2044	if ( self.heapname == '' ):
[512]	2045	vseg_heap_id = 0
[453]	2046	else:
[512]	2047	vseg_heap_id = 0xFFFFFFFF
[453]	2048	for vseg in vspace.vsegs:
[512]	2049	if ( vseg.name == self.heapname ): vseg_heap_id = vseg.index
	2050
	2051	if ( vseg_heap_id == 0xFFFFFFFF ):
	2052	print '[genmap error] in Task.cbin()'
	2053	print ' heapname %s not found for task %s in vspace %s' \
[453]	2054	% ( self.heapname, self.name, vspace.name )
	2055	sys.exit(1)
[319]	2056
	2057	byte_stream = bytearray()
[539]	2058	byte_stream += mapping.str2bytes(32,self.name) # task name in vspace
	2059	byte_stream += mapping.int2bytes(4, cluster_id) # cluster global index
	2060	byte_stream += mapping.int2bytes(4, self.p) # processor local index
	2061	byte_stream += mapping.int2bytes(4, self.trdid) # thread index in vspace
	2062	byte_stream += mapping.int2bytes(4, vseg_stack_id) # stack vseg local index
	2063	byte_stream += mapping.int2bytes(4, vseg_heap_id) # heap vseg local index
	2064	byte_stream += mapping.int2bytes(4, self.startid) # index in start vector
[319]	2065
	2066	if ( verbose ):
	2067	print 'clusterid = %d' % cluster_id
	2068	print 'lpid = %d' % self.p
[406]	2069	print 'trdid = %d' % self.trdid
[512]	2070	print 'stackid = %d' % vseg_stack_id
	2071	print 'heapid = %d' % vseg_heap_id
[406]	2072	print 'startid = %d' % self.startid
	2073
[319]	2074	return byte_stream
	2075
[539]	2076	##################################################################################
[305]	2077	class Vseg( object ):
[539]	2078	##################################################################################
[406]	2079	def __init__( self,
	2080	name,
	2081	vbase,
[512]	2082	length,
[406]	2083	mode,
[512]	2084	vtype,
[406]	2085	x,
	2086	y,
[512]	2087	pseg,
[348]	2088	identity = False,
[411]	2089	local = False,
[512]	2090	big = False,
	2091	binpath = '' ):
[305]	2092
[512]	2093	assert (vbase & 0xFFFFFFFF) == vbase
	2094
	2095	assert (length & 0xFFFFFFFF) == length
	2096
[319]	2097	assert mode in VSEGMODES
	2098
[512]	2099	assert vtype in VSEGTYPES
	2100
	2101	assert (vtype != 'ELF') or (binpath != '')
	2102
[348]	2103	self.index = 0 # global index ( set by addVseg() )
[512]	2104	self.name = name # vseg name (unique in vspace)
	2105	self.vbase = vbase # virtual base address in vspace
	2106	self.length = length # vseg length (bytes)
	2107	self.vtype = vtype # vseg type (defined in VSEGTYPES)
[348]	2108	self.mode = mode # CXWU access rights
[406]	2109	self.x = x # x coordinate of destination cluster
[348]	2110	self.y = y # y coordinate of destination cluster
[512]	2111	self.psegname = pseg # name of pseg in destination cluster
[348]	2112	self.identity = identity # identity mapping required
[411]	2113	self.local = local # only mapped in local PTAB when true
	2114	self.big = big # to be mapped in a big physical page
[539]	2115	self.binpath = binpath # pathname for binary file (ELF or BLOB)
[512]	2116
[305]	2117	return
	2118
[539]	2119	##################################
	2120	def xml( self ): # xml for a vseg
[319]	2121
[512]	2122	s = ' <vseg name="%s"' %(self.name)
	2123	s += ' vbase="0x%x"' %(self.vbase)
	2124	s += ' length="0x%x"' %(self.length)
	2125	s += ' type="%s"' %(self.vtype)
	2126	s += ' mode="%s"' %(self.mode)
	2127	s += '\n '
	2128	s += ' x="%d"' %(self.x)
	2129	s += ' y="%d"' %(self.y)
	2130	s += ' psegname="%s"' %(self.psegname)
	2131	if ( self.identity ): s += ' ident="1"'
	2132	if ( self.local ): s += ' local="1"'
	2133	if ( self.big ): s += ' big="1"'
	2134	if ( self.binpath != '' ): s += ' binpath="%s"' %(self.binpath)
	2135	s += ' />\n'
[319]	2136
[305]	2137	return s
	2138
[539]	2139	#####################################################################
	2140	def cbin( self, mapping, verbose, expected ): # C binary for Vseg
[319]	2141
	2142	if ( verbose ):
	2143	print '*** cbin for vseg[%d] %s' % (self.index, self.name)
	2144
	2145	# check index
	2146	if (self.index != expected):
[512]	2147	print '[genmap error] in Vseg.cbin()'
	2148	print ' vseg global index = %d / expected = %d' \
[319]	2149	% (self.index, expected )
	2150	sys.exit(1)
	2151
	2152	# compute pseg_id
	2153	pseg_id = 0xFFFFFFFF
	2154	cluster_id = (self.x * mapping.y_size) + self.y
	2155	cluster = mapping.clusters[cluster_id]
	2156	for pseg in cluster.psegs:
	2157	if (self.psegname == pseg.name):
	2158	pseg_id = pseg.index
	2159	if (pseg_id == 0xFFFFFFFF):
[512]	2160	print '[genmap error] in Vseg.cbin() : '
	2161	print ' psegname %s not found for vseg %s in cluster %d' \
[319]	2162	% ( self.psegname, self.name, cluster_id )
	2163	sys.exit(1)
	2164
	2165	# compute numerical value for mode
	2166	mode_id = 0xFFFFFFFF
[406]	2167	for x in xrange( len(VSEGMODES) ):
	2168	if ( self.mode == VSEGMODES[x] ):
[319]	2169	mode_id = x
	2170	if ( mode_id == 0xFFFFFFFF ):
[512]	2171	print '[genmap error] in Vseg.cbin() : '
	2172	print ' undefined vseg mode %s' % self.mode
[319]	2173	sys.exit(1)
	2174
[512]	2175	# compute numerical value for vtype
	2176	vtype_id = 0xFFFFFFFF
	2177	for x in xrange( len(VSEGTYPES) ):
	2178	if ( self.vtype == VSEGTYPES[x] ):
	2179	vtype_id = x
	2180	if ( vtype_id == 0xFFFFFFFF ):
	2181	print '[genmap error] in Vseg.cbin()'
	2182	print ' undefined vseg type %s' % self.vtype
	2183	sys.exit(1)
[319]	2184
	2185	byte_stream = bytearray()
[539]	2186	byte_stream += mapping.str2bytes(32,self.name ) # vseg name
	2187	byte_stream += mapping.str2bytes(64,self.binpath ) # binpath
	2188	byte_stream += mapping.int2bytes(4, self.vbase ) # virtual base address
	2189	byte_stream += mapping.int2bytes(8, 0 ) # physical base address
	2190	byte_stream += mapping.int2bytes(4, self.length ) # vseg size (bytes)
	2191	byte_stream += mapping.int2bytes(4, pseg_id ) # pseg global index
	2192	byte_stream += mapping.int2bytes(4, mode_id ) # CXWU flags
	2193	byte_stream += mapping.int2bytes(4, vtype_id ) # vseg type
	2194	byte_stream += mapping.int2bytes(1, 0 ) # mapped when non zero
	2195	byte_stream += mapping.int2bytes(1, self.identity ) # identity mapping
	2196	byte_stream += mapping.int2bytes(1, self.local ) # only in local PTAB
	2197	byte_stream += mapping.int2bytes(1, self.big ) # to be mapped in BPP
[319]	2198
	2199	if ( verbose ):
[512]	2200	print 'binpath = %s' % self.binpath
[319]	2201	print 'vbase = %x' % self.vbase
[512]	2202	print 'pbase = 0'
	2203	print 'length = %x' % self.length
[319]	2204	print 'pseg_id = %d' % pseg_id
[512]	2205	print 'mode = %d' % mode_id
	2206	print 'type = %d' % vtype_id
	2207	print 'mapped = 0'
	2208	print 'ident = %d' % self.identity
	2209	print 'local = %d' % self.local
	2210	print 'big = %d' % self.big
[406]	2211
[319]	2212	return byte_stream
	2213
[539]	2214	##################################################################################
[305]	2215	class Processor ( object ):
[539]	2216	##################################################################################
[319]	2217	def __init__( self,
[406]	2218	x,
	2219	y,
[319]	2220	lpid ):
	2221
	2222	self.index = 0 # global index ( set by addProc() )
	2223	self.x = x # x cluster coordinate
	2224	self.y = y # y cluster coordinate
	2225	self.lpid = lpid # processor local index
	2226
[305]	2227	return
	2228
[539]	2229	########################################
[406]	2230	def xml( self ): # xml for a processor
[305]	2231	return ' <proc index="%d" />\n' % (self.lpid)
	2232
[539]	2233	####################################################################
	2234	def cbin( self, mapping, verbose, expected ): # C binary for Proc
[319]	2235
	2236	if ( verbose ):
[539]	2237	print '*** cbin for proc %d in cluster (%d,%d)' \
	2238	% (self.lpid, self.x, self.y)
[319]	2239
	2240	# check index
	2241	if (self.index != expected):
[512]	2242	print '[genmap error] in Proc.cbin()'
[539]	2243	print ' proc global index = %d / expected = %d' \
	2244	% (self.index,expected)
[319]	2245	sys.exit(1)
	2246
	2247	byte_stream = bytearray()
	2248	byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index
[406]	2249
[319]	2250	return byte_stream
	2251
[539]	2252	##################################################################################
[305]	2253	class Pseg ( object ):
[539]	2254	##################################################################################
[406]	2255	def __init__( self,
	2256	name,
	2257	base,
	2258	size,
[319]	2259	x,
	2260	y,
	2261	segtype ):
	2262
	2263	assert( segtype in PSEGTYPES )
	2264
	2265	self.index = 0 # global index ( set by addPseg() )
	2266	self.name = name # pseg name (unique in cluster)
	2267	self.base = base # physical base address
	2268	self.size = size # segment size (bytes)
[406]	2269	self.x = x # cluster x coordinate
	2270	self.y = y # cluster y coordinate
[319]	2271	self.segtype = segtype # RAM / PERI (defined in mapping_info.h)
	2272
[305]	2273	return
[406]	2274
[539]	2275	###################################
[319]	2276	def xml( self ): # xml for a pseg
	2277
[539]	2278	s = ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \
	2279	% (self.name, self.segtype, self.base, self.size)
	2280	return s
[305]	2281
[539]	2282	###########################################################################
	2283	def cbin( self, mapping, verbose, expected, cluster ): # C binary for Pseg
[319]	2284
	2285	if ( verbose ):
	2286	print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \
	2287	% (self.index, self.name, cluster.x, cluster.y)
	2288
	2289	# check index
	2290	if (self.index != expected):
[512]	2291	print '[genmap error] in Pseg.cbin()'
[539]	2292	print ' pseg global index = %d / expected = %d' \
	2293	% (self.index,expected)
[319]	2294	sys.exit(1)
[406]	2295
[319]	2296	# compute numerical value for segtype
	2297	segtype_int = 0xFFFFFFFF
[406]	2298	for x in xrange( len(PSEGTYPES) ):
[512]	2299	if ( self.segtype == PSEGTYPES[x] ): segtype_int = x
	2300
[319]	2301	if ( segtype_int == 0xFFFFFFFF ):
[512]	2302	print '[genmap error] in Pseg.cbin()'
	2303	print ' undefined segment type %s' % self.segtype
[319]	2304	sys.exit(1)
	2305
	2306	byte_stream = bytearray()
[539]	2307	byte_stream += mapping.str2bytes(32,self.name) # pseg name
	2308	byte_stream += mapping.int2bytes(8 ,self.base) # physical base address
	2309	byte_stream += mapping.int2bytes(8 ,self.size) # segment length
	2310	byte_stream += mapping.int2bytes(4 ,segtype_int) # segment type
	2311	byte_stream += mapping.int2bytes(4 ,cluster.index) # cluster global index
	2312	byte_stream += mapping.int2bytes(4 ,0) # linked list of vsegs
[319]	2313
	2314	if ( verbose ):
	2315	print 'pbase = %x' % self.base
	2316	print 'size = %x' % self.size
	2317	print 'type = %s' % self.segtype
[406]	2318
[319]	2319	return byte_stream
	2320
[539]	2321	##################################################################################
[319]	2322	class Periph ( object ):
[539]	2323	##################################################################################
[406]	2324	def __init__( self,
[319]	2325	pseg, # associated pseg
	2326	ptype, # peripheral type
	2327	subtype = 'NONE', # peripheral subtype
	2328	channels = 1, # for multi-channels peripherals
[539]	2329	arg0 = 0, # optional (semantic depends on ptype)
	2330	arg1 = 0, # optional (semantic depends on ptype)
	2331	arg2 = 0, # optional (semantic depends on ptype)
	2332	arg3 = 0 ): # optional (semantic depends on ptype)
[319]	2333
	2334	self.index = 0 # global index ( set by addPeriph() )
[406]	2335	self.channels = channels
	2336	self.ptype = ptype
	2337	self.subtype = subtype
[520]	2338	self.arg0 = arg0
	2339	self.arg1 = arg1
	2340	self.arg2 = arg2
	2341	self.arg3 = arg3
[319]	2342	self.pseg = pseg
	2343	self.irqs = []
[305]	2344	return
	2345
[539]	2346	######################################
[319]	2347	def xml( self ): # xml for a periph
	2348
	2349	s = ' <periph type="%s"' % self.ptype
	2350	s += ' subtype="%s"' % self.subtype
	2351	s += ' psegname="%s"' % self.pseg.name
	2352	s += ' channels="%d"' % self.channels
[520]	2353	s += ' arg0="%d"' % self.arg0
	2354	s += ' arg1="%d"' % self.arg1
	2355	s += ' arg2="%d"' % self.arg2
	2356	s += ' arg3="%d"' % self.arg3
[441]	2357	if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') ):
[520]	2358	s += ' >\n'
[319]	2359	for irq in self.irqs: s += irq.xml()
[520]	2360	s += ' </periph>\n'
	2361	else:
	2362	s += ' />\n'
[305]	2363	return s
	2364
[539]	2365	######################################################################
	2366	def cbin( self, mapping, verbose, expected ): # C binary for Periph
[305]	2367
[319]	2368	if ( verbose ):
	2369	print '*** cbin for periph %s in cluster [%d,%d]' \
	2370	% (self.ptype, self.pseg.x, self.pseg.y)
[305]	2371
[319]	2372	# check index
	2373	if (self.index != expected):
[512]	2374	print '[genmap error] in Periph.cbin()'
[539]	2375	print ' periph global index = %d / expected = %d' \
	2376	% (self.index,expected)
[319]	2377	sys.exit(1)
[305]	2378
[319]	2379	# compute pseg global index
	2380	pseg_id = self.pseg.index
[305]	2381
[319]	2382	# compute first irq global index
	2383	if ( len(self.irqs) > 0 ):
	2384	irq_id = self.irqs[0].index
	2385	else:
	2386	irq_id = 0
[305]	2387
[319]	2388	# compute numerical value for ptype
	2389	ptype_id = 0xFFFFFFFF
[406]	2390	for x in xrange( len(PERIPHTYPES) ):
[319]	2391	if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x
[512]	2392
[319]	2393	if ( ptype_id == 0xFFFFFFFF ):
[512]	2394	print '[genmap error] in Periph.cbin()'
	2395	print ' undefined peripheral type %s' % self.ptype
[319]	2396	sys.exit(1)
[305]	2397
[319]	2398	# compute numerical value for subtype
	2399	subtype_id = 0xFFFFFFFF
[520]	2400	if (self.ptype == 'IOC'):
	2401	for x in xrange( len(IOCSUBTYPES) ):
	2402	if ( self.subtype == IOCSUBTYPES[x] ): subtype_id = x
	2403	if (self.ptype == 'MWR'):
	2404	for x in xrange( len(MWRSUBTYPES) ):
	2405	if ( self.subtype == MWRSUBTYPES[x] ): subtype_id = x
	2406
[319]	2407	byte_stream = bytearray()
[539]	2408	byte_stream += mapping.int2bytes(4,ptype_id) # peripheral type
	2409	byte_stream += mapping.int2bytes(4,subtype_id) # peripheral subtype
	2410	byte_stream += mapping.int2bytes(4,pseg_id) # pseg global index
	2411	byte_stream += mapping.int2bytes(4,self.channels) # number of channels
	2412	byte_stream += mapping.int2bytes(4,self.arg0) # optionnal arg0
	2413	byte_stream += mapping.int2bytes(4,self.arg1) # optionnal arg1
	2414	byte_stream += mapping.int2bytes(4,self.arg2) # optionnal arg2
	2415	byte_stream += mapping.int2bytes(4,self.arg3) # optionnal arg3
	2416	byte_stream += mapping.int2bytes(4,len(self.irqs)) # number of input irqs
	2417	byte_stream += mapping.int2bytes( 4 , irq_id ) # global index
[305]	2418
[319]	2419	if ( verbose ):
	2420	print 'ptype = %d' % ptype_id
[520]	2421	print 'subtype = %d' % subtype_id
[319]	2422	print 'pseg_id = %d' % pseg_id
	2423	print 'nb_irqs = %d' % len( self.irqs )
[406]	2424	print 'irq_id = %d' % irq_id
[319]	2425	return byte_stream
[305]	2426
[539]	2427	##################################################################################
[319]	2428	class Irq ( object ):
[539]	2429	##################################################################################
[406]	2430	def __init__( self,
[319]	2431	irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only)
	2432	srcid, # input IRQ index (for XCU or PIC)
	2433	isrtype, # Type of ISR to be executed
	2434	channel = 0 ): # channel index for multi-channel ISR
[305]	2435
[319]	2436	assert irqtype in IRQTYPES
	2437	assert isrtype in ISRTYPES
	2438	assert srcid < 32
[305]	2439
[319]	2440	self.index = 0 # global index ( set by addIrq() )
[406]	2441	self.irqtype = irqtype # IRQ type
[319]	2442	self.srcid = srcid # source IRQ index
[406]	2443	self.isrtype = isrtype # ISR type
[319]	2444	self.channel = channel # channel index (for multi-channels ISR)
[305]	2445	return
	2446
[539]	2447	################################
[319]	2448	def xml( self ): # xml for Irq
[305]	2449
[539]	2450	s = ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \
[319]	2451	% ( self.irqtype, self.srcid, self.isrtype, self.channel )
[539]	2452	return s
[305]	2453
[539]	2454	####################################################################
	2455	def cbin( self, mapping, verbose, expected ): # C binary for Irq
[305]	2456
[319]	2457	if ( verbose ):
[406]	2458	print '*** cbin for irq[%d]' % (self.index)
[305]	2459
[319]	2460	# check index
	2461	if (self.index != expected):
[512]	2462	print '[genmap error] in Irq.cbin()'
[539]	2463	print ' irq global index = %d / expected = %d' \
	2464	% (self.index,expected)
[319]	2465	sys.exit(1)
[305]	2466
[319]	2467	# compute numerical value for irqtype
	2468	irqtype_id = 0xFFFFFFFF
	2469	for x in xrange( len(IRQTYPES) ):
[512]	2470	if ( self.irqtype == IRQTYPES[x] ): irqtype_id = x
	2471
[319]	2472	if ( irqtype_id == 0xFFFFFFFF ):
[512]	2473	print '[genmap error] in Irq.cbin()'
	2474	print ' undefined irqtype %s' % self.irqtype
[319]	2475	sys.exit(1)
[305]	2476
[319]	2477	# compute numerical value for isrtype
	2478	isrtype_id = 0xFFFFFFFF
[406]	2479	for x in xrange( len(ISRTYPES) ):
[512]	2480	if ( self.isrtype == ISRTYPES[x] ): isrtype_id = x
	2481
[319]	2482	if ( isrtype_id == 0xFFFFFFFF ):
[512]	2483	print '[genmap error] in Irq.cbin()'
	2484	print ' undefined isrtype %s' % self.isrtype
[319]	2485	sys.exit(1)
	2486
	2487	byte_stream = bytearray()
	2488	byte_stream += mapping.int2bytes( 4, irqtype_id )
	2489	byte_stream += mapping.int2bytes( 4, self.srcid )
	2490	byte_stream += mapping.int2bytes( 4, isrtype_id )
	2491	byte_stream += mapping.int2bytes( 4, self.channel )
	2492	byte_stream += mapping.int2bytes( 4, 0 )
	2493	byte_stream += mapping.int2bytes( 4, 0 )
	2494
	2495	if ( verbose ):
	2496	print 'irqtype = %s' % self.irqtype
	2497	print 'srcid = %d' % self.srcid
	2498	print 'isrtype = %s' % self.isrtype
	2499	print 'channel = %d' % self.channel
	2500
	2501	return byte_stream
	2502
[305]	2503	# Local Variables:
	2504	# tab-width: 4;
	2505	# c-basic-offset: 4;
	2506	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	2507	# indent-tabs-mode: nil;
	2508	# End:
	2509	#
	2510	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	2511

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