Changeset 345 for soft/giet_vm/giet_drivers
- Timestamp:
- Jun 25, 2014, 2:19:37 PM (10 years ago)
- Location:
- soft/giet_vm/giet_drivers
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/giet_drivers/dma_driver.c
r343 r345 32 32 #include <vmem.h> 33 33 #include <utils.h> 34 #include <io.h> 34 35 35 36 #if !defined(X_SIZE) … … 61 62 #endif 62 63 63 extern unsigned int _ptabs_vaddr[]; 64 extern volatile unsigned int _ptabs_vaddr[]; 65 66 /////////////////////////////////////////////////////////////////////////////// 67 // This low level function returns the value contained in register "index" 68 // in the DMA component contained in cluster "cluster_xy" 69 /////////////////////////////////////////////////////////////////////////////// 70 static 71 unsigned int _dma_get_register( unsigned int cluster_xy, // cluster index 72 unsigned int channel_id, // channel index 73 unsigned int index ) // register index 74 { 75 unsigned int vaddr = 76 SEG_DMA_BASE + 77 (cluster_xy * PERI_CLUSTER_INCREMENT) + 78 (channel_id * DMA_SPAN) + 79 (index << 2); 80 81 return ioread32( (void*)vaddr ); 82 } 83 84 /////////////////////////////////////////////////////////////////////////////// 85 // This low level function sets a new value in register "index" 86 // in the DMA component contained in cluster "cluster_xy" 87 /////////////////////////////////////////////////////////////////////////////// 88 static 89 void _dma_set_register( unsigned int cluster_xy, // cluster index 90 unsigned int channel_id, // channel index 91 unsigned int index, // register index 92 unsigned int value ) // value to be written 93 { 94 unsigned int vaddr = 95 SEG_DMA_BASE + 96 (cluster_xy * PERI_CLUSTER_INCREMENT) + 97 (channel_id * DMA_SPAN) + 98 (index << 2); 99 100 iowrite32( (void*)vaddr, value ); 101 } 64 102 65 103 ////////////////////////////////////////////////////////////////////////////////// … … 81 119 if (channel_id >= NB_DMA_CHANNELS) return 1; 82 120 83 // compute DMA base address84 unsigned int* dma_address = (unsigned int*) ( SEG_DMA_BASE +85 (cluster_xy * PERI_CLUSTER_INCREMENT) );86 87 121 // disable interrupt for selected channel 88 dma_address[channel_id * DMA_SPAN + DMA_IRQ_DISABLE] = 1;122 _dma_set_register(cluster_xy, channel_id, DMA_IRQ_DISABLE, 1); 89 123 return 0; 90 124 #else … … 109 143 if (channel_id >= NB_DMA_CHANNELS) return 1; 110 144 111 // compute DMA base address112 unsigned int* dma_address = (unsigned int*) ( SEG_DMA_BASE +113 (cluster_xy * PERI_CLUSTER_INCREMENT) );114 115 145 // reset selected channel 116 dma_address[channel_id * DMA_SPAN + DMA_RESET] = 0;146 _dma_set_register(cluster_xy, channel_id, DMA_RESET, 0); 117 147 return 0; 118 148 #else … … 136 166 if (channel_id >= NB_DMA_CHANNELS) return 1; 137 167 138 // compute DMA base address139 unsigned int * dma_address = (unsigned int *) ( SEG_DMA_BASE +140 (cluster_xy * PERI_CLUSTER_INCREMENT) );141 142 168 // get selected channel status 143 return dma_address[channel_id * DMA_SPAN + DMA_LEN];169 return _dma_get_register(cluster_xy, channel_id, DMA_LEN); 144 170 #else 145 171 return DMA_IDLE; … … 160 186 #if NB_DMA_CHANNELS > 0 161 187 162 // compute DMA base address163 unsigned int * dma_address = (unsigned int *) ( SEG_DMA_BASE +164 (cluster_xy * PERI_CLUSTER_INCREMENT) );165 166 188 // selected channel configuration and lauching 167 dma_address[channel_id * DMA_SPAN + DMA_SRC] = (unsigned int)(src_paddr); 168 dma_address[channel_id * DMA_SPAN + DMA_SRC_EXT] = (unsigned int)(src_paddr>>32); 169 dma_address[channel_id * DMA_SPAN + DMA_DST] = (unsigned int)(dst_paddr); 170 dma_address[channel_id * DMA_SPAN + DMA_DST_EXT] = (unsigned int)(dst_paddr>>32); 171 dma_address[channel_id * DMA_SPAN + DMA_LEN] = (unsigned int)size; 189 _dma_set_register(cluster_xy, channel_id, DMA_SRC, 190 (unsigned int)(src_paddr)); 191 _dma_set_register(cluster_xy, channel_id, DMA_SRC_EXT, 192 (unsigned int)(src_paddr>>32)); 193 _dma_set_register(cluster_xy, channel_id, DMA_DST, 194 (unsigned int)(dst_paddr)); 195 _dma_set_register(cluster_xy, channel_id, DMA_DST_EXT, 196 (unsigned int)(dst_paddr>>32)); 197 _dma_set_register(cluster_xy, channel_id, DMA_LEN, 198 (unsigned int)size); 172 199 173 200 #endif … … 312 339 313 340 // get vspace page table pointer 314 unsigned int pt = 341 unsigned int pt = _ptabs_vaddr[vspace_id]; 315 342 316 343 // get src_paddr buffer physical addresse -
soft/giet_vm/giet_drivers/fbf_driver.c
r320 r345 64 64 char* fbf_address = (char *)SEG_FBF_BASE + offset; 65 65 66 _memcpy( fbf_address, buffer, length);66 memcpy( fbf_address, buffer, length); 67 67 68 68 return 0; … … 81 81 char* fbf_address = (char *)SEG_FBF_BASE + offset; 82 82 83 _memcpy( buffer, fbf_address, length);83 memcpy( buffer, fbf_address, length); 84 84 85 85 return 0; -
soft/giet_vm/giet_drivers/mmc_driver.c
r333 r345 21 21 #include <tty_driver.h> 22 22 #include <utils.h> 23 #include <io.h> 23 24 24 25 #if !defined(X_SIZE) … … 46 47 #endif 47 48 49 /////////////////////////////////////////////////////////////////////////////// 50 // This low level function returns the value contained in register "index" 51 // in the MMC component contained in cluster "cluster_xy" 52 /////////////////////////////////////////////////////////////////////////////// 53 static 54 unsigned int _mmc_get_register( unsigned int cluster_xy, // cluster index 55 unsigned int func, // function index 56 unsigned int index ) // register index 57 { 58 unsigned int vaddr = 59 SEG_MMC_BASE + 60 (cluster_xy * PERI_CLUSTER_INCREMENT) + 61 (MMC_REG(func, index) << 2); 62 63 return ioread32( (void*)vaddr ); 64 } 65 66 /////////////////////////////////////////////////////////////////////////////// 67 // This low level function sets a new value in register "index" 68 // in the MMC component contained in cluster "cluster_xy" 69 /////////////////////////////////////////////////////////////////////////////// 70 static 71 void _mmc_set_register( unsigned int cluster_xy, // cluster index 72 unsigned int func, // func index 73 unsigned int index, // register index 74 unsigned int value ) // value to be written 75 { 76 unsigned int vaddr = 77 SEG_MMC_BASE + 78 (cluster_xy * PERI_CLUSTER_INCREMENT) + 79 (MMC_REG(func, index) << 2); 80 81 iowrite32( (void*)vaddr, value ); 82 } 83 48 84 /////////////////////////////////////////////////////////////////////////////////// 49 85 // This function invalidates all cache lines covering a memory buffer defined … … 67 103 } 68 104 69 unsigned int* mmc_address = (unsigned int*)( SEG_MMC_BASE +70 (cluster_xy * PERI_CLUSTER_INCREMENT) );71 72 105 // get the hard lock protecting exclusive access to MEMC 73 while ( mmc_address[MEMC_LOCK] ) { asm volatile("nop"); }106 while ( _mmc_get_register(cluster_xy, 0, MEMC_LOCK) ); 74 107 75 108 // write inval arguments 76 mmc_address[MEMC_ADDR_LO] = (unsigned int)buf_paddr;77 mmc_address[MEMC_ADDR_HI] = (unsigned int)(buf_paddr>>32);78 mmc_address[MEMC_BUF_LENGTH] = buf_length;79 mmc_address[MEMC_CMD_TYPE] = MEMC_CMD_INVAL;109 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_LO , (unsigned int)buf_paddr); 110 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_HI , (unsigned int)(buf_paddr>>32)); 111 _mmc_set_register(cluster_xy, 0, MEMC_BUF_LENGTH, buf_length); 112 _mmc_set_register(cluster_xy, 0, MEMC_CMD_TYPE , MEMC_CMD_INVAL); 80 113 81 114 // release the lock 82 mmc_address[MEMC_LOCK] = 0;115 _mmc_set_register(cluster_xy, 0, MEMC_LOCK, 0); 83 116 } 84 117 /////////////////////////////////////////////////////////////////////////////////// … … 103 136 } 104 137 105 unsigned int* mmc_address = (unsigned int*)( SEG_MMC_BASE +106 (cluster_xy * PERI_CLUSTER_INCREMENT) );107 108 138 // get the hard lock protecting exclusive access to MEMC 109 while ( mmc_address[MEMC_LOCK] ) { asm volatile("nop"); }139 while ( _mmc_get_register(cluster_xy, 0, MEMC_LOCK) ); 110 140 111 141 // write inval arguments 112 mmc_address[MEMC_ADDR_LO] = (unsigned int)buf_paddr;113 mmc_address[MEMC_ADDR_HI] = (unsigned int)(buf_paddr>>32);114 mmc_address[MEMC_BUF_LENGTH] = buf_length;115 mmc_address[MEMC_CMD_TYPE] = MEMC_CMD_SYNC;142 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_LO , (unsigned int)buf_paddr); 143 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_HI , (unsigned int)(buf_paddr>>32)); 144 _mmc_set_register(cluster_xy, 0, MEMC_BUF_LENGTH, buf_length); 145 _mmc_set_register(cluster_xy, 0, MEMC_CMD_TYPE , MEMC_CMD_SYNC); 116 146 117 // release the lock protecting MEMC118 mmc_address[MEMC_LOCK] = 0;147 // release the lock 148 _mmc_set_register(cluster_xy, 0, MEMC_LOCK, 0); 119 149 } 120 150 -
soft/giet_vm/giet_drivers/mmc_driver.h
r297 r345 29 29 }; 30 30 31 #define MMC_REG(func,idx) ((func<<7)|idx) 32 31 33 /////////////////////////////////////////////////////////////////////////////////// 32 34 // MEMC access functions (for TSAR architecture) -
soft/giet_vm/giet_drivers/sim_driver.c
r320 r345 33 33 unsigned int * retval) 34 34 { 35 unsigned int* sim_helper_address = (unsigned int*)&seg_sim_base;35 volatile unsigned int* sim_helper_address = (unsigned int*)&seg_sim_base; 36 36 37 37 if (register_index == SIMHELPER_SC_STOP || -
soft/giet_vm/giet_drivers/tty_driver.c
r333 r345 53 53 54 54 in_unckdata volatile unsigned int _tty_rx_full[NB_TTY_CHANNELS] 55 56 57 in_ kdata unsigned int _tty_lock[NB_TTY_CHANNELS]58 55 = { [0 ... NB_TTY_CHANNELS - 1] = 0 }; 56 57 in_unckdata unsigned int _tty_lock[NB_TTY_CHANNELS] 58 = { [0 ... NB_TTY_CHANNELS - 1] = 0 }; 59 59 60 60 ////////////////////////////////////////////////////////////////////////////// -
soft/giet_vm/giet_drivers/xcu_driver.c
r333 r345 16 16 #include <mapping_info.h> 17 17 #include <utils.h> 18 #include <io.h> 18 19 19 20 #if !defined(X_SIZE) … … 49 50 #endif 50 51 52 /////////////////////////////////////////////////////////////////////////////// 53 // This low level function returns the value contained in register "index" 54 // in the XCU component contained in cluster "cluster_xy" 55 /////////////////////////////////////////////////////////////////////////////// 56 static 57 unsigned int _xcu_get_register( unsigned int cluster_xy, // cluster index 58 unsigned int func, // function index 59 unsigned int index ) // register index 60 { 61 unsigned int vaddr = 62 SEG_XCU_BASE + 63 (cluster_xy * PERI_CLUSTER_INCREMENT) + 64 (XCU_REG(func, index) << 2); 65 66 return ioread32( (void*)vaddr ); 67 } 68 69 /////////////////////////////////////////////////////////////////////////////// 70 // This low level function sets a new value in register "index" 71 // in the XCU component contained in cluster "cluster_xy" 72 /////////////////////////////////////////////////////////////////////////////// 73 static 74 void _xcu_set_register( unsigned int cluster_xy, // cluster index 75 unsigned int func, // func index 76 unsigned int index, // register index 77 unsigned int value ) // value to be written 78 { 79 unsigned int vaddr = 80 SEG_XCU_BASE + 81 (cluster_xy * PERI_CLUSTER_INCREMENT) + 82 (XCU_REG(func, index) << 2); 83 84 iowrite32( (void*)vaddr, value ); 85 } 51 86 52 87 //////////////////////////////////////////////////////////////////////////////// … … 68 103 if (channel >= (NB_PROCS_MAX * IRQ_PER_PROCESSOR)) _exit(); 69 104 70 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 71 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 72 73 unsigned int func; 105 unsigned int func = 0; 74 106 if (irq_type == IRQ_TYPE_PTI) func = XCU_MSK_PTI_ENABLE; 75 107 else if (irq_type == IRQ_TYPE_WTI) func = XCU_MSK_WTI_ENABLE; … … 81 113 } 82 114 83 xcu_address[XCU_REG(func,channel)] = value;115 _xcu_set_register(cluster_xy, func, channel, value); 84 116 85 117 #else … … 110 142 if (channel >= (NB_PROCS_MAX * IRQ_PER_PROCESSOR)) _exit(); 111 143 112 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 113 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 114 115 unsigned int prio = xcu_address[XCU_REG(XCU_PRIO,channel)]; 144 unsigned int prio = _xcu_get_register(cluster_xy, XCU_PRIO, channel); 116 145 unsigned int pti_ok = (prio & 0x00000001); 117 146 unsigned int hwi_ok = (prio & 0x00000002); … … 162 191 if (wti_index >= 32) _exit(); 163 192 164 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 165 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 166 167 xcu_address[XCU_REG(XCU_WTI_REG,wti_index)] = wdata; 193 _xcu_set_register(cluster_xy, XCU_WTI_REG, wti_index, wdata); 168 194 169 195 #else … … 191 217 if (wti_index >= 32) _exit(); 192 218 193 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 194 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 195 196 *value = xcu_address[XCU_REG(XCU_WTI_REG, wti_index)]; 219 *value = _xcu_get_register(cluster_xy, XCU_WTI_REG, wti_index); 197 220 198 221 #else … … 215 238 if (wti_index >= 32) _exit(); 216 239 217 unsigned int xcu_address = (unsigned int)SEG_XCU_BASE; 218 *address = xcu_address + (XCU_REG(XCU_WTI_REG, wti_index)<<2); 240 *address = SEG_XCU_BASE + (XCU_REG(XCU_WTI_REG, wti_index)<<2); 219 241 220 242 #else … … 239 261 if (y >= Y_SIZE) _exit(); 240 262 241 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 242 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 243 244 xcu_address[XCU_REG(XCU_PTI_PER, pti_index)] = period; 263 _xcu_set_register(cluster_xy, XCU_PTI_PER, pti_index, period); 245 264 246 265 #else … … 264 283 if (y >= Y_SIZE) _exit(); 265 284 266 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 267 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 268 269 xcu_address[XCU_REG(XCU_PTI_PER, pti_index)] = 0; 285 _xcu_set_register(cluster_xy, XCU_PTI_PER, pti_index, 0); 270 286 271 287 #else … … 291 307 if (y >= Y_SIZE) _exit(); 292 308 293 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE +294 (cluster_xy * PERI_CLUSTER_INCREMENT) );295 296 309 // This return value is not used / avoid a compilation warning. 297 return xcu_address[XCU_REG(XCU_PTI_ACK, pti_index)];310 return _xcu_get_register(cluster_xy, XCU_PTI_ACK, pti_index); 298 311 299 312 #else … … 322 335 if (y >= Y_SIZE) _exit(); 323 336 324 unsigned int* xcu_address = (unsigned int *) ( SEG_XCU_BASE + 325 (cluster_xy * PERI_CLUSTER_INCREMENT) ); 326 327 unsigned int period = xcu_address[XCU_REG(XCU_PTI_PER, pti_index)]; 337 unsigned int per = _xcu_get_register(cluster_xy, XCU_PTI_PER, pti_index); 328 338 329 339 // we write 0 first because if the timer is currently running, 330 340 // the corresponding timer counter is not reset 331 xcu_address[XCU_REG(XCU_PTI_PER, pti_index)] = 0;332 xcu_address[XCU_REG(XCU_PTI_PER, pti_index)] = period;341 _xcu_set_register(cluster_xy, XCU_PTI_PER, pti_index, 0); 342 _xcu_set_register(cluster_xy, XCU_PTI_PER, pti_index, per); 333 343 334 344 #else
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