[78] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Return_Address_Stack_transition.cpp 128 2009-06-26 08:43:23Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace prediction_unit { |
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| 17 | namespace return_address_stack { |
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| 18 | |
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| 19 | |
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| 20 | #undef FUNCTION |
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| 21 | #define FUNCTION "Return_Address_Stack::transition" |
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| 22 | void Return_Address_Stack::transition (void) |
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| 23 | { |
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[100] | 24 | log_begin(Return_Address_Stack,FUNCTION); |
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| 25 | log_function(Return_Address_Stack,FUNCTION,_name.c_str()); |
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[78] | 26 | |
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[81] | 27 | if (PORT_READ(in_NRESET)==0) |
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[78] | 28 | { |
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[100] | 29 | // Reset all structure |
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[78] | 30 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 31 | { |
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| 32 | reg_TOP [i] = 0; |
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[100] | 33 | // reg_BOTTOM [i] = 0; |
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[81] | 34 | reg_NB_ELT [i] = 0; |
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[78] | 35 | |
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| 36 | reg_PREDICT_TOP [i] = 0; |
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[100] | 37 | // reg_PREDICT_BOTTOM [i] = 0; |
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[81] | 38 | reg_PREDICT_NB_ELT [i] = 0; |
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[128] | 39 | |
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| 40 | for (uint32_t j=0; j<_param->_size_queue [i]; ++j) |
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| 41 | reg_stack [i][j]._address = 0; // not necessary |
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[78] | 42 | } |
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| 43 | } |
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| 44 | else |
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| 45 | { |
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| 46 | // =================================================================== |
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| 47 | // =====[ PREDICT ]=================================================== |
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| 48 | // =================================================================== |
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| 49 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 50 | if (PORT_READ(in_PREDICT_VAL [i]) and internal_PREDICT_ACK [i]) |
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| 51 | { |
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[100] | 52 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * PREDICT [%d] : Transaction",i); |
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| 53 | |
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| 54 | // Read information and pointer |
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[81] | 55 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; |
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| 56 | Tcontrol_t push = PORT_READ(in_PREDICT_PUSH [i]); |
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[100] | 57 | |
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[81] | 58 | Tptr_t top_old = reg_PREDICT_TOP [context]; |
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| 59 | Tptr_t top_new = top_old; |
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[100] | 60 | // Tptr_t bottom_old = reg_PREDICT_BOTTOM [context]; |
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| 61 | // Tptr_t bottom_new = bottom_old; |
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| 62 | Tptr_t nb_elt_old = reg_PREDICT_NB_ELT [context]; |
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| 63 | Tptr_t nb_elt_new = nb_elt_old; |
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[78] | 64 | |
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[100] | 65 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * context : %d",context); |
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[81] | 66 | |
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[100] | 67 | // Hit : push or not empty |
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[81] | 68 | // Miss : ifetch is stall, no update |
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[100] | 69 | |
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| 70 | // Test if hit |
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[78] | 71 | if (internal_PREDICT_HIT [i]) |
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| 72 | { |
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[100] | 73 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * before"); |
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| 74 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_old); |
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| 75 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_old); |
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| 76 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_old); |
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[81] | 77 | |
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[100] | 78 | // Test if push |
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[78] | 79 | if (push) |
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| 80 | { |
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[111] | 81 | Taddress_t address = PORT_READ(in_PREDICT_ADDRESS_PUSH [i]); |
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| 82 | |
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[100] | 83 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * push (call procedure)"); |
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[111] | 84 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * address_push : 0x%.8x",address); |
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[100] | 85 | |
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[81] | 86 | // push : increase the top (circular) |
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[78] | 87 | top_new = (top_old+1)%_param->_size_queue[context]; |
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[100] | 88 | |
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| 89 | // Write new value in Queue |
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[111] | 90 | reg_stack [context][top_new]._address = address; |
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[78] | 91 | |
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[81] | 92 | // Test if full |
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[100] | 93 | // -> is full, the push erase the oldest value in stack, also nb_elt is the same |
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| 94 | // -> is not full, increase nb_elt |
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| 95 | // if (nb_elt_old==_param->_size_queue[context]) |
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| 96 | // bottom_new = (bottom_old+1)%_param->_size_queue[context]; |
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| 97 | // else |
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| 98 | // nb_elt_new ++; |
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| 99 | if (nb_elt_old!=_param->_size_queue[context]) |
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| 100 | nb_elt_new ++; |
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[78] | 101 | } |
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| 102 | else |
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| 103 | { |
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| 104 | // pop |
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[100] | 105 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * pop (return procedure)"); |
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[78] | 106 | |
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[100] | 107 | // Test if the stack is empty |
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| 108 | if (nb_elt_old>0) |
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[81] | 109 | { |
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| 110 | top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); |
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[100] | 111 | nb_elt_new --; |
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[81] | 112 | } |
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[100] | 113 | // no else : can't pop |
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[78] | 114 | } |
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| 115 | |
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[100] | 116 | // Write new pointer |
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| 117 | reg_PREDICT_TOP [context] = top_new; |
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| 118 | // reg_PREDICT_BOTTOM [context] = bottom_new; |
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| 119 | reg_PREDICT_NB_ELT [context] = nb_elt_new; |
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[81] | 120 | |
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[100] | 121 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * after"); |
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| 122 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_new); |
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| 123 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_new); |
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| 124 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_new); |
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| 125 | } |
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| 126 | } |
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[78] | 127 | |
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[81] | 128 | // =================================================================== |
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| 129 | // =====[ DECOD ]===================================================== |
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| 130 | // =================================================================== |
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| 131 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 132 | if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i]) |
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| 133 | { |
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[100] | 134 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * DECOD [%d] : Transaction",i); |
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| 135 | |
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| 136 | // Read information |
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[81] | 137 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; |
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| 138 | Tcontrol_t push = PORT_READ(in_DECOD_PUSH [i]); |
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[100] | 139 | |
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| 140 | // Read pointer |
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[81] | 141 | Tptr_t top_old = reg_TOP [context]; |
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| 142 | Tptr_t top_new = top_old; |
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[100] | 143 | // Tptr_t bottom_old = reg_BOTTOM [context]; |
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| 144 | // Tptr_t bottom_new = bottom_old; |
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| 145 | Tptr_t nb_elt_old = reg_NB_ELT [context]; |
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| 146 | Tptr_t nb_elt_new = nb_elt_old; |
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[78] | 147 | |
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[100] | 148 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * context : %d",context); |
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[78] | 149 | |
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[100] | 150 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * before"); |
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| 151 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_old); |
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| 152 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_old); |
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| 153 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_old); |
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[78] | 154 | |
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[100] | 155 | // Test if push |
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| 156 | if (push) |
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| 157 | { |
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[111] | 158 | Taddress_t address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]); |
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| 159 | |
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[100] | 160 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * push (call procedure)"); |
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[111] | 161 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * address_push : 0x%.8x",address); |
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[100] | 162 | |
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| 163 | // push : increase the top (circular) |
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| 164 | top_new = (top_old+1)%_param->_size_queue[context]; |
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| 165 | |
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| 166 | // Write new value in Queue |
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[111] | 167 | reg_stack [context][top_new]._address = address; |
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[100] | 168 | |
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| 169 | // Test if full |
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| 170 | // -> is full, the push erase the oldest value in stack, also nb_elt is the same |
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| 171 | // -> is not full, increase nb_elt |
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| 172 | // if (nb_elt_old==_param->_size_queue[context]) |
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| 173 | // bottom_new = (bottom_old+1)%_param->_size_queue[context]; |
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| 174 | // else |
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| 175 | // nb_elt_new ++; |
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| 176 | if (nb_elt_old!=_param->_size_queue[context]) |
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| 177 | nb_elt_new ++; |
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| 178 | } |
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| 179 | else |
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| 180 | { |
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| 181 | // pop |
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| 182 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * pop (return procedure)"); |
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| 183 | |
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| 184 | // Test if the stack is empty |
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| 185 | if (nb_elt_old>0) |
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| 186 | { |
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| 187 | top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1); |
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| 188 | nb_elt_new --; |
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| 189 | } |
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| 190 | // no else : can't pop |
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| 191 | } |
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| 192 | |
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| 193 | // Write new pointer |
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| 194 | reg_TOP [context] = top_new; |
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| 195 | // reg_BOTTOM [context] = bottom_new; |
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| 196 | reg_NB_ELT [context] = nb_elt_new; |
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| 197 | |
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| 198 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * after"); |
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| 199 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_new); |
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| 200 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_new); |
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| 201 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_new); |
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| 202 | |
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[81] | 203 | // have previous miss of ifetch ? |
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| 204 | // 2 miss : |
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| 205 | // 1) miss predict : is very limited (local at context), can be update very quickly |
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| 206 | // 2) miss decod : result is in commit stage ... |
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[100] | 207 | |
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| 208 | // manage by Update_Fetch_Prediction_Table and Update_Prediction_Table |
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| 209 | // Note : |
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| 210 | // if decod miss : ifetch can have predict call and return branchement. Also, the head of decod can be false |
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| 211 | |
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[111] | 212 | Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); |
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[100] | 213 | |
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[111] | 214 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * miss : %d",miss); |
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| 215 | |
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| 216 | if (miss) |
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| 217 | { |
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| 218 | |
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[100] | 219 | // reg_PREDICT_BOTTOM [context] = reg_BOTTOM [context]; |
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[111] | 220 | reg_PREDICT_TOP [context] = reg_TOP [context]; |
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| 221 | reg_PREDICT_NB_ELT [context] = reg_NB_ELT [context]; |
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| 222 | } |
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[81] | 223 | } |
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[78] | 224 | |
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| 225 | // =================================================================== |
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| 226 | // =====[ UPDATE ]=================================================== |
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| 227 | // =================================================================== |
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| 228 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
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| 229 | if (PORT_READ(in_UPDATE_VAL [i]) and internal_UPDATE_ACK [i]) |
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| 230 | { |
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[100] | 231 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * UPDATE [%d] : Transaction",i); |
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[81] | 232 | |
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[100] | 233 | Tcontext_t context_id = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0; |
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| 234 | Tcontrol_t flush = PORT_READ(in_UPDATE_FLUSH [i]); |
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[78] | 235 | |
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[100] | 236 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * context_id : %d",context_id); |
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| 237 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * flush : %d",flush ); |
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| 238 | |
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| 239 | // An miss prediction on call/return = Return Address Stack is corrupted. |
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| 240 | if (flush) |
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| 241 | { |
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[107] | 242 | Tcontrol_t push = PORT_READ(in_UPDATE_PUSH [i]); |
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| 243 | Tptr_t value = (push)?1:0; |
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| 244 | |
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[100] | 245 | // All pointer is set at 0 |
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[107] | 246 | reg_TOP [context_id] = value; |
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[100] | 247 | // reg_BOTTOM [context_id] = 0; |
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[107] | 248 | reg_NB_ELT [context_id] = value; |
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[100] | 249 | |
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[107] | 250 | reg_PREDICT_TOP [context_id] = value; |
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[100] | 251 | // reg_PREDICT_BOTTOM [context_id] = 0; |
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[107] | 252 | reg_PREDICT_NB_ELT [context_id] = value; |
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| 253 | |
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| 254 | if (push) |
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| 255 | { |
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| 256 | // reinsert push value |
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[111] | 257 | Taddress_t address = PORT_READ(in_UPDATE_ADDRESS [i]); |
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| 258 | |
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| 259 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * flush and push"); |
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| 260 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * address_push : 0x%.8x",address); |
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| 261 | |
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| 262 | reg_stack [context_id][value]._address = address; |
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[107] | 263 | } |
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[100] | 264 | } |
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| 265 | else |
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| 266 | { |
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| 267 | // if miss_prediction -> restore queue |
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| 268 | // else, the prediction is correct |
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| 269 | Tcontrol_t miss_prediction = PORT_READ(in_UPDATE_MISS_PREDICTION [i]); |
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| 270 | |
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| 271 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * miss_prediction : %d",miss_prediction); |
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| 272 | |
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| 273 | #ifdef DEBUG_TEST |
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| 274 | Tptr_t index = PORT_READ(in_UPDATE_INDEX [i]); |
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| 275 | Tcontrol_t prediction_ifetch = PORT_READ(in_UPDATE_PREDICTION_IFETCH [i]); |
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| 276 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * index : %d",index); |
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| 277 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * prediction_ifetch : %d",prediction_ifetch); |
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| 278 | |
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| 279 | // if (prediction_ifetch) |
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| 280 | // { |
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| 281 | // if (index != reg_PREDICT_TOP [context_id]) |
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| 282 | // throw ERRORMORPHEO(FUNCTION,_("Index is different of predict_top")); |
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| 283 | // } |
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| 284 | // else |
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| 285 | // { |
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| 286 | // if (index != reg_TOP [context_id]) |
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| 287 | // throw ERRORMORPHEO(FUNCTION,_("Index is different of top")); |
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| 288 | // } |
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| 289 | |
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| 290 | #endif |
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| 291 | if (miss_prediction) |
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| 292 | { |
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| 293 | Tcontrol_t push = PORT_READ(in_UPDATE_PUSH [i]); |
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| 294 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * push : %d",push); |
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| 295 | #ifndef DEBUG_TEST |
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| 296 | Tptr_t index = PORT_READ(in_UPDATE_INDEX [i]); |
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| 297 | Tcontrol_t prediction_ifetch = PORT_READ(in_UPDATE_PREDICTION_IFETCH [i]); |
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| 298 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * index : %d",index); |
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| 299 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * prediction_ifetch : %d",prediction_ifetch); |
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| 300 | #endif |
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| 301 | |
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| 302 | Tptr_t top_old = (prediction_ifetch)?reg_PREDICT_TOP [context_id]:reg_TOP [context_id]; |
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| 303 | Tptr_t top_new = top_old; |
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| 304 | |
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| 305 | // Tptr_t bottom_old = (prediction_ifetch)?reg_PREDICT_BOTTOM [context_id]:reg_BOTTOM [context_id]; |
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| 306 | // Tptr_t bottom_new = bottom_old; |
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| 307 | |
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| 308 | Tptr_t nb_elt_old = (prediction_ifetch)?reg_PREDICT_NB_ELT [context_id]:reg_NB_ELT [context_id]; |
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| 309 | Tptr_t nb_elt_new = nb_elt_old; |
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| 310 | |
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| 311 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * before"); |
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| 312 | if (prediction_ifetch) |
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| 313 | { |
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| 314 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_old); |
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| 315 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_old); |
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| 316 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_old); |
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| 317 | } |
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| 318 | else |
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| 319 | { |
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| 320 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_top : %d",top_old); |
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| 321 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_bottom : %d",bottom_old); |
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| 322 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_nb_elt : %d",nb_elt_old); |
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| 323 | } |
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| 324 | |
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| 325 | // if previous is push, pop the value |
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| 326 | // else is previous is pop, push the poped value |
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| 327 | if (push) |
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| 328 | { |
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[111] | 329 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * previous is push, now pop"); |
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| 330 | |
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[100] | 331 | // previous is push, now must be pop |
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| 332 | |
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[107] | 333 | // Test if the stack is empty (if previous flush) |
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| 334 | if (nb_elt_old>0) |
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[100] | 335 | { |
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| 336 | top_new = (top_old==0)?(_param->_size_queue[context_id]-1):(top_old-1); |
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| 337 | nb_elt_new --; |
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| 338 | } |
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| 339 | } |
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| 340 | else |
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| 341 | { |
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[111] | 342 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * previous is pop, now push"); |
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| 343 | |
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[100] | 344 | // previous is pop, now must be push |
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| 345 | Taddress_t address = PORT_READ(in_UPDATE_ADDRESS [i]); |
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| 346 | |
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[111] | 347 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * address : 0x%.8x",address); |
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| 348 | |
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[100] | 349 | // push : increase the top (circular) |
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| 350 | // if (nb_elt_old==_param->_size_queue[context_id]) |
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| 351 | // bottom_new = (bottom_old+1)%_param->_size_queue[context_id]; |
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| 352 | // else |
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| 353 | // nb_elt_new ++; |
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| 354 | |
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| 355 | if (nb_elt_old!=_param->_size_queue[context_id]) |
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| 356 | nb_elt_new ++; |
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| 357 | |
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| 358 | top_new = index; |
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| 359 | |
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[111] | 360 | reg_stack [context_id][top_new]._address = address; |
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[100] | 361 | } |
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| 362 | |
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| 363 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * after"); |
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| 364 | |
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| 365 | if (prediction_ifetch) |
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| 366 | { |
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[111] | 367 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",reg_TOP [context_id]); |
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| 368 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",reg_BOTTOM [context_id]); |
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| 369 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",reg_NB_ELT [context_id]); |
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[100] | 370 | |
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[111] | 371 | reg_PREDICT_TOP [context_id] = reg_TOP [context_id]; |
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| 372 | // reg_PREDICT_BOTTOM [context_id] = reg_BOTTOM [context_id]; |
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| 373 | reg_PREDICT_NB_ELT [context_id] = reg_NB_ELT [context_id]; |
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| 374 | |
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| 375 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_top : %d",top_new ); |
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| 376 | // // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_bottom : %d",bottom_new); |
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| 377 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_predict_nb_elt : %d",nb_elt_new); |
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| 378 | |
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| 379 | // reg_PREDICT_TOP [context_id] = top_new ; |
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| 380 | // // reg_PREDICT_BOTTOM [context_id] = bottom_new; |
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| 381 | // reg_PREDICT_NB_ELT [context_id] = nb_elt_new; |
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| 382 | |
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[100] | 383 | } |
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| 384 | else |
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| 385 | { |
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| 386 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_top : %d",top_new); |
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| 387 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_bottom : %d",bottom_new); |
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| 388 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_nb_elt : %d",nb_elt_new); |
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| 389 | |
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| 390 | reg_TOP [context_id] = top_new ; |
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| 391 | // reg_BOTTOM [context_id] = bottom_new; |
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| 392 | reg_NB_ELT [context_id] = nb_elt_new; |
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[111] | 393 | reg_PREDICT_TOP [context_id] = top_new ; |
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| 394 | // reg_PREDICT_BOTTOM [context_id] = bottom_new; |
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| 395 | reg_PREDICT_NB_ELT [context_id] = nb_elt_new; |
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[100] | 396 | } |
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| 397 | } |
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| 398 | } |
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[78] | 399 | } |
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| 400 | } |
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| 401 | |
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[100] | 402 | #if defined(DEBUG_Return_Address_Stack) and DEBUG>=DEBUG_TRACE |
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| 403 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * Dump RAS"); |
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| 404 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
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| 405 | { |
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| 406 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * Return Address Stack [%d]",i); |
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| 407 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_TOP : %d",reg_TOP [i]); |
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| 408 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_BOTTOM : %d",reg_BOTTOM [i]); |
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| 409 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_NB_ELT : %d",reg_NB_ELT [i]); |
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| 410 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_PREDICT_TOP : %d",reg_PREDICT_TOP [i]); |
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| 411 | // log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_PREDICT_BOTTOM : %d",reg_PREDICT_BOTTOM [i]); |
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| 412 | log_printf(TRACE,Return_Address_Stack,FUNCTION," * reg_PREDICT_NB_ELT : %d",reg_PREDICT_NB_ELT [i]); |
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| 413 | |
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| 414 | for (uint32_t j=0; j<_param->_size_queue[i]; ++j) |
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| 415 | log_printf(TRACE,Return_Address_Stack,FUNCTION," [%d] %.8x (%.8x)",j,reg_stack [i][j]._address,reg_stack [i][j]._address<<2); |
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| 416 | } |
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| 417 | #endif |
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| 418 | |
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[78] | 419 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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| 420 | end_cycle (); |
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| 421 | #endif |
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| 422 | |
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[100] | 423 | log_end(Return_Address_Stack,FUNCTION); |
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[78] | 424 | }; |
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| 425 | |
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| 426 | }; // end namespace return_address_stack |
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| 427 | }; // end namespace prediction_unit |
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| 428 | }; // end namespace front_end |
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| 429 | }; // end namespace multi_front_end |
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| 430 | }; // end namespace core |
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| 431 | |
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| 432 | }; // end namespace behavioural |
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| 433 | }; // end namespace morpheo |
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| 434 | #endif |
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