[78] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Update_Prediction_Table_transition.cpp 101 2009-01-15 17:19:08Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace prediction_unit { |
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| 17 | namespace update_prediction_table { |
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| 18 | |
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| 19 | #undef FUNCTION |
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| 20 | #define FUNCTION "Update_Prediction_Table::transition" |
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| 21 | void Update_Prediction_Table::transition (void) |
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| 22 | { |
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[88] | 23 | log_begin(Update_Prediction_Table,FUNCTION); |
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| 24 | log_function(Update_Prediction_Table,FUNCTION,_name.c_str()); |
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[78] | 25 | |
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[81] | 26 | if (PORT_READ(in_NRESET) == 0) |
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| 27 | { |
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[88] | 28 | // Initialisation |
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| 29 | |
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| 30 | reg_UPDATE_PRIORITY = 0; |
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| 31 | |
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| 32 | // All pointer is set at 0 |
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[81] | 33 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 34 | { |
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[88] | 35 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
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| 36 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
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| 37 | reg_UFPT_BOTTOM [i] = 0; |
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| 38 | reg_UFPT_TOP [i] = 0; |
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| 39 | reg_UFPT_UPDATE [i] = 0; |
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| 40 | reg_UFPT_NB_NEED_UPDATE [i] = 0; |
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| 41 | |
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| 42 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j) |
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| 43 | reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY; |
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| 44 | reg_UPT_BOTTOM [i] = 0; |
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| 45 | reg_UPT_TOP [i] = 0; |
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[95] | 46 | reg_UPT_TOP_EVENT [i] = 0; |
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[88] | 47 | reg_UPT_UPDATE [i] = 0; |
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[101] | 48 | reg_UPT_EMPTY [i] = true; |
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[88] | 49 | |
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| 50 | reg_IS_ACCURATE [i] = true; |
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[94] | 51 | |
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[88] | 52 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
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| 53 | } |
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[81] | 54 | } |
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| 55 | else |
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| 56 | { |
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[94] | 57 | bool flush_UFPT [_param->_nb_context]; |
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| 58 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 59 | flush_UFPT [i] = false; |
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| 60 | |
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[81] | 61 | // =================================================================== |
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[88] | 62 | // =====[ GARBAGE COLLECTOR ]========================================= |
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| 63 | // =================================================================== |
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| 64 | |
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| 65 | // Each cycle, if the most lastest branch have update all prediction struction (state = end), free this slot |
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| 66 | // * Update state -> new status is "empty" |
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| 67 | // * Update pointer (bottom and accurate) |
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| 68 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR"); |
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| 69 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 70 | { |
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| 71 | // UPDATE_FETCH_PREDICTION_TABLE |
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| 72 | { |
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| 73 | uint32_t bottom = reg_UFPT_BOTTOM [i]; |
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| 74 | |
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| 75 | // Test if state is end |
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| 76 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END) |
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| 77 | { |
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| 78 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d]",i,bottom); |
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| 79 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state = UPDATE_FETCH_PREDICTION_STATE_EMPTY",i,bottom); |
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| 80 | |
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| 81 | // Free slot |
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| 82 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
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| 83 | // Update pointer |
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| 84 | reg_UFPT_BOTTOM [i] = (bottom+1)%_param->_size_ufpt_queue[i]; |
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| 85 | } |
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| 86 | } |
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| 87 | |
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| 88 | // UPDATE_PREDICTION_TABLE |
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| 89 | { |
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[101] | 90 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
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| 91 | bool end_ok = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_OK); |
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| 92 | bool end_ko = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_KO); |
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| 93 | // event_state_t event_state = reg_EVENT_STATE [i]; |
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[95] | 94 | |
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[88] | 95 | // Test if state is end |
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[101] | 96 | // if ((end_ok or end_ko) and |
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| 97 | // ((event_state != EVENT_STATE_UPDATE_CONTEXT) and |
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| 98 | // (event_state != EVENT_STATE_WAIT_END_EVENT))) |
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[95] | 99 | if (end_ok or end_ko) |
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[88] | 100 | { |
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| 101 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom); |
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| 102 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom); |
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| 103 | |
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| 104 | // Free slot |
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| 105 | reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; |
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[95] | 106 | |
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[88] | 107 | // Update pointer |
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| 108 | reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i]; |
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[101] | 109 | |
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| 110 | if (reg_UPT_BOTTOM [i] == reg_UPT_TOP [i]) |
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| 111 | reg_UPT_EMPTY [i] = true; // free a slot |
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| 112 | |
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[95] | 113 | // if (bottom = reg_UPT_UPDATE [i]) |
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| 114 | // reg_UPT_UPDATE [i] = reg_UPT_BOTTOM [i]; |
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| 115 | if (end_ko) // free |
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| 116 | { |
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| 117 | reg_UPT_TOP [i] = reg_UPT_TOP_EVENT [i]; |
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| 118 | reg_UPT_UPDATE [i] = reg_UPT_TOP_EVENT [i]; |
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[101] | 119 | |
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| 120 | if (reg_UPT_BOTTOM [i] != reg_UPT_TOP [i]) |
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| 121 | reg_UPT_EMPTY [i] = false; |
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[95] | 122 | } |
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[88] | 123 | } |
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| 124 | } |
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| 125 | } |
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| 126 | |
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| 127 | // =================================================================== |
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[81] | 128 | // =====[ PREDICT ]=================================================== |
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| 129 | // =================================================================== |
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[88] | 130 | |
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| 131 | // An ifetch_unit compute next cycle and have an branch : predict_val is set |
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| 132 | // * Alloc new entry -> new status is "wait decod" |
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| 133 | // * Save input (to restore in miss or error) |
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| 134 | // * Update pointer |
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| 135 | |
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[81] | 136 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 137 | if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) |
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| 138 | { |
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| 139 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; |
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[88] | 140 | uint32_t top = internal_PREDICT_UPDATE_PREDICTION_ID [i]; |
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[81] | 141 | |
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[88] | 142 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * PREDICT[%d] - Accepted",i); |
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| 143 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 144 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
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[81] | 145 | |
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[88] | 146 | #ifdef DEBUG_TEST |
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| 147 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
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| 148 | throw ERRORMORPHEO(FUNCTION,_("Predict : invalid state.")); |
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| 149 | #endif |
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[81] | 150 | |
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[88] | 151 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD (predict)",context,top); |
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| 152 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state = UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD; |
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| 153 | |
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| 154 | Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); |
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| 155 | |
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| 156 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._condition = condition; |
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| 157 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); |
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| 158 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); |
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| 159 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_PREDICT_BTB_LAST_TAKE [i]); |
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| 160 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._is_accurate = PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]); |
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| 161 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._history = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0; |
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| 162 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_PREDICT_RAS_ADDRESS [i]); |
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| 163 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); |
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| 164 | |
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| 165 | reg_UFPT_TOP [context] = (top+1)%_param->_size_ufpt_queue [context]; |
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| 166 | // reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context]; |
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| 167 | if (need_update(condition)) |
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| 168 | reg_UFPT_NB_NEED_UPDATE [context] ++; |
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[81] | 169 | } |
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| 170 | |
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| 171 | // =================================================================== |
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| 172 | // =====[ DECOD ]===================================================== |
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| 173 | // =================================================================== |
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[88] | 174 | |
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| 175 | |
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| 176 | // An decod is detected by decod stage |
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| 177 | // 1) Hit prediction : The instruction bundle have a branch predicted in ifetch stage and it is this branch |
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| 178 | // * Update state, wait_decod -> wait_end |
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| 179 | // * Pop ufpt -> push upt |
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| 180 | // * Update accurate register : if the predict stage have tagged this branch as not accurate, stop decod |
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| 181 | // 2) Miss : The instruction bundle have a branch but it is not predicted |
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| 182 | // * Flush ufpt |
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| 183 | // * decod information is write in upt |
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| 184 | |
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[81] | 185 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 186 | if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) |
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| 187 | { |
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[88] | 188 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; |
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| 189 | Tcontrol_t miss_ifetch = PORT_READ(in_DECOD_MISS_IFETCH [i]); |
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| 190 | Tcontrol_t miss_decod = PORT_READ(in_DECOD_MISS_DECOD [i]); |
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| 191 | uint32_t upt_ptr_write = internal_DECOD_UPT_PTR_WRITE [i]; |
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| 192 | Tbranch_condition_t condition ; |
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| 193 | Tcontrol_t is_accurate; |
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[94] | 194 | Taddress_t address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); |
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| 195 | Taddress_t address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); |
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| 196 | Tcontrol_t last_take = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); |
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[81] | 197 | |
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[88] | 198 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * DECOD[%d] - Accepted",i); |
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| 199 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 200 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch); |
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| 201 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_decod : %d",miss_decod); |
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| 202 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_ptr_write : %d",upt_ptr_write); |
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[81] | 203 | |
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[88] | 204 | if (miss_ifetch or miss_decod) |
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[81] | 205 | { |
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[88] | 206 | // Have a miss !!! |
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[94] | 207 | #ifdef DEBUG_TEST |
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| 208 | if (reg_EVENT_STATE [context] != EVENT_STATE_OK) |
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| 209 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); |
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| 210 | #endif |
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| 211 | |
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[88] | 212 | if (reg_UFPT_NB_NEED_UPDATE [context] == 0) |
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| 213 | { |
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[94] | 214 | // Change state |
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| 215 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); |
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| 216 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
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[88] | 217 | } |
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| 218 | else |
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| 219 | { |
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[94] | 220 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_FLUSH_UFPT (decod - miss - flush ufpt)",context); |
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[88] | 221 | reg_EVENT_STATE [context] = EVENT_STATE_FLUSH_UFPT; |
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| 222 | } |
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[81] | 223 | |
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[94] | 224 | // Flush UPFT |
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| 225 | flush_UFPT [context] = true; |
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| 226 | |
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[98] | 227 | reg_EVENT_DEPTH [context] = upt_ptr_write; |
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[94] | 228 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
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| 229 | reg_EVENT_ADDRESS_DEST_VAL[context] = last_take; |
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| 230 | reg_EVENT_ADDRESS_DEST [context] = address_dest; |
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| 231 | |
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[88] | 232 | // Push upt (from decod interface) |
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| 233 | condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); |
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| 234 | is_accurate = PORT_READ(in_DECOD_IS_ACCURATE [i]); |
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| 235 | |
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| 236 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
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[94] | 237 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = address_src ; |
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| 238 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = address_dest; |
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| 239 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = last_take ; |
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[88] | 240 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
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| 241 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
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| 242 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = ; // static prediction |
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| 243 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = PORT_READ(in_DECOD_RAS_ADDRESS [i]); |
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| 244 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = PORT_READ(in_DECOD_RAS_INDEX [i]); |
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| 245 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = false; // static prediction |
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[81] | 246 | } |
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| 247 | else |
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| 248 | { |
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| 249 | // Normal case : branch is previous predicated, change state of branch |
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[88] | 250 | uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; |
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[81] | 251 | |
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[88] | 252 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_ptr_read : %d",ufpt_ptr_read); |
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| 253 | |
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| 254 | #ifdef DEBUG_TEST |
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| 255 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) |
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| 256 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state.")); |
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| 257 | #endif |
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| 258 | // Change state |
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| 259 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read); |
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| 260 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
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| 261 | |
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| 262 | // Push upt (from Pop ufpt) |
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| 263 | condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition; |
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| 264 | is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate; |
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| 265 | |
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| 266 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
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| 267 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ; |
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| 268 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest; |
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| 269 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take ; |
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| 270 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
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| 271 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
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| 272 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history ; |
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| 273 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ; |
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| 274 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras ; |
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| 275 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true; // prediction from ifetch |
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| 276 | |
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| 277 | // Update pointer |
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| 278 | if (need_update(condition)) |
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| 279 | { |
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| 280 | reg_UFPT_NB_NEED_UPDATE [context] --; |
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| 281 | } |
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[81] | 282 | } |
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[88] | 283 | |
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| 284 | // All case !!! |
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| 285 | |
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| 286 | #ifdef DEBUG_TEST |
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| 287 | if (reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state != UPDATE_PREDICTION_STATE_EMPTY) |
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| 288 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid upt state.")); |
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| 289 | #endif |
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| 290 | |
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| 291 | // Change state |
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| 292 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); |
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| 293 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; |
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| 294 | |
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| 295 | // Write new accurate |
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| 296 | #ifdef DEBUG_TEST |
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| 297 | if (not reg_IS_ACCURATE [context] and not is_accurate) |
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| 298 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag.")); |
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| 299 | #endif |
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| 300 | reg_IS_ACCURATE [context] = is_accurate; |
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| 301 | |
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| 302 | // Update pointer |
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| 303 | reg_UPT_TOP [context] = (upt_ptr_write+1)%_param->_size_upt_queue [context]; |
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[101] | 304 | reg_UPT_EMPTY [context] = false; |
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[88] | 305 | // reg_UPT_UPDATE [context] = reg_UPT_TOP [context]; |
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[81] | 306 | } |
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| 307 | |
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| 308 | // =================================================================== |
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| 309 | // =====[ BRANCH_COMPLETE ]=========================================== |
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| 310 | // =================================================================== |
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[88] | 311 | |
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| 312 | // The branch is complete |
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| 313 | // * Hit prediction : |
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| 314 | // * update status |
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| 315 | // * Miss prediction : |
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[81] | 316 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 317 | if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) |
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| 318 | { |
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[98] | 319 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; |
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| 320 | Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; |
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[94] | 321 | Tcontrol_t miss = internal_BRANCH_COMPLETE_MISS_PREDICTION [i]; |
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| 322 | Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE [i]; |
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| 323 | Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; |
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[81] | 324 | |
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[88] | 325 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); |
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[95] | 326 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 327 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
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| 328 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); |
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[81] | 329 | |
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[94] | 330 | if (miss) |
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[81] | 331 | { |
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[94] | 332 | // Have a miss !!! |
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| 333 | // Flush UPFT |
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| 334 | flush_UFPT [context] = true; |
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| 335 | |
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| 336 | // Flush UPT |
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| 337 | uint32_t top = reg_UPT_TOP [context]; |
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| 338 | uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; |
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[95] | 339 | |
---|
| 340 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 341 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 342 | |
---|
[94] | 343 | for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; |
---|
| 344 | j!=top; |
---|
| 345 | j=(j+1)%_param->_size_upt_queue[context]) |
---|
| 346 | reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 347 | |
---|
| 348 | |
---|
[95] | 349 | // reg_UPT_BOTTOM [context]; |
---|
| 350 | reg_UPT_TOP [context] = depth; |
---|
| 351 | reg_UPT_TOP_EVENT [context] = top; |
---|
[81] | 352 | |
---|
[101] | 353 | if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) |
---|
| 354 | reg_UPT_EMPTY [i] = true; |
---|
| 355 | |
---|
[94] | 356 | #ifdef DEBUG_TEST |
---|
| 357 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 358 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
| 359 | #endif |
---|
| 360 | |
---|
| 361 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); |
---|
| 362 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; |
---|
| 363 | |
---|
[95] | 364 | Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; |
---|
| 365 | event_state_t event_state = reg_EVENT_STATE [context]; |
---|
| 366 | bool previous_update_ras = (event_state == EVENT_STATE_FLUSH_UPT); |
---|
| 367 | bool update_ras = (new_update != depth); |
---|
[88] | 368 | |
---|
[95] | 369 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
[81] | 370 | |
---|
[94] | 371 | if (reg_UFPT_NB_NEED_UPDATE [context] > 0) |
---|
| 372 | { |
---|
| 373 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); |
---|
| 374 | reg_EVENT_STATE [context] = EVENT_STATE_FLUSH_UFPT_AND_UPT; |
---|
| 375 | } |
---|
| 376 | else |
---|
| 377 | { |
---|
[95] | 378 | if (not previous_update_ras) |
---|
| 379 | { |
---|
| 380 | // have ras prediction ? |
---|
| 381 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_FLUSH_UPT (branch_complete - miss)",context); |
---|
| 382 | |
---|
| 383 | reg_EVENT_STATE [context] = EVENT_STATE_FLUSH_UPT; |
---|
| 384 | |
---|
| 385 | } |
---|
[94] | 386 | } |
---|
[81] | 387 | |
---|
[95] | 388 | if (not previous_update_ras) |
---|
| 389 | { |
---|
| 390 | reg_UPT_UPDATE [context] = new_update; |
---|
| 391 | } |
---|
| 392 | // else no update |
---|
| 393 | |
---|
[98] | 394 | reg_EVENT_DEPTH [context] = depth; |
---|
[94] | 395 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
---|
| 396 | reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; |
---|
| 397 | reg_EVENT_ADDRESS_DEST [context] = good_addr; |
---|
[81] | 398 | } |
---|
| 399 | else |
---|
| 400 | { |
---|
[88] | 401 | // Hit case |
---|
| 402 | |
---|
[81] | 403 | #ifdef DEBUG_TEST |
---|
[88] | 404 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 405 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
[81] | 406 | #endif |
---|
[88] | 407 | |
---|
| 408 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth); |
---|
| 409 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; |
---|
[81] | 410 | } |
---|
| 411 | |
---|
[88] | 412 | // In all case : update good_take |
---|
[94] | 413 | reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; |
---|
[88] | 414 | } |
---|
[81] | 415 | |
---|
| 416 | // =================================================================== |
---|
| 417 | // =====[ UPDATE ]==================================================== |
---|
| 418 | // =================================================================== |
---|
[95] | 419 | { |
---|
| 420 | bool can_continue [_param->_nb_context]; |
---|
| 421 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 422 | can_continue [i] = true; |
---|
[81] | 423 | |
---|
[95] | 424 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
---|
| 425 | { |
---|
| 426 | Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; |
---|
| 427 | |
---|
| 428 | if ((internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) or |
---|
| 429 | (internal_UPDATE_VAL_WITHOUT_ACK [i] and can_continue [context])) |
---|
[88] | 430 | { |
---|
[95] | 431 | Tdepth_t depth = internal_UPDATE_DEPTH [i]; |
---|
| 432 | |
---|
| 433 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPDATE[%d] - Accepted",i); |
---|
| 434 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 435 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 436 | |
---|
| 437 | if (internal_UPDATE_FROM_UFPT [i]) |
---|
[94] | 438 | { |
---|
[95] | 439 | // if free a slot, also all queue is updated |
---|
| 440 | // Last slot ? |
---|
| 441 | if (reg_UFPT_UPDATE [context] == reg_UFPT_BOTTOM [context]) |
---|
| 442 | switch (reg_EVENT_STATE [context]) |
---|
| 443 | { |
---|
| 444 | case EVENT_STATE_FLUSH_UFPT : reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; break; |
---|
| 445 | // impossible to have an update on ufpt and reg_upt_update>reg_upt_top |
---|
| 446 | case EVENT_STATE_FLUSH_UFPT_AND_UPT : reg_EVENT_STATE [context] = EVENT_STATE_FLUSH_UPT ; break; |
---|
| 447 | default : break; |
---|
| 448 | } |
---|
| 449 | |
---|
| 450 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Fetch Prediction Table"); |
---|
| 451 | |
---|
| 452 | // Change state |
---|
[88] | 453 | #ifdef DEBUG_TEST |
---|
[95] | 454 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state != UPDATE_FETCH_PREDICTION_STATE_EVENT) |
---|
| 455 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid ufpt state.")); |
---|
[88] | 456 | #endif |
---|
[95] | 457 | |
---|
| 458 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (update)",context,depth); |
---|
| 459 | |
---|
| 460 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
---|
| 461 | |
---|
| 462 | |
---|
| 463 | // Update pointer |
---|
| 464 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (before) : %d",reg_UFPT_UPDATE [context]); |
---|
| 465 | reg_UFPT_UPDATE [context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; |
---|
| 466 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [context]); |
---|
| 467 | // Free a register that need update ? |
---|
| 468 | if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition)) |
---|
| 469 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
[94] | 470 | } |
---|
| 471 | else |
---|
| 472 | { |
---|
[95] | 473 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Prediction Table"); |
---|
| 474 | |
---|
| 475 | // Change state |
---|
| 476 | #ifdef DEBUG_TEST |
---|
| 477 | if (internal_UPDATE_RAS [i]) |
---|
| 478 | { |
---|
| 479 | if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_EVENT) and |
---|
| 480 | (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_KO )) |
---|
| 481 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 482 | } |
---|
| 483 | else |
---|
| 484 | { |
---|
| 485 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_OK ) |
---|
| 486 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 487 | } |
---|
[88] | 488 | #endif |
---|
| 489 | |
---|
[95] | 490 | // bool have_event = ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) or |
---|
| 491 | // (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_EVENT)); |
---|
[97] | 492 | #ifdef STATISTICS |
---|
| 493 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
---|
| 494 | bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); |
---|
| 495 | #endif |
---|
[95] | 496 | bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); |
---|
[88] | 497 | |
---|
[95] | 498 | // Have an update, test the state to transiste to the good state |
---|
| 499 | if (ko) |
---|
| 500 | { |
---|
[101] | 501 | // Ko : wait end of all instruction |
---|
| 502 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO_WAIT_END (update)",context,depth); |
---|
| 503 | |
---|
| 504 | // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO_WAIT_END; |
---|
| 505 | |
---|
[95] | 506 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",context,depth); |
---|
| 507 | |
---|
| 508 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
[97] | 509 | |
---|
| 510 | #ifdef STATISTICS |
---|
| 511 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 512 | (*_stat_nb_branch_miss [context][condition])++; |
---|
| 513 | #endif |
---|
[95] | 514 | } |
---|
| 515 | else |
---|
| 516 | { |
---|
| 517 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_OK (update)",context,depth); |
---|
| 518 | |
---|
| 519 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_OK; |
---|
[97] | 520 | |
---|
| 521 | |
---|
| 522 | #ifdef STATISTICS |
---|
| 523 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 524 | { |
---|
| 525 | if (ok) |
---|
| 526 | (*_stat_nb_branch_hit [context][condition]) ++; |
---|
| 527 | else |
---|
| 528 | (*_stat_nb_branch_unused [context]) ++; |
---|
| 529 | } |
---|
| 530 | #endif |
---|
[95] | 531 | } |
---|
| 532 | |
---|
| 533 | // Update pointer |
---|
| 534 | // * if update RAS : update pointer is decreaste until it equal at top pointer |
---|
| 535 | if (internal_UPDATE_RAS [i]) |
---|
| 536 | { |
---|
| 537 | // if end_event, restart too bottom, else decrease pointer |
---|
| 538 | bool end_event = (reg_UPT_UPDATE [context] == reg_UPT_TOP [context]); |
---|
| 539 | |
---|
| 540 | reg_UPT_UPDATE [context] = (end_event)?reg_UPT_BOTTOM[context]:(((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 541 | if (end_event) |
---|
| 542 | { |
---|
| 543 | reg_UPT_UPDATE [context] = reg_UPT_BOTTOM[context]; |
---|
| 544 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
| 545 | } |
---|
| 546 | else |
---|
| 547 | { |
---|
| 548 | reg_UPT_UPDATE [context] = (((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 549 | } |
---|
| 550 | } |
---|
| 551 | else |
---|
| 552 | { |
---|
| 553 | // increase pointer |
---|
| 554 | reg_UPT_UPDATE [context] = (depth+1)%_param->_size_upt_queue[context]; |
---|
| 555 | } |
---|
| 556 | |
---|
| 557 | // Free the branch with no accurate ? |
---|
[101] | 558 | if ( (reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate == false) and not ko) |
---|
[95] | 559 | reg_IS_ACCURATE [context] = true; |
---|
[94] | 560 | } |
---|
[88] | 561 | } |
---|
[95] | 562 | else |
---|
| 563 | can_continue [context] = false; |
---|
| 564 | } |
---|
[81] | 565 | |
---|
[95] | 566 | // Round robin |
---|
| 567 | reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context; |
---|
| 568 | } |
---|
[81] | 569 | |
---|
[94] | 570 | // =================================================================== |
---|
| 571 | // =====[ BRANCH_EVENT ]============================================== |
---|
| 572 | // =================================================================== |
---|
| 573 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 574 | if (internal_BRANCH_EVENT_VAL [i] and PORT_READ(in_BRANCH_EVENT_ACK [i])) |
---|
| 575 | { |
---|
[95] | 576 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_EVENT [%d] - Accepted",i); |
---|
[82] | 577 | |
---|
[94] | 578 | #ifdef DEBUG_TEST |
---|
| 579 | if (reg_EVENT_STATE [i] != EVENT_STATE_UPDATE_CONTEXT) |
---|
| 580 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); |
---|
| 581 | #endif |
---|
[88] | 582 | |
---|
[94] | 583 | // Change state |
---|
[95] | 584 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); |
---|
[94] | 585 | |
---|
[95] | 586 | reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; |
---|
[94] | 587 | } |
---|
| 588 | |
---|
| 589 | // =================================================================== |
---|
[95] | 590 | // =====[ EVENT ]===================================================== |
---|
| 591 | // =================================================================== |
---|
| 592 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
[97] | 593 | if (PORT_READ(in_EVENT_VAL [i]) and internal_EVENT_ACK [i]) |
---|
| 594 | { |
---|
| 595 | //---------------------------------------------------------------- |
---|
| 596 | // Cases |
---|
| 597 | //---------------------------------------------------------------- |
---|
| 598 | // * EVENT_TYPE_NONE - nothing |
---|
| 599 | // * EVENT_TYPE_MISS_SPECULATION - Change state, reset pointer |
---|
| 600 | // * EVENT_TYPE_EXCEPTION - Flush upft and upt, Change state, reset pointer |
---|
| 601 | // * EVENT_TYPE_BRANCH_NO_ACCURATE - nothing : manage in decod and update |
---|
| 602 | // * EVENT_TYPE_SPR_ACCESS - nothing |
---|
| 603 | // * EVENT_TYPE_MSYNC - nothing |
---|
| 604 | // * EVENT_TYPE_PSYNC - nothing |
---|
| 605 | // * EVENT_TYPE_CSYNC - nothing |
---|
| 606 | |
---|
| 607 | Tevent_type_t event_type = PORT_READ(in_EVENT_TYPE [i]); |
---|
| 608 | // Tdepth_t depth = PORT_READ(in_EVENT_DEPTH [i]); |
---|
[95] | 609 | |
---|
[101] | 610 | // Test if end of miss -> all previous branch is complete |
---|
| 611 | // -> all next branch is finish |
---|
[97] | 612 | if (event_type == EVENT_TYPE_MISS_SPECULATION) |
---|
| 613 | { |
---|
| 614 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT"); |
---|
| 615 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_MISS_SPECULATION"); |
---|
| 616 | |
---|
[95] | 617 | #ifdef DEBUG_TEST |
---|
[97] | 618 | if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) |
---|
| 619 | throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); |
---|
[95] | 620 | #endif |
---|
[97] | 621 | |
---|
| 622 | // Change state |
---|
| 623 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); |
---|
| 624 | |
---|
| 625 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
[101] | 626 | reg_IS_ACCURATE [i] = true; |
---|
| 627 | |
---|
| 628 | // Tdepth_t depth = reg_UPT_TOP [i]; |
---|
| 629 | |
---|
| 630 | #ifdef DEBUG_TEST |
---|
| 631 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END) |
---|
| 632 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
| 633 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO) |
---|
| 634 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
| 635 | #endif |
---|
| 636 | |
---|
| 637 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",i,depth); |
---|
| 638 | |
---|
| 639 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
| 640 | |
---|
[97] | 641 | } |
---|
| 642 | } |
---|
[95] | 643 | |
---|
| 644 | // =================================================================== |
---|
[94] | 645 | // =====[ FLUSH ]===================================================== |
---|
| 646 | // =================================================================== |
---|
| 647 | |
---|
| 648 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 649 | { |
---|
| 650 | if (flush_UFPT [i]) |
---|
| 651 | { |
---|
| 652 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Flush Update Fetch Prediction Table"); |
---|
| 653 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i); |
---|
| 654 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 655 | |
---|
| 656 | // It's to accelerate miss speculation |
---|
| 657 | if (reg_UFPT_NB_NEED_UPDATE [i] == 0) |
---|
| 658 | { |
---|
| 659 | |
---|
| 660 | // No entry need prediction, flush all entry -> Reset |
---|
| 661 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 662 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
---|
| 663 | reg_UFPT_BOTTOM [i] = 0; |
---|
| 664 | reg_UFPT_TOP [i] = 0; |
---|
| 665 | // reg_UFPT_UPDATE [i]; |
---|
| 666 | } |
---|
| 667 | else |
---|
| 668 | { |
---|
| 669 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 670 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT; |
---|
[88] | 671 | |
---|
[94] | 672 | // TOP is next write slot : last slot is TOP-1 |
---|
| 673 | uint32_t top = reg_UFPT_TOP [i]; |
---|
| 674 | reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; |
---|
| 675 | |
---|
| 676 | // reg_UFPT_BOTTOM [i]; |
---|
| 677 | // reg_UFPT_TOP [i]; |
---|
| 678 | } |
---|
[81] | 679 | |
---|
[94] | 680 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [i]); |
---|
| 681 | |
---|
| 682 | } |
---|
| 683 | } |
---|
| 684 | |
---|
[97] | 685 | #ifdef STATISTICS |
---|
| 686 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 687 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 688 | { |
---|
| 689 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
| 690 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
---|
| 691 | (*_stat_ufpt_queue_nb_elt [i]) ++; |
---|
| 692 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
| 693 | if (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 694 | (*_stat_upt_queue_nb_elt [i]) ++; |
---|
| 695 | } |
---|
| 696 | #endif |
---|
| 697 | |
---|
[94] | 698 | // =================================================================== |
---|
| 699 | // =====[ PRINT ]===================================================== |
---|
| 700 | // =================================================================== |
---|
| 701 | |
---|
[82] | 702 | #if (DEBUG >= DEBUG_TRACE) |
---|
[88] | 703 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump Update_Prediction_Table"); |
---|
| 704 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPDATE_PRIORITY : %d",reg_UPDATE_PRIORITY); |
---|
[81] | 705 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 706 | { |
---|
[88] | 707 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_IS_ACCURATE : %d",reg_IS_ACCURATE [i]); |
---|
| 708 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); |
---|
[98] | 709 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); |
---|
[88] | 710 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x",reg_EVENT_ADDRESS_SRC [i]); |
---|
[94] | 711 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST_VAL: %d" ,reg_EVENT_ADDRESS_DEST_VAL[i]); |
---|
[88] | 712 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST : %.8x",reg_EVENT_ADDRESS_DEST [i]); |
---|
| 713 | |
---|
| 714 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Fetch_Prediction_Table [%d]",i); |
---|
| 715 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_BOTTOM : %d",reg_UFPT_BOTTOM [i]); |
---|
| 716 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_TOP : %d",reg_UFPT_TOP [i]); |
---|
[94] | 717 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE : %d",reg_UFPT_UPDATE [i]); |
---|
[88] | 718 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 719 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
| 720 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x %.8x, %.1d %.1d, %.8d %.8x %.4d - %s", |
---|
| 721 | j, |
---|
| 722 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition, |
---|
| 723 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src, |
---|
| 724 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest, |
---|
| 725 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._last_take, |
---|
| 726 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 727 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._history, |
---|
| 728 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras, |
---|
| 729 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 730 | toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 731 | ); |
---|
| 732 | |
---|
| 733 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i); |
---|
| 734 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); |
---|
| 735 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
---|
[95] | 736 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); |
---|
[88] | 737 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); |
---|
[101] | 738 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
---|
[88] | 739 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
| 740 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x %.8x, %.1d %.1d %.1d, %.8d %.8x %.4d - %s", |
---|
| 741 | j, |
---|
| 742 | reg_UPDATE_PREDICTION_TABLE [i][j]._condition, |
---|
| 743 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_src, |
---|
| 744 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest, |
---|
| 745 | reg_UPDATE_PREDICTION_TABLE [i][j]._last_take, |
---|
| 746 | reg_UPDATE_PREDICTION_TABLE [i][j]._good_take, |
---|
| 747 | reg_UPDATE_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 748 | reg_UPDATE_PREDICTION_TABLE [i][j]._history, |
---|
| 749 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras, |
---|
| 750 | reg_UPDATE_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 751 | toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 752 | ); |
---|
[81] | 753 | } |
---|
[82] | 754 | #endif |
---|
[88] | 755 | } |
---|
[81] | 756 | |
---|
| 757 | |
---|
[78] | 758 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 759 | end_cycle (); |
---|
| 760 | #endif |
---|
[88] | 761 | |
---|
| 762 | log_end(Update_Prediction_Table,FUNCTION); |
---|
[78] | 763 | }; |
---|
| 764 | |
---|
| 765 | }; // end namespace update_prediction_table |
---|
| 766 | }; // end namespace prediction_unit |
---|
| 767 | }; // end namespace front_end |
---|
| 768 | }; // end namespace multi_front_end |
---|
| 769 | }; // end namespace core |
---|
| 770 | |
---|
| 771 | }; // end namespace behavioural |
---|
| 772 | }; // end namespace morpheo |
---|
| 773 | #endif |
---|