[78] | 1 | #ifdef SYSTEMC |
---|
| 2 | /* |
---|
| 3 | * $Id: Update_Prediction_Table_transition.cpp 105 2009-02-05 11:18:31Z rosiere $ |
---|
| 4 | * |
---|
| 5 | * [ Description ] |
---|
| 6 | * |
---|
| 7 | */ |
---|
| 8 | |
---|
| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" |
---|
| 10 | |
---|
| 11 | namespace morpheo { |
---|
| 12 | namespace behavioural { |
---|
| 13 | namespace core { |
---|
| 14 | namespace multi_front_end { |
---|
| 15 | namespace front_end { |
---|
| 16 | namespace prediction_unit { |
---|
| 17 | namespace update_prediction_table { |
---|
| 18 | |
---|
| 19 | #undef FUNCTION |
---|
| 20 | #define FUNCTION "Update_Prediction_Table::transition" |
---|
| 21 | void Update_Prediction_Table::transition (void) |
---|
| 22 | { |
---|
[88] | 23 | log_begin(Update_Prediction_Table,FUNCTION); |
---|
| 24 | log_function(Update_Prediction_Table,FUNCTION,_name.c_str()); |
---|
[78] | 25 | |
---|
[81] | 26 | if (PORT_READ(in_NRESET) == 0) |
---|
| 27 | { |
---|
[88] | 28 | // Initialisation |
---|
| 29 | |
---|
| 30 | reg_UPDATE_PRIORITY = 0; |
---|
| 31 | |
---|
| 32 | // All pointer is set at 0 |
---|
[81] | 33 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 34 | { |
---|
[88] | 35 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 36 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
---|
| 37 | reg_UFPT_BOTTOM [i] = 0; |
---|
| 38 | reg_UFPT_TOP [i] = 0; |
---|
| 39 | reg_UFPT_UPDATE [i] = 0; |
---|
| 40 | reg_UFPT_NB_NEED_UPDATE [i] = 0; |
---|
| 41 | |
---|
| 42 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j) |
---|
| 43 | reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY; |
---|
| 44 | reg_UPT_BOTTOM [i] = 0; |
---|
| 45 | reg_UPT_TOP [i] = 0; |
---|
[95] | 46 | reg_UPT_TOP_EVENT [i] = 0; |
---|
[88] | 47 | reg_UPT_UPDATE [i] = 0; |
---|
[101] | 48 | reg_UPT_EMPTY [i] = true; |
---|
[88] | 49 | |
---|
| 50 | reg_IS_ACCURATE [i] = true; |
---|
[94] | 51 | |
---|
[105] | 52 | reg_EVENT_VAL [i] = false; |
---|
[88] | 53 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 54 | } |
---|
[81] | 55 | } |
---|
| 56 | else |
---|
| 57 | { |
---|
[105] | 58 | bool flush_UFPT [_param->_nb_context]; |
---|
[94] | 59 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
[105] | 60 | { |
---|
| 61 | flush_UFPT [i] = false; |
---|
| 62 | } |
---|
[94] | 63 | |
---|
[81] | 64 | // =================================================================== |
---|
[88] | 65 | // =====[ GARBAGE COLLECTOR ]========================================= |
---|
| 66 | // =================================================================== |
---|
| 67 | |
---|
| 68 | // Each cycle, if the most lastest branch have update all prediction struction (state = end), free this slot |
---|
| 69 | // * Update state -> new status is "empty" |
---|
| 70 | // * Update pointer (bottom and accurate) |
---|
[105] | 71 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR (BEGIN)"); |
---|
[88] | 72 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 73 | { |
---|
| 74 | // UPDATE_FETCH_PREDICTION_TABLE |
---|
| 75 | { |
---|
| 76 | uint32_t bottom = reg_UFPT_BOTTOM [i]; |
---|
| 77 | |
---|
| 78 | // Test if state is end |
---|
| 79 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END) |
---|
| 80 | { |
---|
| 81 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d]",i,bottom); |
---|
| 82 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state = UPDATE_FETCH_PREDICTION_STATE_EMPTY",i,bottom); |
---|
| 83 | |
---|
| 84 | // Free slot |
---|
| 85 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
---|
| 86 | // Update pointer |
---|
| 87 | reg_UFPT_BOTTOM [i] = (bottom+1)%_param->_size_ufpt_queue[i]; |
---|
| 88 | } |
---|
| 89 | } |
---|
| 90 | |
---|
| 91 | // UPDATE_PREDICTION_TABLE |
---|
| 92 | { |
---|
[101] | 93 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
---|
| 94 | bool end_ok = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_OK); |
---|
| 95 | bool end_ko = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_KO); |
---|
| 96 | // event_state_t event_state = reg_EVENT_STATE [i]; |
---|
[95] | 97 | |
---|
[88] | 98 | // Test if state is end |
---|
[101] | 99 | // if ((end_ok or end_ko) and |
---|
| 100 | // ((event_state != EVENT_STATE_UPDATE_CONTEXT) and |
---|
| 101 | // (event_state != EVENT_STATE_WAIT_END_EVENT))) |
---|
[95] | 102 | if (end_ok or end_ko) |
---|
[88] | 103 | { |
---|
| 104 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom); |
---|
| 105 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom); |
---|
| 106 | |
---|
| 107 | // Free slot |
---|
| 108 | reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; |
---|
[95] | 109 | |
---|
[88] | 110 | // Update pointer |
---|
| 111 | reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i]; |
---|
[101] | 112 | |
---|
| 113 | if (reg_UPT_BOTTOM [i] == reg_UPT_TOP [i]) |
---|
| 114 | reg_UPT_EMPTY [i] = true; // free a slot |
---|
| 115 | |
---|
[95] | 116 | // if (bottom = reg_UPT_UPDATE [i]) |
---|
| 117 | // reg_UPT_UPDATE [i] = reg_UPT_BOTTOM [i]; |
---|
[105] | 118 | |
---|
| 119 | if (reg_EVENT_VAL [i] and (reg_EVENT_UPT_PTR [i] == bottom)) |
---|
| 120 | // if (end_ko) // free |
---|
[95] | 121 | { |
---|
[105] | 122 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * END EVENT"); |
---|
| 123 | |
---|
| 124 | reg_EVENT_VAL [i] = false; |
---|
[95] | 125 | reg_UPT_TOP [i] = reg_UPT_TOP_EVENT [i]; |
---|
| 126 | reg_UPT_UPDATE [i] = reg_UPT_TOP_EVENT [i]; |
---|
[105] | 127 | |
---|
[101] | 128 | if (reg_UPT_BOTTOM [i] != reg_UPT_TOP [i]) |
---|
| 129 | reg_UPT_EMPTY [i] = false; |
---|
[95] | 130 | } |
---|
[88] | 131 | } |
---|
| 132 | } |
---|
| 133 | } |
---|
[105] | 134 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR (END)"); |
---|
[88] | 135 | |
---|
| 136 | // =================================================================== |
---|
[81] | 137 | // =====[ PREDICT ]=================================================== |
---|
| 138 | // =================================================================== |
---|
[88] | 139 | |
---|
| 140 | // An ifetch_unit compute next cycle and have an branch : predict_val is set |
---|
| 141 | // * Alloc new entry -> new status is "wait decod" |
---|
| 142 | // * Save input (to restore in miss or error) |
---|
| 143 | // * Update pointer |
---|
| 144 | |
---|
[81] | 145 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
---|
| 146 | if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) |
---|
| 147 | { |
---|
| 148 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; |
---|
[88] | 149 | uint32_t top = internal_PREDICT_UPDATE_PREDICTION_ID [i]; |
---|
[81] | 150 | |
---|
[88] | 151 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * PREDICT[%d] - Accepted",i); |
---|
| 152 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 153 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
[81] | 154 | |
---|
[88] | 155 | #ifdef DEBUG_TEST |
---|
| 156 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
---|
| 157 | throw ERRORMORPHEO(FUNCTION,_("Predict : invalid state.")); |
---|
| 158 | #endif |
---|
[81] | 159 | |
---|
[88] | 160 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD (predict)",context,top); |
---|
| 161 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state = UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD; |
---|
| 162 | |
---|
| 163 | Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); |
---|
| 164 | |
---|
| 165 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._condition = condition; |
---|
| 166 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); |
---|
| 167 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); |
---|
| 168 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_PREDICT_BTB_LAST_TAKE [i]); |
---|
| 169 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._is_accurate = PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]); |
---|
| 170 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._history = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0; |
---|
| 171 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_PREDICT_RAS_ADDRESS [i]); |
---|
| 172 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); |
---|
| 173 | |
---|
| 174 | reg_UFPT_TOP [context] = (top+1)%_param->_size_ufpt_queue [context]; |
---|
| 175 | // reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context]; |
---|
| 176 | if (need_update(condition)) |
---|
| 177 | reg_UFPT_NB_NEED_UPDATE [context] ++; |
---|
[81] | 178 | } |
---|
| 179 | |
---|
| 180 | // =================================================================== |
---|
| 181 | // =====[ DECOD ]===================================================== |
---|
| 182 | // =================================================================== |
---|
[88] | 183 | |
---|
| 184 | |
---|
| 185 | // An decod is detected by decod stage |
---|
| 186 | // 1) Hit prediction : The instruction bundle have a branch predicted in ifetch stage and it is this branch |
---|
| 187 | // * Update state, wait_decod -> wait_end |
---|
| 188 | // * Pop ufpt -> push upt |
---|
| 189 | // * Update accurate register : if the predict stage have tagged this branch as not accurate, stop decod |
---|
| 190 | // 2) Miss : The instruction bundle have a branch but it is not predicted |
---|
| 191 | // * Flush ufpt |
---|
| 192 | // * decod information is write in upt |
---|
| 193 | |
---|
[81] | 194 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
---|
| 195 | if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) |
---|
| 196 | { |
---|
[88] | 197 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; |
---|
| 198 | Tcontrol_t miss_ifetch = PORT_READ(in_DECOD_MISS_IFETCH [i]); |
---|
| 199 | Tcontrol_t miss_decod = PORT_READ(in_DECOD_MISS_DECOD [i]); |
---|
| 200 | uint32_t upt_ptr_write = internal_DECOD_UPT_PTR_WRITE [i]; |
---|
| 201 | Tbranch_condition_t condition ; |
---|
| 202 | Tcontrol_t is_accurate; |
---|
[94] | 203 | Taddress_t address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); |
---|
| 204 | Taddress_t address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); |
---|
| 205 | Tcontrol_t last_take = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); |
---|
[81] | 206 | |
---|
[88] | 207 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * DECOD[%d] - Accepted",i); |
---|
| 208 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 209 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch); |
---|
| 210 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_decod : %d",miss_decod); |
---|
| 211 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_ptr_write : %d",upt_ptr_write); |
---|
[81] | 212 | |
---|
[88] | 213 | if (miss_ifetch or miss_decod) |
---|
[81] | 214 | { |
---|
[88] | 215 | // Have a miss !!! |
---|
[94] | 216 | #ifdef DEBUG_TEST |
---|
| 217 | if (reg_EVENT_STATE [context] != EVENT_STATE_OK) |
---|
| 218 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); |
---|
| 219 | #endif |
---|
| 220 | |
---|
[88] | 221 | if (reg_UFPT_NB_NEED_UPDATE [context] == 0) |
---|
| 222 | { |
---|
[94] | 223 | // Change state |
---|
| 224 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); |
---|
| 225 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
[88] | 226 | } |
---|
| 227 | else |
---|
| 228 | { |
---|
[105] | 229 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context); |
---|
| 230 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; |
---|
[88] | 231 | } |
---|
[81] | 232 | |
---|
[94] | 233 | // Flush UPFT |
---|
| 234 | flush_UFPT [context] = true; |
---|
| 235 | |
---|
[98] | 236 | reg_EVENT_DEPTH [context] = upt_ptr_write; |
---|
[94] | 237 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
---|
| 238 | reg_EVENT_ADDRESS_DEST_VAL[context] = last_take; |
---|
| 239 | reg_EVENT_ADDRESS_DEST [context] = address_dest; |
---|
| 240 | |
---|
[88] | 241 | // Push upt (from decod interface) |
---|
| 242 | condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); |
---|
| 243 | is_accurate = PORT_READ(in_DECOD_IS_ACCURATE [i]); |
---|
| 244 | |
---|
| 245 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
---|
[94] | 246 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = address_src ; |
---|
| 247 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = address_dest; |
---|
| 248 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = last_take ; |
---|
[88] | 249 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
---|
| 250 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
---|
| 251 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = ; // static prediction |
---|
| 252 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = PORT_READ(in_DECOD_RAS_ADDRESS [i]); |
---|
| 253 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = PORT_READ(in_DECOD_RAS_INDEX [i]); |
---|
| 254 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = false; // static prediction |
---|
[81] | 255 | } |
---|
| 256 | else |
---|
| 257 | { |
---|
| 258 | // Normal case : branch is previous predicated, change state of branch |
---|
[88] | 259 | uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; |
---|
[81] | 260 | |
---|
[88] | 261 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_ptr_read : %d",ufpt_ptr_read); |
---|
| 262 | |
---|
| 263 | #ifdef DEBUG_TEST |
---|
| 264 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) |
---|
| 265 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state.")); |
---|
| 266 | #endif |
---|
| 267 | // Change state |
---|
| 268 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read); |
---|
| 269 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
---|
| 270 | |
---|
| 271 | // Push upt (from Pop ufpt) |
---|
| 272 | condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition; |
---|
| 273 | is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate; |
---|
| 274 | |
---|
| 275 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
---|
| 276 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ; |
---|
| 277 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest; |
---|
| 278 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take ; |
---|
| 279 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
---|
| 280 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
---|
| 281 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history ; |
---|
| 282 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ; |
---|
| 283 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras ; |
---|
[105] | 284 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true ; // prediction from ifetch |
---|
[88] | 285 | |
---|
| 286 | // Update pointer |
---|
| 287 | if (need_update(condition)) |
---|
| 288 | { |
---|
| 289 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
| 290 | } |
---|
[81] | 291 | } |
---|
[88] | 292 | |
---|
| 293 | // All case !!! |
---|
| 294 | #ifdef DEBUG_TEST |
---|
| 295 | if (reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 296 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid upt state.")); |
---|
| 297 | #endif |
---|
| 298 | |
---|
| 299 | // Change state |
---|
| 300 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); |
---|
| 301 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; |
---|
| 302 | |
---|
| 303 | // Write new accurate |
---|
| 304 | #ifdef DEBUG_TEST |
---|
| 305 | if (not reg_IS_ACCURATE [context] and not is_accurate) |
---|
| 306 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag.")); |
---|
| 307 | #endif |
---|
| 308 | reg_IS_ACCURATE [context] = is_accurate; |
---|
| 309 | |
---|
| 310 | // Update pointer |
---|
| 311 | reg_UPT_TOP [context] = (upt_ptr_write+1)%_param->_size_upt_queue [context]; |
---|
[101] | 312 | reg_UPT_EMPTY [context] = false; |
---|
[88] | 313 | // reg_UPT_UPDATE [context] = reg_UPT_TOP [context]; |
---|
[81] | 314 | } |
---|
| 315 | |
---|
| 316 | // =================================================================== |
---|
| 317 | // =====[ BRANCH_COMPLETE ]=========================================== |
---|
| 318 | // =================================================================== |
---|
[88] | 319 | |
---|
| 320 | // The branch is complete |
---|
| 321 | // * Hit prediction : |
---|
| 322 | // * update status |
---|
| 323 | // * Miss prediction : |
---|
[81] | 324 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
---|
| 325 | if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) |
---|
| 326 | { |
---|
[98] | 327 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; |
---|
| 328 | Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; |
---|
[94] | 329 | Tcontrol_t miss = internal_BRANCH_COMPLETE_MISS_PREDICTION [i]; |
---|
| 330 | Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE [i]; |
---|
| 331 | Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; |
---|
[81] | 332 | |
---|
[88] | 333 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); |
---|
[95] | 334 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 335 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 336 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); |
---|
[81] | 337 | |
---|
[94] | 338 | if (miss) |
---|
[81] | 339 | { |
---|
[94] | 340 | // Have a miss !!! |
---|
| 341 | // Flush UPFT |
---|
| 342 | flush_UFPT [context] = true; |
---|
| 343 | |
---|
| 344 | // Flush UPT |
---|
| 345 | uint32_t top = reg_UPT_TOP [context]; |
---|
| 346 | uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; |
---|
[95] | 347 | |
---|
| 348 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 349 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 350 | |
---|
[94] | 351 | for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; |
---|
| 352 | j!=top; |
---|
| 353 | j=(j+1)%_param->_size_upt_queue[context]) |
---|
| 354 | reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 355 | |
---|
| 356 | |
---|
[95] | 357 | // reg_UPT_BOTTOM [context]; |
---|
| 358 | reg_UPT_TOP [context] = depth; |
---|
| 359 | reg_UPT_TOP_EVENT [context] = top; |
---|
[81] | 360 | |
---|
[101] | 361 | if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) |
---|
[105] | 362 | reg_UPT_EMPTY [context] = true; |
---|
[101] | 363 | |
---|
[94] | 364 | #ifdef DEBUG_TEST |
---|
| 365 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 366 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
| 367 | #endif |
---|
| 368 | |
---|
| 369 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); |
---|
| 370 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; |
---|
| 371 | |
---|
[95] | 372 | Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; |
---|
| 373 | event_state_t event_state = reg_EVENT_STATE [context]; |
---|
[105] | 374 | bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 375 | (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or |
---|
| 376 | (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 377 | (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); |
---|
| 378 | // bool update_ras = (new_update != depth); |
---|
[88] | 379 | |
---|
[105] | 380 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
[81] | 381 | |
---|
[94] | 382 | if (reg_UFPT_NB_NEED_UPDATE [context] > 0) |
---|
| 383 | { |
---|
[105] | 384 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); |
---|
| 385 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; |
---|
[94] | 386 | } |
---|
| 387 | else |
---|
| 388 | { |
---|
[105] | 389 | // if (not previous_update_ras) |
---|
[95] | 390 | { |
---|
| 391 | // have ras prediction ? |
---|
[105] | 392 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); |
---|
[95] | 393 | |
---|
[105] | 394 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; |
---|
[95] | 395 | |
---|
| 396 | } |
---|
[94] | 397 | } |
---|
[81] | 398 | |
---|
[95] | 399 | if (not previous_update_ras) |
---|
| 400 | { |
---|
| 401 | reg_UPT_UPDATE [context] = new_update; |
---|
| 402 | } |
---|
| 403 | // else no update |
---|
| 404 | |
---|
[98] | 405 | reg_EVENT_DEPTH [context] = depth; |
---|
[94] | 406 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
---|
| 407 | reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; |
---|
| 408 | reg_EVENT_ADDRESS_DEST [context] = good_addr; |
---|
[81] | 409 | } |
---|
| 410 | else |
---|
| 411 | { |
---|
[88] | 412 | // Hit case |
---|
| 413 | |
---|
[81] | 414 | #ifdef DEBUG_TEST |
---|
[88] | 415 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 416 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
[81] | 417 | #endif |
---|
[88] | 418 | |
---|
| 419 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth); |
---|
| 420 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; |
---|
[81] | 421 | } |
---|
| 422 | |
---|
[88] | 423 | // In all case : update good_take |
---|
[94] | 424 | reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; |
---|
[88] | 425 | } |
---|
[81] | 426 | |
---|
| 427 | // =================================================================== |
---|
| 428 | // =====[ UPDATE ]==================================================== |
---|
| 429 | // =================================================================== |
---|
[95] | 430 | { |
---|
| 431 | bool can_continue [_param->_nb_context]; |
---|
| 432 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 433 | can_continue [i] = true; |
---|
[81] | 434 | |
---|
[95] | 435 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
---|
| 436 | { |
---|
| 437 | Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; |
---|
| 438 | |
---|
| 439 | if ((internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) or |
---|
| 440 | (internal_UPDATE_VAL_WITHOUT_ACK [i] and can_continue [context])) |
---|
[88] | 441 | { |
---|
[95] | 442 | Tdepth_t depth = internal_UPDATE_DEPTH [i]; |
---|
| 443 | |
---|
| 444 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPDATE[%d] - Accepted",i); |
---|
| 445 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 446 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 447 | |
---|
| 448 | if (internal_UPDATE_FROM_UFPT [i]) |
---|
[94] | 449 | { |
---|
[95] | 450 | // if free a slot, also all queue is updated |
---|
| 451 | // Last slot ? |
---|
| 452 | if (reg_UFPT_UPDATE [context] == reg_UFPT_BOTTOM [context]) |
---|
| 453 | switch (reg_EVENT_STATE [context]) |
---|
| 454 | { |
---|
[105] | 455 | case EVENT_STATE_MISS_FLUSH_UFPT : reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; break; |
---|
[95] | 456 | // impossible to have an update on ufpt and reg_upt_update>reg_upt_top |
---|
[105] | 457 | case EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT : reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT ; break; |
---|
| 458 | case EVENT_STATE_EVENT_FLUSH_UFPT : reg_EVENT_STATE [context] = EVENT_STATE_OK ; break; |
---|
| 459 | case EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT: reg_EVENT_STATE [context] = EVENT_STATE_EVENT_FLUSH_UPT; break; |
---|
[95] | 460 | default : break; |
---|
| 461 | } |
---|
| 462 | |
---|
| 463 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Fetch Prediction Table"); |
---|
| 464 | |
---|
| 465 | // Change state |
---|
[88] | 466 | #ifdef DEBUG_TEST |
---|
[95] | 467 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state != UPDATE_FETCH_PREDICTION_STATE_EVENT) |
---|
| 468 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid ufpt state.")); |
---|
[88] | 469 | #endif |
---|
[95] | 470 | |
---|
| 471 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (update)",context,depth); |
---|
| 472 | |
---|
| 473 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
---|
| 474 | |
---|
| 475 | |
---|
| 476 | // Update pointer |
---|
| 477 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (before) : %d",reg_UFPT_UPDATE [context]); |
---|
| 478 | reg_UFPT_UPDATE [context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; |
---|
| 479 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [context]); |
---|
| 480 | // Free a register that need update ? |
---|
| 481 | if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition)) |
---|
| 482 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
[94] | 483 | } |
---|
| 484 | else |
---|
| 485 | { |
---|
[95] | 486 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Prediction Table"); |
---|
| 487 | |
---|
| 488 | // Change state |
---|
| 489 | #ifdef DEBUG_TEST |
---|
| 490 | if (internal_UPDATE_RAS [i]) |
---|
| 491 | { |
---|
| 492 | if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_EVENT) and |
---|
[105] | 493 | (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_KO ) ) |
---|
[95] | 494 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 495 | } |
---|
| 496 | else |
---|
| 497 | { |
---|
| 498 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_OK ) |
---|
| 499 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 500 | } |
---|
[88] | 501 | #endif |
---|
| 502 | |
---|
[95] | 503 | // bool have_event = ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) or |
---|
| 504 | // (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_EVENT)); |
---|
[97] | 505 | #ifdef STATISTICS |
---|
| 506 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
---|
| 507 | bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); |
---|
| 508 | #endif |
---|
[95] | 509 | bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); |
---|
[88] | 510 | |
---|
[95] | 511 | // Have an update, test the state to transiste to the good state |
---|
| 512 | if (ko) |
---|
| 513 | { |
---|
[101] | 514 | // Ko : wait end of all instruction |
---|
| 515 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO_WAIT_END (update)",context,depth); |
---|
| 516 | |
---|
| 517 | // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO_WAIT_END; |
---|
| 518 | |
---|
[95] | 519 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",context,depth); |
---|
| 520 | |
---|
| 521 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
[97] | 522 | |
---|
[105] | 523 | reg_EVENT_VAL [context] = true; |
---|
| 524 | reg_EVENT_UPT_PTR [context] = depth; |
---|
| 525 | |
---|
[97] | 526 | #ifdef STATISTICS |
---|
| 527 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 528 | (*_stat_nb_branch_miss [context][condition])++; |
---|
| 529 | #endif |
---|
[95] | 530 | } |
---|
| 531 | else |
---|
| 532 | { |
---|
| 533 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_OK (update)",context,depth); |
---|
| 534 | |
---|
| 535 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_OK; |
---|
[97] | 536 | |
---|
| 537 | |
---|
| 538 | #ifdef STATISTICS |
---|
| 539 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 540 | { |
---|
| 541 | if (ok) |
---|
| 542 | (*_stat_nb_branch_hit [context][condition]) ++; |
---|
| 543 | else |
---|
| 544 | (*_stat_nb_branch_unused [context]) ++; |
---|
| 545 | } |
---|
| 546 | #endif |
---|
[95] | 547 | } |
---|
| 548 | |
---|
| 549 | // Update pointer |
---|
| 550 | // * if update RAS : update pointer is decreaste until it equal at top pointer |
---|
| 551 | if (internal_UPDATE_RAS [i]) |
---|
| 552 | { |
---|
| 553 | // if end_event, restart too bottom, else decrease pointer |
---|
| 554 | bool end_event = (reg_UPT_UPDATE [context] == reg_UPT_TOP [context]); |
---|
| 555 | |
---|
| 556 | reg_UPT_UPDATE [context] = (end_event)?reg_UPT_BOTTOM[context]:(((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 557 | if (end_event) |
---|
| 558 | { |
---|
[105] | 559 | // reg_UPT_UPDATE [context] = reg_UPT_BOTTOM[context]; |
---|
| 560 | |
---|
| 561 | if (reg_EVENT_STATE [context] == EVENT_STATE_EVENT_FLUSH_UPT) |
---|
| 562 | { |
---|
| 563 | reg_EVENT_STATE [context] = EVENT_STATE_OK; |
---|
| 564 | } |
---|
| 565 | else |
---|
| 566 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
[95] | 567 | } |
---|
| 568 | else |
---|
| 569 | { |
---|
| 570 | reg_UPT_UPDATE [context] = (((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 571 | } |
---|
| 572 | } |
---|
| 573 | else |
---|
| 574 | { |
---|
| 575 | // increase pointer |
---|
| 576 | reg_UPT_UPDATE [context] = (depth+1)%_param->_size_upt_queue[context]; |
---|
| 577 | } |
---|
| 578 | |
---|
| 579 | // Free the branch with no accurate ? |
---|
[101] | 580 | if ( (reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate == false) and not ko) |
---|
[95] | 581 | reg_IS_ACCURATE [context] = true; |
---|
[94] | 582 | } |
---|
[88] | 583 | } |
---|
[95] | 584 | else |
---|
| 585 | can_continue [context] = false; |
---|
| 586 | } |
---|
[81] | 587 | |
---|
[95] | 588 | // Round robin |
---|
| 589 | reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context; |
---|
| 590 | } |
---|
[81] | 591 | |
---|
[94] | 592 | // =================================================================== |
---|
| 593 | // =====[ BRANCH_EVENT ]============================================== |
---|
| 594 | // =================================================================== |
---|
| 595 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 596 | if (internal_BRANCH_EVENT_VAL [i] and PORT_READ(in_BRANCH_EVENT_ACK [i])) |
---|
| 597 | { |
---|
[95] | 598 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_EVENT [%d] - Accepted",i); |
---|
[82] | 599 | |
---|
[94] | 600 | #ifdef DEBUG_TEST |
---|
| 601 | if (reg_EVENT_STATE [i] != EVENT_STATE_UPDATE_CONTEXT) |
---|
| 602 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); |
---|
| 603 | #endif |
---|
[88] | 604 | |
---|
[94] | 605 | // Change state |
---|
[95] | 606 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); |
---|
[94] | 607 | |
---|
[95] | 608 | reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; |
---|
[94] | 609 | } |
---|
| 610 | |
---|
| 611 | // =================================================================== |
---|
[95] | 612 | // =====[ EVENT ]===================================================== |
---|
| 613 | // =================================================================== |
---|
| 614 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
[97] | 615 | if (PORT_READ(in_EVENT_VAL [i]) and internal_EVENT_ACK [i]) |
---|
| 616 | { |
---|
[105] | 617 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT"); |
---|
| 618 | |
---|
[97] | 619 | //---------------------------------------------------------------- |
---|
| 620 | // Cases |
---|
| 621 | //---------------------------------------------------------------- |
---|
| 622 | // * EVENT_TYPE_NONE - nothing |
---|
| 623 | // * EVENT_TYPE_MISS_SPECULATION - Change state, reset pointer |
---|
| 624 | // * EVENT_TYPE_EXCEPTION - Flush upft and upt, Change state, reset pointer |
---|
| 625 | // * EVENT_TYPE_BRANCH_NO_ACCURATE - nothing : manage in decod and update |
---|
| 626 | // * EVENT_TYPE_SPR_ACCESS - nothing |
---|
| 627 | // * EVENT_TYPE_MSYNC - nothing |
---|
| 628 | // * EVENT_TYPE_PSYNC - nothing |
---|
| 629 | // * EVENT_TYPE_CSYNC - nothing |
---|
| 630 | |
---|
| 631 | Tevent_type_t event_type = PORT_READ(in_EVENT_TYPE [i]); |
---|
[105] | 632 | |
---|
[101] | 633 | // Test if end of miss -> all previous branch is complete |
---|
| 634 | // -> all next branch is finish |
---|
[105] | 635 | |
---|
| 636 | switch (event_type) |
---|
[97] | 637 | { |
---|
[105] | 638 | case EVENT_TYPE_BRANCH_MISS_SPECULATION : |
---|
| 639 | { |
---|
| 640 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_BRANCH_MISS_SPECULATION"); |
---|
| 641 | |
---|
[95] | 642 | #ifdef DEBUG_TEST |
---|
[105] | 643 | if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) |
---|
| 644 | throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); |
---|
[95] | 645 | #endif |
---|
[105] | 646 | |
---|
| 647 | // Change state |
---|
| 648 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); |
---|
| 649 | |
---|
| 650 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 651 | reg_IS_ACCURATE [i] = true; |
---|
| 652 | |
---|
| 653 | // Tdepth_t depth = reg_UPT_TOP [i]; |
---|
[101] | 654 | |
---|
| 655 | #ifdef DEBUG_TEST |
---|
[105] | 656 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END) |
---|
| 657 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
| 658 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO) |
---|
| 659 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
[101] | 660 | #endif |
---|
| 661 | |
---|
[105] | 662 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",i,depth); |
---|
[101] | 663 | |
---|
[105] | 664 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
[101] | 665 | |
---|
[105] | 666 | break; |
---|
| 667 | } |
---|
| 668 | case EVENT_TYPE_LOAD_MISS_SPECULATION : |
---|
| 669 | case EVENT_TYPE_EXCEPTION : |
---|
| 670 | { |
---|
| 671 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_LOAD_MISS_SPECULATION"); |
---|
| 672 | |
---|
| 673 | // Have a miss !!! |
---|
| 674 | // Flush UPFT |
---|
| 675 | flush_UFPT [i] = true; |
---|
| 676 | |
---|
| 677 | // Flush UPT |
---|
| 678 | Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_EVENT_DEPTH [i]):0; |
---|
| 679 | uint32_t top = reg_UPT_TOP [i]; |
---|
| 680 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
---|
| 681 | uint32_t new_update = ((top==0)?_param->_size_upt_queue[i]:top)-1; |
---|
| 682 | uint32_t full = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]); |
---|
| 683 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 684 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 685 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 686 | |
---|
| 687 | |
---|
| 688 | #ifdef DEBUG_TEST |
---|
| 689 | if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 690 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
| 691 | #endif |
---|
| 692 | |
---|
| 693 | // flush all slot after the event |
---|
| 694 | for (uint32_t j=depth; |
---|
| 695 | j!=top; |
---|
| 696 | j=(j+1)%_param->_size_upt_queue[i]) |
---|
| 697 | reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 698 | |
---|
| 699 | // test full : |
---|
| 700 | if (full) |
---|
| 701 | reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 702 | |
---|
| 703 | // reg_UPT_BOTTOM [i]; |
---|
| 704 | // TODO : special case : event is an exception on branch, also depth is not valid |
---|
| 705 | reg_UPT_TOP [i] = depth; // depth is again valid |
---|
| 706 | reg_UPT_TOP_EVENT [i] = top; |
---|
| 707 | |
---|
| 708 | if (bottom == reg_UPT_TOP [i]) |
---|
| 709 | reg_UPT_EMPTY [i] = true; |
---|
| 710 | |
---|
| 711 | reg_EVENT_VAL [i] = true; |
---|
| 712 | reg_EVENT_UPT_PTR [i] = depth; |
---|
| 713 | event_state_t event_state = reg_EVENT_STATE [i]; |
---|
| 714 | bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 715 | (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or |
---|
| 716 | (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 717 | (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); |
---|
| 718 | bool update_ras = (top != depth) or full; |
---|
| 719 | |
---|
| 720 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
| 721 | |
---|
| 722 | // new state : |
---|
| 723 | // * test if ufpt is empty |
---|
| 724 | // * ok : flush upft and upt |
---|
| 725 | // * ko : test if have previous flush upt |
---|
| 726 | // * ok : nothing |
---|
| 727 | // * ko : flush upt |
---|
| 728 | if (reg_UFPT_NB_NEED_UPDATE [i] > 0) |
---|
| 729 | { |
---|
| 730 | if (update_ras) |
---|
| 731 | { |
---|
| 732 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (branch_complete - miss)",i); |
---|
| 733 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT; |
---|
| 734 | } |
---|
| 735 | else |
---|
| 736 | { |
---|
| 737 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (branch_complete - miss)",i); |
---|
| 738 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT; |
---|
| 739 | } |
---|
| 740 | } |
---|
| 741 | else |
---|
| 742 | { |
---|
| 743 | // if (not previous_update_ras) |
---|
| 744 | if (update_ras) |
---|
| 745 | { |
---|
| 746 | // have ras prediction ? |
---|
| 747 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (branch_complete - miss)",i); |
---|
| 748 | |
---|
| 749 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT; |
---|
| 750 | } |
---|
| 751 | else |
---|
| 752 | { |
---|
| 753 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 754 | } |
---|
| 755 | } |
---|
| 756 | |
---|
| 757 | if (not previous_update_ras and update_ras) |
---|
| 758 | { |
---|
| 759 | reg_UPT_UPDATE [i] = new_update; |
---|
| 760 | } |
---|
| 761 | // else no update |
---|
| 762 | |
---|
| 763 | reg_EVENT_DEPTH [i] = depth; |
---|
| 764 | // reg_EVENT_ADDRESS_SRC [i] = address_src; // delay_slot is compute in I_State |
---|
| 765 | // reg_EVENT_ADDRESS_DEST_VAL[i] = good_take; |
---|
| 766 | // reg_EVENT_ADDRESS_DEST [i] = good_addr; |
---|
| 767 | |
---|
| 768 | break; |
---|
| 769 | } |
---|
| 770 | default : |
---|
| 771 | { |
---|
| 772 | // nothing |
---|
| 773 | break; |
---|
| 774 | } |
---|
[97] | 775 | } |
---|
| 776 | } |
---|
[95] | 777 | |
---|
| 778 | // =================================================================== |
---|
[94] | 779 | // =====[ FLUSH ]===================================================== |
---|
| 780 | // =================================================================== |
---|
| 781 | |
---|
| 782 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 783 | { |
---|
| 784 | if (flush_UFPT [i]) |
---|
| 785 | { |
---|
| 786 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Flush Update Fetch Prediction Table"); |
---|
| 787 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i); |
---|
| 788 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 789 | |
---|
| 790 | // It's to accelerate miss speculation |
---|
| 791 | if (reg_UFPT_NB_NEED_UPDATE [i] == 0) |
---|
| 792 | { |
---|
| 793 | |
---|
| 794 | // No entry need prediction, flush all entry -> Reset |
---|
| 795 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 796 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
---|
| 797 | reg_UFPT_BOTTOM [i] = 0; |
---|
| 798 | reg_UFPT_TOP [i] = 0; |
---|
| 799 | // reg_UFPT_UPDATE [i]; |
---|
| 800 | } |
---|
| 801 | else |
---|
| 802 | { |
---|
| 803 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 804 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT; |
---|
[88] | 805 | |
---|
[94] | 806 | // TOP is next write slot : last slot is TOP-1 |
---|
| 807 | uint32_t top = reg_UFPT_TOP [i]; |
---|
| 808 | reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; |
---|
| 809 | |
---|
| 810 | // reg_UFPT_BOTTOM [i]; |
---|
| 811 | // reg_UFPT_TOP [i]; |
---|
| 812 | } |
---|
[81] | 813 | |
---|
[94] | 814 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [i]); |
---|
| 815 | |
---|
| 816 | } |
---|
| 817 | } |
---|
| 818 | |
---|
[97] | 819 | #ifdef STATISTICS |
---|
| 820 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 821 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 822 | { |
---|
| 823 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
| 824 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
---|
| 825 | (*_stat_ufpt_queue_nb_elt [i]) ++; |
---|
| 826 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
| 827 | if (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 828 | (*_stat_upt_queue_nb_elt [i]) ++; |
---|
| 829 | } |
---|
| 830 | #endif |
---|
| 831 | |
---|
[94] | 832 | // =================================================================== |
---|
| 833 | // =====[ PRINT ]===================================================== |
---|
| 834 | // =================================================================== |
---|
| 835 | |
---|
[82] | 836 | #if (DEBUG >= DEBUG_TRACE) |
---|
[88] | 837 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump Update_Prediction_Table"); |
---|
| 838 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPDATE_PRIORITY : %d",reg_UPDATE_PRIORITY); |
---|
[81] | 839 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 840 | { |
---|
[88] | 841 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_IS_ACCURATE : %d",reg_IS_ACCURATE [i]); |
---|
[105] | 842 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d" ,reg_EVENT_VAL [i]); |
---|
| 843 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d" ,reg_EVENT_UPT_PTR [i]); |
---|
[88] | 844 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); |
---|
[98] | 845 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); |
---|
[88] | 846 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x",reg_EVENT_ADDRESS_SRC [i]); |
---|
[94] | 847 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST_VAL: %d" ,reg_EVENT_ADDRESS_DEST_VAL[i]); |
---|
[88] | 848 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST : %.8x",reg_EVENT_ADDRESS_DEST [i]); |
---|
| 849 | |
---|
| 850 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Fetch_Prediction_Table [%d]",i); |
---|
| 851 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_BOTTOM : %d",reg_UFPT_BOTTOM [i]); |
---|
| 852 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_TOP : %d",reg_UFPT_TOP [i]); |
---|
[94] | 853 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE : %d",reg_UFPT_UPDATE [i]); |
---|
[88] | 854 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 855 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
| 856 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x %.8x, %.1d %.1d, %.8d %.8x %.4d - %s", |
---|
| 857 | j, |
---|
| 858 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition, |
---|
| 859 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src, |
---|
| 860 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest, |
---|
| 861 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._last_take, |
---|
| 862 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 863 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._history, |
---|
| 864 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras, |
---|
| 865 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 866 | toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 867 | ); |
---|
| 868 | |
---|
| 869 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i); |
---|
| 870 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); |
---|
| 871 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
---|
[95] | 872 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); |
---|
[88] | 873 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); |
---|
[101] | 874 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
---|
[88] | 875 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
| 876 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x %.8x, %.1d %.1d %.1d, %.8d %.8x %.4d - %s", |
---|
| 877 | j, |
---|
| 878 | reg_UPDATE_PREDICTION_TABLE [i][j]._condition, |
---|
| 879 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_src, |
---|
| 880 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest, |
---|
| 881 | reg_UPDATE_PREDICTION_TABLE [i][j]._last_take, |
---|
| 882 | reg_UPDATE_PREDICTION_TABLE [i][j]._good_take, |
---|
| 883 | reg_UPDATE_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 884 | reg_UPDATE_PREDICTION_TABLE [i][j]._history, |
---|
| 885 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras, |
---|
| 886 | reg_UPDATE_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 887 | toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 888 | ); |
---|
[81] | 889 | } |
---|
[82] | 890 | #endif |
---|
[88] | 891 | } |
---|
[81] | 892 | |
---|
| 893 | |
---|
[78] | 894 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 895 | end_cycle (); |
---|
| 896 | #endif |
---|
[88] | 897 | |
---|
| 898 | log_end(Update_Prediction_Table,FUNCTION); |
---|
[78] | 899 | }; |
---|
| 900 | |
---|
| 901 | }; // end namespace update_prediction_table |
---|
| 902 | }; // end namespace prediction_unit |
---|
| 903 | }; // end namespace front_end |
---|
| 904 | }; // end namespace multi_front_end |
---|
| 905 | }; // end namespace core |
---|
| 906 | |
---|
| 907 | }; // end namespace behavioural |
---|
| 908 | }; // end namespace morpheo |
---|
| 909 | #endif |
---|