[78] | 1 | /* |
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| 2 | * $Id: test.cpp 113 2009-04-14 18:39:12Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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[82] | 9 | #define NB_ITERATION 1 |
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| 10 | #define CYCLE_MAX (128*NB_ITERATION) |
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| 11 | |
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[78] | 12 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h" |
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| 13 | #include "Common/include/Test.h" |
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| 14 | #include "Behavioural/include/Allocation.h" |
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| 15 | #include <list> |
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| 16 | |
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| 17 | |
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| 18 | class entry_t |
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| 19 | { |
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| 20 | public : bool _is_free ; |
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| 21 | public : bool _is_link ; |
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| 22 | public : bool _is_valid; |
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| 23 | public : uint32_t _counter ; |
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| 24 | }; |
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| 25 | |
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| 26 | |
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| 27 | void test (string name, |
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| 28 | morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * _param) |
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| 29 | { |
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| 30 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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| 31 | |
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| 32 | #ifdef STATISTICS |
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| 33 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 34 | #endif |
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| 35 | |
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[88] | 36 | Tusage_t _usage = USE_ALL; |
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| 37 | |
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| 38 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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| 39 | // _usage = usage_unset(_usage,USE_VHDL ); |
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| 40 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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| 41 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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| 42 | // _usage = usage_unset(_usage,USE_POSITION ); |
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| 43 | // _usage = usage_unset(_usage,USE_STATISTICS ); |
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| 44 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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| 45 | |
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[82] | 46 | Stat_List_unit * _Stat_List_unit = new Stat_List_unit |
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| 47 | (name.c_str(), |
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[78] | 48 | #ifdef STATISTICS |
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[82] | 49 | _parameters_statistics, |
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[78] | 50 | #endif |
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[82] | 51 | _param, |
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[88] | 52 | _usage); |
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[78] | 53 | |
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| 54 | #ifdef SYSTEMC |
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| 55 | /********************************************************************* |
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| 56 | * Déclarations des signaux |
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| 57 | *********************************************************************/ |
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| 58 | string rename; |
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| 59 | |
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| 60 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 61 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 62 | |
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[113] | 63 | sc_signal<Tcontrol_t > ** in_INSERT_VAL ;//[nb_inst_insert] |
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| 64 | sc_signal<Tcontrol_t > ** out_INSERT_ACK ;//[nb_inst_insert] |
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| 65 | sc_signal<Tcontrol_t > ** in_INSERT_READ_RA ;//[nb_inst_insert] |
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| 66 | sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RA_PHY ;//[nb_inst_insert] |
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| 67 | sc_signal<Tcontrol_t > ** in_INSERT_READ_RB ;//[nb_inst_insert] |
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| 68 | sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RB_PHY ;//[nb_inst_insert] |
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| 69 | sc_signal<Tcontrol_t > ** in_INSERT_READ_RC ;//[nb_inst_insert] |
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| 70 | sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RC_PHY ;//[nb_inst_insert] |
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| 71 | sc_signal<Tcontrol_t > ** in_INSERT_WRITE_RD ;//[nb_inst_insert] |
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| 72 | sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert] |
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| 73 | sc_signal<Tcontrol_t > ** in_INSERT_WRITE_RE ;//[nb_inst_insert] |
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| 74 | sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] |
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| 75 | sc_signal<Tcontrol_t > ** in_RETIRE_VAL ;//[nb_inst_retire] |
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| 76 | sc_signal<Tcontrol_t > ** out_RETIRE_ACK ;//[nb_inst_retire] |
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| 77 | sc_signal<Tcontrol_t > ** in_RETIRE_RESTORE ;//[nb_inst_retire] |
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| 78 | sc_signal<Tcontrol_t > ** in_RETIRE_READ_RA ;//[nb_inst_retire] |
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| 79 | sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] |
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| 80 | sc_signal<Tcontrol_t > ** in_RETIRE_READ_RB ;//[nb_inst_retire] |
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| 81 | sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] |
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| 82 | sc_signal<Tcontrol_t > ** in_RETIRE_READ_RC ;//[nb_inst_retire] |
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| 83 | sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] |
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| 84 | sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] |
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| 85 | sc_signal<Tcontrol_t > ** in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire] |
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| 86 | sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_PHY_OLD;//[nb_inst_retire] |
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| 87 | sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_PHY_NEW;//[nb_inst_retire] |
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| 88 | sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RE ;//[nb_inst_retire] |
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| 89 | sc_signal<Tcontrol_t > ** in_RETIRE_RESTORE_RE_PHY_OLD;//[nb_inst_retire] |
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| 90 | sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_PHY_OLD;//[nb_inst_retire] |
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| 91 | sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_PHY_NEW;//[nb_inst_retire] |
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| 92 | sc_signal<Tcontrol_t > ** out_PUSH_GPR_VAL ;//[nb_reg_free] |
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| 93 | sc_signal<Tcontrol_t > ** in_PUSH_GPR_ACK ;//[nb_reg_free] |
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| 94 | sc_signal<Tgeneral_address_t> ** out_PUSH_GPR_NUM_REG ;//[nb_reg_free] |
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| 95 | sc_signal<Tcontrol_t > ** out_PUSH_SPR_VAL ;//[nb_reg_free] |
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| 96 | sc_signal<Tcontrol_t > ** in_PUSH_SPR_ACK ;//[nb_reg_free] |
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| 97 | sc_signal<Tspecial_address_t> ** out_PUSH_SPR_NUM_REG ;//[nb_reg_free] |
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| 98 | |
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[78] | 99 | ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 100 | ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 101 | ALLOC1_SC_SIGNAL( in_INSERT_READ_RA ," in_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 102 | ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY ," in_INSERT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); |
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| 103 | ALLOC1_SC_SIGNAL( in_INSERT_READ_RB ," in_INSERT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 104 | ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY ," in_INSERT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); |
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| 105 | ALLOC1_SC_SIGNAL( in_INSERT_READ_RC ," in_INSERT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 106 | ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY ," in_INSERT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); |
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| 107 | ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD ," in_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 108 | ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert); |
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| 109 | ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE ," in_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); |
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| 110 | ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert); |
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| 111 | ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire); |
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| 112 | ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire); |
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[112] | 113 | ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE ," in_RETIRE_RESTORE ",Tcontrol_t ,_param->_nb_inst_retire); |
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[78] | 114 | ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA ," in_RETIRE_READ_RA ",Tcontrol_t ,_param->_nb_inst_retire); |
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| 115 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ," in_RETIRE_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); |
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| 116 | ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB ," in_RETIRE_READ_RB ",Tcontrol_t ,_param->_nb_inst_retire); |
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| 117 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ," in_RETIRE_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); |
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| 118 | ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC ," in_RETIRE_READ_RC ",Tcontrol_t ,_param->_nb_inst_retire); |
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| 119 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ," in_RETIRE_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_retire); |
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| 120 | ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire); |
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[88] | 121 | ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire); |
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[78] | 122 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire); |
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| 123 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire); |
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| 124 | ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE ," in_RETIRE_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_retire); |
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[88] | 125 | ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RE_PHY_OLD," in_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire); |
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[78] | 126 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire); |
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| 127 | ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire); |
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| 128 | ALLOC1_SC_SIGNAL(out_PUSH_GPR_VAL ,"out_PUSH_GPR_VAL ",Tcontrol_t ,_param->_nb_reg_free); |
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| 129 | ALLOC1_SC_SIGNAL( in_PUSH_GPR_ACK ," in_PUSH_GPR_ACK ",Tcontrol_t ,_param->_nb_reg_free); |
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| 130 | ALLOC1_SC_SIGNAL(out_PUSH_GPR_NUM_REG ,"out_PUSH_GPR_NUM_REG ",Tgeneral_address_t,_param->_nb_reg_free); |
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| 131 | ALLOC1_SC_SIGNAL(out_PUSH_SPR_VAL ,"out_PUSH_SPR_VAL ",Tcontrol_t ,_param->_nb_reg_free); |
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| 132 | ALLOC1_SC_SIGNAL( in_PUSH_SPR_ACK ," in_PUSH_SPR_ACK ",Tcontrol_t ,_param->_nb_reg_free); |
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| 133 | ALLOC1_SC_SIGNAL(out_PUSH_SPR_NUM_REG ,"out_PUSH_SPR_NUM_REG ",Tspecial_address_t,_param->_nb_reg_free); |
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| 134 | |
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| 135 | |
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| 136 | /******************************************************** |
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| 137 | * Instanciation |
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| 138 | ********************************************************/ |
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| 139 | |
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| 140 | msg(_("<%s> : Instanciation of _Stat_List_unit.\n"),name.c_str()); |
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| 141 | |
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| 142 | (*(_Stat_List_unit->in_CLOCK)) (*(in_CLOCK)); |
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| 143 | (*(_Stat_List_unit->in_NRESET)) (*(in_NRESET)); |
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| 144 | |
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| 145 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL ,_param->_nb_inst_insert); |
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| 146 | INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK ,_param->_nb_inst_insert); |
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| 147 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA ,_param->_nb_inst_insert); |
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| 148 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert); |
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| 149 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB ,_param->_nb_inst_insert); |
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| 150 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert); |
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| 151 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC ,_param->_nb_inst_insert); |
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| 152 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert); |
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| 153 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD ,_param->_nb_inst_insert); |
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| 154 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert); |
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| 155 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE ,_param->_nb_inst_insert); |
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| 156 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); |
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| 157 | |
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| 158 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_VAL ,_param->_nb_inst_retire); |
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| 159 | INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK ,_param->_nb_inst_retire); |
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[112] | 160 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE ,_param->_nb_inst_retire); |
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[78] | 161 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA ,_param->_nb_inst_retire); |
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| 162 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire); |
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| 163 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB ,_param->_nb_inst_retire); |
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| 164 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire); |
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| 165 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC ,_param->_nb_inst_retire); |
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| 166 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire); |
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| 167 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire); |
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[88] | 168 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire); |
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[78] | 169 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire); |
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| 170 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire); |
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| 171 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RE ,_param->_nb_inst_retire); |
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[88] | 172 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire); |
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[78] | 173 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire); |
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| 174 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire); |
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| 175 | |
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| 176 | INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_VAL ,_param->_nb_reg_free); |
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| 177 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_GPR_ACK ,_param->_nb_reg_free); |
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| 178 | INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_NUM_REG ,_param->_nb_reg_free); |
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| 179 | |
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| 180 | INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_VAL ,_param->_nb_reg_free); |
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| 181 | INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_SPR_ACK ,_param->_nb_reg_free); |
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| 182 | INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_NUM_REG ,_param->_nb_reg_free); |
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| 183 | |
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| 184 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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| 185 | |
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| 186 | Time * _time = new Time(); |
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| 187 | |
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| 188 | /******************************************************** |
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| 189 | * Simulation - Begin |
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| 190 | ********************************************************/ |
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| 191 | |
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| 192 | // Initialisation |
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| 193 | |
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| 194 | const uint32_t seed = 0; |
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| 195 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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| 196 | |
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| 197 | srand(seed); |
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| 198 | |
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| 199 | int32_t percent_transaction_insert = 95; |
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| 200 | int32_t percent_transaction_retire = 95; |
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| 201 | int32_t percent_transaction_push = 95; |
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| 202 | |
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| 203 | uint32_t nb_thread = 0; |
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| 204 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 205 | nb_thread += _param->_nb_context [i]; |
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| 206 | |
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| 207 | SC_START(0); |
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| 208 | LABEL("Initialisation"); |
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| 209 | |
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| 210 | LABEL("Reset"); |
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| 211 | in_NRESET->write(0); |
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| 212 | SC_START(5); |
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| 213 | in_NRESET->write(1); |
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| 214 | |
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| 215 | LABEL("Loop of Test"); |
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| 216 | |
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| 217 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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| 218 | { |
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| 219 | LABEL("Iteration %d",iteration); |
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| 220 | |
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| 221 | entry_t gpr_status [_param->_nb_general_register]; |
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| 222 | entry_t spr_status [_param->_nb_special_register]; |
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| 223 | |
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| 224 | for (uint32_t i=0; i<_param->_nb_general_register; i++) |
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| 225 | { |
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| 226 | gpr_status[i]._is_free = false; |
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| 227 | gpr_status[i]._is_link = (i<(nb_thread*31+1)); |
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| 228 | gpr_status[i]._is_valid = true; |
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| 229 | gpr_status[i]._counter = 0; |
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| 230 | } |
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| 231 | for (uint32_t i=0; i<_param->_nb_special_register; i++) |
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| 232 | { |
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| 233 | spr_status[i]._is_free = false; |
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| 234 | spr_status[i]._is_link = (i<(nb_thread*2)); |
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| 235 | spr_status[i]._is_valid = true; |
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| 236 | spr_status[i]._counter = 0; |
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| 237 | } |
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| 238 | |
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| 239 | std::list<Tgeneral_address_t> free_list_gpr; |
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| 240 | std::list<Tgeneral_address_t> free_list_spr; |
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| 241 | |
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| 242 | // Test free register |
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| 243 | while ((free_list_gpr.size() < (_param->_nb_general_register - (nb_thread*31+1))) and |
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| 244 | (free_list_spr.size() < (_param->_nb_special_register - (nb_thread*2 )))) |
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| 245 | { |
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| 246 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
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| 247 | in_INSERT_VAL [i]->write(0); |
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| 248 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
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| 249 | in_RETIRE_VAL [i]->write(0); |
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| 250 | |
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| 251 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
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| 252 | { |
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| 253 | in_PUSH_GPR_ACK [i]->write((rand()%100)<percent_transaction_push); |
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| 254 | in_PUSH_SPR_ACK [i]->write((rand()%100)<percent_transaction_push); |
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| 255 | } |
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| 256 | |
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| 257 | SC_START(0); |
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| 258 | |
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| 259 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
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| 260 | { |
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| 261 | if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read()) |
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| 262 | { |
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| 263 | Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read(); |
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| 264 | |
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| 265 | LABEL("PUSH_GPR [%d] - Accepted",i); |
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| 266 | LABEL(" * reg : %d",reg); |
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| 267 | LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); |
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| 268 | LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); |
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| 269 | LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); |
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| 270 | LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); |
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| 271 | |
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| 272 | TEST(bool, true,((gpr_status[reg]._is_free == 0) and |
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| 273 | (gpr_status[reg]._is_link == 0) and |
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[112] | 274 | (gpr_status[reg]._is_valid == 1)// and |
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| 275 | // (gpr_status[reg]._counter == 0) |
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| 276 | )); |
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[78] | 277 | |
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| 278 | gpr_status[reg]._is_free = 1; |
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| 279 | free_list_gpr.push_back(reg); |
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| 280 | } |
---|
| 281 | |
---|
| 282 | if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read()) |
---|
| 283 | { |
---|
| 284 | Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read(); |
---|
| 285 | |
---|
| 286 | LABEL("PUSH_SPR [%d] - Accepted",i); |
---|
| 287 | LABEL(" * reg : %d",reg); |
---|
| 288 | LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); |
---|
| 289 | LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); |
---|
| 290 | LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); |
---|
| 291 | LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); |
---|
| 292 | |
---|
| 293 | TEST(bool, true,((spr_status[reg]._is_free == 0) and |
---|
| 294 | (spr_status[reg]._is_link == 0) and |
---|
[112] | 295 | (spr_status[reg]._is_valid == 1)// and |
---|
| 296 | // (spr_status[reg]._counter == 0) |
---|
| 297 | )); |
---|
[78] | 298 | |
---|
| 299 | spr_status[reg]._is_free = 1; |
---|
| 300 | free_list_spr.push_back(reg); |
---|
| 301 | } |
---|
| 302 | } |
---|
| 303 | |
---|
| 304 | SC_START(1); |
---|
| 305 | } |
---|
| 306 | |
---|
| 307 | LABEL("======================="); |
---|
| 308 | LABEL("===== END OF INIT ====="); |
---|
| 309 | LABEL("======================="); |
---|
| 310 | |
---|
| 311 | int32_t nb_cycle = 64; |
---|
| 312 | |
---|
| 313 | while (nb_cycle > 0) |
---|
| 314 | { |
---|
| 315 | std::list<Tgeneral_address_t>::iterator it_gpr = free_list_gpr.begin(); |
---|
| 316 | std::list<Tspecial_address_t>::iterator it_spr = free_list_spr.begin(); |
---|
| 317 | |
---|
| 318 | |
---|
| 319 | entry_t gpr_status_insert [_param->_nb_general_register]; |
---|
| 320 | entry_t spr_status_insert [_param->_nb_special_register]; |
---|
| 321 | entry_t gpr_status_retire [_param->_nb_general_register]; |
---|
| 322 | entry_t spr_status_retire [_param->_nb_special_register]; |
---|
| 323 | |
---|
| 324 | for (uint32_t i=0; i<_param->_nb_general_register; i++) |
---|
| 325 | { |
---|
| 326 | gpr_status_insert [i] = gpr_status[i]; |
---|
| 327 | gpr_status_retire [i] = gpr_status[i]; |
---|
| 328 | } |
---|
| 329 | for (uint32_t i=0; i<_param->_nb_special_register; i++) |
---|
| 330 | { |
---|
| 331 | spr_status_insert [i] = spr_status[i]; |
---|
| 332 | spr_status_retire [i] = spr_status[i]; |
---|
| 333 | } |
---|
| 334 | |
---|
| 335 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
---|
| 336 | { |
---|
| 337 | Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1; |
---|
| 338 | Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1; |
---|
| 339 | Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ; |
---|
| 340 | Tgeneral_address_t rd = (it_gpr != free_list_gpr.end())?*it_gpr:0; |
---|
| 341 | Tspecial_address_t re = (it_spr != free_list_spr.end())?*it_spr:0; |
---|
| 342 | |
---|
[112] | 343 | Tcontrol_t read_ra = (gpr_status_insert[ra]._is_link); // and (gpr_status_insert[ra]._counter < _param->_max_reader); |
---|
| 344 | Tcontrol_t read_rb = (gpr_status_insert[rb]._is_link); // and (gpr_status_insert[rb]._counter < _param->_max_reader); |
---|
| 345 | Tcontrol_t read_rc = (spr_status_insert[rc]._is_link); // and (spr_status_insert[rc]._counter < _param->_max_reader); |
---|
[78] | 346 | Tcontrol_t write_rd = (it_gpr != free_list_gpr.end()); |
---|
| 347 | Tcontrol_t write_re = (it_spr != free_list_spr.end()); |
---|
| 348 | |
---|
| 349 | in_INSERT_VAL [i]->write((rand()%100) < percent_transaction_insert); |
---|
| 350 | in_INSERT_READ_RA [i]->write(read_ra ); |
---|
| 351 | in_INSERT_NUM_REG_RA_PHY [i]->write(ra); |
---|
| 352 | in_INSERT_READ_RB [i]->write(read_rb ); |
---|
| 353 | in_INSERT_NUM_REG_RB_PHY [i]->write(rb); |
---|
| 354 | in_INSERT_READ_RC [i]->write(read_rc ); |
---|
| 355 | in_INSERT_NUM_REG_RC_PHY [i]->write(rc); |
---|
| 356 | in_INSERT_WRITE_RD [i]->write(write_rd); |
---|
| 357 | in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd); |
---|
| 358 | in_INSERT_WRITE_RE [i]->write(write_re); |
---|
| 359 | in_INSERT_NUM_REG_RE_PHY_NEW [i]->write(re); |
---|
| 360 | |
---|
| 361 | if (read_ra) |
---|
| 362 | gpr_status_insert[ra]._counter++; |
---|
| 363 | if (read_rb) |
---|
| 364 | gpr_status_insert[rb]._counter++; |
---|
| 365 | if (read_rc) |
---|
| 366 | spr_status_insert[rc]._counter++; |
---|
| 367 | if (write_rd) |
---|
| 368 | it_gpr ++; |
---|
| 369 | if (write_re) |
---|
| 370 | it_spr ++; |
---|
| 371 | } |
---|
| 372 | |
---|
| 373 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
---|
| 374 | { |
---|
| 375 | Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1; |
---|
| 376 | Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1; |
---|
| 377 | Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ; |
---|
| 378 | Tgeneral_address_t rd_old = (rand()%(_param->_nb_general_register-1))+1; |
---|
| 379 | Tgeneral_address_t rd_new = (rand()%(_param->_nb_general_register-1))+1; |
---|
| 380 | Tspecial_address_t re_old = (rand()%(_param->_nb_special_register )) ; |
---|
| 381 | Tspecial_address_t re_new = (rand()%(_param->_nb_special_register )) ; |
---|
| 382 | |
---|
[112] | 383 | Tcontrol_t read_ra = (gpr_status_retire[ra]._is_link); // and (gpr_status_retire[ra]._counter > 0); |
---|
| 384 | Tcontrol_t read_rb = (gpr_status_retire[rb]._is_link); // and (gpr_status_retire[rb]._counter > 0); |
---|
| 385 | Tcontrol_t read_rc = (spr_status_retire[rc]._is_link); // and (spr_status_retire[rc]._counter > 0); |
---|
[78] | 386 | Tcontrol_t write_rd = ( (gpr_status_retire[rd_old]._is_link ) and |
---|
| 387 | (gpr_status_retire[rd_old]._is_valid) and |
---|
| 388 | (gpr_status_retire[rd_new]._is_link ) and |
---|
| 389 | not (gpr_status_retire[rd_new]._is_valid)); |
---|
| 390 | Tcontrol_t write_re = ( (spr_status_retire[re_old]._is_link ) and |
---|
| 391 | (spr_status_retire[re_old]._is_valid) and |
---|
| 392 | (spr_status_retire[re_new]._is_link ) and |
---|
| 393 | not (spr_status_retire[re_new]._is_valid)); |
---|
| 394 | |
---|
| 395 | in_RETIRE_VAL [i]->write((rand()%100) < percent_transaction_retire); |
---|
| 396 | in_RETIRE_READ_RA [i]->write(read_ra ); |
---|
[112] | 397 | in_RETIRE_RESTORE [i]->write(0); |
---|
| 398 | in_RETIRE_NUM_REG_RA_PHY [i]->write(ra); |
---|
[78] | 399 | in_RETIRE_READ_RB [i]->write(read_rb ); |
---|
| 400 | in_RETIRE_NUM_REG_RB_PHY [i]->write(rb); |
---|
| 401 | in_RETIRE_READ_RC [i]->write(read_rc ); |
---|
| 402 | in_RETIRE_NUM_REG_RC_PHY [i]->write(rc); |
---|
| 403 | in_RETIRE_WRITE_RD [i]->write(write_rd); |
---|
[88] | 404 | in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0); |
---|
[78] | 405 | in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rd_old); |
---|
| 406 | in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rd_new); |
---|
| 407 | in_RETIRE_WRITE_RE [i]->write(write_re); |
---|
[88] | 408 | in_RETIRE_RESTORE_RE_PHY_OLD [i]->write(0); |
---|
[78] | 409 | in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(re_old); |
---|
| 410 | in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(re_new); |
---|
| 411 | |
---|
| 412 | if (read_ra) |
---|
| 413 | { |
---|
| 414 | gpr_status_retire[ra]._counter --; |
---|
| 415 | } |
---|
| 416 | if (read_rb) |
---|
| 417 | { |
---|
| 418 | gpr_status_retire[rb]._counter --; |
---|
| 419 | } |
---|
| 420 | if (read_rc) |
---|
| 421 | { |
---|
| 422 | spr_status_retire[rc]._counter --; |
---|
| 423 | } |
---|
| 424 | if (write_rd) |
---|
| 425 | { |
---|
| 426 | gpr_status_retire[rd_old]._is_link = 0; |
---|
| 427 | gpr_status_retire[rd_new]._is_valid = 1; |
---|
| 428 | } |
---|
| 429 | if (write_re) |
---|
| 430 | { |
---|
| 431 | spr_status_retire[re_old]._is_link = 0; |
---|
| 432 | spr_status_retire[re_new]._is_valid = 1; |
---|
| 433 | } |
---|
| 434 | |
---|
| 435 | } |
---|
| 436 | |
---|
| 437 | |
---|
| 438 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
---|
| 439 | { |
---|
| 440 | in_PUSH_GPR_ACK [i]->write((rand()%100)<percent_transaction_push); |
---|
| 441 | in_PUSH_SPR_ACK [i]->write((rand()%100)<percent_transaction_push); |
---|
| 442 | } |
---|
| 443 | |
---|
| 444 | SC_START(0); |
---|
| 445 | |
---|
| 446 | it_gpr = free_list_gpr.begin(); |
---|
| 447 | it_spr = free_list_spr.begin(); |
---|
| 448 | |
---|
| 449 | for (uint32_t i=0; i<_param->_nb_inst_insert; i++) |
---|
| 450 | { |
---|
| 451 | Tcontrol_t write_rd = in_INSERT_WRITE_RD [i]->read(); |
---|
| 452 | Tcontrol_t write_re = in_INSERT_WRITE_RE [i]->read(); |
---|
| 453 | |
---|
| 454 | if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read()) |
---|
| 455 | { |
---|
| 456 | Tcontrol_t read_ra = in_INSERT_READ_RA [i]->read(); |
---|
| 457 | Tgeneral_address_t ra = in_INSERT_NUM_REG_RA_PHY [i]->read(); |
---|
| 458 | Tcontrol_t read_rb = in_INSERT_READ_RB [i]->read(); |
---|
| 459 | Tgeneral_address_t rb = in_INSERT_NUM_REG_RB_PHY [i]->read(); |
---|
| 460 | Tcontrol_t read_rc = in_INSERT_READ_RC [i]->read(); |
---|
| 461 | Tspecial_address_t rc = in_INSERT_NUM_REG_RC_PHY [i]->read(); |
---|
| 462 | Tgeneral_address_t rd_new = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read(); |
---|
| 463 | Tspecial_address_t re_new = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read(); |
---|
| 464 | |
---|
| 465 | LABEL("INSERT [%d] - Accepted",i); |
---|
| 466 | LABEL(" * read_ra : %d",read_ra ); |
---|
| 467 | LABEL(" * reg_ra : %d",ra ); |
---|
| 468 | LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free ); |
---|
| 469 | LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link ); |
---|
| 470 | LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid); |
---|
| 471 | LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter ); |
---|
| 472 | LABEL(" * read_rb : %d",read_rb ); |
---|
| 473 | LABEL(" * reg_rb : %d",rb ); |
---|
| 474 | LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free ); |
---|
| 475 | LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link ); |
---|
| 476 | LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid); |
---|
| 477 | LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter ); |
---|
| 478 | LABEL(" * read_rc : %d",read_rc ); |
---|
| 479 | LABEL(" * reg_rc : %d",rc ); |
---|
| 480 | LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free ); |
---|
| 481 | LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link ); |
---|
| 482 | LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid); |
---|
| 483 | LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter ); |
---|
| 484 | LABEL(" * read_rd : %d",write_rd); |
---|
| 485 | LABEL(" * reg_rd_new : %d",rd_new ); |
---|
| 486 | LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free ); |
---|
| 487 | LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link ); |
---|
| 488 | LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid); |
---|
| 489 | LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter ); |
---|
| 490 | LABEL(" * read_re : %d",write_re); |
---|
| 491 | LABEL(" * reg_re_new : %d",re_new ); |
---|
| 492 | LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free ); |
---|
| 493 | LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link ); |
---|
| 494 | LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid); |
---|
| 495 | LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter ); |
---|
| 496 | |
---|
| 497 | if (read_ra) |
---|
| 498 | { |
---|
| 499 | gpr_status[ra]._counter ++; |
---|
| 500 | } |
---|
| 501 | if (read_rb) |
---|
| 502 | { |
---|
| 503 | gpr_status[rb]._counter ++; |
---|
| 504 | } |
---|
| 505 | if (read_rc) |
---|
| 506 | { |
---|
| 507 | spr_status[rc]._counter ++; |
---|
| 508 | } |
---|
| 509 | if (write_rd) |
---|
| 510 | { |
---|
| 511 | Tgeneral_address_t reg = *it_gpr; |
---|
| 512 | TEST(Tgeneral_address_t,reg,rd_new); |
---|
| 513 | |
---|
| 514 | it_gpr = free_list_gpr.erase(it_gpr); |
---|
| 515 | |
---|
| 516 | gpr_status[reg]._is_free = 0; |
---|
| 517 | gpr_status[reg]._is_link = 1; |
---|
| 518 | gpr_status[reg]._is_valid = 0; |
---|
| 519 | } |
---|
| 520 | |
---|
| 521 | if (write_re) |
---|
| 522 | { |
---|
| 523 | Tspecial_address_t reg = *it_spr; |
---|
| 524 | TEST(Tspecial_address_t,reg,re_new); |
---|
| 525 | |
---|
| 526 | it_spr = free_list_spr.erase(it_spr); |
---|
| 527 | |
---|
| 528 | spr_status[reg]._is_free = 0; |
---|
| 529 | spr_status[reg]._is_link = 1; |
---|
| 530 | spr_status[reg]._is_valid = 0; |
---|
| 531 | } |
---|
| 532 | } |
---|
| 533 | else |
---|
| 534 | { |
---|
| 535 | if (write_rd) |
---|
| 536 | it_gpr ++; |
---|
| 537 | if (write_re) |
---|
| 538 | it_spr ++; |
---|
| 539 | } |
---|
| 540 | } |
---|
| 541 | |
---|
| 542 | for (uint32_t i=0; i<_param->_nb_inst_retire; i++) |
---|
| 543 | if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read()) |
---|
| 544 | { |
---|
[112] | 545 | Tcontrol_t restore = in_RETIRE_RESTORE [i]->read(); |
---|
[88] | 546 | Tcontrol_t read_ra = in_RETIRE_READ_RA [i]->read(); |
---|
| 547 | Tgeneral_address_t ra = in_RETIRE_NUM_REG_RA_PHY [i]->read(); |
---|
| 548 | Tcontrol_t read_rb = in_RETIRE_READ_RB [i]->read(); |
---|
| 549 | Tgeneral_address_t rb = in_RETIRE_NUM_REG_RB_PHY [i]->read(); |
---|
| 550 | Tcontrol_t read_rc = in_RETIRE_READ_RC [i]->read(); |
---|
| 551 | Tspecial_address_t rc = in_RETIRE_NUM_REG_RC_PHY [i]->read(); |
---|
| 552 | Tcontrol_t write_rd = in_RETIRE_WRITE_RD [i]->read(); |
---|
| 553 | Tcontrol_t restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read(); |
---|
| 554 | Tgeneral_address_t rd_old = in_RETIRE_NUM_REG_RD_PHY_OLD [i]->read(); |
---|
| 555 | Tgeneral_address_t rd_new = in_RETIRE_NUM_REG_RD_PHY_NEW [i]->read(); |
---|
| 556 | Tcontrol_t write_re = in_RETIRE_WRITE_RE [i]->read(); |
---|
| 557 | Tcontrol_t restore_re_old = in_RETIRE_RESTORE_RE_PHY_OLD [i]->read(); |
---|
| 558 | Tgeneral_address_t re_old = in_RETIRE_NUM_REG_RE_PHY_OLD [i]->read(); |
---|
| 559 | Tgeneral_address_t re_new = in_RETIRE_NUM_REG_RE_PHY_NEW [i]->read(); |
---|
[78] | 560 | |
---|
| 561 | LABEL("RETIRE [%d] - Accepted",i); |
---|
[112] | 562 | LABEL(" * restore : %d",restore); |
---|
[78] | 563 | LABEL(" * read_ra : %d",read_ra ); |
---|
| 564 | LABEL(" * reg_ra : %d",ra ); |
---|
| 565 | LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free ); |
---|
| 566 | LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link ); |
---|
| 567 | LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid); |
---|
| 568 | LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter ); |
---|
| 569 | LABEL(" * read_rb : %d",read_rb ); |
---|
| 570 | LABEL(" * reg_rb : %d",rb ); |
---|
| 571 | LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free ); |
---|
| 572 | LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link ); |
---|
| 573 | LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid); |
---|
| 574 | LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter ); |
---|
| 575 | LABEL(" * read_rc : %d",read_rc ); |
---|
| 576 | LABEL(" * reg_rc : %d",rc ); |
---|
| 577 | LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free ); |
---|
| 578 | LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link ); |
---|
| 579 | LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid); |
---|
| 580 | LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter ); |
---|
| 581 | LABEL(" * read_rd : %d",write_rd); |
---|
[88] | 582 | LABEL(" * restore_rd_old : %d",restore_rd_old); |
---|
[78] | 583 | LABEL(" * reg_rd_old : %d",rd_old ); |
---|
| 584 | LABEL(" * status[%d]._is_free : %d",rd_old,spr_status[rd_old]._is_free ); |
---|
| 585 | LABEL(" * status[%d]._is_link : %d",rd_old,spr_status[rd_old]._is_link ); |
---|
| 586 | LABEL(" * status[%d]._is_valid : %d",rd_old,spr_status[rd_old]._is_valid); |
---|
| 587 | LABEL(" * status[%d]._counter : %d",rd_old,spr_status[rd_old]._counter ); |
---|
| 588 | LABEL(" * reg_rd_new : %d",rd_new ); |
---|
| 589 | LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free ); |
---|
| 590 | LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link ); |
---|
| 591 | LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid); |
---|
| 592 | LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter ); |
---|
| 593 | LABEL(" * read_re : %d",write_re); |
---|
[88] | 594 | LABEL(" * restore_re_old : %d",restore_re_old); |
---|
[78] | 595 | LABEL(" * reg_re_old : %d",re_old ); |
---|
| 596 | LABEL(" * status[%d]._is_free : %d",re_old,spr_status[re_old]._is_free ); |
---|
| 597 | LABEL(" * status[%d]._is_link : %d",re_old,spr_status[re_old]._is_link ); |
---|
| 598 | LABEL(" * status[%d]._is_valid : %d",re_old,spr_status[re_old]._is_valid); |
---|
| 599 | LABEL(" * status[%d]._counter : %d",re_old,spr_status[re_old]._counter ); |
---|
| 600 | LABEL(" * reg_re_new : %d",re_new ); |
---|
| 601 | LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free ); |
---|
| 602 | LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link ); |
---|
| 603 | LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid); |
---|
| 604 | LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter ); |
---|
| 605 | |
---|
| 606 | if (read_ra) |
---|
| 607 | { |
---|
| 608 | gpr_status[ra]._counter --; |
---|
| 609 | } |
---|
| 610 | if (read_rb) |
---|
| 611 | { |
---|
| 612 | gpr_status[rb]._counter --; |
---|
| 613 | } |
---|
| 614 | if (read_rc) |
---|
| 615 | { |
---|
| 616 | spr_status[rc]._counter --; |
---|
| 617 | } |
---|
| 618 | if (write_rd) |
---|
| 619 | { |
---|
[112] | 620 | if (restore) |
---|
[88] | 621 | { |
---|
[112] | 622 | if (restore_rd_old) |
---|
| 623 | { |
---|
| 624 | gpr_status[rd_old]._is_link = 1; |
---|
| 625 | gpr_status[rd_new]._is_link = 0; |
---|
| 626 | gpr_status[rd_new]._is_valid = 1; |
---|
| 627 | } |
---|
| 628 | else |
---|
| 629 | { |
---|
| 630 | gpr_status[rd_old]._is_link = 0; |
---|
| 631 | gpr_status[rd_new]._is_link = 0; |
---|
| 632 | gpr_status[rd_new]._is_valid = 1; |
---|
| 633 | } |
---|
[88] | 634 | } |
---|
| 635 | else |
---|
| 636 | { |
---|
| 637 | gpr_status[rd_old]._is_link = 0; |
---|
| 638 | gpr_status[rd_new]._is_valid = 1; |
---|
| 639 | } |
---|
[112] | 640 | |
---|
[78] | 641 | } |
---|
| 642 | if (write_re) |
---|
| 643 | { |
---|
[88] | 644 | if (restore_re_old) |
---|
| 645 | { |
---|
| 646 | spr_status[re_old]._is_link = 1; |
---|
| 647 | spr_status[re_new]._is_link = 0; |
---|
| 648 | spr_status[re_new]._is_valid = 1; |
---|
| 649 | } |
---|
| 650 | else |
---|
| 651 | { |
---|
| 652 | spr_status[re_old]._is_link = 0; |
---|
| 653 | spr_status[re_new]._is_valid = 1; |
---|
| 654 | } |
---|
| 655 | } |
---|
[78] | 656 | } |
---|
| 657 | |
---|
| 658 | |
---|
| 659 | for (uint32_t i=0; i<_param->_nb_reg_free; i++) |
---|
| 660 | { |
---|
| 661 | if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read()) |
---|
| 662 | { |
---|
| 663 | Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read(); |
---|
| 664 | |
---|
| 665 | LABEL("PUSH_GPR [%d] - Accepted",i); |
---|
| 666 | LABEL(" * reg : %d",reg); |
---|
| 667 | LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); |
---|
| 668 | LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); |
---|
| 669 | LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); |
---|
| 670 | LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); |
---|
| 671 | |
---|
| 672 | TEST(bool, true,((gpr_status[reg]._is_free == 0) and |
---|
| 673 | (gpr_status[reg]._is_link == 0) and |
---|
[112] | 674 | (gpr_status[reg]._is_valid == 1)// and |
---|
| 675 | // (gpr_status[reg]._counter == 0) |
---|
| 676 | )); |
---|
[78] | 677 | |
---|
| 678 | gpr_status[reg]._is_free = 1; |
---|
| 679 | free_list_gpr.push_back(reg); |
---|
| 680 | } |
---|
| 681 | |
---|
| 682 | if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read()) |
---|
| 683 | { |
---|
| 684 | Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read(); |
---|
| 685 | |
---|
| 686 | LABEL("PUSH_SPR [%d] - Accepted",i); |
---|
| 687 | LABEL(" * reg : %d",reg); |
---|
| 688 | LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free ); |
---|
| 689 | LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link ); |
---|
| 690 | LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid); |
---|
| 691 | LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter ); |
---|
| 692 | |
---|
| 693 | TEST(bool, true,((spr_status[reg]._is_free == 0) and |
---|
| 694 | (spr_status[reg]._is_link == 0) and |
---|
[112] | 695 | (spr_status[reg]._is_valid == 1)// and |
---|
| 696 | // (spr_status[reg]._counter == 0) |
---|
| 697 | )); |
---|
[78] | 698 | |
---|
| 699 | spr_status[reg]._is_free = 1; |
---|
| 700 | free_list_spr.push_back(reg); |
---|
| 701 | } |
---|
| 702 | } |
---|
| 703 | |
---|
| 704 | SC_START(1); |
---|
| 705 | nb_cycle --; |
---|
| 706 | } |
---|
| 707 | } |
---|
| 708 | |
---|
| 709 | /******************************************************** |
---|
| 710 | * Simulation - End |
---|
| 711 | ********************************************************/ |
---|
| 712 | |
---|
| 713 | TEST_OK ("End of Simulation"); |
---|
| 714 | delete _time; |
---|
| 715 | |
---|
| 716 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
---|
| 717 | |
---|
| 718 | delete in_CLOCK; |
---|
| 719 | delete in_NRESET; |
---|
| 720 | |
---|
| 721 | delete [] in_INSERT_VAL ; |
---|
| 722 | delete [] out_INSERT_ACK ; |
---|
| 723 | delete [] in_INSERT_READ_RA ; |
---|
| 724 | delete [] in_INSERT_NUM_REG_RA_PHY ; |
---|
| 725 | delete [] in_INSERT_READ_RB ; |
---|
| 726 | delete [] in_INSERT_NUM_REG_RB_PHY ; |
---|
| 727 | delete [] in_INSERT_READ_RC ; |
---|
| 728 | delete [] in_INSERT_NUM_REG_RC_PHY ; |
---|
| 729 | delete [] in_INSERT_WRITE_RD ; |
---|
| 730 | delete [] in_INSERT_NUM_REG_RD_PHY_NEW; |
---|
| 731 | delete [] in_INSERT_WRITE_RE ; |
---|
| 732 | delete [] in_INSERT_NUM_REG_RE_PHY_NEW; |
---|
| 733 | delete [] in_RETIRE_VAL ; |
---|
| 734 | delete [] out_RETIRE_ACK ; |
---|
[112] | 735 | delete [] in_RETIRE_RESTORE ; |
---|
[78] | 736 | delete [] in_RETIRE_READ_RA ; |
---|
| 737 | delete [] in_RETIRE_NUM_REG_RA_PHY ; |
---|
| 738 | delete [] in_RETIRE_READ_RB ; |
---|
| 739 | delete [] in_RETIRE_NUM_REG_RB_PHY ; |
---|
| 740 | delete [] in_RETIRE_READ_RC ; |
---|
| 741 | delete [] in_RETIRE_NUM_REG_RC_PHY ; |
---|
| 742 | delete [] in_RETIRE_WRITE_RD ; |
---|
[88] | 743 | delete [] in_RETIRE_RESTORE_RD_PHY_OLD; |
---|
[78] | 744 | delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; |
---|
| 745 | delete [] in_RETIRE_NUM_REG_RD_PHY_NEW; |
---|
| 746 | delete [] in_RETIRE_WRITE_RE ; |
---|
[88] | 747 | delete [] in_RETIRE_RESTORE_RE_PHY_OLD; |
---|
[78] | 748 | delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; |
---|
| 749 | delete [] in_RETIRE_NUM_REG_RE_PHY_NEW; |
---|
| 750 | delete [] out_PUSH_GPR_VAL ; |
---|
| 751 | delete [] in_PUSH_GPR_ACK ; |
---|
| 752 | delete [] out_PUSH_GPR_NUM_REG ; |
---|
| 753 | delete [] out_PUSH_SPR_VAL ; |
---|
| 754 | delete [] in_PUSH_SPR_ACK ; |
---|
| 755 | delete [] out_PUSH_SPR_NUM_REG ; |
---|
| 756 | |
---|
| 757 | #endif |
---|
| 758 | |
---|
| 759 | delete _Stat_List_unit; |
---|
| 760 | #ifdef STATISTICS |
---|
| 761 | delete _parameters_statistics; |
---|
| 762 | #endif |
---|
| 763 | } |
---|