| 1 | #ifndef morpheo_behavioural_Constants_h |
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| 2 | #define morpheo_behavioural_Constants_h |
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| 3 | |
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| 4 | namespace morpheo { |
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| 5 | namespace behavioural { |
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| 6 | |
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| 7 | //=========================================================[ Type ]===== |
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| 8 | # define TYPE_ALU 0x0 // 00000 - unit multiple |
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| 9 | # define TYPE_SHIFT 0x1 // 00000 - unit multiple |
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| 10 | # define TYPE_MOVE 0x2 // 00000 - unit multiple |
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| 11 | # define TYPE_TEST 0x3 // 00000 - unit multiple |
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| 12 | # define TYPE_MUL_DIV 0x4 // 00000 - unit multiple |
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| 13 | # define TYPE_EXTEND 0x5 // 00000 - unit multiple, type optionnal |
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| 14 | # define TYPE_FIND 0x6 // 00000 - unit multiple, type optionnal |
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| 15 | # define TYPE_SPECIAL 0x7 // 00000 - unit uniq |
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| 16 | # define TYPE_CUSTOM 0x8 // 00000 - unit uniq , type optionnal |
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| 17 | # define TYPE_BRANCH 0x9 // 00000 - unit multiple |
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| 18 | # define TYPE_MEMORY 0xa // 00000 - unit uniq |
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| 19 | |
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| 20 | # define SIZE_TYPE 5 |
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| 21 | # define MAX_TYPE (1<<SIZE_TYPE) |
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| 22 | |
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| 23 | //====================================================[ Operation ]===== |
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| 24 | |
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| 25 | //-------------------------------------------------------[ Memory ]----- |
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| 26 | # define OPERATION_MEMORY_LOAD 0x0 // 000_0000 |
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| 27 | # define OPERATION_MEMORY_LOAD_8_Z 0x0 // 000_0000 |
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| 28 | # define OPERATION_MEMORY_LOAD_16_Z 0x20 // 010_0000 |
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| 29 | # define OPERATION_MEMORY_LOAD_32_Z 0x40 // 100_0000 |
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| 30 | # define OPERATION_MEMORY_LOAD_64_Z 0x60 // 110_0000 |
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| 31 | # define OPERATION_MEMORY_LOAD_8_S 0x10 // 001_0000 |
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| 32 | # define OPERATION_MEMORY_LOAD_16_S 0x30 // 011_0000 |
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| 33 | # define OPERATION_MEMORY_LOAD_32_S 0x50 // 101_0000 |
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| 34 | # define OPERATION_MEMORY_LOAD_64_S 0x70 // 111_0000 |
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| 35 | |
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| 36 | # define OPERATION_MEMORY_STORE_8 0x8 // 000_1000 |
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| 37 | # define OPERATION_MEMORY_STORE_16 0x9 // 000_1001 |
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| 38 | # define OPERATION_MEMORY_STORE_32 0xa // 000_1010 |
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| 39 | # define OPERATION_MEMORY_STORE_64 0xb // 000_1011 |
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| 40 | # define OPERATION_MEMORY_STORE_HEAD_OK 0xc // 000_1100 |
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| 41 | # define OPERATION_MEMORY_STORE_HEAD_KO 0xd // 000_1101 |
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| 42 | |
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| 43 | # define OPERATION_MEMORY_LOCK 0x1 // 000_0001 |
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| 44 | # define OPERATION_MEMORY_INVALIDATE 0x2 // 000_0010 |
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| 45 | # define OPERATION_MEMORY_PREFETCH 0x3 // 000_0011 |
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| 46 | # define OPERATION_MEMORY_FLUSH 0x6 // 000_0110 |
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| 47 | # define OPERATION_MEMORY_SYNCHRONIZATION 0x7 // 000_0111 |
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| 48 | |
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| 49 | #define is_operation_memory_load(x) \ |
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| 50 | ((x == OPERATION_MEMORY_LOAD_8_Z ) or \ |
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| 51 | (x == OPERATION_MEMORY_LOAD_16_Z) or \ |
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| 52 | (x == OPERATION_MEMORY_LOAD_32_Z) or \ |
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| 53 | (x == OPERATION_MEMORY_LOAD_64_Z) or \ |
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| 54 | (x == OPERATION_MEMORY_LOAD_8_S ) or \ |
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| 55 | (x == OPERATION_MEMORY_LOAD_16_S) or \ |
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| 56 | (x == OPERATION_MEMORY_LOAD_32_S) or \ |
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| 57 | (x == OPERATION_MEMORY_LOAD_64_S) ) |
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| 58 | |
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| 59 | #define is_operation_memory_store(x) \ |
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| 60 | ((x == OPERATION_MEMORY_STORE_8 ) or \ |
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| 61 | (x == OPERATION_MEMORY_STORE_16 ) or \ |
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| 62 | (x == OPERATION_MEMORY_STORE_32 ) or \ |
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| 63 | (x == OPERATION_MEMORY_STORE_64 ) or \ |
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| 64 | (x == OPERATION_MEMORY_STORE_HEAD_OK) or \ |
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| 65 | (x == OPERATION_MEMORY_STORE_HEAD_KO)) |
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| 66 | |
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| 67 | #define is_operation_memory_store_head(x) \ |
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| 68 | ((x == OPERATION_MEMORY_STORE_HEAD_OK) or \ |
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| 69 | (x == OPERATION_MEMORY_STORE_HEAD_KO)) |
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| 70 | |
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| 71 | #define is_operation_memory_load_signed(x) \ |
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| 72 | ((x == OPERATION_MEMORY_LOAD_8_S ) or \ |
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| 73 | (x == OPERATION_MEMORY_LOAD_16_S) or \ |
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| 74 | (x == OPERATION_MEMORY_LOAD_32_S) or \ |
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| 75 | (x == OPERATION_MEMORY_LOAD_64_S) ) |
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| 76 | |
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| 77 | # define MEMORY_ACCESS_8 0x0 |
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| 78 | # define MEMORY_ACCESS_16 0x1 |
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| 79 | # define MEMORY_ACCESS_32 0x2 |
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| 80 | # define MEMORY_ACCESS_64 0x3 |
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| 81 | |
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| 82 | # define MEMORY_SIZE_8 8 |
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| 83 | # define MEMORY_SIZE_16 16 |
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| 84 | # define MEMORY_SIZE_32 32 |
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| 85 | # define MEMORY_SIZE_64 64 |
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| 86 | |
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| 87 | # define MASK_MEMORY_ACCESS_8 0x0 |
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| 88 | # define MASK_MEMORY_ACCESS_16 0x1 |
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| 89 | # define MASK_MEMORY_ACCESS_32 0x3 |
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| 90 | # define MASK_MEMORY_ACCESS_64 0x7 |
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| 91 | |
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| 92 | #define memory_size(x) \ |
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| 93 | (((x==OPERATION_MEMORY_LOAD_16_Z)or \ |
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| 94 | (x==OPERATION_MEMORY_LOAD_16_S)or \ |
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| 95 | (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_SIZE_16: \ |
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| 96 | (((x==OPERATION_MEMORY_LOAD_32_Z)or \ |
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| 97 | (x==OPERATION_MEMORY_LOAD_32_S)or \ |
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| 98 | (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_SIZE_32: \ |
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| 99 | (((x==OPERATION_MEMORY_LOAD_64_Z)or \ |
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| 100 | (x==OPERATION_MEMORY_LOAD_64_S)or \ |
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| 101 | (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_SIZE_64:MEMORY_SIZE_8))) |
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| 102 | |
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| 103 | #define memory_access(x) \ |
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| 104 | (((x==OPERATION_MEMORY_LOAD_16_Z)or \ |
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| 105 | (x==OPERATION_MEMORY_LOAD_16_S)or \ |
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| 106 | (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_ACCESS_16: \ |
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| 107 | (((x==OPERATION_MEMORY_LOAD_32_Z)or \ |
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| 108 | (x==OPERATION_MEMORY_LOAD_32_S)or \ |
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| 109 | (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_ACCESS_32: \ |
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| 110 | (((x==OPERATION_MEMORY_LOAD_64_Z)or \ |
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| 111 | (x==OPERATION_MEMORY_LOAD_64_S)or \ |
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| 112 | (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_ACCESS_64:MEMORY_ACCESS_8))) |
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| 113 | |
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| 114 | #define mask_memory_access(x) \ |
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| 115 | (((x==OPERATION_MEMORY_LOAD_16_Z)or \ |
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| 116 | (x==OPERATION_MEMORY_LOAD_16_S)or \ |
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| 117 | (x==OPERATION_MEMORY_STORE_16 ))?MASK_MEMORY_ACCESS_16: \ |
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| 118 | (((x==OPERATION_MEMORY_LOAD_32_Z)or \ |
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| 119 | (x==OPERATION_MEMORY_LOAD_32_S)or \ |
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| 120 | (x==OPERATION_MEMORY_STORE_32 ))?MASK_MEMORY_ACCESS_32: \ |
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| 121 | (((x==OPERATION_MEMORY_LOAD_64_Z)or \ |
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| 122 | (x==OPERATION_MEMORY_LOAD_64_S)or \ |
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| 123 | (x==OPERATION_MEMORY_STORE_64 ))?MASK_MEMORY_ACCESS_64:MASK_MEMORY_ACCESS_8))) |
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| 124 | |
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| 125 | //---------------------------------------------[ Functionnal Unit ]----- |
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| 126 | # define OPERATION_ALU_L_ADD 0x1 // 000_0000 l.add , l.addi |
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| 127 | # define OPERATION_ALU_L_ADDC 0x2 // 000_0000 l.addc , l.addic |
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| 128 | # define OPERATION_ALU_L_SUB 0x4 // 000_0000 l.sub |
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| 129 | # define OPERATION_ALU_L_AND 0x8 // 000_0000 l.and , l.andi |
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| 130 | # define OPERATION_ALU_L_OR 0x10 // 000_0000 l.or , l.ori |
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| 131 | # define OPERATION_ALU_L_XOR 0x20 // 000_0000 l.xor , l.xori |
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| 132 | |
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| 133 | # define OPERATION_SHIFT_L_SLL 0x1 // 000_0000 l.sll , l.slli |
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| 134 | # define OPERATION_SHIFT_L_SRA 0x2 // 000_0000 l.sra , l.srai |
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| 135 | # define OPERATION_SHIFT_L_SRL 0x4 // 000_0000 l.srl , l.srli |
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| 136 | # define OPERATION_SHIFT_L_ROR 0x8 // 000_0000 l.ror , l.rori |
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| 137 | |
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| 138 | # define OPERATION_MOVE_L_MOVHI 0x1 // 000_0000 l.movhi |
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| 139 | # define OPERATION_MOVE_L_CMOV 0x2 // 000_0000 l.cmov |
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| 140 | |
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| 141 | # define OPERATION_TEST_L_SFGES 0x41 // 000_0000 l.sfges , l.sfges |
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| 142 | # define OPERATION_TEST_L_SFGEU 0x1 // 000_0000 l.sfgeu , l.sfgeu |
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| 143 | # define OPERATION_TEST_L_SFGTS 0x42 // 000_0000 L.sfgts , l.sfgts |
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| 144 | # define OPERATION_TEST_L_SFGTU 0x2 // 000_0000 l.sfgtu , l.sfgtu |
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| 145 | # define OPERATION_TEST_L_SFLES 0x44 // 000_0000 l.sfles , l.sfles |
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| 146 | # define OPERATION_TEST_L_SFLEU 0x4 // 000_0000 l.sfleu , l.sfleu |
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| 147 | # define OPERATION_TEST_L_SFLTS 0x48 // 000_0000 l.sflts , l.sflts |
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| 148 | # define OPERATION_TEST_L_SFLTU 0x8 // 000_0000 l.sfltu , l.sfltu |
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| 149 | # define OPERATION_TEST_L_SFEQ 0x10 // 000_0000 l.sfeq , l.sfeqi |
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| 150 | # define OPERATION_TEST_L_SFNE 0x20 // 000_0000 l.sfne , l.sfnei |
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| 151 | |
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| 152 | # define OPERATION_MUL_DIV_L_MUL 0x1 // 000_0000 l.mul , l.muli |
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| 153 | # define OPERATION_MUL_DIV_L_MULU 0x2 // 000_0000 l.mulu |
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| 154 | # define OPERATION_MUL_DIV_L_DIV 0x4 // 000_0000 l.div |
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| 155 | # define OPERATION_MUL_DIV_L_DIVU 0x8 // 000_0000 l.divu |
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| 156 | |
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| 157 | # define OPERATION_EXTEND_L_EXTEND_Z 0x1 // 000_0000 l.extbz , l.exthz, l.extwz |
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| 158 | # define OPERATION_EXTEND_L_EXTEND_S 0x2 // 000_0000 l.extbs , l.exths, l.extws |
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| 159 | |
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| 160 | # define OPERATION_FIND_L_FF1 0x1 // 000_0000 l.ff1 |
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| 161 | # define OPERATION_FIND_L_FL1 0x2 // 000_0000 l.fl1 |
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| 162 | |
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| 163 | # define OPERATION_SPECIAL_L_NOP 0xff // 000_0000 l.nop |
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| 164 | # define OPERATION_SPECIAL_L_MFSPR 0x1 // 000_0001 l.mfspr |
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| 165 | # define OPERATION_SPECIAL_L_MTSPR 0x2 // 000_0010 l.mtspr |
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| 166 | # define OPERATION_SPECIAL_L_RFE 0x4 // 000_0100 l.rfe |
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| 167 | # define OPERATION_SPECIAL_L_MAC 0x11 // 001_0001 l.mac , l.maci |
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| 168 | # define OPERATION_SPECIAL_L_MACRC 0x12 // 001_0010 l.macrc |
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| 169 | # define OPERATION_SPECIAL_L_MSB 0x14 // 001_0100 l.msb |
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| 170 | # define OPERATION_SPECIAL_L_MSYNC 0x21 // 010_0001 l.msync |
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| 171 | # define OPERATION_SPECIAL_L_PSYNC 0x22 // 010_0010 l.psync |
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| 172 | # define OPERATION_SPECIAL_L_CSYNC 0x24 // 010_0100 l.csync |
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| 173 | # define OPERATION_SPECIAL_L_SYS 0x41 // 100_0001 l.sys |
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| 174 | # define OPERATION_SPECIAL_L_TRAP 0x42 // 100_0010 l.trap |
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| 175 | |
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| 176 | |
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| 177 | # define OPERATION_BRANCH_NONE 0x1 // 000_0000 l.j |
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| 178 | # define OPERATION_BRANCH_L_TEST_NF 0x2 // 000_0000 l.bnf |
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| 179 | # define OPERATION_BRANCH_L_TEST_F 0x4 // 000_0000 l.bf |
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| 180 | # define OPERATION_BRANCH_L_JALR 0x8 // 000_0000 l.jal , l.jalr , l.jr |
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| 181 | |
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| 182 | //-------------------------------------------------------[ Custom ]----- |
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| 183 | |
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| 184 | # define OPERATION_CUSTOM_L_1 0x40 // 100_0000 |
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| 185 | # define OPERATION_CUSTOM_L_2 0x41 // 100_0001 |
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| 186 | # define OPERATION_CUSTOM_L_3 0x42 // 100_0010 |
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| 187 | # define OPERATION_CUSTOM_L_4 0x43 // 100_0011 |
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| 188 | # define OPERATION_CUSTOM_L_5 0x44 // 100_0100 |
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| 189 | # define OPERATION_CUSTOM_L_6 0x45 // 100_0101 |
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| 190 | # define OPERATION_CUSTOM_L_7 0x46 // 100_0110 |
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| 191 | # define OPERATION_CUSTOM_L_8 0x47 // 100_0111 |
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| 192 | # define OPERATION_CUSTOM_LF_1_D 0x48 // 100_1000 |
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| 193 | # define OPERATION_CUSTOM_LF_1_S 0x49 // 100_1001 |
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| 194 | # define OPERATION_CUSTOM_LV_1 0x4c // 100_1100 |
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| 195 | # define OPERATION_CUSTOM_LV_2 0x4d // 100_1101 |
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| 196 | # define OPERATION_CUSTOM_LV_3 0x4e // 100_1110 |
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| 197 | # define OPERATION_CUSTOM_LV_4 0x4f // 100_1111 |
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| 198 | |
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| 199 | # define SIZE_OPERATION 7 |
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| 200 | # define MAX_OPERATION (1<<SIZE_OPERATION) |
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| 201 | |
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| 202 | //====================================================[ Exception ]===== |
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| 203 | // Exception - OpenRISC |
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| 204 | |
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| 205 | # define SIZE_EXCEPTION 5 |
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| 206 | # define SIZE_EXCEPTION_USE 4 |
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| 207 | # define SIZE_EXCEPTION_MEMORY 3 |
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| 208 | # define SIZE_EXCEPTION_CUSTOM 3 |
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| 209 | # define SIZE_EXCEPTION_ALU 2 |
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| 210 | # define SIZE_EXCEPTION_DECOD 2 |
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| 211 | # define SIZE_EXCEPTION_IFETCH 2 |
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| 212 | |
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| 213 | # define EXCEPTION_NONE 0x00 // none exception |
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| 214 | # define EXCEPTION_RESET 0x01 // software or hardware reset |
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| 215 | # define EXCEPTION_BUS_ERROR 0x02 // Access at a invalid physical adress |
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| 216 | # define EXCEPTION_DATA_PAGE 0x03 // No matching or page violation protection in pages tables |
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| 217 | # define EXCEPTION_INSTRUCTION_PAGE 0x04 // No matching or page violation protection in pages tables |
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| 218 | # define EXCEPTION_TICK_TIMER 0x05 // Tick timer interruption |
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| 219 | # define EXCEPTION_ALIGNMENT 0x06 // Load/Store access is not aligned |
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| 220 | # define EXCEPTION_ILLEGAL_INSTRUCTION 0x07 // Instruction is illegal (no implemented) |
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| 221 | # define EXCEPTION_INTERRUPT 0x08 // External interruption |
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| 222 | # define EXCEPTION_DATA_TLB 0x09 // DTLB miss |
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| 223 | # define EXCEPTION_INSTRUCTION_TLB 0x0a // ITLB miss |
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| 224 | # define EXCEPTION_RANGE 0x0b // Overflow or access at a unimplemented register or context |
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| 225 | # define EXCEPTION_SYSCALL 0x0c // System Call |
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| 226 | # define EXCEPTION_FLOATING_POINT 0x0d // Caused by a floating instruction |
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| 227 | # define EXCEPTION_TRAP 0x0e // L.trap or debug unit |
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| 228 | # define EXCEPTION_RESERVED_0 0x0f // Reserved for a futur usage |
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| 229 | # define EXCEPTION_RESERVED_1 0x10 // Reserved for a futur usage |
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| 230 | # define EXCEPTION_RESERVED_2 0x11 // Reserved for a futur usage |
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| 231 | # define EXCEPTION_RESERVED_3 0x12 // Reserved for a futur usage |
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| 232 | # define EXCEPTION_RESERVED_4 0x13 // Reserved for a futur usage |
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| 233 | # define EXCEPTION_RESERVED_5 0x14 // Reserved for a futur usage |
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| 234 | # define EXCEPTION_RESERVED_6 0x15 // Reserved for implemented specific exceptions |
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| 235 | # define EXCEPTION_RESERVED_7 0x16 // Reserved for implemented specific exceptions |
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| 236 | # define EXCEPTION_RESERVED_8 0x17 // Reserved for implemented specific exceptions |
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| 237 | # define EXCEPTION_RESERVED_9 0x18 // Reserved for implemented specific exceptions |
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| 238 | # define EXCEPTION_CUSTOM_0 0x19 // Reserved for custom exceptions |
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| 239 | # define EXCEPTION_CUSTOM_1 0x1a // Reserved for custom exceptions |
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| 240 | # define EXCEPTION_CUSTOM_2 0x1b // Reserved for custom exceptions |
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| 241 | # define EXCEPTION_CUSTOM_3 0x1c // Reserved for custom exceptions |
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| 242 | # define EXCEPTION_CUSTOM_4 0x1d // Reserved for custom exceptions |
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| 243 | # define EXCEPTION_CUSTOM_5 0x1e // Reserved for custom exceptions |
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| 244 | # define EXCEPTION_CUSTOM_6 0x1f // Reserved for custom exceptions |
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| 245 | |
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| 246 | |
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| 247 | #define exception_to_address(x) (x<<8) |
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| 248 | |
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| 249 | // Exception Execution |
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| 250 | # define EXCEPTION_MEMORY_NONE 0x0 // Load/Store generate none exception |
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| 251 | # define EXCEPTION_MEMORY_ALIGNMENT 0x1 // Load/Store access is not aligned |
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| 252 | # define EXCEPTION_MEMORY_DATA_TLB 0x2 // DTLB miss |
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| 253 | # define EXCEPTION_MEMORY_DATA_PAGE 0x3 // No matching or page violation protection in pages tables |
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| 254 | # define EXCEPTION_MEMORY_BUS_ERROR 0x4 // Access at a invalid physical address |
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| 255 | # define EXCEPTION_MEMORY_MISS_SPECULATION 0x5 // Load miss speculation |
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| 256 | # define EXCEPTION_MEMORY_LOAD_SPECULATIVE 0x6 // The load is speculative : write in register file, but don't commit |
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| 257 | |
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| 258 | # define EXCEPTION_CUSTOM_NONE 0x1 // Custom unit generate none exception |
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| 259 | # define EXCEPTION_CUSTOM_CUST_0 0x1 // Reserved for custom exceptions |
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| 260 | # define EXCEPTION_CUSTOM_CUST_1 0x2 // Reserved for custom exceptions |
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| 261 | # define EXCEPTION_CUSTOM_CUST_2 0x3 // Reserved for custom exceptions |
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| 262 | # define EXCEPTION_CUSTOM_CUST_3 0x4 // Reserved for custom exceptions |
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| 263 | # define EXCEPTION_CUSTOM_CUST_4 0x5 // Reserved for custom exceptions |
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| 264 | # define EXCEPTION_CUSTOM_CUST_5 0x6 // Reserved for custom exceptions |
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| 265 | # define EXCEPTION_CUSTOM_CUST_6 0x7 // Reserved for custom exceptions |
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| 266 | |
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| 267 | # define EXCEPTION_ALU_NONE 0x0 // Functionnal unit generate none exception |
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| 268 | # define EXCEPTION_ALU_RANGE 0x1 // |
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| 269 | # define EXCEPTION_ALU_SPR_ACCESS_INVALID 0x2 // SPR present in ALU but not compatible privilege |
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| 270 | # define EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE 0x3 // SPR not present in ALU |
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| 271 | |
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| 272 | # define EXCEPTION_DECOD_NONE 0x0 // none exception |
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| 273 | # define EXCEPTION_DECOD_ILLEGAL_INSTRUCTION 0x1 // Instruction is illegal (no implemented) |
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| 274 | # define EXCEPTION_DECOD_SYSCALL 0x2 // System Call |
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| 275 | //#define EXCEPTION_DECOD_TRAP 0x4 // L.trap or debug unit (note : must read SR !) |
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| 276 | |
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| 277 | # define EXCEPTION_IFETCH_NONE 0x0 // Fetch Unit generate none exception |
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| 278 | # define EXCEPTION_IFETCH_INSTRUCTION_TLB 0x1 // ITLB miss |
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| 279 | # define EXCEPTION_IFETCH_INSTRUCTION_PAGE 0x2 // No matching or page violation protection in pages tables |
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| 280 | # define EXCEPTION_IFETCH_BUS_ERROR 0x3 // Access at a invalid physical address |
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| 281 | |
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| 282 | # define EXCEPTION_USE_NONE 0x0 // |
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| 283 | # define EXCEPTION_USE_ILLEGAL_INSTRUCTION 0x1 // illegal_instruction |
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| 284 | # define EXCEPTION_USE_RANGE 0x2 // range |
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| 285 | # define EXCEPTION_USE_MEMORY_WITH_ALIGNMENT 0x3 // TLB miss, page fault, bus error, alignment |
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| 286 | # define EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT 0x4 // TLB miss, page fault, bus error |
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| 287 | # define EXCEPTION_USE_SYSCALL 0x5 // syscall |
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| 288 | # define EXCEPTION_USE_TRAP 0x6 // trap |
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| 289 | # define EXCEPTION_USE_CUSTOM_0 0x7 // |
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| 290 | # define EXCEPTION_USE_CUSTOM_1 0x8 // |
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| 291 | # define EXCEPTION_USE_CUSTOM_2 0x9 // |
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| 292 | # define EXCEPTION_USE_CUSTOM_3 0xa // |
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| 293 | # define EXCEPTION_USE_CUSTOM_4 0xb // |
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| 294 | # define EXCEPTION_USE_CUSTOM_5 0xc // |
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| 295 | # define EXCEPTION_USE_CUSTOM_6 0xd // |
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| 296 | |
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| 297 | //=======================================================[ icache ]===== |
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| 298 | |
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| 299 | //--------------------------------------------------[ icache_type ]----- |
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| 300 | |
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| 301 | # define SIZE_ICACHE_TYPE 2 |
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| 302 | |
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| 303 | # define ICACHE_TYPE_LOAD 0x0 // 0000 |
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| 304 | # define ICACHE_TYPE_LOCK 0x1 // 0001 |
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| 305 | # define ICACHE_TYPE_INVALIDATE 0x2 // 0010 |
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| 306 | # define ICACHE_TYPE_PREFETCH 0x3 // 0011 |
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| 307 | |
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| 308 | // just take the 2 less significative bits. |
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| 309 | #define operation_to_icache_type(x) (x&0x3) |
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| 310 | |
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| 311 | //-------------------------------------------------[ icache_error ]----- |
|---|
| 312 | |
|---|
| 313 | # define SIZE_ICACHE_ERROR 1 |
|---|
| 314 | |
|---|
| 315 | # define ICACHE_ERROR_NONE 0x0 |
|---|
| 316 | # define ICACHE_ERROR_BUS_ERROR 0x1 |
|---|
| 317 | |
|---|
| 318 | //=======================================================[ dcache ]===== |
|---|
| 319 | |
|---|
| 320 | //--------------------------------------------------[ dcache_type ]----- |
|---|
| 321 | |
|---|
| 322 | # define SIZE_DCACHE_TYPE 4 |
|---|
| 323 | |
|---|
| 324 | # define DCACHE_TYPE_LOAD 0x0 // 0000 |
|---|
| 325 | # define DCACHE_TYPE_LOCK 0x1 // 0001 |
|---|
| 326 | # define DCACHE_TYPE_INVALIDATE 0x2 // 0010 |
|---|
| 327 | # define DCACHE_TYPE_PREFETCH 0x3 // 0011 |
|---|
| 328 | //#define DCACHE_TYPE_ 0x4 // 0100 |
|---|
| 329 | //#define DCACHE_TYPE_ 0x5 // 0101 |
|---|
| 330 | # define DCACHE_TYPE_FLUSH 0x6 // 0110 |
|---|
| 331 | # define DCACHE_TYPE_SYNCHRONIZATION 0x7 // 0111 |
|---|
| 332 | # define DCACHE_TYPE_STORE_8 0x8 // 1000 |
|---|
| 333 | # define DCACHE_TYPE_STORE_16 0x9 // 1001 |
|---|
| 334 | # define DCACHE_TYPE_STORE_32 0xa // 1010 |
|---|
| 335 | # define DCACHE_TYPE_STORE_64 0xb // 1011 |
|---|
| 336 | //#define DCACHE_TYPE_ 0xc // 1100 |
|---|
| 337 | //#define DCACHE_TYPE_ 0xd // 1101 |
|---|
| 338 | //#define DCACHE_TYPE_ 0xe // 1110 |
|---|
| 339 | //#define DCACHE_TYPE_ 0xf // 1111 |
|---|
| 340 | |
|---|
| 341 | // just take the 4 less significative bits. |
|---|
| 342 | #define operation_to_dcache_type(x) (x&0xf) |
|---|
| 343 | |
|---|
| 344 | //-------------------------------------------------[ dcache_error ]----- |
|---|
| 345 | |
|---|
| 346 | # define SIZE_DCACHE_ERROR 1 |
|---|
| 347 | |
|---|
| 348 | # define DCACHE_ERROR_NONE 0x0 |
|---|
| 349 | # define DCACHE_ERROR_BUS_ERROR 0x1 |
|---|
| 350 | |
|---|
| 351 | //=================================================[ special_data ]===== |
|---|
| 352 | |
|---|
| 353 | # define SIZE_SPECIAL_DATA 2 |
|---|
| 354 | |
|---|
| 355 | // Position of flag in "rename register SR" (NOT IN "SR") |
|---|
| 356 | # define FLAG_POSITION_F 0x0 // Conditionnal branch flag |
|---|
| 357 | # define FLAG_POSITION_CY 0x1 // Carry was produced by last arithmetic operation |
|---|
| 358 | # define FLAG_POSITION_OV 0x0 // Overflow occured during last arithmetic operation |
|---|
| 359 | |
|---|
| 360 | # define FLAG_F (1<<FLAG_POSITION_F ) // Conditionnal branch flag |
|---|
| 361 | # define FLAG_CY (1<<FLAG_POSITION_CY) // Carry was produced by last arithmetic operation |
|---|
| 362 | # define FLAG_OV (1<<FLAG_POSITION_OV) // Overflow occured during last arithmetic operation |
|---|
| 363 | |
|---|
| 364 | //==========================================================[ spr ]===== |
|---|
| 365 | |
|---|
| 366 | enum |
|---|
| 367 | { |
|---|
| 368 | GROUP_SYSTEM_AND_CONTROL, // 0 |
|---|
| 369 | GROUP_DMMU, // 1 |
|---|
| 370 | GROUP_IMMU, // 2 |
|---|
| 371 | GROUP_DCACHE, // 3 |
|---|
| 372 | GROUP_ICACHE, // 4 |
|---|
| 373 | GROUP_MAC, // 5 |
|---|
| 374 | GROUP_DEBUG, // 6 |
|---|
| 375 | GROUP_PERFORMANCE_COUNTER, // 7 |
|---|
| 376 | GROUP_POWER_MANAGEMENT, // 8 |
|---|
| 377 | GROUP_PIC, // 9 |
|---|
| 378 | GROUP_TICK_TIMER, // 10 |
|---|
| 379 | GROUP_FLOATING_POINT, // 11 |
|---|
| 380 | GROUP_RESERVED_1, // 12 |
|---|
| 381 | GROUP_RESERVED_2, // 13 |
|---|
| 382 | GROUP_RESERVED_3, // 14 |
|---|
| 383 | GROUP_RESERVED_4, // 15 |
|---|
| 384 | GROUP_RESERVED_5, // 16 |
|---|
| 385 | GROUP_RESERVED_6, // 17 |
|---|
| 386 | GROUP_RESERVED_7, // 18 |
|---|
| 387 | GROUP_RESERVED_8, // 19 |
|---|
| 388 | GROUP_RESERVED_9, // 20 |
|---|
| 389 | GROUP_RESERVED_10, // 21 |
|---|
| 390 | GROUP_RESERVED_11, // 22 |
|---|
| 391 | GROUP_RESERVED_12, // 23 |
|---|
| 392 | GROUP_CUSTOM_1, // 24 |
|---|
| 393 | GROUP_CUSTOM_2, // 25 |
|---|
| 394 | GROUP_CUSTOM_3, // 26 |
|---|
| 395 | GROUP_CUSTOM_4, // 27 |
|---|
| 396 | GROUP_CUSTOM_5, // 28 |
|---|
| 397 | GROUP_CUSTOM_6, // 29 |
|---|
| 398 | GROUP_CUSTOM_7, // 30 |
|---|
| 399 | GROUP_CUSTOM_8 // 31 |
|---|
| 400 | }; |
|---|
| 401 | |
|---|
| 402 | # define NB_GROUP 32 |
|---|
| 403 | # define NB_REG_GROUP_SYSTEM_AND_CONTROL 1536 |
|---|
| 404 | # define NB_REG_GROUP_DMMU 1536 |
|---|
| 405 | # define NB_REG_GROUP_IMMU 1536 |
|---|
| 406 | # define NB_REG_GROUP_DCACHE 6 |
|---|
| 407 | # define NB_REG_GROUP_ICACHE 4 |
|---|
| 408 | # define NB_REG_GROUP_MAC 3 |
|---|
| 409 | # define NB_REG_GROUP_DEBUG 22 |
|---|
| 410 | # define NB_REG_GROUP_PERFORMANCE_COUNTER 16 |
|---|
| 411 | # define NB_REG_GROUP_POWER_MANAGEMENT 1 |
|---|
| 412 | # define NB_REG_GROUP_PIC 3 |
|---|
| 413 | # define NB_REG_GROUP_TICK_TIMER 2 |
|---|
| 414 | # define NB_REG_GROUP_FLOATING_POINT 0 |
|---|
| 415 | # define NB_REG_GROUP_RESERVED_1 0 |
|---|
| 416 | # define NB_REG_GROUP_RESERVED_2 0 |
|---|
| 417 | # define NB_REG_GROUP_RESERVED_3 0 |
|---|
| 418 | # define NB_REG_GROUP_RESERVED_4 0 |
|---|
| 419 | # define NB_REG_GROUP_RESERVED_5 0 |
|---|
| 420 | # define NB_REG_GROUP_RESERVED_6 0 |
|---|
| 421 | # define NB_REG_GROUP_RESERVED_7 0 |
|---|
| 422 | # define NB_REG_GROUP_RESERVED_8 0 |
|---|
| 423 | # define NB_REG_GROUP_RESERVED_9 0 |
|---|
| 424 | # define NB_REG_GROUP_RESERVED_10 0 |
|---|
| 425 | # define NB_REG_GROUP_RESERVED_11 0 |
|---|
| 426 | # define NB_REG_GROUP_RESERVED_12 0 |
|---|
| 427 | # define NB_REG_GROUP_CUSTOM_1 0 |
|---|
| 428 | # define NB_REG_GROUP_CUSTOM_2 0 |
|---|
| 429 | # define NB_REG_GROUP_CUSTOM_3 0 |
|---|
| 430 | # define NB_REG_GROUP_CUSTOM_4 0 |
|---|
| 431 | # define NB_REG_GROUP_CUSTOM_5 0 |
|---|
| 432 | # define NB_REG_GROUP_CUSTOM_6 0 |
|---|
| 433 | # define NB_REG_GROUP_CUSTOM_7 0 |
|---|
| 434 | # define NB_REG_GROUP_CUSTOM_8 0 |
|---|
| 435 | |
|---|
| 436 | |
|---|
| 437 | // GROUP_MAC |
|---|
| 438 | # define SPR_MACLO 1 // MAC Low |
|---|
| 439 | # define SPR_MACHI 2 // MAC High |
|---|
| 440 | |
|---|
| 441 | # define NB_SPR_LOGIC 2 |
|---|
| 442 | # define LOG2_NB_SPR_LOGIC 1 |
|---|
| 443 | // SPR_LOGIC[0] = F |
|---|
| 444 | // SPR_LOGIC[1] = Carry, Overflow |
|---|
| 445 | # define SPR_LOGIC_SR_F 0x0 // Status register bit F (size = 1) |
|---|
| 446 | # define SPR_LOGIC_SR_CY_OV 0x1 // Status register bit overflow and carry (size = 2) |
|---|
| 447 | |
|---|
| 448 | //----------------------------------------------[ spr_mode_access ]----- |
|---|
| 449 | |
|---|
| 450 | # define SPR_ACCESS_MODE_NONE 0x0 // 000 |
|---|
| 451 | # define SPR_ACCESS_MODE_READ_ONLY 0x1 // 001 |
|---|
| 452 | # define SPR_ACCESS_MODE_WRITE_ONLY 0x2 // 010 |
|---|
| 453 | # define SPR_ACCESS_MODE_READ_WRITE 0x3 // 011 |
|---|
| 454 | # define SPR_ACCESS_MODE_READ_ONLY_COND 0x5 // 101 special read |
|---|
| 455 | |
|---|
| 456 | //--------------------------------------------------------[ event ]----- |
|---|
| 457 | # define SIZE_EVENT_STATE 2 |
|---|
| 458 | |
|---|
| 459 | # define EVENT_STATE_NO_EVENT 0 // no event : current case |
|---|
| 460 | # define EVENT_STATE_EVENT 1 // Have a event : make necessary to manage the event |
|---|
| 461 | # define EVENT_STATE_WAITEND 2 // Wait end of manage event (restaure a good context) |
|---|
| 462 | # define EVENT_STATE_END 3 // CPU can continue |
|---|
| 463 | |
|---|
| 464 | # define SIZE_EVENT_TYPE 3 |
|---|
| 465 | |
|---|
| 466 | # define EVENT_TYPE_NONE 0 // no event |
|---|
| 467 | # define EVENT_TYPE_MISS_SPECULATION 1 // miss of speculation (load or branch miss speculation) |
|---|
| 468 | # define EVENT_TYPE_EXCEPTION 2 // exception or interruption occure |
|---|
| 469 | # define EVENT_TYPE_BRANCH_NO_ACCURATE 3 // branch is no accurate (old speculation is a miss) |
|---|
| 470 | # define EVENT_TYPE_SPR_ACCESS 4 // decod a mtspr or mfspr instruction |
|---|
| 471 | # define EVENT_TYPE_MSYNC 5 // decod a memory synchronization |
|---|
| 472 | # define EVENT_TYPE_PSYNC 6 // decod a pipeline synchronization |
|---|
| 473 | # define EVENT_TYPE_CSYNC 7 // decod a context synchronization |
|---|
| 474 | |
|---|
| 475 | //-------------------------------------------------[ branch_state ]----- |
|---|
| 476 | # define SIZE_BRANCH_STATE 2 |
|---|
| 477 | |
|---|
| 478 | # define BRANCH_STATE_NONE 0x0 // 0 0 |
|---|
| 479 | # define BRANCH_STATE_NSPEC_TAKE 0x1 // 0 1 -> incondionnal |
|---|
| 480 | # define BRANCH_STATE_SPEC_NTAKE 0x2 // 1 0 |
|---|
| 481 | # define BRANCH_STATE_SPEC_TAKE 0x3 // 1 1 |
|---|
| 482 | |
|---|
| 483 | //---------------------------------------------[ branch_condition ]----- |
|---|
| 484 | |
|---|
| 485 | # define SIZE_BRANCH_CONDITION 4 |
|---|
| 486 | |
|---|
| 487 | # define BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK 0x0 // None condition (jump) |
|---|
| 488 | # define BRANCH_CONDITION_NONE_WITH_WRITE_STACK 0x8 // None condition (jump) |
|---|
| 489 | # define BRANCH_CONDITION_FLAG_UNSET 0x2 // Branch if Flag is clear |
|---|
| 490 | # define BRANCH_CONDITION_FLAG_SET 0x3 // Branch if Flag is set |
|---|
| 491 | # define BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK 0x4 // Branch if a register is read |
|---|
| 492 | # define BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK 0xc // Branch if a register is read |
|---|
| 493 | # define BRANCH_CONDITION_READ_STACK 0xf // Branch with pop in stack pointer |
|---|
| 494 | |
|---|
| 495 | //--------------------------------------------------[ instruction ]----- |
|---|
| 496 | # define NB_INSTRUCTION 213 // 92 ORBIS, 30 ORFPX (15 simple, 15 double), 91 ORVDX (38 on byte, 41 on half, 12 independant format) |
|---|
| 497 | |
|---|
| 498 | enum |
|---|
| 499 | { |
|---|
| 500 | // ORBIS |
|---|
| 501 | INSTRUCTION_L_ADD, |
|---|
| 502 | INSTRUCTION_L_ADDC, |
|---|
| 503 | INSTRUCTION_L_ADDI, |
|---|
| 504 | INSTRUCTION_L_ADDIC, |
|---|
| 505 | INSTRUCTION_L_AND, |
|---|
| 506 | INSTRUCTION_L_ANDI, |
|---|
| 507 | INSTRUCTION_L_BF, |
|---|
| 508 | INSTRUCTION_L_BNF, |
|---|
| 509 | INSTRUCTION_L_CMOV, |
|---|
| 510 | INSTRUCTION_L_CSYNC, |
|---|
| 511 | INSTRUCTION_L_CUST1, |
|---|
| 512 | INSTRUCTION_L_CUST2, |
|---|
| 513 | INSTRUCTION_L_CUST3, |
|---|
| 514 | INSTRUCTION_L_CUST4, |
|---|
| 515 | INSTRUCTION_L_CUST5, |
|---|
| 516 | INSTRUCTION_L_CUST6, |
|---|
| 517 | INSTRUCTION_L_CUST7, |
|---|
| 518 | INSTRUCTION_L_CUST8, |
|---|
| 519 | INSTRUCTION_L_DIV, |
|---|
| 520 | INSTRUCTION_L_DIVU, |
|---|
| 521 | INSTRUCTION_L_EXTBS, |
|---|
| 522 | INSTRUCTION_L_EXTBZ, |
|---|
| 523 | INSTRUCTION_L_EXTHS, |
|---|
| 524 | INSTRUCTION_L_EXTHZ, |
|---|
| 525 | INSTRUCTION_L_EXTWS, |
|---|
| 526 | INSTRUCTION_L_EXTWZ, |
|---|
| 527 | INSTRUCTION_L_FF1, |
|---|
| 528 | INSTRUCTION_L_FL1, |
|---|
| 529 | INSTRUCTION_L_J, |
|---|
| 530 | INSTRUCTION_L_JAL, |
|---|
| 531 | INSTRUCTION_L_JALR, |
|---|
| 532 | INSTRUCTION_L_JR, |
|---|
| 533 | INSTRUCTION_L_LBS, |
|---|
| 534 | INSTRUCTION_L_LBZ, |
|---|
| 535 | INSTRUCTION_L_LD, |
|---|
| 536 | INSTRUCTION_L_LHS, |
|---|
| 537 | INSTRUCTION_L_LHZ, |
|---|
| 538 | INSTRUCTION_L_LWS, |
|---|
| 539 | INSTRUCTION_L_LWZ, |
|---|
| 540 | INSTRUCTION_L_MAC, |
|---|
| 541 | INSTRUCTION_L_MACI, |
|---|
| 542 | INSTRUCTION_L_MACRC, |
|---|
| 543 | INSTRUCTION_L_MFSPR, |
|---|
| 544 | INSTRUCTION_L_MOVHI, |
|---|
| 545 | INSTRUCTION_L_MSB, |
|---|
| 546 | INSTRUCTION_L_MSYNC, |
|---|
| 547 | INSTRUCTION_L_MTSPR, |
|---|
| 548 | INSTRUCTION_L_MUL, |
|---|
| 549 | INSTRUCTION_L_MULI, |
|---|
| 550 | INSTRUCTION_L_MULU, |
|---|
| 551 | INSTRUCTION_L_NOP, |
|---|
| 552 | INSTRUCTION_L_OR, |
|---|
| 553 | INSTRUCTION_L_ORI, |
|---|
| 554 | INSTRUCTION_L_PSYNC, |
|---|
| 555 | INSTRUCTION_L_RFE, |
|---|
| 556 | INSTRUCTION_L_ROR, |
|---|
| 557 | INSTRUCTION_L_RORI, |
|---|
| 558 | INSTRUCTION_L_SB, |
|---|
| 559 | INSTRUCTION_L_SD, |
|---|
| 560 | INSTRUCTION_L_SFEQ, |
|---|
| 561 | INSTRUCTION_L_SFEQI, |
|---|
| 562 | INSTRUCTION_L_SFGES, |
|---|
| 563 | INSTRUCTION_L_SFGESI, |
|---|
| 564 | INSTRUCTION_L_SFGEU, |
|---|
| 565 | INSTRUCTION_L_SFGEUI, |
|---|
| 566 | INSTRUCTION_L_SFGTS, |
|---|
| 567 | INSTRUCTION_L_SFGTSI, |
|---|
| 568 | INSTRUCTION_L_SFGTU, |
|---|
| 569 | INSTRUCTION_L_SFGTUI, |
|---|
| 570 | INSTRUCTION_L_SFLES, |
|---|
| 571 | INSTRUCTION_L_SFLESI, |
|---|
| 572 | INSTRUCTION_L_SFLEU, |
|---|
| 573 | INSTRUCTION_L_SFLEUI, |
|---|
| 574 | INSTRUCTION_L_SFLTS, |
|---|
| 575 | INSTRUCTION_L_SFLTSI, |
|---|
| 576 | INSTRUCTION_L_SFLTU, |
|---|
| 577 | INSTRUCTION_L_SFLTUI, |
|---|
| 578 | INSTRUCTION_L_SFNE, |
|---|
| 579 | INSTRUCTION_L_SFNEI, |
|---|
| 580 | INSTRUCTION_L_SH, |
|---|
| 581 | INSTRUCTION_L_SLL, |
|---|
| 582 | INSTRUCTION_L_SLLI, |
|---|
| 583 | INSTRUCTION_L_SRA, |
|---|
| 584 | INSTRUCTION_L_SRAI, |
|---|
| 585 | INSTRUCTION_L_SRL, |
|---|
| 586 | INSTRUCTION_L_SRLI, |
|---|
| 587 | INSTRUCTION_L_SUB, |
|---|
| 588 | INSTRUCTION_L_SW, |
|---|
| 589 | INSTRUCTION_L_SYS, |
|---|
| 590 | INSTRUCTION_L_TRAP, |
|---|
| 591 | INSTRUCTION_L_XOR, |
|---|
| 592 | INSTRUCTION_L_XORI, |
|---|
| 593 | // ORFPX |
|---|
| 594 | INSTRUCTION_LF_ADD_D, |
|---|
| 595 | INSTRUCTION_LF_ADD_S, |
|---|
| 596 | INSTRUCTION_LF_CUST1_D, |
|---|
| 597 | INSTRUCTION_LF_CUST1_S, |
|---|
| 598 | INSTRUCTION_LF_DIV_D, |
|---|
| 599 | INSTRUCTION_LF_DIV_S, |
|---|
| 600 | INSTRUCTION_LF_FTOI_D, |
|---|
| 601 | INSTRUCTION_LF_FTOI_S, |
|---|
| 602 | INSTRUCTION_LF_ITOF_D, |
|---|
| 603 | INSTRUCTION_LF_ITOF_S, |
|---|
| 604 | INSTRUCTION_LF_MADD_D, |
|---|
| 605 | INSTRUCTION_LF_MADD_S, |
|---|
| 606 | INSTRUCTION_LF_MUL_D, |
|---|
| 607 | INSTRUCTION_LF_MUL_S, |
|---|
| 608 | INSTRUCTION_LF_REM_D, |
|---|
| 609 | INSTRUCTION_LF_REM_S, |
|---|
| 610 | INSTRUCTION_LF_SFEQ_D, |
|---|
| 611 | INSTRUCTION_LF_SFEQ_S, |
|---|
| 612 | INSTRUCTION_LF_SFGE_D, |
|---|
| 613 | INSTRUCTION_LF_SFGE_S, |
|---|
| 614 | INSTRUCTION_LF_SFGT_D, |
|---|
| 615 | INSTRUCTION_LF_SFGT_S, |
|---|
| 616 | INSTRUCTION_LF_SFLE_D, |
|---|
| 617 | INSTRUCTION_LF_SFLE_S, |
|---|
| 618 | INSTRUCTION_LF_SFLT_D, |
|---|
| 619 | INSTRUCTION_LF_SFLT_S, |
|---|
| 620 | INSTRUCTION_LF_SFNE_D, |
|---|
| 621 | INSTRUCTION_LF_SFNE_S, |
|---|
| 622 | INSTRUCTION_LF_SUB_D, |
|---|
| 623 | INSTRUCTION_LF_SUB_S, |
|---|
| 624 | // ORVDX |
|---|
| 625 | INSTRUCTION_LV_ADD_B, |
|---|
| 626 | INSTRUCTION_LV_ADD_H, |
|---|
| 627 | INSTRUCTION_LV_ADDS_B, |
|---|
| 628 | INSTRUCTION_LV_ADDS_H, |
|---|
| 629 | INSTRUCTION_LV_ADDU_B, |
|---|
| 630 | INSTRUCTION_LV_ADDU_H, |
|---|
| 631 | INSTRUCTION_LV_ADDUS_B, |
|---|
| 632 | INSTRUCTION_LV_ADDUS_H, |
|---|
| 633 | INSTRUCTION_LV_ALL_EQ_B, |
|---|
| 634 | INSTRUCTION_LV_ALL_EQ_H, |
|---|
| 635 | INSTRUCTION_LV_ALL_GE_B, |
|---|
| 636 | INSTRUCTION_LV_ALL_GE_H, |
|---|
| 637 | INSTRUCTION_LV_ALL_GT_B, |
|---|
| 638 | INSTRUCTION_LV_ALL_GT_H, |
|---|
| 639 | INSTRUCTION_LV_ALL_LE_B, |
|---|
| 640 | INSTRUCTION_LV_ALL_LE_H, |
|---|
| 641 | INSTRUCTION_LV_ALL_LT_B, |
|---|
| 642 | INSTRUCTION_LV_ALL_LT_H, |
|---|
| 643 | INSTRUCTION_LV_ALL_NE_B, |
|---|
| 644 | INSTRUCTION_LV_ALL_NE_H, |
|---|
| 645 | INSTRUCTION_LV_AND, |
|---|
| 646 | INSTRUCTION_LV_ANY_EQ_B, |
|---|
| 647 | INSTRUCTION_LV_ANY_EQ_H, |
|---|
| 648 | INSTRUCTION_LV_ANY_GE_B, |
|---|
| 649 | INSTRUCTION_LV_ANY_GE_H, |
|---|
| 650 | INSTRUCTION_LV_ANY_GT_B, |
|---|
| 651 | INSTRUCTION_LV_ANY_GT_H, |
|---|
| 652 | INSTRUCTION_LV_ANY_LE_B, |
|---|
| 653 | INSTRUCTION_LV_ANY_LE_H, |
|---|
| 654 | INSTRUCTION_LV_ANY_LT_B, |
|---|
| 655 | INSTRUCTION_LV_ANY_LT_H, |
|---|
| 656 | INSTRUCTION_LV_ANY_NE_B, |
|---|
| 657 | INSTRUCTION_LV_ANY_NE_H, |
|---|
| 658 | INSTRUCTION_LV_AVG_B, |
|---|
| 659 | INSTRUCTION_LV_AVG_H, |
|---|
| 660 | INSTRUCTION_LV_CMP_EQ_B, |
|---|
| 661 | INSTRUCTION_LV_CMP_EQ_H, |
|---|
| 662 | INSTRUCTION_LV_CMP_GE_B, |
|---|
| 663 | INSTRUCTION_LV_CMP_GE_H, |
|---|
| 664 | INSTRUCTION_LV_CMP_GT_B, |
|---|
| 665 | INSTRUCTION_LV_CMP_GT_H, |
|---|
| 666 | INSTRUCTION_LV_CMP_LE_B, |
|---|
| 667 | INSTRUCTION_LV_CMP_LE_H, |
|---|
| 668 | INSTRUCTION_LV_CMP_LT_B, |
|---|
| 669 | INSTRUCTION_LV_CMP_LT_H, |
|---|
| 670 | INSTRUCTION_LV_CMP_NE_B, |
|---|
| 671 | INSTRUCTION_LV_CMP_NE_H, |
|---|
| 672 | INSTRUCTION_LV_CUST1, |
|---|
| 673 | INSTRUCTION_LV_CUST2, |
|---|
| 674 | INSTRUCTION_LV_CUST3, |
|---|
| 675 | INSTRUCTION_LV_CUST4, |
|---|
| 676 | INSTRUCTION_LV_MADDS_H, |
|---|
| 677 | INSTRUCTION_LV_MAX_B, |
|---|
| 678 | INSTRUCTION_LV_MAX_H, |
|---|
| 679 | INSTRUCTION_LV_MERGE_B, |
|---|
| 680 | INSTRUCTION_LV_MERGE_H, |
|---|
| 681 | INSTRUCTION_LV_MIN_B, |
|---|
| 682 | INSTRUCTION_LV_MIN_H, |
|---|
| 683 | INSTRUCTION_LV_MSUBS_H, |
|---|
| 684 | INSTRUCTION_LV_MULS_H, |
|---|
| 685 | INSTRUCTION_LV_NAND, |
|---|
| 686 | INSTRUCTION_LV_NOR, |
|---|
| 687 | INSTRUCTION_LV_OR, |
|---|
| 688 | INSTRUCTION_LV_PACK_B, |
|---|
| 689 | INSTRUCTION_LV_PACK_H, |
|---|
| 690 | INSTRUCTION_LV_PACKS_B, |
|---|
| 691 | INSTRUCTION_LV_PACKS_H, |
|---|
| 692 | INSTRUCTION_LV_PACKUS_B, |
|---|
| 693 | INSTRUCTION_LV_PACKUS_H, |
|---|
| 694 | INSTRUCTION_LV_PERM_N, |
|---|
| 695 | INSTRUCTION_LV_RL_B, |
|---|
| 696 | INSTRUCTION_LV_RL_H, |
|---|
| 697 | INSTRUCTION_LV_SLL, |
|---|
| 698 | INSTRUCTION_LV_SLL_B, |
|---|
| 699 | INSTRUCTION_LV_SLL_H, |
|---|
| 700 | INSTRUCTION_LV_SRA_B, |
|---|
| 701 | INSTRUCTION_LV_SRA_H, |
|---|
| 702 | INSTRUCTION_LV_SRL, |
|---|
| 703 | INSTRUCTION_LV_SRL_B, |
|---|
| 704 | INSTRUCTION_LV_SRL_H, |
|---|
| 705 | INSTRUCTION_LV_SUB_B, |
|---|
| 706 | INSTRUCTION_LV_SUB_H, |
|---|
| 707 | INSTRUCTION_LV_SUBS_B, |
|---|
| 708 | INSTRUCTION_LV_SUBS_H, |
|---|
| 709 | INSTRUCTION_LV_SUBU_B, |
|---|
| 710 | INSTRUCTION_LV_SUBU_H, |
|---|
| 711 | INSTRUCTION_LV_SUBUS_B, |
|---|
| 712 | INSTRUCTION_LV_SUBUS_H, |
|---|
| 713 | INSTRUCTION_LV_UNPACK_B, |
|---|
| 714 | INSTRUCTION_LV_UNPACK_H, |
|---|
| 715 | INSTRUCTION_LV_XOR |
|---|
| 716 | }; |
|---|
| 717 | |
|---|
| 718 | //-----------------------------------------------[ Code Operation ]----- |
|---|
| 719 | |
|---|
| 720 | # define MAX_OPCOD_0 64 // Instructions with immediat |
|---|
| 721 | # define MAX_OPCOD_1 64 // Instruction ORFPX32/64 |
|---|
| 722 | # define MAX_OPCOD_2 256 // Instruction ORVDX64 |
|---|
| 723 | # define MAX_OPCOD_3 256 // Instructions Register-Register |
|---|
| 724 | # define MAX_OPCOD_4 32 // Instructions "set flag" with register |
|---|
| 725 | # define MAX_OPCOD_5 32 // Instructions "set flag" with immediat |
|---|
| 726 | # define MAX_OPCOD_6 4 // Instruction Shift/Rotate with immediat |
|---|
| 727 | # define MAX_OPCOD_7 16 // Instructions multiply with HI-LO |
|---|
| 728 | # define MAX_OPCOD_8 2 // Instructions acces at HI-LO |
|---|
| 729 | # define MAX_OPCOD_9 8 // Instructions special |
|---|
| 730 | # define MAX_OPCOD_10 4 // Instructions no operation |
|---|
| 731 | # define MAX_OPCOD_11 4 // Instruction Shift/Rotate with register |
|---|
| 732 | # define MAX_OPCOD_12 4 // Instructions extend |
|---|
| 733 | # define MAX_OPCOD_13 4 // Instructions extend (64b) |
|---|
| 734 | |
|---|
| 735 | // OPCOD_0 - [31:26] Instructions with immediat |
|---|
| 736 | # define OPCOD_L_J 0x00 // 000_000 |
|---|
| 737 | # define OPCOD_L_JAL 0x01 // 000_001 |
|---|
| 738 | # define OPCOD_L_BNF 0x03 // 000_011 |
|---|
| 739 | # define OPCOD_L_BF 0x04 // 000_100 |
|---|
| 740 | # define OPCOD_L_RFE 0x09 // 001_001 |
|---|
| 741 | # define OPCOD_L_JR 0x11 // 010_001 |
|---|
| 742 | # define OPCOD_L_JALR 0x12 // 010_010 |
|---|
| 743 | # define OPCOD_L_MACI 0x13 // 010_011 |
|---|
| 744 | # define OPCOD_L_CUST1 0x1c // 011_100 |
|---|
| 745 | # define OPCOD_L_CUST2 0x1d // 011_101 |
|---|
| 746 | # define OPCOD_L_CUST3 0x1e // 011_110 |
|---|
| 747 | # define OPCOD_L_CUST4 0x1f // 011_111 |
|---|
| 748 | # define OPCOD_L_CUST5 0x3c // 111_100 |
|---|
| 749 | # define OPCOD_L_CUST6 0x3d // 111_101 |
|---|
| 750 | # define OPCOD_L_CUST7 0x3e // 111_110 |
|---|
| 751 | # define OPCOD_L_CUST8 0x3f // 111_111 |
|---|
| 752 | # define OPCOD_L_LD 0x20 // 100_000 |
|---|
| 753 | # define OPCOD_L_LWZ 0x21 // 100_001 |
|---|
| 754 | # define OPCOD_L_LWS 0x22 // 100_010 |
|---|
| 755 | # define OPCOD_L_LBZ 0x23 // 100_011 |
|---|
| 756 | # define OPCOD_L_LBS 0x24 // 100_100 |
|---|
| 757 | # define OPCOD_L_LHZ 0x25 // 100_101 |
|---|
| 758 | # define OPCOD_L_LHS 0x26 // 100_110 |
|---|
| 759 | # define OPCOD_L_ADDI 0x27 // 100_111 |
|---|
| 760 | # define OPCOD_L_ADDIC 0x28 // 101_000 |
|---|
| 761 | # define OPCOD_L_ANDI 0x29 // 101_001 |
|---|
| 762 | # define OPCOD_L_ORI 0x2a // 101_010 |
|---|
| 763 | # define OPCOD_L_XORI 0x2b // 101_011 |
|---|
| 764 | # define OPCOD_L_MULI 0x2c // 101_100 |
|---|
| 765 | # define OPCOD_L_MFSPR 0x2d // 101_101 |
|---|
| 766 | # define OPCOD_L_MTSPR 0x30 // 110_000 |
|---|
| 767 | # define OPCOD_L_SD 0x34 // 110_100 |
|---|
| 768 | # define OPCOD_L_SW 0x35 // 110_101 |
|---|
| 769 | # define OPCOD_L_SB 0x36 // 110_110 |
|---|
| 770 | # define OPCOD_L_SH 0x37 // 110_111 |
|---|
| 771 | |
|---|
| 772 | # define OPCOD_1 0x33 // 110_011 // Instruction ORFPX32/64 |
|---|
| 773 | # define OPCOD_2 0x0a // 001_010 // Instruction ORVDX64 |
|---|
| 774 | # define OPCOD_3 0x38 // 111_000 // Instructions Register-Register |
|---|
| 775 | # define OPCOD_4 0x39 // 111_001 // Instructions "set flag" with register |
|---|
| 776 | # define OPCOD_5 0x2f // 101_111 // Instructions "set flag" with immediat |
|---|
| 777 | # define OPCOD_6 0x2e // 101_110 // Instruction Shift/Rotate with immediat |
|---|
| 778 | # define OPCOD_7 0x31 // 110_001 // Instructions multiply with HI-LO |
|---|
| 779 | # define OPCOD_8 0x06 // 000_110 // Instructions acces at HI-LO |
|---|
| 780 | # define OPCOD_9 0x08 // 001_000 // Instructions special |
|---|
| 781 | # define OPCOD_10 0x05 // 000_101 // Instructions no operation |
|---|
| 782 | |
|---|
| 783 | // OPCOD_3 instructions - [9:8] [3:0] Instructions Register-Register |
|---|
| 784 | # define OPCOD_L_ADD 0x00 // 00_0000 |
|---|
| 785 | # define OPCOD_L_ADDC 0x01 // 00_0001 |
|---|
| 786 | # define OPCOD_L_SUB 0x02 // 00_0010 |
|---|
| 787 | # define OPCOD_L_AND 0x03 // 00_0011 |
|---|
| 788 | # define OPCOD_L_OR 0x04 // 00_0100 |
|---|
| 789 | # define OPCOD_L_XOR 0x05 // 00_0101 |
|---|
| 790 | # define OPCOD_L_CMOV 0x0e // 00_1110 |
|---|
| 791 | # define OPCOD_L_FF1 0x0f // 00_1111 |
|---|
| 792 | # define OPCOD_L_FL1 0x1f // 01_1111 |
|---|
| 793 | # define OPCOD_L_MUL 0x36 // 11_0110 |
|---|
| 794 | # define OPCOD_L_DIV 0x39 // 11_1001 |
|---|
| 795 | # define OPCOD_L_DIVU 0x3a // 11_1010 |
|---|
| 796 | # define OPCOD_L_MULU 0x3b // 11_1011 |
|---|
| 797 | |
|---|
| 798 | # define OPCOD_11 0x8 // 1000 // Instruction Shift/Rotate with register |
|---|
| 799 | # define OPCOD_12 0xc // 1100 // Instructions extend |
|---|
| 800 | # define OPCOD_13 0xd // 1101 // Instructions extend (64b) |
|---|
| 801 | |
|---|
| 802 | // OPCOD_4 instructions - [25:21] Instructions "set flag" with register |
|---|
| 803 | # define OPCOD_L_SFEQ 0x00 // 00000 |
|---|
| 804 | # define OPCOD_L_SFNE 0x01 // 00001 |
|---|
| 805 | # define OPCOD_L_SFGTU 0x02 // 00010 |
|---|
| 806 | # define OPCOD_L_SFGEU 0x03 // 00011 |
|---|
| 807 | # define OPCOD_L_SFLTU 0x04 // 00100 |
|---|
| 808 | # define OPCOD_L_SFLEU 0x05 // 00101 |
|---|
| 809 | # define OPCOD_L_SFGTS 0x0a // 01010 |
|---|
| 810 | # define OPCOD_L_SFGES 0x0b // 01011 |
|---|
| 811 | # define OPCOD_L_SFLTS 0x0c // 01100 |
|---|
| 812 | # define OPCOD_L_SFLES 0x0d // 01101 |
|---|
| 813 | |
|---|
| 814 | // OPCOD_5 instructions - [25:21] Instructions "set flag" with immediat |
|---|
| 815 | # define OPCOD_L_SFEQI 0x00 // 00000 |
|---|
| 816 | # define OPCOD_L_SFNEI 0x01 // 00001 |
|---|
| 817 | # define OPCOD_L_SFGTUI 0x02 // 00010 |
|---|
| 818 | # define OPCOD_L_SFGEUI 0x03 // 00011 |
|---|
| 819 | # define OPCOD_L_SFLTUI 0x04 // 00100 |
|---|
| 820 | # define OPCOD_L_SFLEUI 0x05 // 00101 |
|---|
| 821 | # define OPCOD_L_SFGTSI 0x0a // 01010 |
|---|
| 822 | # define OPCOD_L_SFGESI 0x0b // 01011 |
|---|
| 823 | # define OPCOD_L_SFLTSI 0x0c // 01100 |
|---|
| 824 | # define OPCOD_L_SFLESI 0x0d // 01101 |
|---|
| 825 | |
|---|
| 826 | // OPCOD_6 instructions - [7:6] Instruction Shift/Rotate with immediat |
|---|
| 827 | # define OPCOD_L_SLLI 0x0 // 00 |
|---|
| 828 | # define OPCOD_L_SRLI 0x1 // 01 |
|---|
| 829 | # define OPCOD_L_SRAI 0x2 // 10 |
|---|
| 830 | # define OPCOD_L_RORI 0x3 // 11 |
|---|
| 831 | |
|---|
| 832 | // OPCOD_7 instructions - [3:0] Instructions multiply with HI-LO |
|---|
| 833 | # define OPCOD_L_MAC 0x1 // 0001 |
|---|
| 834 | # define OPCOD_L_MSB 0x2 // 0010 |
|---|
| 835 | |
|---|
| 836 | // OPCOD_8 instructions - [17] Instructions acces at HI-LO |
|---|
| 837 | # define OPCOD_L_MOVHI 0x0 // 0 |
|---|
| 838 | # define OPCOD_L_MACRC 0x1 // 1 |
|---|
| 839 | |
|---|
| 840 | // OPCOD_9 instructions - [25:23] Instruction special |
|---|
| 841 | # define OPCOD_L_SYS 0x0 // 000 |
|---|
| 842 | # define OPCOD_L_TRAP 0x2 // 010 |
|---|
| 843 | # define OPCOD_L_MSYNC 0x4 // 100 |
|---|
| 844 | # define OPCOD_L_PSYNC 0x5 // 101 |
|---|
| 845 | # define OPCOD_L_CSYNC 0x6 // 110 |
|---|
| 846 | |
|---|
| 847 | // OPCOD_10 instructions - [25:24] Instruction no operation |
|---|
| 848 | # define OPCOD_L_NOP 0x1 // 01 |
|---|
| 849 | |
|---|
| 850 | // OPCOD_11 instructions - [7:6] Instruction Shift/Rotate with register |
|---|
| 851 | # define OPCOD_L_SLL 0x0 // 00 |
|---|
| 852 | # define OPCOD_L_SRL 0x1 // 01 |
|---|
| 853 | # define OPCOD_L_SRA 0x2 // 10 |
|---|
| 854 | # define OPCOD_L_ROR 0x3 // 11 |
|---|
| 855 | |
|---|
| 856 | // OPCOD_12 instructions - [9:6] Instructions extend |
|---|
| 857 | # define OPCOD_L_EXTHS 0x0 // 0000 |
|---|
| 858 | # define OPCOD_L_EXTHZ 0x2 // 0010 |
|---|
| 859 | # define OPCOD_L_EXTBS 0x1 // 0001 |
|---|
| 860 | # define OPCOD_L_EXTBZ 0x3 // 0011 |
|---|
| 861 | |
|---|
| 862 | // OPCOD_13 instructions - [9:6] Instructions extend (64b) |
|---|
| 863 | # define OPCOD_L_EXTWS 0x0 // 0000 |
|---|
| 864 | # define OPCOD_L_EXTWZ 0x1 // 0001 |
|---|
| 865 | |
|---|
| 866 | /* |
|---|
| 867 | |
|---|
| 868 | //--------------------------------------------------[ destination ]----- |
|---|
| 869 | #define _size_destination1 4 |
|---|
| 870 | |
|---|
| 871 | #define cst_DESTINATION1_NONE 0x0 |
|---|
| 872 | #define mask_DESTINATION1_GPR 0x1 |
|---|
| 873 | #define mask_DESTINATION1_MEMORY 0x2 |
|---|
| 874 | #define mask_DESTINATION1_SPR 0x4 |
|---|
| 875 | #define mask_DESTINATION1_MAC_UNIT 0x8 |
|---|
| 876 | |
|---|
| 877 | #define _size_destination2 3 |
|---|
| 878 | |
|---|
| 879 | #define cst_DESTINATION2_NONE 0x0 |
|---|
| 880 | #define mask_DESTINATION2_COMMIT 0x1 |
|---|
| 881 | #define mask_DESTINATION2_MEMORY 0x2 |
|---|
| 882 | #define mask_DESTINATION2_SPR 0x4 |
|---|
| 883 | |
|---|
| 884 | //----------------------------------------------------[ exec_flag ]----- |
|---|
| 885 | #define _size_exec_flag 2 |
|---|
| 886 | |
|---|
| 887 | #define mask_EXEC_FLAG_NONE 0x1 |
|---|
| 888 | #define mask_EXEC_FLAG_CARRY 0x1 |
|---|
| 889 | #define mask_EXEC_FLAG_FLAG 0x1 |
|---|
| 890 | #define mask_EXEC_FLAG_OVERFLOW 0x2 |
|---|
| 891 | |
|---|
| 892 | //---------------------------------------------------[ exec_excep ]----- |
|---|
| 893 | #define _size_exec_excep 1 |
|---|
| 894 | |
|---|
| 895 | #define mask_EXEC_EXCEP_NONE 0x0 |
|---|
| 896 | #define mask_EXEC_EXCEP_RANGE 0x1 |
|---|
| 897 | |
|---|
| 898 | //----------------------------------------------------[ Condition ]----- |
|---|
| 899 | #define _size_condition 3 |
|---|
| 900 | |
|---|
| 901 | #define cst_CONDITION_UNCONDITIONAL 0x0 // None condition (jump) |
|---|
| 902 | #define mask_CONDITION_CONDITIONAL 0x2 |
|---|
| 903 | #define mask_CONDITION_CONDITIONAL_NF 0x0 // Branch if Flag is clear |
|---|
| 904 | #define mask_CONDITION_CONDITIONAL_F 0x1 // Branch if Flag is set |
|---|
| 905 | #define mask_CONDITION_REG 0x4 // Branch if a register is read |
|---|
| 906 | #define mask_CONDITION_STACK 0x8 // Branch with pop in stack pointer |
|---|
| 907 | |
|---|
| 908 | */ |
|---|
| 909 | |
|---|
| 910 | /* |
|---|
| 911 | #define M_CPU_SIZE_INST 32 |
|---|
| 912 | |
|---|
| 913 | //---------------------------------------------------- |
|---|
| 914 | // Exception type |
|---|
| 915 | //---------------------------------------------------- |
|---|
| 916 | |
|---|
| 917 | #define M_CPU_LOG2_NB_EXCP 5 |
|---|
| 918 | #define M_CPU_NB_EXCP 32 |
|---|
| 919 | |
|---|
| 920 | #define EXCP_NO 0x00 // none exception |
|---|
| 921 | #define EXCP_RESET 0x01 // software or hardware reset |
|---|
| 922 | #define EXCP_BERR 0x02 // Access at a invalid physical adress |
|---|
| 923 | #define EXCP_D_PAGE 0x03 // No matching or page violation protection in pages tables |
|---|
| 924 | #define EXCP_I_PAGE 0x04 // No matching or page violation protection in pages tables |
|---|
| 925 | #define EXCP_TICK_TIMER 0x05 // Tick timer interruption |
|---|
| 926 | #define EXCP_ALIGNMENT 0x06 // Load/Store access is not aligned |
|---|
| 927 | #define EXCP_ILL_INST 0x07 // Instruction is illegal (no implemented) |
|---|
| 928 | #define EXCP_IRQ 0x08 // External interruption |
|---|
| 929 | #define EXCP_D_TLB 0x09 // DTLB miss |
|---|
| 930 | #define EXCP_I_TLB 0x0a // ITLB miss |
|---|
| 931 | #define EXCP_RANGE 0x0b // Overflow or access at a unimplemented register or context |
|---|
| 932 | #define EXCP_SYSCALL 0x0c // System Call |
|---|
| 933 | #define EXCP_FP 0x0d // Caused by a floating instruction |
|---|
| 934 | #define EXCP_TRAP 0x0e // L.trap or debug unit |
|---|
| 935 | #define EXCP_RES0 0x0f // Reserved for a futur usage |
|---|
| 936 | #define EXCP_RES1 0x10 // Reserved for a futur usage |
|---|
| 937 | #define EXCP_RES2 0x11 // Reserved for a futur usage |
|---|
| 938 | #define EXCP_RES3 0x12 // Reserved for a futur usage |
|---|
| 939 | #define EXCP_RES4 0x13 // Reserved for a futur usage |
|---|
| 940 | #define EXCP_RES5 0x14 // Reserved for a futur usage |
|---|
| 941 | #define EXCP_RES6 0x15 // Reserved for implemented specific exceptions |
|---|
| 942 | #define EXCP_RES7 0x16 // Reserved for implemented specific exceptions |
|---|
| 943 | #define EXCP_RES8 0x17 // Reserved for implemented specific exceptions |
|---|
| 944 | #define EXCP_RES9 0x18 // Reserved for implemented specific exceptions |
|---|
| 945 | #define EXCP_CUST0 0x19 // Reserved for custom exceptions |
|---|
| 946 | #define EXCP_CUST1 0x1a // Reserved for custom exceptions |
|---|
| 947 | #define EXCP_CUST2 0x1b // Reserved for custom exceptions |
|---|
| 948 | #define EXCP_CUST3 0x1c // Reserved for custom exceptions |
|---|
| 949 | #define EXCP_CUST4 0x1d // Reserved for custom exceptions |
|---|
| 950 | #define EXCP_CUST5 0x1e // Reserved for custom exceptions |
|---|
| 951 | #define EXCP_CUST6 0x1f // Reserved for custom exceptions |
|---|
| 952 | |
|---|
| 953 | //---------------------------------------------------- |
|---|
| 954 | // Flags |
|---|
| 955 | //---------------------------------------------------- |
|---|
| 956 | |
|---|
| 957 | #define M_CPU_NB_FLAG 3 |
|---|
| 958 | |
|---|
| 959 | // Integer flags |
|---|
| 960 | #define FLAG_F 0x1 // Conditionnal branch flag |
|---|
| 961 | #define FLAG_CY 0x2 // Carry was produced by last arithmétic operation |
|---|
| 962 | #define FLAG_OV 0x4 // Overflow occured during last arithmetic operation |
|---|
| 963 | |
|---|
| 964 | // Floating flags |
|---|
| 965 | #define FLAG_OVF 0x004 // Overflow occured during last arithmetic operation |
|---|
| 966 | #define FLAG_UNF 0x008 // Underflow flags |
|---|
| 967 | #define FLAG_SNF 0x010 // Result SNAN |
|---|
| 968 | #define FLAG_QNF 0x020 // Result QNAN |
|---|
| 969 | #define FLAG_ZF 0x040 // Result is nul |
|---|
| 970 | #define FLAG_IXF 0x080 // Result is inexact |
|---|
| 971 | #define FLAG_IVF 0x100 // Result is invalid |
|---|
| 972 | #define FLAG_INF 0x200 // Result is infinite |
|---|
| 973 | #define FLAG_DZF 0x400 // Division by zero |
|---|
| 974 | |
|---|
| 975 | // Position of flag in "rename register SR" (NOT IN "SR") |
|---|
| 976 | #define FLAG_POS_F 0x0 // Conditionnal branch flag |
|---|
| 977 | #define FLAG_POS_CY 0x1 // Carry was produced by last arithmétic operation |
|---|
| 978 | #define FLAG_POS_OV 0x0 // Overflow occured during last arithmetic operation |
|---|
| 979 | |
|---|
| 980 | //---------------------------------------------------- |
|---|
| 981 | // Instruction type |
|---|
| 982 | //---------------------------------------------------- |
|---|
| 983 | |
|---|
| 984 | #define M_CPU_LOG2_NB_TYPE 4 |
|---|
| 985 | |
|---|
| 986 | #define TYPE_NOP 0x0 |
|---|
| 987 | #define TYPE_ALU_F 0x1 // Instruction ALU with flag using (ADD, SUB, ADDC ...) |
|---|
| 988 | #define TYPE_ALU_NF 0x2 // Instruction ALU without flag using (AND, OR ...) |
|---|
| 989 | #define TYPE_MAC 0x3 // Instruction ALU with utilisation of register HI/LO |
|---|
| 990 | #define TYPE_J 0x4 // Branch instruction |
|---|
| 991 | #define TYPE_SPR_READ 0x5 // Instruction special : l.mfspr |
|---|
| 992 | #define TYPE_SPR_WRITE 0x6 // Instruction special : l.mtspr |
|---|
| 993 | #define TYPE_SPECIAL 0x7 // Instruction execute in decode stage |
|---|
| 994 | #define TYPE_CUSTOM 0x8 // Instruction Custom |
|---|
| 995 | |
|---|
| 996 | #define TYPE_LOAD_Z 0x9 // Load access (extended by zero) |
|---|
| 997 | #define TYPE_LOAD_S 0xa // Load access (sign extended) |
|---|
| 998 | #define TYPE_STORE 0xc // Store access |
|---|
| 999 | |
|---|
| 1000 | //---------------------------------------------------- |
|---|
| 1001 | // Condition to branch |
|---|
| 1002 | //---------------------------------------------------- |
|---|
| 1003 | |
|---|
| 1004 | #define M_CPU_LOG2_NB_COND 4 |
|---|
| 1005 | |
|---|
| 1006 | #define COND_NONE 0x0 // None condition (jump) |
|---|
| 1007 | #define COND_F 0x2 // Branch if Flag is set |
|---|
| 1008 | #define COND_NF 0x3 // Branch if Flag is clear |
|---|
| 1009 | #define COND_REG 0x4 // Branch if a register is read |
|---|
| 1010 | #define COND_STACK 0x8 // Branch with pop in stack pointer |
|---|
| 1011 | |
|---|
| 1012 | //---------------------------------------------------- |
|---|
| 1013 | // Event : State and Type |
|---|
| 1014 | //---------------------------------------------------- |
|---|
| 1015 | |
|---|
| 1016 | #define EVENT_STATE_NO_EVENT 0 // no event : current case |
|---|
| 1017 | #define EVENT_STATE_EVENT 1 // Have a event : make necessary to manage the event |
|---|
| 1018 | #define EVENT_STATE_WAITEND 2 // Wait end of manage event (restaure a good context) |
|---|
| 1019 | #define EVENT_STATE_END 3 // CPU can continue |
|---|
| 1020 | |
|---|
| 1021 | #define EVENT_TYPE_MISS 0 // miss of speculation |
|---|
| 1022 | #define EVENT_TYPE_EXCP 1 // exception or interruption occure |
|---|
| 1023 | |
|---|
| 1024 | // SPEC? TAKE? |
|---|
| 1025 | #define BRANCH_STATE_NONE 0 // 0 0 |
|---|
| 1026 | #define BRANCH_STATE_NSPEC_TAKE 1 // 0 1 -> incondionnal |
|---|
| 1027 | #define BRANCH_STATE_SPEC_NTAKE 2 // 1 0 |
|---|
| 1028 | #define BRANCH_STATE_SPEC_TAKE 3 // 1 1 |
|---|
| 1029 | |
|---|
| 1030 | //---------------------------------------------------- |
|---|
| 1031 | // Name to particular register |
|---|
| 1032 | //---------------------------------------------------- |
|---|
| 1033 | |
|---|
| 1034 | //~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|---|
| 1035 | // GENERAL PURPOSE REGISTER |
|---|
| 1036 | //~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|---|
| 1037 | #define M_CPU_LOG2_NB_GPR_LOG 5 |
|---|
| 1038 | #define M_CPU_NB_GPR_LOG (1<<M_CPU_LOG2_NB_GPR_LOG) |
|---|
| 1039 | |
|---|
| 1040 | #define GPR_LOG_LR 0x09 // Link register |
|---|
| 1041 | #define REG_PHY_SR 0x00 // Status register |
|---|
| 1042 | |
|---|
| 1043 | //~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|---|
| 1044 | // SPECIAL PURPOSE REGISTER |
|---|
| 1045 | //~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|---|
| 1046 | #define M_CPU_LOG2_NB_SPR_LOG 1 |
|---|
| 1047 | #define M_CPU_NB_SPR_LOG (1<<M_CPU_LOG2_NB_SPR_LOG) |
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| 1048 | #define M_CPU_SPR_SIZE_DATA 2 // Size of the most great register |
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| 1049 | |
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| 1050 | #define SPR_LOG_SR_F 0x00 // Status register bit F (size = 1) |
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| 1051 | #define SPR_LOG_SR_CY_OV 0x01 // Status register bit overflow and carry (size = 2) |
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| 1052 | //#define SPR_LOG_SR_LO 0x02 // MAC LSB (size = 32) |
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| 1053 | //#define SPR_LOG_SR_HI 0x03 // MAC MSB (size = 32) |
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| 1054 | */ |
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| 1055 | |
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| 1056 | /* |
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| 1057 | */ |
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| 1058 | |
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| 1059 | }; // end namespace behavioural |
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| 1060 | }; // end namespace morpheo |
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| 1061 | |
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| 1062 | #endif |
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