[29] | 1 | /* |
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| 2 | * $Id$ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/include/Interface.h" |
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| 9 | |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | |
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[40] | 14 | #ifdef VHDL |
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[29] | 15 | void Interface::set_port (Vhdl * & vhdl) |
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| 16 | { |
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[38] | 17 | log_printf(FUNC,Behavioural,"set_port (Vhdl)","Begin"); |
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[31] | 18 | if (not _list_signal->empty()) |
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[29] | 19 | { |
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[38] | 20 | list<Signal*>::iterator i = _list_signal->begin(); |
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[29] | 21 | |
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[31] | 22 | while (i != _list_signal->end()) |
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[29] | 23 | { |
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[38] | 24 | presence_port_t p = (*i)->_presence_port; |
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[29] | 25 | if ((p == PORT_VHDL_YES_TESTBENCH_YES) or |
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| 26 | (p == PORT_VHDL_YES_TESTBENCH_NO ) ) |
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[38] | 27 | vhdl->set_port ((*i)->_name,(*i)->_direction,(*i)->_size); |
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[29] | 28 | ++i; |
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| 29 | } |
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| 30 | } |
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[38] | 31 | log_printf(FUNC,Behavioural,"set_port (Vhdl)","End"); |
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[29] | 32 | }; |
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[40] | 33 | #endif |
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[29] | 34 | |
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[40] | 35 | #ifdef VHDL_TESTBENCH |
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[29] | 36 | void Interface::set_port (Vhdl_Testbench * & vhdl_testbench) |
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| 37 | { |
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[38] | 38 | log_printf(FUNC,Behavioural,"set_port (Testbench)","Begin"); |
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[31] | 39 | if (not _list_signal->empty()) |
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[29] | 40 | { |
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[38] | 41 | list<Signal*>::iterator i = _list_signal->begin(); |
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[29] | 42 | |
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[31] | 43 | while (i != _list_signal->end()) |
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[29] | 44 | { |
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[38] | 45 | presence_port_t p = (*i)->_presence_port; |
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[29] | 46 | if ((p == PORT_VHDL_YES_TESTBENCH_YES) or |
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| 47 | (p == PORT_VHDL_NO_TESTBENCH_YES ) ) |
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[38] | 48 | vhdl_testbench->set_port ((*i)->_name,(*i)->_direction,(*i)->_size); |
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[29] | 49 | ++i; |
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| 50 | } |
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| 51 | } |
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[38] | 52 | log_printf(FUNC,Behavioural,"set_port (Testbench)","End"); |
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[29] | 53 | }; |
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[40] | 54 | #endif |
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[29] | 55 | }; // end namespace behavioural |
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| 56 | }; // end namespace morpheo |
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