source:
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Graph
@
57
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| simulation_all.p | 770 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_all_perf.dat | 533 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_all_surface.dat | 533 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_performance.p | 765 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_performance_MT.dat | 533 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_performance_ST.dat | 533 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_ratio_performance_vs_surface.dat | 533 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_ratio_performance_vs_surface.p | 726 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_surface.p | 759 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_surface_MT.dat | 1.1 KB | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| simulation_surface_ST.dat | 1.1 KB | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| synthese_FPGA-registerfile.p | 876 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| synthese_FPGA-registerfile_1_bank.dat | 1.2 KB | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| synthese_FPGA-registerfile_2_bank.dat | 1.2 KB | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| synthese_FPGA-registerfile_4_bank.dat | 630 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| synthese_FPGA-registerfile_8_bank.dat | 630 bytes | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
| synthese_FPGA-registerfile_monolithic.dat | 1.3 KB | 57 | 17 years | * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - … | |
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