Changeset 100 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp

Timestamp:

Jan 8, 2009, 2:06:27 PM (15 years ago)

Author:

rosiere

Message:

1) Bug fix (Operation, Instruction)
2) Modif Return Address Stack
3) Add Soft Test
4) Add Soc Test

Location:

trunk

Files:

• . (modified) (1 prop)
• IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp (modified) (5 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp

@@ -48 +48 @@
           retire_val [i][j] = false;
       }
-
     for (uint32_t i=0; i<_param->_nb_front_end; ++i)
       for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
-        spr_write_val [i][j] = 0;
-
+        {
+          spr_write_val [i][j] = 0;
+          spr_write_sr_f_val  [i][j] = 0;
+          spr_write_sr_cy_val [i][j] = 0;
+          spr_write_sr_ov_val [i][j] = 0;
+
+        }
     // Scan Top of each bank
     for (uint32_t i=0; i<_param->_nb_bank; i++)
@@ -64 +68 @@
             uint32_t   x     = entry->rename_unit_id;
             uint32_t   y     = num_inst_retire [x];
-            
+        
+            // test if :
+            //  * can retire (all previous instruction is retired)
+            //  * all structure is ok (not busy)
             if (can_retire [x] and // in-order
                 (y < _param->_nb_inst_retire [x]) and
@@ -71 +78 @@
                 rob_state_t state = entry->state;
                 
-                if ((state == ROB_END_OK  ) or 
-                    (state == ROB_END_KO  ) or 
-                    (state == ROB_END_MISS)//  or 
+                if ((state == ROB_END_OK         ) or 
+                    (state == ROB_END_KO         ) or 
+                    (state == ROB_END_BRANCH_MISS) or 
+                    (state == ROB_END_MISS       )//  or 
 //                  (state == ROB_END_EXCEPTION)
                     )
@@ -85 +93 @@
                     bool spr_write_ack = true;
 
+                    // Write in SR the good flag
                     if ((state == ROB_END_OK  ) and write_re)
+                      // ROB_END_BRANCH_MISS is a valid branch instruction but don't modify RE
                       {
                         spr_write_ack = PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id]);
@@ -138 +148 @@
                     PORT_WRITE(out_RETIRE_CONTEXT_ID            [x][y], context_id                  );
 //                  PORT_WRITE(out_RETIRE_RENAME_UNIT_ID        [x][y], entry->rename_unit_id       );
-                    PORT_WRITE(out_RETIRE_EVENT_STATE           [x][y], entry->event_state          );
+                    PORT_WRITE(out_RETIRE_EVENT_STATE           [x][y], reg_EVENT_STATE[front_end_id][context_id]);
                     PORT_WRITE(out_RETIRE_USE_STORE_QUEUE       [x][y], entry->use_store_queue      );
                     PORT_WRITE(out_RETIRE_USE_LOAD_QUEUE        [x][y], entry->use_load_queue       );