Changeset 108 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp

Timestamp:

Feb 12, 2009, 12:55:06 PM (15 years ago)

Author:

rosiere

Message:

1) decod_queue : add reg_LAST_SLOT.
2) Commit : insert on event -> to pop decod_queue. Head test : add information (speculative or not)
3) Context State / UPT : Branch miss and Load miss in same cycle.
4) Free List : Bank is on LSB not MSB.
5) Platforms : move data

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp

@@ -28 +28 @@
     for (uint32_t i=0; i<_param->_nb_pop; i++)
       {
-        uint32_t offset = i*_param->_nb_bank_by_pop;
+        log_printf(TRACE,Free_List_unit,FUNCTION,"  * POP [%d]",i);
+
+        uint32_t offset = i*_param->_nb_bank_by_pop;
 
         // GPR
         bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]);
 
+        log_printf(TRACE,Free_List_unit,FUNCTION,"    * GPR_VAL : %d",PORT_READ(in_POP_GPR_VAL[i]));
+
         if (not gpr_ack)
           for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++)
             {
-              uint32_t bank = offset+((j+internal_BANK_PRIORITY)%_param->_nb_bank_by_pop);
+              uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop
+                                      );
+
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",bank);
               
               if (not _gpr_list[bank].empty())
                 {
                   // find
+                  log_printf(TRACE,Free_List_unit,FUNCTION,"    * find    : %d",_gpr_list[bank].front());
+
                   gpr_ack = true;
                   internal_POP_GPR_BANK [i] = bank;
                   PORT_WRITE(out_POP_GPR_NUM_REG [i],
-                             //(bank << _param->_shift) |
+                             //(bank << _param->_shift) | // only in VHDL
                              _gpr_list[bank].front());
                   
@@ -54 +63 @@
         bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]);
 
+        log_printf(TRACE,Free_List_unit,FUNCTION,"    * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i]));
+
         if (not spr_ack)
           for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++)
             {
-              uint32_t bank = offset+((j+internal_BANK_PRIORITY)%_param->_nb_bank_by_pop);
+              uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop
+                                      );
+
+              log_printf(TRACE,Free_List_unit,FUNCTION,"    * bank    : %d",bank);
               
               if (not _spr_list[bank].empty())
                 {
                   // find
+                  log_printf(TRACE,Free_List_unit,FUNCTION,"    * find    : %d",_spr_list[bank].front());
+
                   spr_ack = true;
                   internal_POP_SPR_BANK [i] = bank;
                   PORT_WRITE(out_POP_SPR_NUM_REG [i],
-                             //(bank << _param->_shift) |
+                             //(bank << _param->_shift) | // only in VHDL
                              _spr_list[bank].front());