Changeset 110 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src
- Timestamp:
- Feb 19, 2009, 5:31:47 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp
r104 r110 7 7 8 8 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h" 9 #include "Behavioural/include/Simulation.h" 9 10 10 11 namespace morpheo { … … 260 261 261 262 #endif 263 264 // Init stop condition 265 while (_simulation_nb_instruction_commited.size() < _param->_nb_thread) 266 _simulation_nb_instruction_commited.push_back(0); 262 267 } 263 268 log_end(Commit_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp
r105 r110 57 57 } 58 58 // Scan Top of each bank 59 internal_BANK_RETIRE_HEAD = reg_NUM_BANK_HEAD; 59 60 for (uint32_t i=0; i<_param->_nb_bank; i++) 60 61 { 61 uint32_t num_bank = ( reg_NUM_BANK_HEAD+i)%_param->_nb_bank;62 uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank; 62 63 63 64 if (not _rob[num_bank].empty()) … … 167 168 PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD [x][y], entry->num_reg_re_phy_old ); 168 169 PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW [x][y], entry->num_reg_re_phy_new ); 170 171 // Event -> rob must be manage this event 172 if ((state == ROB_END_BRANCH_MISS) or 173 (state == ROB_END_LOAD_MISS)) 174 can_retire [x] = false; 169 175 } 170 176 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp
r109 r110 28 28 29 29 _stat_nb_inst_insert = new counter_t * [_param->_nb_rename_unit]; 30 _stat_nb_inst_retire_ok = new counter_t * [_param->_nb_rename_unit]; 31 _stat_nb_inst_retire_ko = new counter_t * [_param->_nb_rename_unit]; 30 _stat_nb_inst_retire = new counter_t * [_param->_nb_rename_unit]; 31 _stat_nb_inst_retire_ok = new counter_t * [_param->_nb_thread]; 32 _stat_nb_inst_retire_ko = new counter_t * [_param->_nb_thread]; 33 _stat_nb_inst_type = new counter_t * [_param->_nb_type]; 32 34 _stat_bank_nb_inst = new counter_t * [_param->_nb_bank]; 33 35 34 36 { 35 37 std::string sum_nb_inst_insert = "0"; 36 std::string sum_nb_inst_retire_ok = "0"; 37 std::string sum_nb_inst_retire_ko = "0"; 38 std::string sum_nb_inst_retire = "0"; 38 39 39 40 for (uint32_t i=0; i<_param->_nb_rename_unit; i++) 40 41 { 41 42 _stat_nb_inst_insert [i] = _stat->create_variable("nb_inst_insert_" +toString(i)); 42 _stat_nb_inst_retire_ok [i] = _stat->create_variable("nb_inst_retire_ok_"+toString(i)); 43 _stat_nb_inst_retire_ko [i] = _stat->create_variable("nb_inst_retire_ko_"+toString(i)); 43 _stat_nb_inst_retire [i] = _stat->create_variable("nb_inst_retire_" +toString(i)); 44 44 45 45 _stat->create_expr_average_by_cycle("average_use_interface_insert_"+toString(i), "nb_inst_insert_"+toString(i), "", toString(_("Average instruction by cycle on insert interface (rename_unit %d)"),i)); 46 _stat->create_expr_average_by_cycle("average_use_interface_retire_"+toString(i), " + nb_inst_retire_ok_"+toString(i)+" nb_inst_retire_ko_"+toString(i), "", toString(_("Average instruction by cycle on retire interface (rename_unit %d)"),i));46 _stat->create_expr_average_by_cycle("average_use_interface_retire_"+toString(i), "nb_inst_retire_"+toString(i), "", toString(_("Average instruction by cycle on retire interface (rename_unit %d)"),i)); 47 47 _stat->create_expr_percent ("percent_use_interface_insert_"+toString(i) , "average_use_interface_insert_"+toString(i), toString(_param->_nb_inst_insert [i]), toString(_("Percent usage of insert interface (rename_unit %d)"),i)); 48 48 _stat->create_expr_percent ("percent_use_interface_retire_"+toString(i) , "average_use_interface_retire_"+toString(i), toString(_param->_nb_inst_retire [i]), toString(_("Percent usage of retire interface (rename_unit %d)"),i)); 49 49 50 50 sum_nb_inst_insert = "+ nb_inst_insert_"+ toString(i) + " " +sum_nb_inst_insert; 51 sum_nb_inst_retire_ok = "+ nb_inst_retire_ok_"+toString(i) + " " +sum_nb_inst_retire_ok; 52 sum_nb_inst_retire_ko = "+ nb_inst_retire_ko_"+toString(i) + " " +sum_nb_inst_retire_ko; 53 } 51 sum_nb_inst_retire = "+ nb_inst_retire_"+ toString(i) + " " +sum_nb_inst_retire; 52 } 54 53 55 54 _stat->create_expr_average_by_cycle("average_inst_insert" , sum_nb_inst_insert , "", _("Average instruction insert by cycle")); 56 _stat->create_expr_average_by_cycle("average_inst_retire_ok", sum_nb_inst_retire_ok, "", _("Average instruction retire ok by cycle (IPC)")); 57 _stat->create_expr_average_by_cycle("average_inst_retire_ko", sum_nb_inst_retire_ko, "", _("Average instruction retire ko (event, miss) by cycle")); 58 _stat->create_expr_average_by_cycle("average_inst_retire" , "+ "+sum_nb_inst_retire_ok+" "+sum_nb_inst_retire_ko, "", _("Average instruction retire by cycle")); 55 _stat->create_expr_average_by_cycle("average_inst_retire" , sum_nb_inst_retire , "", _("Average instruction retire by cycle")); 56 } 59 57 60 _stat->create_expr ("IPC_ok" , "average_inst_retire_ok", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)"); 58 { 59 std::string sum_nb_inst_retire_ok = "0"; 60 std::string sum_nb_inst_retire_ko = "0"; 61 62 for (uint32_t i=0; i<_param->_nb_thread; i++) 63 if (_param->_have_thread [i]) 64 { 65 _stat_nb_inst_retire_ok [i] = _stat->create_variable("nb_inst_retire_ok_"+toString(i)); 66 _stat_nb_inst_retire_ko [i] = _stat->create_variable("nb_inst_retire_ko_"+toString(i)); 67 68 sum_nb_inst_retire_ok = "+ nb_inst_retire_ok_"+toString(i) + " " +sum_nb_inst_retire_ok; 69 sum_nb_inst_retire_ko = "+ nb_inst_retire_ko_"+toString(i) + " " +sum_nb_inst_retire_ko; 70 71 _stat->create_expr_average_by_cycle("average_inst_retire_ok_"+toString(i), sum_nb_inst_retire_ok, "", toString(_("Average instruction retire ok by cycle (IPC) (thread %d)"),i)); 72 _stat->create_expr_average_by_cycle("average_inst_retire_ko_"+toString(i), sum_nb_inst_retire_ko, "", toString(_("Average instruction retire ko (event, miss) by cycle (thread %d)"),i)); 73 74 _stat->create_expr ("IPC_ok_"+toString(i) , "average_inst_retire_ok_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ok) (thread %d)",i)); 75 _stat->create_expr ("CPI_ok_"+toString(i) , "/ 1 IPC_ok_"+toString(i) , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ok) (thread %d)",i)); 76 77 _stat->create_expr ("IPC_ko_"+toString(i) , "average_inst_retire_ko_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ko) (thread %d)",i)); 78 _stat->create_expr ("CPI_ko_"+toString(i) , "/ 1 IPC_ko_"+toString(i) , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ko) (thread %d)",i)); 79 80 _stat->create_expr ("IPC_all_"+toString(i), "+ IPC_ok_"+toString(i)+" IPC_ko_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ok and Ko) (thread %d)",i)); 81 _stat->create_expr ("CPI_all_"+toString(i), "/ 1 IPC_all_"+toString(i) , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ok and Ko) (thread %d)",i)); 82 } 83 84 _stat->create_expr ("IPC_ok" , "/ "+sum_nb_inst_retire_ok+" cycle", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)"); 61 85 _stat->create_expr ("CPI_ok" , "/ 1 IPC_ok" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok)"); 62 86 63 _stat->create_expr ("IPC_ko" , " average_inst_retire_ko", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ko)");87 _stat->create_expr ("IPC_ko" , "/ "+sum_nb_inst_retire_ko+" cycle", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ko)"); 64 88 _stat->create_expr ("CPI_ko" , "/ 1 IPC_ko" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ko)"); 65 89 66 _stat->create_expr ("IPC_all", " average_inst_retire", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok and Ko)");90 _stat->create_expr ("IPC_all", "+ IPC_ok IPC_ko" , TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok and Ko)"); 67 91 _stat->create_expr ("CPI_all", "/ 1 IPC_all" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok and Ko)"); 68 92 } 93 94 { 95 std::string sum_nb_inst_type = "0"; 96 97 for (uint32_t i=0; i<_param->_nb_type; i++) 98 if (is_type_valid(i)) 99 { 100 _stat_nb_inst_type [i] = _stat->create_variable("nb_inst_type_"+toString(i)); 101 102 sum_nb_inst_type = "+ nb_inst_type_"+toString(i) + " " +sum_nb_inst_type; 103 } 104 105 for (uint32_t i=0; i<_param->_nb_type; i++) 106 if (is_type_valid(i)) 107 { 108 std::string name = toString(static_cast<type_t>(i)).c_str(); 109 // _stat->create_expr_average_by_cycle("average_inst_type_"+toString(name), "nb_inst_type_"+toString(i), "", toString(_("Average instruction retire ok by cycle (type %s)"),name.c_str())); 110 _stat->create_expr_percent ("percent_inst_type_"+toString(name), "nb_inst_type_"+toString(i), sum_nb_inst_type, toString(_("Percent instruction retire ok by cycle (type %s)"),name.c_str())); 111 } 112 } 113 69 114 70 115 _stat_nb_inst_commit = _stat->create_variable("nb_inst_commit"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp
r98 r110 28 28 29 29 delete [] _stat_nb_inst_insert; 30 delete [] _stat_nb_inst_retire; 30 31 delete [] _stat_nb_inst_retire_ok; 31 32 delete [] _stat_nb_inst_retire_ko; 33 delete [] _stat_nb_inst_type; 32 34 delete [] _stat_bank_nb_inst; 33 35 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r109 r110 8 8 9 9 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h" 10 #include "Behavioural/include/Simulation.h" 10 11 11 12 namespace morpheo { … … 114 115 { 115 116 log_printf(TRACE,Commit_unit,FUNCTION," * INSERT [%d][%d]",x,y); 116 117 #ifdef STATISTICS118 if (usage_is_set(_usage,USE_STATISTICS))119 (*_stat_nb_inst_insert [x]) ++;120 #endif121 117 122 118 // get information … … 219 215 } 220 216 } 217 218 #ifdef STATISTICS 219 if (usage_is_set(_usage,USE_STATISTICS)) 220 (*_stat_nb_inst_insert [x]) ++; 221 #endif 221 222 222 223 // Push in rob … … 346 347 // =================================================================== 347 348 for (uint32_t i=0; i<_param->_nb_bank; i++) 348 if (internal_BANK_RETIRE_VAL [i]) 349 { 350 uint32_t x = internal_BANK_RETIRE_NUM_RENAME_UNIT [i]; 351 uint32_t y = internal_BANK_RETIRE_NUM_INST [i]; 352 353 log_printf(TRACE,Commit_unit,FUNCTION," * RETIRE [%d][%d]",x,y); 354 349 { 350 uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank; 351 352 if (internal_BANK_RETIRE_VAL [num_bank]) 353 { 354 uint32_t x = internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank]; 355 uint32_t y = internal_BANK_RETIRE_NUM_INST [num_bank]; 356 357 log_printf(TRACE,Commit_unit,FUNCTION," * RETIRE [%d][%d]",x,y); 358 355 359 #ifdef DEBUG_TEST 356 if (not PORT_READ(in_RETIRE_ACK [x][y])) 357 throw ERRORMORPHEO(FUNCTION,_("Retire : retire_ack must be set.\n")); 358 #endif 359 360 entry_t * entry = _rob [i].front(); 361 rob_state_t state = entry->state; 362 363 #ifdef STATISTICS 364 if (usage_is_set(_usage,USE_STATISTICS)) 365 { 366 if (state == ROB_END_OK) 367 (*_stat_nb_inst_retire_ok [x]) ++; 368 else 369 (*_stat_nb_inst_retire_ko [x]) ++; 370 } 371 #endif 372 373 Tcontext_t front_end_id = entry->front_end_id; 374 Tcontext_t context_id = entry->context_id ; 375 Ttype_t type = entry->type ; 376 377 if ((state == ROB_END_OK ) or 378 // (state == ROB_END_KO ) or 379 (state == ROB_END_BRANCH_MISS) or 380 (state == ROB_END_LOAD_MISS )// or 381 // (state == ROB_END_MISS ) or 382 // (state == ROB_END_EXCEPTION ) 383 ) 384 { 385 // reg_PC_PREVIOUS [front_end_id][context_id] = reg_PC_CURRENT [front_end_id][context_id]; 386 reg_PC_CURRENT [front_end_id][context_id] = reg_PC_NEXT [front_end_id][context_id]; 387 reg_PC_CURRENT_IS_DS [front_end_id][context_id] = entry->type == TYPE_BRANCH; 388 reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id] = entry->no_sequence; 389 reg_PC_NEXT [front_end_id][context_id] = (entry->no_sequence)?(entry->address_next):(reg_PC_CURRENT [front_end_id][context_id]+1); 360 if (not PORT_READ(in_RETIRE_ACK [x][y])) 361 throw ERRORMORPHEO(FUNCTION,_("Retire : retire_ack must be set.\n")); 362 #endif 363 364 entry_t * entry = _rob [num_bank].front(); 365 rob_state_t state = entry->state; 366 367 Tcontext_t front_end_id = entry->front_end_id; 368 Tcontext_t context_id = entry->context_id ; 369 uint32_t num_thread = _param->_translate_num_context_to_num_thread [front_end_id][context_id]; 370 Ttype_t type = entry->type ; 371 bool retire_ok = false; 372 373 log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id ); 374 log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id ); 375 log_printf(TRACE,Commit_unit,FUNCTION," * num_thread : %d",num_thread ); 376 log_printf(TRACE,Commit_unit,FUNCTION," * type : %s",toString(type).c_str()); 377 log_printf(TRACE,Commit_unit,FUNCTION," * state : %s",toString(state).c_str()); 378 379 if ((state == ROB_END_OK ) or 380 // (state == ROB_END_KO ) or 381 (state == ROB_END_BRANCH_MISS) or 382 (state == ROB_END_LOAD_MISS )// or 383 // (state == ROB_END_MISS ) or 384 // (state == ROB_END_EXCEPTION ) 385 ) 386 { 387 log_printf(TRACE,Commit_unit,FUNCTION," * retire_ok"); 388 389 retire_ok = true; 390 391 // reg_PC_PREVIOUS [front_end_id][context_id] = reg_PC_CURRENT [front_end_id][context_id]; 392 reg_PC_CURRENT [front_end_id][context_id] = reg_PC_NEXT [front_end_id][context_id]; 393 reg_PC_CURRENT_IS_DS [front_end_id][context_id] = entry->type == TYPE_BRANCH; 394 reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id] = entry->no_sequence; 395 reg_PC_NEXT [front_end_id][context_id] = (entry->no_sequence)?(entry->address_next):(reg_PC_CURRENT [front_end_id][context_id]+1); 390 396 391 397 // if (entry->address_next != reg_PC_NEXT [front_end_id][context_id]) 392 398 // throw ERRORMORPHEO(FUNCTION,toString(_("Retire : Instruction's address_next (%.8x) is different of commit_unit's address_next (%.8x)"),entry->address_next,reg_PC_NEXT [front_end_id][context_id])); 393 } 394 395 if ((state == ROB_END_BRANCH_MISS) or 396 (state == ROB_END_LOAD_MISS)) 397 { 398 reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT; 399 reg_EVENT_FLUSH [front_end_id][context_id] = true; 400 } 401 402 // Update nb_inst 403 reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --; 404 if (type == TYPE_MEMORY) 405 reg_NB_INST_COMMIT_MEM [front_end_id][context_id] --; 406 407 reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; 408 409 _rob [i].pop_front(); 410 delete entry; 411 412 // Transaction on retire interface : reset watch dog timer. 413 _nb_cycle_idle [front_end_id][context_id] = 0; 414 } 399 } 400 401 if ((state == ROB_END_BRANCH_MISS) or 402 (state == ROB_END_LOAD_MISS)) 403 { 404 reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT; 405 reg_EVENT_FLUSH [front_end_id][context_id] = true; 406 } 407 408 // Update nb_inst 409 reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --; 410 if (type == TYPE_MEMORY) 411 reg_NB_INST_COMMIT_MEM [front_end_id][context_id] --; 412 413 reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; 414 415 _rob [num_bank].pop_front(); 416 delete entry; 417 418 // Transaction on retire interface : reset watch dog timer. 419 _nb_cycle_idle [front_end_id][context_id] = 0; 420 421 // Increase stop condition 422 if (retire_ok) 423 _simulation_nb_instruction_commited [num_thread] ++; 424 425 #ifdef STATISTICS 426 if (usage_is_set(_usage,USE_STATISTICS)) 427 { 428 (*_stat_nb_inst_retire [x]) ++; 429 430 if (retire_ok) 431 { 432 (*_stat_nb_inst_retire_ok [num_thread]) ++; 433 (*_stat_nb_inst_type [type] ) ++; 434 } 435 else 436 (*_stat_nb_inst_retire_ko [num_thread]) ++; 437 } 438 #endif 439 } 440 } 415 441 416 442 // =================================================================== … … 652 678 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 653 679 { 654 log_printf(TRACE,Commit_unit,FUNCTION," * [%d][%d] ",i,j);680 log_printf(TRACE,Commit_unit,FUNCTION," * [%d][%d] - %d",i,j,_param->_translate_num_context_to_num_thread [i][j]); 655 681 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_STATE : %s",toString(reg_EVENT_STATE [i][j]).c_str()); 656 682 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_FLUSH : %d",reg_EVENT_FLUSH [i][j]); … … 667 693 log_printf(TRACE,Commit_unit,FUNCTION," * Bank [%d] size : %d, ptr : %d",num_bank,(int)_rob[num_bank].size(), reg_BANK_PTR [i]); 668 694 669 uint32_t x=0;670 695 for (std::list<entry_t*>::iterator it=_rob[num_bank].begin(); 671 696 it!=_rob[num_bank].end(); 672 697 it++) 673 698 { 674 log_printf(TRACE,Commit_unit,FUNCTION," [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s - %d", 675 x, 699 log_printf(TRACE,Commit_unit,FUNCTION," [%.4d][%.4d] (%.4d) %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s", 700 num_bank , 701 (*it)->ptr , 702 ((num_bank << _param->_shift_num_bank) | (*it)->ptr), 676 703 (*it)->front_end_id , 677 704 (*it)->context_id , … … 685 712 (*it)->use_load_queue , 686 713 (*it)->load_queue_ptr_write , 687 toString((*it)->state).c_str() , 688 (*it)->ptr ); 689 log_printf(TRACE,Commit_unit,FUNCTION," %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ", 714 toString((*it)->state).c_str() ); 715 log_printf(TRACE,Commit_unit,FUNCTION," %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ", 690 716 (*it)->read_ra , 691 717 (*it)->num_reg_ra_log , … … 706 732 (*it)->num_reg_re_phy_new ); 707 733 708 log_printf(TRACE,Commit_unit,FUNCTION," %.2d %.2d %.1d %.1d %.1d - %.8x (%.8x) %.8x (%.8x)",734 log_printf(TRACE,Commit_unit,FUNCTION," %.2d %.2d %.1d %.1d %.1d - %.8x (%.8x) %.8x (%.8x)", 709 735 (*it)->exception_use , 710 736 (*it)->exception , … … 717 743 (*it)->address_next<<2 718 744 ); 719 720 x++;721 745 } 722 746 } … … 772 796 for (uint32_t i=0; i<_param->_nb_front_end; i++) 773 797 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 774 if (_nb_cycle_idle [i][j] >= debug_ cycle_idle)775 throw ERRORMORPHEO(FUNCTION,toString(_(" Context [%d][%d] is idle since %.0f cycles.\n"),i,j,_nb_cycle_idle [i][j]));798 if (_nb_cycle_idle [i][j] >= debug_idle_cycle) 799 throw ERRORMORPHEO(FUNCTION,toString(_("Thread [%d] is idle since %.0f cycles.\n"),_param->_translate_num_context_to_num_thread[i][j],_nb_cycle_idle [i][j])); 776 800 777 801 log_end(Commit_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp
r108 r110 7 7 8 8 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h" 9 #include "Behavioural/include/Allocation.h" 9 10 #include "Common/include/Max.h" 10 11 #include "Common/include/BitManipulation.h" … … 20 21 #undef FUNCTION 21 22 #define FUNCTION "Commit_unit::Parameters" 22 Parameters::Parameters (uint32_t nb_front_end , 23 uint32_t * nb_context , 24 uint32_t nb_rename_unit , 25 uint32_t size_queue , 26 uint32_t nb_bank , 27 uint32_t * nb_inst_insert , 28 uint32_t * nb_inst_retire , 29 uint32_t nb_inst_commit , 30 uint32_t nb_inst_reexecute , 31 uint32_t nb_inst_branch_complete , 32 uint32_t ** nb_branch_speculated , 33 uint32_t size_nb_inst_decod , 34 uint32_t size_general_data , 35 uint32_t size_store_queue_ptr , 36 uint32_t size_load_queue_ptr , 37 uint32_t size_general_register , 38 uint32_t size_special_register , 39 Tpriority_t priority , 40 Tload_balancing_t load_balancing , 41 uint32_t nb_rename_unit_select , 23 Parameters::Parameters (uint32_t nb_front_end , 24 uint32_t * nb_context , 25 uint32_t nb_rename_unit , 26 uint32_t size_queue , 27 uint32_t nb_bank , 28 uint32_t * nb_inst_insert , 29 uint32_t * nb_inst_retire , 30 uint32_t nb_inst_commit , 31 uint32_t nb_inst_reexecute , 32 uint32_t nb_inst_branch_complete , 33 uint32_t ** nb_branch_speculated , 34 uint32_t size_nb_inst_decod , 35 uint32_t size_general_data , 36 uint32_t size_store_queue_ptr , 37 uint32_t size_load_queue_ptr , 38 uint32_t size_general_register , 39 uint32_t size_special_register , 40 Tpriority_t priority , 41 Tload_balancing_t load_balancing , 42 uint32_t nb_rename_unit_select , 43 uint32_t nb_thread , 44 uint32_t ** translate_num_context_to_num_thread, 42 45 bool is_toplevel): 43 46 _nb_bank_access_commit (1 ), … … 46 49 log_begin(Commit_unit,FUNCTION); 47 50 48 _nb_front_end = nb_front_end ; 49 _nb_context = nb_context ; 50 _nb_rename_unit = nb_rename_unit ; 51 _size_queue = size_queue ; 52 _nb_bank = nb_bank ; 53 _nb_inst_insert = nb_inst_insert ; 54 _nb_inst_retire = nb_inst_retire ; 55 _nb_inst_commit = nb_inst_commit ; 56 _nb_inst_reexecute = nb_inst_reexecute ; 57 _nb_inst_branch_complete = nb_inst_branch_complete; 58 _nb_branch_speculated = nb_branch_speculated ; 59 _priority = priority ; 60 _load_balancing = load_balancing ; 61 _nb_rename_unit_select = nb_rename_unit_select ; 51 _nb_front_end = nb_front_end ; 52 _nb_context = nb_context ; 53 _nb_rename_unit = nb_rename_unit ; 54 _size_queue = size_queue ; 55 _nb_bank = nb_bank ; 56 _nb_inst_insert = nb_inst_insert ; 57 _nb_inst_retire = nb_inst_retire ; 58 _nb_inst_commit = nb_inst_commit ; 59 _nb_inst_reexecute = nb_inst_reexecute ; 60 _nb_inst_branch_complete = nb_inst_branch_complete ; 61 _nb_branch_speculated = nb_branch_speculated ; 62 _priority = priority ; 63 _load_balancing = load_balancing ; 64 _nb_rename_unit_select = nb_rename_unit_select ; 65 _nb_thread = nb_thread ; 66 _translate_num_context_to_num_thread = translate_num_context_to_num_thread; 62 67 63 68 _size_rename_unit_id = log2(_nb_rename_unit); … … 71 76 _have_port_rename_unit_id = _size_rename_unit_id > 0; 72 77 73 _array_size_depth = new uint32_t * [_nb_front_end];78 ALLOC2(_array_size_depth,uint32_t,_nb_front_end,_nb_context [it1]); 74 79 for (uint32_t i=0; i<_nb_front_end; i++) 75 { 76 _array_size_depth [i] = new uint32_t [_nb_context [i]]; 77 for (uint32_t j=0; j<_nb_context [i]; j++) 78 _array_size_depth [i][j] = (_nb_branch_speculated [i][j] == 0)?0:log2(_nb_branch_speculated [i][j]); 79 } 80 for (uint32_t j=0; j<_nb_context [i]; j++) 81 _array_size_depth [i][j] = (_nb_branch_speculated [i][j] == 0)?0:log2(_nb_branch_speculated [i][j]); 80 82 81 83 test(); 84 85 ALLOC1(_have_thread,bool,_nb_thread); 86 for (uint32_t i=0; i<_nb_thread; i++) 87 _have_thread[i] = false; 88 for (uint32_t i=0; i<_nb_front_end; i++) 89 for (uint32_t j=0; j<_nb_context [i]; j++) 90 _have_thread[_translate_num_context_to_num_thread [i][j]] = true; 82 91 83 92 if (is_toplevel) … … 123 132 log_begin(Commit_unit,FUNCTION); 124 133 125 for (uint32_t i=0; i<_nb_front_end; i++) 126 { 127 delete [] _array_size_depth [i]; 128 } 129 delete [] _array_size_depth; 134 DELETE1(_have_thread ,_nb_thread); 135 DELETE2(_array_size_depth,_nb_front_end,_nb_context [it1]); 130 136 131 137 log_end(Commit_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_msg_error.cpp
r88 r110 35 35 36 36 if (_nb_rename_unit_select > _nb_rename_unit) 37 test.error( "nb_rename_unit must be >= nb_rename_unit_select.\n");37 test.error(_("nb_rename_unit must be >= nb_rename_unit_select.\n")); 38 38 39 39 if (not is_multiple(_size_queue, _nb_bank)) 40 test.error( "nb_bank must be a multiple of size_queue.\n");40 test.error(_("nb_bank must be a multiple of size_queue.\n")); 41 41 42 42 if (_nb_inst_reexecute != 1) 43 test.error("nb_inst_reexecute must be set at 1. Anothers value is unsupported.\n"); 43 test.error(_("nb_inst_reexecute must be set at 1. Anothers value is unsupported.\n")); 44 45 for (uint32_t i=0; i<_nb_front_end; ++i) 46 for (uint32_t j=0; j<_nb_context[i]; ++j) 47 if (_translate_num_context_to_num_thread [i][j] >= _nb_thread) 48 test.error(toString(_("num_thread [%d][%d] (%d) is >= at nb_thread (%d).\n"),i,j,_translate_num_context_to_num_thread [i][j],_nb_thread)); 49 50 for (uint32_t i=0; i<_nb_front_end; ++i) 51 for (uint32_t j=0; j<_nb_context[i]-1; ++j) 52 for (uint32_t x=i; x<_nb_front_end; ++x) 53 for (uint32_t y=j+1; y<_nb_context[i]; ++y) 54 if (_translate_num_context_to_num_thread [i][j] == _translate_num_context_to_num_thread [x][y]) 55 test.error(toString(_("To context [%d][%d] and [%d][%d], num_thread is the same (%d).\n"),i,j,x,y,_translate_num_context_to_num_thread [i][j])); 56 44 57 45 58 if (_size_queue == 1) 46 test.information ( "Instructions are issued In-Order.\n");59 test.information (_("Instructions are issued In-Order.\n")); 47 60 else 48 test.information ( "Instructions are issued Out-Of-Order.\n");61 test.information (_("Instructions are issued Out-Of-Order.\n")); 49 62 50 63 log_end(Commit_unit,FUNCTION);
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