Changeset 111 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp

Timestamp:

Feb 27, 2009, 7:37:40 PM (15 years ago)

Author:

rosiere

Message:

1) Decod_queue : multi implementation (one_fifo, multi_fifo)
2) Issue_queue : multi implementation (in_order, out_of_order)
3) Direction : Add Meta predictor
4) Context_State : re add Branch_complete, More priority to Load miss (is not speculative)
5) Return_Address_Stack : update reg_PREDICT pointer on decod miss prediction
6) UPT : Fix bug in multi event
7) Prediction_glue : in read_stack case, insert in UPT pc_next
8) Rename select : when rob have an event (need flush), read_r{a,b,c} and write_r{d,e} is set at 0

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp

@@ -33 +33 @@
         Tcontrol_t val              = ((state == CONTEXT_STATE_KO_EXCEP_ADDR      ) or
                                        (state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or
-                                       (state == CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR) or
+                                       (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR) or
                                        (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR  ) or
                                        (state == CONTEXT_STATE_KO_PSYNC_ADDR      ) or 
@@ -54 +54 @@
           {
           case CONTEXT_STATE_KO_EXCEP_ADDR      : (type = EVENT_TYPE_EXCEPTION              ); break;
-          case CONTEXT_STATE_KO_MISS_BRANCH_AND_LOAD_ADDR: 
+          case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR: 
           case CONTEXT_STATE_KO_MISS_BRANCH_ADDR: (type = EVENT_TYPE_BRANCH_MISS_SPECULATION); break;
           case CONTEXT_STATE_KO_MISS_LOAD_ADDR  : (type = EVENT_TYPE_LOAD_MISS_SPECULATION  ); break;