Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp

    r82 r113  
    270270            load_queue_use  [i] = false;
    271271
    272           double             current_cycle = sc_simulation_time();
     272          double             current_cycle = simulation_cycle();
    273273          double             cycle_min     = current_cycle;
    274274
     
    451451              in_MEMORY_IN_VAL ->write((not fifo_request.empty()) and
    452452                                       can_execute                and
    453                                        (sc_simulation_time() >= fifo_request.top()._cycle));
     453                                       (simulation_cycle() >= fifo_request.top()._cycle));
    454454
    455455              if (_param->_have_port_context_id)
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