Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit
Files:
8 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.defs

    r81 r113  
    77#
    88
     9ENTITY                          = Address_management
     10
    911#-----[ Directory ]----------------------------------------
    1012DIR_COMPONENT_MORPHEO           = ../../../../../..

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp

    r112 r113  
    5050  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);         
    5151  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
     52
     53  sc_signal<Tcontrol_t        >    * out_ADDRESS_VAL                         ;
     54  sc_signal<Tcontrol_t        >    *  in_ADDRESS_ACK                         ; //icache_req_ack and ifetch_queue_ack
     55  sc_signal<Tgeneral_address_t>    * out_ADDRESS_INSTRUCTION_ADDRESS         ;
     56  sc_signal<Tcontrol_t        >   ** out_ADDRESS_INSTRUCTION_ENABLE          ; //[nb_instruction]
     57  sc_signal<Tinst_ifetch_ptr_t>    * out_ADDRESS_INST_IFETCH_PTR             ;
     58  sc_signal<Tbranch_state_t   >    * out_ADDRESS_BRANCH_STATE                ;
     59  sc_signal<Tprediction_ptr_t >    * out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ;
     60  sc_signal<Tcontrol_t        >    * out_PREDICT_VAL                         ;
     61  sc_signal<Tcontrol_t        >    *  in_PREDICT_ACK                         ;
     62  sc_signal<Tgeneral_address_t>    * out_PREDICT_PC_PREVIOUS                 ;
     63  sc_signal<Tgeneral_address_t>    * out_PREDICT_PC_CURRENT                  ;
     64  sc_signal<Tcontrol_t        >    * out_PREDICT_PC_CURRENT_IS_DS_TAKE       ;
     65  sc_signal<Tgeneral_address_t>    *  in_PREDICT_PC_NEXT                     ;
     66  sc_signal<Tcontrol_t        >    *  in_PREDICT_PC_NEXT_IS_DS_TAKE          ;
     67  sc_signal<Tcontrol_t        >   **  in_PREDICT_INSTRUCTION_ENABLE          ; //[nb_instruction]
     68//sc_signal<Tcontrol_t        >    *  in_PREDICT_BRANCH_IS_CURRENT           ;
     69  sc_signal<Tbranch_state_t   >    *  in_PREDICT_BRANCH_STATE                ;
     70  sc_signal<Tprediction_ptr_t >    *  in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ;
     71  sc_signal<Tinst_ifetch_ptr_t>    *  in_PREDICT_INST_IFETCH_PTR             ;
     72  sc_signal<Tcontrol_t        >    *  in_EVENT_VAL                           ;
     73  sc_signal<Tcontrol_t        >    * out_EVENT_ACK                           ;
     74  sc_signal<Tgeneral_address_t>    *  in_EVENT_ADDRESS                       ;
     75  sc_signal<Tgeneral_address_t>    *  in_EVENT_ADDRESS_NEXT                  ;
     76  sc_signal<Tcontrol_t        >    *  in_EVENT_ADDRESS_NEXT_VAL              ;
     77  sc_signal<Tcontrol_t        >    *  in_EVENT_IS_DS_TAKE                    ;
    5278
    5379  ALLOC0_SC_SIGNAL (out_ADDRESS_VAL                        ,"out_ADDRESS_VAL                        ",Tcontrol_t        );

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.defs

    r81 r113  
    77#
    88
     9ENTITY                          = Ifetch_queue
     10
    911#-----[ Directory ]----------------------------------------
    1012DIR_COMPONENT_MORPHEO           = ../../../../../..

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/main.cpp

    r88 r113  
    77
    88#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h"
    9 
     9#include "Behavioural/include/Selftest.h"
    1010#define NB_PARAMS 4
    1111
    … …  
    3333  uint32_t x = 1;
    3434
    35   string name = argv[x++];
    36  
    37   uint32_t _size_queue                    = fromString<uint32_t>(argv[x++]);
    38   uint32_t _nb_instruction                = fromString<uint32_t>(argv[x++]);
    39   uint32_t _size_branch_update_prediction = fromString<uint32_t>(argv[x++]);
    40   uint32_t _size_general_data             = fromString<uint32_t>(argv[x++]);
     35  string   name;
     36  uint32_t _size_queue                   ;
     37  uint32_t _nb_instruction               ;
     38  uint32_t _size_branch_update_prediction;
     39  uint32_t _size_general_data            ;
     40
     41  SELFTEST0( name                         ,string ,argv,x);
     42  SELFTEST0(_size_queue                   ,uint32_t,argv,x);
     43  SELFTEST0(_nb_instruction               ,uint32_t,argv,x);
     44  SELFTEST0(_size_branch_update_prediction,uint32_t,argv,x);
     45  SELFTEST0(_size_general_data            ,uint32_t,argv,x);
    4146
    4247  int _return = EXIT_SUCCESS;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/test.cpp

    r112 r113  
    6767  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);         
    6868  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
     69
     70  sc_signal<Tcontrol_t            >  *  in_ADDRESS_VAL                         ;
     71  sc_signal<Tcontrol_t            >  * out_ADDRESS_ACK                         ;
     72  sc_signal<Tifetch_queue_ptr_t   >  * out_ADDRESS_IFETCH_QUEUE_ID             ;
     73  sc_signal<Tcontrol_t            > **  in_ADDRESS_INSTRUCTION_ENABLE          ;//[nb_instruction]
     74  sc_signal<Tgeneral_address_t    >  *  in_ADDRESS_INSTRUCTION_ADDRESS         ;
     75  sc_signal<Tinst_ifetch_ptr_t    >  *  in_ADDRESS_INST_IFETCH_PTR             ;
     76  sc_signal<Tbranch_state_t       >  *  in_ADDRESS_BRANCH_STATE                ;
     77  sc_signal<Tprediction_ptr_t     >  *  in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ;
     78  sc_signal<Tcontrol_t            > ** out_DECOD_VAL                           ;//[nb_instruction]
     79  sc_signal<Tcontrol_t            > **  in_DECOD_ACK                           ;//[nb_instruction]
     80  sc_signal<Tinstruction_t        > ** out_DECOD_INSTRUCTION                   ;//[nb_instruction]
     81  sc_signal<Tgeneral_address_t    >  * out_DECOD_ADDRESS                       ;
     82  sc_signal<Tinst_ifetch_ptr_t    >  * out_DECOD_INST_IFETCH_PTR               ;
     83  sc_signal<Tbranch_state_t       >  * out_DECOD_BRANCH_STATE                  ;
     84  sc_signal<Tprediction_ptr_t     >  * out_DECOD_BRANCH_UPDATE_PREDICTION_ID   ;
     85  sc_signal<Texception_t          >  * out_DECOD_EXCEPTION                     ;
     86  sc_signal<Tcontrol_t            >  *  in_ICACHE_RSP_VAL                      ;
     87  sc_signal<Tcontrol_t            >  * out_ICACHE_RSP_ACK                      ;
     88  sc_signal<Tpacket_t             >  *  in_ICACHE_RSP_PACKET_ID                ;
     89  sc_signal<Ticache_instruction_t > **  in_ICACHE_RSP_INSTRUCTION              ;//[nb_instruction]
     90  sc_signal<Ticache_error_t       >  *  in_ICACHE_RSP_ERROR                    ;
     91  sc_signal<Tcontrol_t            >  *  in_EVENT_RESET_VAL                     ;// val if : miss_speculation, exception, synchronization
     92  sc_signal<Tcontrol_t            >  * out_EVENT_RESET_ACK                     ;
    6993
    7094  ALLOC0_SC_SIGNAL( in_ADDRESS_VAL                        ," in_ADDRESS_VAL                        ",Tcontrol_t           );

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp

    r109 r113  
    1818namespace ifetch_queue {
    1919
    20 
    2120#undef  FUNCTION
    2221#define FUNCTION "Ifetch_queue::msg_error"
    … …  
    2827
    2928    if (not is_multiple (_nb_instruction_in_queue,_nb_instruction))
    30       test.error("Size of ifetch queue must be a multiple of nb_instruction.\n");
     29      test.error(_("Size of ifetch queue must be a multiple of nb_instruction.\n"));
    3130
    3231    if (_size_queue == 1)
    33       test.warning("To best perfomance, size_queue must be > 1.\n");
     32      test.warning(_("To best perfomance, size_queue must be > 1.\n"));
    3433   
    3534    log_printf(FUNC,Ifetch_queue,FUNCTION,"End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.defs

    r81 r113  
    77#
    88
     9ENTITY                          = Ifetch_unit_Glue
     10
    911#-----[ Directory ]----------------------------------------
    1012DIR_COMPONENT_MORPHEO           = ../../../../../..

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.defs

    r81 r113  
    77#
    88
     9ENTITY                          = Ifetch_unit
     10
    911#-----[ Directory ]----------------------------------------
    1012DIR_COMPONENT_MORPHEO           = ../../../../..
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