Ignore:
Timestamp:
Mar 18, 2009, 11:36:26 PM (15 years ago)
Author:
rosiere
Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit
Files:
13 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp

    r107 r112  
    5151  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
    5252
    53   ALLOC_SC_SIGNAL (out_ADDRESS_VAL                        ,"out_ADDRESS_VAL                        ",Tcontrol_t        );
    54   ALLOC_SC_SIGNAL ( in_ADDRESS_ACK                        ," in_ADDRESS_ACK                        ",Tcontrol_t        );
    55   ALLOC_SC_SIGNAL (out_ADDRESS_INSTRUCTION_ADDRESS        ,"out_ADDRESS_INSTRUCTION_ADDRESS        ",Tgeneral_address_t);
     53  ALLOC0_SC_SIGNAL (out_ADDRESS_VAL                        ,"out_ADDRESS_VAL                        ",Tcontrol_t        );
     54  ALLOC0_SC_SIGNAL ( in_ADDRESS_ACK                        ," in_ADDRESS_ACK                        ",Tcontrol_t        );
     55  ALLOC0_SC_SIGNAL (out_ADDRESS_INSTRUCTION_ADDRESS        ,"out_ADDRESS_INSTRUCTION_ADDRESS        ",Tgeneral_address_t);
    5656  ALLOC1_SC_SIGNAL(out_ADDRESS_INSTRUCTION_ENABLE         ,"out_ADDRESS_INSTRUCTION_ENABLE         ",Tcontrol_t        ,_param->_nb_instruction);
    57   ALLOC_SC_SIGNAL (out_ADDRESS_INST_IFETCH_PTR            ,"out_ADDRESS_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t);
    58   ALLOC_SC_SIGNAL (out_ADDRESS_BRANCH_STATE               ,"out_ADDRESS_BRANCH_STATE               ",Tbranch_state_t   );
    59   ALLOC_SC_SIGNAL (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t );
    60   ALLOC_SC_SIGNAL (out_PREDICT_VAL                        ,"out_PREDICT_VAL                        ",Tcontrol_t        );
    61   ALLOC_SC_SIGNAL ( in_PREDICT_ACK                        ," in_PREDICT_ACK                        ",Tcontrol_t        );
    62   ALLOC_SC_SIGNAL (out_PREDICT_PC_PREVIOUS                ,"out_PREDICT_PC_PREVIOUS                ",Tgeneral_address_t);
    63   ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT                 ,"out_PREDICT_PC_CURRENT                 ",Tgeneral_address_t);
    64   ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE      ",Tcontrol_t        );
    65   ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT                    ," in_PREDICT_PC_NEXT                    ",Tgeneral_address_t);
    66   ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ," in_PREDICT_PC_NEXT_IS_DS_TAKE         ",Tcontrol_t        );
     57  ALLOC0_SC_SIGNAL (out_ADDRESS_INST_IFETCH_PTR            ,"out_ADDRESS_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t);
     58  ALLOC0_SC_SIGNAL (out_ADDRESS_BRANCH_STATE               ,"out_ADDRESS_BRANCH_STATE               ",Tbranch_state_t   );
     59  ALLOC0_SC_SIGNAL (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t );
     60  ALLOC0_SC_SIGNAL (out_PREDICT_VAL                        ,"out_PREDICT_VAL                        ",Tcontrol_t        );
     61  ALLOC0_SC_SIGNAL ( in_PREDICT_ACK                        ," in_PREDICT_ACK                        ",Tcontrol_t        );
     62  ALLOC0_SC_SIGNAL (out_PREDICT_PC_PREVIOUS                ,"out_PREDICT_PC_PREVIOUS                ",Tgeneral_address_t);
     63  ALLOC0_SC_SIGNAL (out_PREDICT_PC_CURRENT                 ,"out_PREDICT_PC_CURRENT                 ",Tgeneral_address_t);
     64  ALLOC0_SC_SIGNAL (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE      ",Tcontrol_t        );
     65  ALLOC0_SC_SIGNAL ( in_PREDICT_PC_NEXT                    ," in_PREDICT_PC_NEXT                    ",Tgeneral_address_t);
     66  ALLOC0_SC_SIGNAL ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ," in_PREDICT_PC_NEXT_IS_DS_TAKE         ",Tcontrol_t        );
    6767  ALLOC1_SC_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE         ," in_PREDICT_INSTRUCTION_ENABLE         ",Tcontrol_t        ,_param->_nb_instruction);
    68   ALLOC_SC_SIGNAL ( in_PREDICT_INST_IFETCH_PTR            ," in_PREDICT_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t);
    69 //ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_IS_CURRENT          ," in_PREDICT_BRANCH_IS_CURRENT          ",Tcontrol_t        );
    70   ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_STATE               ," in_PREDICT_BRANCH_STATE               ",Tbranch_state_t   );
    71   ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t );
    72   ALLOC_SC_SIGNAL ( in_EVENT_VAL                          ," in_EVENT_VAL                          ",Tcontrol_t        );
    73   ALLOC_SC_SIGNAL (out_EVENT_ACK                          ,"out_EVENT_ACK                          ",Tcontrol_t        );
    74   ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS                      ," in_EVENT_ADDRESS                      ",Tgeneral_address_t);
    75   ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS_NEXT                 ," in_EVENT_ADDRESS_NEXT                 ",Tgeneral_address_t);
    76   ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS_NEXT_VAL             ," in_EVENT_ADDRESS_NEXT_VAL             ",Tcontrol_t        );
    77   ALLOC_SC_SIGNAL ( in_EVENT_IS_DS_TAKE                   ," in_EVENT_IS_DS_TAKE                   ",Tcontrol_t        );
     68  ALLOC0_SC_SIGNAL ( in_PREDICT_INST_IFETCH_PTR            ," in_PREDICT_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t);
     69//ALLOC0_SC_SIGNAL ( in_PREDICT_BRANCH_IS_CURRENT          ," in_PREDICT_BRANCH_IS_CURRENT          ",Tcontrol_t        );
     70  ALLOC0_SC_SIGNAL ( in_PREDICT_BRANCH_STATE               ," in_PREDICT_BRANCH_STATE               ",Tbranch_state_t   );
     71  ALLOC0_SC_SIGNAL ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t );
     72  ALLOC0_SC_SIGNAL ( in_EVENT_VAL                          ," in_EVENT_VAL                          ",Tcontrol_t        );
     73  ALLOC0_SC_SIGNAL (out_EVENT_ACK                          ,"out_EVENT_ACK                          ",Tcontrol_t        );
     74  ALLOC0_SC_SIGNAL ( in_EVENT_ADDRESS                      ," in_EVENT_ADDRESS                      ",Tgeneral_address_t);
     75  ALLOC0_SC_SIGNAL ( in_EVENT_ADDRESS_NEXT                 ," in_EVENT_ADDRESS_NEXT                 ",Tgeneral_address_t);
     76  ALLOC0_SC_SIGNAL ( in_EVENT_ADDRESS_NEXT_VAL             ," in_EVENT_ADDRESS_NEXT_VAL             ",Tcontrol_t        );
     77  ALLOC0_SC_SIGNAL ( in_EVENT_IS_DS_TAKE                   ," in_EVENT_IS_DS_TAKE                   ",Tcontrol_t        );
    7878 
    7979  /********************************************************
    … …  
    8686  (*(_Address_management->in_NRESET))       (*(in_NRESET));
    8787
    88   INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_VAL                        );
    89   INSTANCE_SC_SIGNAL (_Address_management, in_ADDRESS_ACK                        );
    90   INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_INSTRUCTION_ADDRESS        );
     88  INSTANCE0_SC_SIGNAL (_Address_management,out_ADDRESS_VAL                        );
     89  INSTANCE0_SC_SIGNAL (_Address_management, in_ADDRESS_ACK                        );
     90  INSTANCE0_SC_SIGNAL (_Address_management,out_ADDRESS_INSTRUCTION_ADDRESS        );
    9191  INSTANCE1_SC_SIGNAL(_Address_management,out_ADDRESS_INSTRUCTION_ENABLE         ,_param->_nb_instruction);
    9292  if (_param->_have_port_inst_ifetch_ptr)
    93   INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_INST_IFETCH_PTR            );
    94   INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_BRANCH_STATE               );
     93  INSTANCE0_SC_SIGNAL (_Address_management,out_ADDRESS_INST_IFETCH_PTR            );
     94  INSTANCE0_SC_SIGNAL (_Address_management,out_ADDRESS_BRANCH_STATE               );
    9595  if (_param->_have_port_depth)
    96   INSTANCE_SC_SIGNAL (_Address_management,out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID);
    97   INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_VAL                        );
    98   INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_ACK                        );
    99   INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_PC_PREVIOUS                );
    100   INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_PC_CURRENT                 );
    101   INSTANCE_SC_SIGNAL (_Address_management,out_PREDICT_PC_CURRENT_IS_DS_TAKE      );
    102   INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_PC_NEXT                    );
    103   INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_PC_NEXT_IS_DS_TAKE         );
     96  INSTANCE0_SC_SIGNAL (_Address_management,out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID);
     97  INSTANCE0_SC_SIGNAL (_Address_management,out_PREDICT_VAL                        );
     98  INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_ACK                        );
     99  INSTANCE0_SC_SIGNAL (_Address_management,out_PREDICT_PC_PREVIOUS                );
     100  INSTANCE0_SC_SIGNAL (_Address_management,out_PREDICT_PC_CURRENT                 );
     101  INSTANCE0_SC_SIGNAL (_Address_management,out_PREDICT_PC_CURRENT_IS_DS_TAKE      );
     102  INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_PC_NEXT                    );
     103  INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_PC_NEXT_IS_DS_TAKE         );
    104104  INSTANCE1_SC_SIGNAL(_Address_management, in_PREDICT_INSTRUCTION_ENABLE         ,_param->_nb_instruction);
    105105  if (_param->_have_port_inst_ifetch_ptr)
    106   INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_INST_IFETCH_PTR            );
    107 //INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_IS_CURRENT          );
    108   INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_STATE               );
     106  INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_INST_IFETCH_PTR            );
     107//INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_IS_CURRENT          );
     108  INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_STATE               );
    109109  if (_param->_have_port_depth)
    110   INSTANCE_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID);
    111   INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_VAL                          );
    112   INSTANCE_SC_SIGNAL (_Address_management,out_EVENT_ACK                          );
    113   INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS                      );
    114   INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS_NEXT                 );
    115   INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS_NEXT_VAL             );
    116   INSTANCE_SC_SIGNAL (_Address_management, in_EVENT_IS_DS_TAKE                   );
     110  INSTANCE0_SC_SIGNAL (_Address_management, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID);
     111  INSTANCE0_SC_SIGNAL (_Address_management, in_EVENT_VAL                          );
     112  INSTANCE0_SC_SIGNAL (_Address_management,out_EVENT_ACK                          );
     113  INSTANCE0_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS                      );
     114  INSTANCE0_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS_NEXT                 );
     115  INSTANCE0_SC_SIGNAL (_Address_management, in_EVENT_ADDRESS_NEXT_VAL             );
     116  INSTANCE0_SC_SIGNAL (_Address_management, in_EVENT_IS_DS_TAKE                   );
    117117
    118118  msg(_("<%s> : Start Simulation ............\n"),name.c_str());

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp

    r101 r112  
    1616namespace ifetch_unit {
    1717namespace address_management {
    18 
    19 
    2018
    2119#undef  FUNCTION
    … …  
    5856    // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5957    {
    60       ALLOC_INTERFACE("address", OUT, SOUTH, "Access at request icache.");
     58      ALLOC0_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."));
    6159
    62       ALLOC_VALACK_OUT (out_ADDRESS_VAL                        ,VAL);
    63       ALLOC_VALACK_IN  ( in_ADDRESS_ACK                        ,ACK);
    64       ALLOC_SIGNAL_OUT (out_ADDRESS_INSTRUCTION_ADDRESS        ,"instruction_address"        ,Tgeneral_address_t,_param->_size_instruction_address     );
    65       ALLOC_SIGNAL_OUT (out_ADDRESS_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr         );
    66       ALLOC_SIGNAL_OUT (out_ADDRESS_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state            );
    67       ALLOC_SIGNAL_OUT (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     60      ALLOC0_VALACK_OUT (out_ADDRESS_VAL                        ,VAL);
     61      ALLOC0_VALACK_IN  ( in_ADDRESS_ACK                        ,ACK);
     62      ALLOC0_SIGNAL_OUT (out_ADDRESS_INSTRUCTION_ADDRESS        ,"instruction_address"        ,Tgeneral_address_t,_param->_size_instruction_address     );
     63      ALLOC0_SIGNAL_OUT (out_ADDRESS_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr         );
     64      ALLOC0_SIGNAL_OUT (out_ADDRESS_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state            );
     65      ALLOC0_SIGNAL_OUT (out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     66
     67      ALLOC0_INTERFACE_END();
    6868    }
    6969
    7070    {
    71       ALLOC1_INTERFACE("address", OUT, SOUTH, "Access at request icache.",_param->_nb_instruction);
     71      ALLOC1_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."),_param->_nb_instruction);
    7272
    7373      ALLOC1_SIGNAL_OUT(out_ADDRESS_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t        ,1);
     74
     75      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    7476    }
    7577
    7678    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    7779    {
    78       ALLOC_INTERFACE("predict", IN, NORTH, "Request the prediction unit.");
     80      ALLOC0_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."));
    7981
    80       ALLOC_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
    81       ALLOC_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
    82       ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
    83       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
    84       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
    85       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
    86       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
    87 //    ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_IS_CURRENT          ,"branch_is_current"          ,Tcontrol_t        ,1);
    88       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
    89       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
    90       ALLOC_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
     82      ALLOC0_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
     83      ALLOC0_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
     84      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
     85      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
     86      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
     87      ALLOC0_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
     88      ALLOC0_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
     89//    ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_IS_CURRENT          ,"branch_is_current"          ,Tcontrol_t        ,1);
     90      ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
     91      ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     92      ALLOC0_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
     93
     94      ALLOC0_INTERFACE_END();
    9195    }
    9296    {
    93       ALLOC1_INTERFACE("predict", IN, NORTH, "Request the prediction unit.",_param->_nb_instruction);
     97      ALLOC1_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."),_param->_nb_instruction);
    9498
    9599      ALLOC1_SIGNAL_IN (in_PREDICT_INSTRUCTION_ENABLE          ,"instruction_enable"         ,Tcontrol_t        ,1);
     100
     101      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    96102    }
    97103
    98104    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    99105    {
    100       ALLOC_INTERFACE("event", IN, SOUTH, "Event (miss, exception ...)");
     106      ALLOC0_INTERFACE_BEGIN("event", IN, SOUTH, _("Event (miss, exception ...)"));
    101107
    102       ALLOC_VALACK_IN ( in_EVENT_VAL          ,VAL);
    103       ALLOC_VALACK_OUT(out_EVENT_ACK          ,ACK);
    104       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS         ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
    105       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT    ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
    106       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"address_next_val",Tcontrol_t,1);
    107       ALLOC_SIGNAL_IN ( in_EVENT_IS_DS_TAKE      ,"is_ds_take"      ,Tcontrol_t,1);
     108      ALLOC0_VALACK_IN ( in_EVENT_VAL          ,VAL);
     109      ALLOC0_VALACK_OUT(out_EVENT_ACK          ,ACK);
     110      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS         ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
     111      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT    ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
     112      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"address_next_val",Tcontrol_t,1);
     113      ALLOC0_SIGNAL_IN ( in_EVENT_IS_DS_TAKE      ,"is_ds_take"      ,Tcontrol_t,1);
     114
     115      ALLOC0_INTERFACE_END();
    108116    }
    109117

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_deallocation.cpp

    r101 r112  
    77
    88#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/include/Address_management.h"
     9#include "Behavioural/include/Allocation.h"
    910
    1011namespace morpheo                    {
    … …  
    2728        delete    in_CLOCK ;
    2829        delete    in_NRESET;
    29 
    30         delete    out_ADDRESS_VAL                        ;
    31         delete     in_ADDRESS_ACK                        ;
    32         delete    out_ADDRESS_INSTRUCTION_ADDRESS        ;
    33         delete [] out_ADDRESS_INSTRUCTION_ENABLE         ;
    34         if (_param->_have_port_inst_ifetch_ptr)
    35         delete    out_ADDRESS_INST_IFETCH_PTR            ;
    36         delete    out_ADDRESS_BRANCH_STATE               ;
    37         if (_param->_have_port_depth)
    38         delete    out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID;
    39         delete    out_PREDICT_VAL                        ;
    40         delete     in_PREDICT_ACK                        ;
    41         delete    out_PREDICT_PC_PREVIOUS                ;
    42         delete    out_PREDICT_PC_CURRENT                 ;
    43         delete    out_PREDICT_PC_CURRENT_IS_DS_TAKE      ;
    44         delete     in_PREDICT_PC_NEXT                    ;
    45         delete     in_PREDICT_PC_NEXT_IS_DS_TAKE         ;
    46         delete []  in_PREDICT_INSTRUCTION_ENABLE         ;
    47         if (_param->_have_port_inst_ifetch_ptr)
    48         delete     in_PREDICT_INST_IFETCH_PTR            ;
    49 //      delete     in_PREDICT_BRANCH_IS_CURRENT          ;
    50         delete     in_PREDICT_BRANCH_STATE               ;
    51         if (_param->_have_port_depth)
    52         delete     in_PREDICT_BRANCH_UPDATE_PREDICTION_ID;
    53         delete     in_EVENT_VAL                          ;
    54         delete    out_EVENT_ACK                          ;
    55         delete     in_EVENT_ADDRESS                      ;
    56         delete     in_EVENT_ADDRESS_NEXT                 ;
    57         delete     in_EVENT_ADDRESS_NEXT_VAL             ;
    58         delete     in_EVENT_IS_DS_TAKE                   ;
    59      
    60         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    61         if (usage_is_set(_usage,USE_SYSTEMC))
    62           {
    63             delete reg_PC_ACCESS_INSTRUCTION_ENABLE ;
    64             delete reg_PC_CURRENT_INSTRUCTION_ENABLE;
    65             delete reg_PC_NEXT_INSTRUCTION_ENABLE   ;
    66           }
     30       
     31        DELETE0_SIGNAL(out_ADDRESS_VAL                        ,1);
     32        DELETE0_SIGNAL( in_ADDRESS_ACK                        ,1);
     33        DELETE0_SIGNAL(out_ADDRESS_INSTRUCTION_ADDRESS        ,_param->_size_instruction_address     );
     34        DELETE0_SIGNAL(out_ADDRESS_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr         );
     35        DELETE0_SIGNAL(out_ADDRESS_BRANCH_STATE               ,_param->_size_branch_state            );
     36        DELETE0_SIGNAL(out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
     37        DELETE1_SIGNAL(out_ADDRESS_INSTRUCTION_ENABLE          ,1,_param->_nb_instruction);
     38       
     39        DELETE0_SIGNAL(out_PREDICT_VAL                        ,1);
     40        DELETE0_SIGNAL( in_PREDICT_ACK                        ,1);
     41        DELETE0_SIGNAL(out_PREDICT_PC_PREVIOUS                ,_param->_size_instruction_address);
     42        DELETE0_SIGNAL(out_PREDICT_PC_CURRENT                 ,_param->_size_instruction_address);
     43        DELETE0_SIGNAL(out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,1);
     44        DELETE0_SIGNAL( in_PREDICT_PC_NEXT                    ,_param->_size_instruction_address);
     45        DELETE0_SIGNAL( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,1);
     46//      DELETE0_SIGNAL( in_PREDICT_BRANCH_IS_CURRENT          ,1);
     47        DELETE0_SIGNAL( in_PREDICT_BRANCH_STATE               ,_param->_size_branch_state);
     48        DELETE0_SIGNAL( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
     49        DELETE0_SIGNAL( in_PREDICT_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr);
     50        DELETE1_SIGNAL(in_PREDICT_INSTRUCTION_ENABLE           ,1,_param->_nb_instruction);
     51       
     52        DELETE0_SIGNAL( in_EVENT_VAL             ,1);
     53        DELETE0_SIGNAL(out_EVENT_ACK             ,1);
     54        DELETE0_SIGNAL( in_EVENT_ADDRESS         ,_param->_size_instruction_address);
     55        DELETE0_SIGNAL( in_EVENT_ADDRESS_NEXT    ,_param->_size_instruction_address);
     56        DELETE0_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL,1);
     57        DELETE0_SIGNAL( in_EVENT_IS_DS_TAKE      ,1);
     58       
     59        DELETE1(reg_PC_ACCESS_INSTRUCTION_ENABLE ,_param->_nb_instruction);
     60        DELETE1(reg_PC_CURRENT_INSTRUCTION_ENABLE,_param->_nb_instruction);
     61        DELETE1(reg_PC_NEXT_INSTRUCTION_ENABLE   ,_param->_nb_instruction);
    6762      }
    68 
    6963
    7064    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/test.cpp

    r88 r112  
    6868  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
    6969
    70   ALLOC_SC_SIGNAL ( in_ADDRESS_VAL                        ," in_ADDRESS_VAL                        ",Tcontrol_t           );
    71   ALLOC_SC_SIGNAL (out_ADDRESS_ACK                        ,"out_ADDRESS_ACK                        ",Tcontrol_t           );
    72   ALLOC_SC_SIGNAL (out_ADDRESS_IFETCH_QUEUE_ID            ,"out_ADDRESS_IFETCH_QUEUE_ID            ",Tifetch_queue_ptr_t  );
     70  ALLOC0_SC_SIGNAL( in_ADDRESS_VAL                        ," in_ADDRESS_VAL                        ",Tcontrol_t           );
     71  ALLOC0_SC_SIGNAL(out_ADDRESS_ACK                        ,"out_ADDRESS_ACK                        ",Tcontrol_t           );
     72  ALLOC0_SC_SIGNAL(out_ADDRESS_IFETCH_QUEUE_ID            ,"out_ADDRESS_IFETCH_QUEUE_ID            ",Tifetch_queue_ptr_t  );
    7373  ALLOC1_SC_SIGNAL( in_ADDRESS_INSTRUCTION_ENABLE         ," in_ADDRESS_INSTRUCTION_ENABLE         ",Tcontrol_t           ,_param->_nb_instruction);
    74   ALLOC_SC_SIGNAL ( in_ADDRESS_INSTRUCTION_ADDRESS        ," in_ADDRESS_INSTRUCTION_ADDRESS        ",Tgeneral_address_t   );
    75   ALLOC_SC_SIGNAL ( in_ADDRESS_INST_IFETCH_PTR            ," in_ADDRESS_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t   );
    76   ALLOC_SC_SIGNAL ( in_ADDRESS_BRANCH_STATE               ," in_ADDRESS_BRANCH_STATE               ",Tbranch_state_t      );
    77   ALLOC_SC_SIGNAL ( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID," in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t    );
     74  ALLOC0_SC_SIGNAL( in_ADDRESS_INSTRUCTION_ADDRESS        ," in_ADDRESS_INSTRUCTION_ADDRESS        ",Tgeneral_address_t   );
     75  ALLOC0_SC_SIGNAL( in_ADDRESS_INST_IFETCH_PTR            ," in_ADDRESS_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t   );
     76  ALLOC0_SC_SIGNAL( in_ADDRESS_BRANCH_STATE               ," in_ADDRESS_BRANCH_STATE               ",Tbranch_state_t      );
     77  ALLOC0_SC_SIGNAL( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID," in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t    );
    7878  ALLOC1_SC_SIGNAL(out_DECOD_VAL                          ,"out_DECOD_VAL                          ",Tcontrol_t           ,_param->_nb_instruction);
    7979  ALLOC1_SC_SIGNAL( in_DECOD_ACK                          ," in_DECOD_ACK                          ",Tcontrol_t           ,_param->_nb_instruction);
    8080  ALLOC1_SC_SIGNAL(out_DECOD_INSTRUCTION                  ,"out_DECOD_INSTRUCTION                  ",Tinstruction_t       ,_param->_nb_instruction);
    81   ALLOC_SC_SIGNAL (out_DECOD_ADDRESS                      ,"out_DECOD_ADDRESS                      ",Tgeneral_address_t   );
    82   ALLOC_SC_SIGNAL (out_DECOD_INST_IFETCH_PTR              ,"out_DECOD_INST_IFETCH_PTR              ",Tinst_ifetch_ptr_t   );
    83   ALLOC_SC_SIGNAL (out_DECOD_BRANCH_STATE                 ,"out_DECOD_BRANCH_STATE                 ",Tbranch_state_t      );
    84   ALLOC_SC_SIGNAL (out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t    );
    85   ALLOC_SC_SIGNAL (out_DECOD_EXCEPTION                    ,"out_DECOD_EXCEPTION                    ",Tprediction_ptr_t    );
    86   ALLOC_SC_SIGNAL ( in_ICACHE_RSP_VAL                     ," in_ICACHE_RSP_VAL                     ",Tcontrol_t           );
    87   ALLOC_SC_SIGNAL (out_ICACHE_RSP_ACK                     ,"out_ICACHE_RSP_ACK                     ",Tcontrol_t           );
    88   ALLOC_SC_SIGNAL ( in_ICACHE_RSP_PACKET_ID               ," in_ICACHE_RSP_PACKET_ID               ",Tpacket_t            );
     81  ALLOC0_SC_SIGNAL(out_DECOD_ADDRESS                      ,"out_DECOD_ADDRESS                      ",Tgeneral_address_t   );
     82  ALLOC0_SC_SIGNAL(out_DECOD_INST_IFETCH_PTR              ,"out_DECOD_INST_IFETCH_PTR              ",Tinst_ifetch_ptr_t   );
     83  ALLOC0_SC_SIGNAL(out_DECOD_BRANCH_STATE                 ,"out_DECOD_BRANCH_STATE                 ",Tbranch_state_t      );
     84  ALLOC0_SC_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t    );
     85  ALLOC0_SC_SIGNAL(out_DECOD_EXCEPTION                    ,"out_DECOD_EXCEPTION                    ",Tprediction_ptr_t    );
     86  ALLOC0_SC_SIGNAL( in_ICACHE_RSP_VAL                     ," in_ICACHE_RSP_VAL                     ",Tcontrol_t           );
     87  ALLOC0_SC_SIGNAL(out_ICACHE_RSP_ACK                     ,"out_ICACHE_RSP_ACK                     ",Tcontrol_t           );
     88  ALLOC0_SC_SIGNAL( in_ICACHE_RSP_PACKET_ID               ," in_ICACHE_RSP_PACKET_ID               ",Tpacket_t            );
    8989  ALLOC1_SC_SIGNAL( in_ICACHE_RSP_INSTRUCTION             ," in_ICACHE_RSP_INSTRUCTION             ",Ticache_instruction_t,_param->_nb_instruction);
    90   ALLOC_SC_SIGNAL ( in_ICACHE_RSP_ERROR                   ," in_ICACHE_RSP_ERROR                   ",Ticache_error_t      );
    91   ALLOC_SC_SIGNAL ( in_EVENT_RESET_VAL                    ," in_EVENT_RESET_VAL                    ",Tcontrol_t           );
    92   ALLOC_SC_SIGNAL (out_EVENT_RESET_ACK                    ,"out_EVENT_RESET_ACK                    ",Tcontrol_t           );
     90  ALLOC0_SC_SIGNAL( in_ICACHE_RSP_ERROR                   ," in_ICACHE_RSP_ERROR                   ",Ticache_error_t      );
     91  ALLOC0_SC_SIGNAL( in_EVENT_RESET_VAL                    ," in_EVENT_RESET_VAL                    ",Tcontrol_t           );
     92  ALLOC0_SC_SIGNAL(out_EVENT_RESET_ACK                    ,"out_EVENT_RESET_ACK                    ",Tcontrol_t           );
    9393 
    9494  /********************************************************
    … …  
    101101  (*(_Ifetch_queue->in_NRESET))       (*(in_NRESET));
    102102
    103   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_VAL                        );
    104   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_ADDRESS_ACK                        );
     103  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_VAL                        );
     104  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_ADDRESS_ACK                        );
    105105  if (_param->_have_port_ifetch_queue_ptr)
    106   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_ADDRESS_IFETCH_QUEUE_ID            );
     106  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_ADDRESS_IFETCH_QUEUE_ID            );
    107107  INSTANCE1_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_INSTRUCTION_ENABLE         ,_param->_nb_instruction);
    108   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_INSTRUCTION_ADDRESS        );
     108  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_INSTRUCTION_ADDRESS        );
    109109  if (_param->_have_port_inst_ifetch_ptr)
    110   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_INST_IFETCH_PTR            );
    111   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_BRANCH_STATE               );
     110  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_INST_IFETCH_PTR            );
     111  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_BRANCH_STATE               );
    112112  if (_param->_have_port_depth)
    113   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID);
     113  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID);
    114114  INSTANCE1_SC_SIGNAL(_Ifetch_queue,out_DECOD_VAL                          ,_param->_nb_instruction);
    115115  INSTANCE1_SC_SIGNAL(_Ifetch_queue, in_DECOD_ACK                          ,_param->_nb_instruction);
    116116  INSTANCE1_SC_SIGNAL(_Ifetch_queue,out_DECOD_INSTRUCTION                  ,_param->_nb_instruction);
    117   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_ADDRESS                      );
     117  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_DECOD_ADDRESS                      );
    118118  if (_param->_have_port_inst_ifetch_ptr)
    119   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_INST_IFETCH_PTR              );
    120   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_BRANCH_STATE                 );
     119  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_DECOD_INST_IFETCH_PTR              );
     120  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_DECOD_BRANCH_STATE                 );
    121121  if (_param->_have_port_depth)
    122   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_BRANCH_UPDATE_PREDICTION_ID  );
    123   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_DECOD_EXCEPTION                    );
    124   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ICACHE_RSP_VAL                     );
    125   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_ICACHE_RSP_ACK                     );
     122  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_DECOD_BRANCH_UPDATE_PREDICTION_ID  );
     123  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_DECOD_EXCEPTION                    );
     124  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ICACHE_RSP_VAL                     );
     125  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_ICACHE_RSP_ACK                     );
    126126  if (_param->_have_port_ifetch_queue_ptr)
    127   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ICACHE_RSP_PACKET_ID               );
     127  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ICACHE_RSP_PACKET_ID               );
    128128  INSTANCE1_SC_SIGNAL(_Ifetch_queue, in_ICACHE_RSP_INSTRUCTION             ,_param->_nb_instruction);
    129   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_ICACHE_RSP_ERROR                   );
    130   INSTANCE_SC_SIGNAL (_Ifetch_queue, in_EVENT_RESET_VAL                    );
    131   INSTANCE_SC_SIGNAL (_Ifetch_queue,out_EVENT_RESET_ACK                    );
     129  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_ICACHE_RSP_ERROR                   );
     130  INSTANCE0_SC_SIGNAL(_Ifetch_queue, in_EVENT_RESET_VAL                    );
     131  INSTANCE0_SC_SIGNAL(_Ifetch_queue,out_EVENT_RESET_ACK                    );
    132132
    133133  msg(_("<%s> : Start Simulation ............\n"),name.c_str());

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp

    r88 r112  
    4848                                                         ,IN
    4949                                                         ,SOUTH,
    50                                                          "Generalist interface"
     50                                                         _("Generalist interface")
    5151#endif
    5252                                                         );
    … …  
    5858    // ~~~~~[ Interface : "address" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5959    {
    60       ALLOC_INTERFACE("address", IN, NORTH, "Transaction with PC management.");
     60      ALLOC0_INTERFACE_BEGIN("address", IN, NORTH, "Transaction with PC management.");
    6161
    62       ALLOC_VALACK_IN ( in_ADDRESS_VAL                        ,VAL);
    63       ALLOC_VALACK_OUT(out_ADDRESS_ACK                        ,ACK);
    64       ALLOC_SIGNAL_IN ( in_ADDRESS_INSTRUCTION_ADDRESS        ,"instruction_address"        ,Tgeneral_address_t ,_param->_size_instruction_address        );
    65       ALLOC_SIGNAL_IN ( in_ADDRESS_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr);
    66       ALLOC_SIGNAL_IN ( in_ADDRESS_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t    ,_param->_size_branch_state   );
    67       ALLOC_SIGNAL_IN ( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t  ,_param->_size_depth          );
    68       ALLOC_SIGNAL_OUT(out_ADDRESS_IFETCH_QUEUE_ID            ,"ifetch_queue_id"            ,Tifetch_queue_ptr_t,_param->_size_ifetch_queue_ptr);
     62      ALLOC0_VALACK_IN ( in_ADDRESS_VAL                        ,VAL);
     63      ALLOC0_VALACK_OUT(out_ADDRESS_ACK                        ,ACK);
     64      ALLOC0_SIGNAL_IN ( in_ADDRESS_INSTRUCTION_ADDRESS        ,"instruction_address"        ,Tgeneral_address_t ,_param->_size_instruction_address        );
     65      ALLOC0_SIGNAL_IN ( in_ADDRESS_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr);
     66      ALLOC0_SIGNAL_IN ( in_ADDRESS_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t    ,_param->_size_branch_state   );
     67      ALLOC0_SIGNAL_IN ( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t  ,_param->_size_depth          );
     68      ALLOC0_SIGNAL_OUT(out_ADDRESS_IFETCH_QUEUE_ID            ,"ifetch_queue_id"            ,Tifetch_queue_ptr_t,_param->_size_ifetch_queue_ptr);
    6969
     70      ALLOC0_INTERFACE_END();
    7071    }
    7172    {
    72       ALLOC1_INTERFACE("address", IN, NORTH, "Transaction with PC management.",_param->_nb_instruction);
     73      ALLOC1_INTERFACE_BEGIN("address", IN, NORTH, _("Transaction with PC management."),_param->_nb_instruction);
    7374
    7475      ALLOC1_SIGNAL_IN( in_ADDRESS_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t         ,1);
     76
     77      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    7578    }
    7679
    7780    // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    7881    {
    79       ALLOC1_INTERFACE("decod",OUT, EAST, "Send instruction bundle to the decod's stage.",_param->_nb_instruction);
     82      ALLOC1_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage."),_param->_nb_instruction);
    8083     
    8184      ALLOC1_VALACK_OUT(out_DECOD_VAL        ,VAL);
    8285      ALLOC1_VALACK_IN ( in_DECOD_ACK        ,ACK);
    8386      ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION,"instruction",Tinstruction_t,_param->_size_instruction);
     87
     88      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    8489    }
    8590    {
    86       ALLOC_INTERFACE("decod",OUT, EAST, "Send instruction bundle to the decod's stage.");
     91      ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage."));
    8792     
    88       ALLOC_SIGNAL_OUT(out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address         );
    89       ALLOC_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr );
    90       ALLOC_SIGNAL_OUT(out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state    );
    91       ALLOC_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth           );
    92       ALLOC_SIGNAL_OUT(out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
     93      ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address         );
     94      ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr );
     95      ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state    );
     96      ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth           );
     97      ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
     98
     99      ALLOC0_INTERFACE_END();
    93100    }
    94101
    95102    // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    96103    {
    97       ALLOC_INTERFACE("icache_rsp", IN, WEST, "Respons from Instruction Cache.");
     104      ALLOC0_INTERFACE_BEGIN("icache_rsp", IN, WEST, _("Respons from Instruction Cache."));
    98105     
    99       ALLOC_VALACK_IN ( in_ICACHE_RSP_VAL      ,VAL);
    100       ALLOC_VALACK_OUT(out_ICACHE_RSP_ACK      ,ACK);
    101       ALLOC_SIGNAL_IN ( in_ICACHE_RSP_PACKET_ID,"packet_id",Tpacket_t      ,_param->_size_ifetch_queue_ptr);
    102       ALLOC_SIGNAL_IN ( in_ICACHE_RSP_ERROR    ,"error"    ,Ticache_error_t,_param->_size_icache_error);
     106      ALLOC0_VALACK_IN ( in_ICACHE_RSP_VAL      ,VAL);
     107      ALLOC0_VALACK_OUT(out_ICACHE_RSP_ACK      ,ACK);
     108      ALLOC0_SIGNAL_IN ( in_ICACHE_RSP_PACKET_ID,"packet_id",Tpacket_t      ,_param->_size_ifetch_queue_ptr);
     109      ALLOC0_SIGNAL_IN ( in_ICACHE_RSP_ERROR    ,"error"    ,Ticache_error_t,_param->_size_icache_error);
     110
     111      ALLOC0_INTERFACE_END();
    103112    }
    104113    {
    105       ALLOC1_INTERFACE("icache_rsp", IN, WEST, "Respons from Instruction Cache.",_param->_nb_instruction);
     114      ALLOC1_INTERFACE_BEGIN("icache_rsp", IN, WEST, _("Respons from Instruction Cache."),_param->_nb_instruction);
    106115     
    107116      ALLOC1_SIGNAL_IN ( in_ICACHE_RSP_INSTRUCTION,"instruction",Ticache_instruction_t,_param->_size_instruction);
     117
     118      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    108119    }
    109120
    110121    // ~~~~~[ Interface "event_reset" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    111122    {
    112       ALLOC_INTERFACE("event_reset", IN, NORTH, "An event occure and reset queue.");
     123      ALLOC0_INTERFACE_BEGIN("event_reset", IN, NORTH, _("An event occure and reset queue."));
    113124
    114       ALLOC_VALACK_IN ( in_EVENT_RESET_VAL,VAL);
    115       ALLOC_VALACK_OUT(out_EVENT_RESET_ACK,ACK);
     125      ALLOC0_VALACK_IN ( in_EVENT_RESET_VAL,VAL);
     126      ALLOC0_VALACK_OUT(out_EVENT_RESET_ACK,ACK);
     127
     128      ALLOC0_INTERFACE_END();
    116129    }
    117130
    … …  
    119132    if (usage_is_set(_usage,USE_SYSTEMC))
    120133      {
    121         internal_DECOD_VAL = new Tcontrol_t [_param->_nb_instruction];
     134        ALLOC1(internal_DECOD_VAL,Tcontrol_t,_param->_nb_instruction);
    122135       
    123136        _queue = new ifetch_queue_entry_t * [_param->_size_queue];

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp

    r88 r112  
    77
    88#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h"
     9#include "Behavioural/include/Allocation.h"
    910
    1011namespace morpheo                    {
    … …  
    2829        delete    in_NRESET;
    2930
    30         delete     in_ADDRESS_VAL                        ;
    31         delete    out_ADDRESS_ACK                        ;
    32         if (_param->_have_port_ifetch_queue_ptr)
    33         delete    out_ADDRESS_IFETCH_QUEUE_ID            ;
    34         delete []  in_ADDRESS_INSTRUCTION_ENABLE         ;
    35         delete     in_ADDRESS_INSTRUCTION_ADDRESS        ;
    36         if (_param->_have_port_inst_ifetch_ptr)
    37         delete     in_ADDRESS_INST_IFETCH_PTR            ;
    38         delete     in_ADDRESS_BRANCH_STATE               ;
    39         if (_param->_have_port_depth)
    40         delete     in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID;
    41         delete [] out_DECOD_VAL                          ;
    42         delete []  in_DECOD_ACK                          ;
    43         delete [] out_DECOD_INSTRUCTION                  ;
    44         delete    out_DECOD_ADDRESS                      ;
    45         if (_param->_have_port_inst_ifetch_ptr)
    46         delete    out_DECOD_INST_IFETCH_PTR              ;
    47         delete    out_DECOD_BRANCH_STATE                 ;
    48         if (_param->_have_port_depth)
    49         delete    out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ;
    50         delete    out_DECOD_EXCEPTION                    ;
    51         delete     in_ICACHE_RSP_VAL                     ;
    52         delete    out_ICACHE_RSP_ACK                     ;
    53         if (_param->_have_port_ifetch_queue_ptr)
    54         delete     in_ICACHE_RSP_PACKET_ID               ;
    55         delete []  in_ICACHE_RSP_INSTRUCTION             ;
    56         delete     in_ICACHE_RSP_ERROR                   ;
    57         delete     in_EVENT_RESET_VAL                    ;
    58         delete    out_EVENT_RESET_ACK                    ;
     31        DELETE0_SIGNAL( in_ADDRESS_VAL                        ,1);
     32        DELETE0_SIGNAL(out_ADDRESS_ACK                        ,1);
     33        DELETE0_SIGNAL( in_ADDRESS_INSTRUCTION_ADDRESS        ,_param->_size_instruction_address);
     34        DELETE0_SIGNAL( in_ADDRESS_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr);
     35        DELETE0_SIGNAL( in_ADDRESS_BRANCH_STATE               ,_param->_size_branch_state   );
     36        DELETE0_SIGNAL( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth          );
     37        DELETE0_SIGNAL(out_ADDRESS_IFETCH_QUEUE_ID            ,_param->_size_ifetch_queue_ptr);
     38        DELETE1_SIGNAL( in_ADDRESS_INSTRUCTION_ENABLE         ,1,_param->_nb_instruction);
     39     
     40        DELETE1_SIGNAL(out_DECOD_VAL                        ,1,_param->_nb_instruction);
     41        DELETE1_SIGNAL( in_DECOD_ACK                        ,1,_param->_nb_instruction);
     42        DELETE1_SIGNAL(out_DECOD_INSTRUCTION                ,_param->_size_instruction,_param->_nb_instruction);
     43        DELETE0_SIGNAL(out_DECOD_ADDRESS                    ,_param->_size_instruction_address);
     44        DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr );
     45        DELETE0_SIGNAL(out_DECOD_BRANCH_STATE               ,_param->_size_branch_state    );
     46        DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth           );
     47        DELETE0_SIGNAL(out_DECOD_EXCEPTION                  ,_param->_size_exception_ifetch);
     48
     49        DELETE0_SIGNAL( in_ICACHE_RSP_VAL        ,1);
     50        DELETE0_SIGNAL(out_ICACHE_RSP_ACK        ,1);
     51        DELETE0_SIGNAL( in_ICACHE_RSP_PACKET_ID  ,_param->_size_ifetch_queue_ptr);
     52        DELETE0_SIGNAL( in_ICACHE_RSP_ERROR      ,_param->_size_icache_error);
     53        DELETE1_SIGNAL( in_ICACHE_RSP_INSTRUCTION,_param->_size_instruction,_param->_nb_instruction);
     54
     55        DELETE0_SIGNAL( in_EVENT_RESET_VAL,1);
     56        DELETE0_SIGNAL(out_EVENT_RESET_ACK,1);
    5957      }
    6058
    … …  
    6260    if (usage_is_set(_usage,USE_SYSTEMC))
    6361      {
    64         delete    internal_DECOD_VAL;
     62        DELETE1(internal_DECOD_VAL,_param->_nb_instruction);
     63       
     64        for (uint32_t i=0;i<_param->_size_queue; i++)
     65          delete _queue[i];
    6566        delete [] _queue;
    6667      }

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/SelfTest/src/test.cpp

    r88 r112  
    5050  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
    5151
    52   ALLOC_SC_SIGNAL(out_ICACHE_REQ_VAL        ,"out_ICACHE_REQ_VAL        ",Tcontrol_t);
    53   ALLOC_SC_SIGNAL( in_ICACHE_REQ_ADDRESS_VAL," in_ICACHE_REQ_ADDRESS_VAL",Tcontrol_t);
    54   ALLOC_SC_SIGNAL(out_ICACHE_REQ_QUEUE_VAL  ,"out_ICACHE_REQ_QUEUE_VAL  ",Tcontrol_t);
    55   ALLOC_SC_SIGNAL( in_ICACHE_REQ_ACK        ," in_ICACHE_REQ_ACK        ",Tcontrol_t);
    56   ALLOC_SC_SIGNAL(out_ICACHE_REQ_ADDRESS_ACK,"out_ICACHE_REQ_ADDRESS_ACK",Tcontrol_t);
    57   ALLOC_SC_SIGNAL( in_ICACHE_REQ_QUEUE_ACK  ," in_ICACHE_REQ_QUEUE_ACK  ",Tcontrol_t);
    58   ALLOC_SC_SIGNAL(out_ICACHE_REQ_TYPE       ,"out_ICACHE_REQ_TYPE       ",Ticache_type_t);
    59   ALLOC_SC_SIGNAL(out_ICACHE_REQ_ADDRESS        ,"out_ICACHE_REQ_ADDRESS        ",Taddress_t);
    60   ALLOC_SC_SIGNAL( in_ICACHE_REQ_ADDRESS_ADDRESS," in_ICACHE_REQ_ADDRESS_ADDRESS",Taddress_t);
    61   ALLOC_SC_SIGNAL(out_ICACHE_REQ_QUEUE_ADDRESS  ,"out_ICACHE_REQ_QUEUE_ADDRESS  ",Taddress_t);
    62   ALLOC_SC_SIGNAL( in_EVENT_VAL             ," in_EVENT_VAL             ",Tcontrol_t);
    63   ALLOC_SC_SIGNAL(out_EVENT_ADDRESS_VAL     ,"out_EVENT_ADDRESS_VAL     ",Tcontrol_t);
    64   ALLOC_SC_SIGNAL(out_EVENT_QUEUE_VAL       ,"out_EVENT_QUEUE_VAL       ",Tcontrol_t);
    65   ALLOC_SC_SIGNAL(out_EVENT_ACK             ,"out_EVENT_ACK             ",Tcontrol_t);
    66   ALLOC_SC_SIGNAL( in_EVENT_ADDRESS_ACK     ," in_EVENT_ADDRESS_ACK     ",Tcontrol_t);
    67   ALLOC_SC_SIGNAL( in_EVENT_QUEUE_ACK       ," in_EVENT_QUEUE_ACK       ",Tcontrol_t);
     52  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_VAL        ,"out_ICACHE_REQ_VAL        ",Tcontrol_t);
     53  ALLOC0_SC_SIGNAL( in_ICACHE_REQ_ADDRESS_VAL," in_ICACHE_REQ_ADDRESS_VAL",Tcontrol_t);
     54  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_QUEUE_VAL  ,"out_ICACHE_REQ_QUEUE_VAL  ",Tcontrol_t);
     55  ALLOC0_SC_SIGNAL( in_ICACHE_REQ_ACK        ," in_ICACHE_REQ_ACK        ",Tcontrol_t);
     56  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_ADDRESS_ACK,"out_ICACHE_REQ_ADDRESS_ACK",Tcontrol_t);
     57  ALLOC0_SC_SIGNAL( in_ICACHE_REQ_QUEUE_ACK  ," in_ICACHE_REQ_QUEUE_ACK  ",Tcontrol_t);
     58  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_TYPE       ,"out_ICACHE_REQ_TYPE       ",Ticache_type_t);
     59  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_ADDRESS        ,"out_ICACHE_REQ_ADDRESS        ",Taddress_t);
     60  ALLOC0_SC_SIGNAL( in_ICACHE_REQ_ADDRESS_ADDRESS," in_ICACHE_REQ_ADDRESS_ADDRESS",Taddress_t);
     61  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_QUEUE_ADDRESS  ,"out_ICACHE_REQ_QUEUE_ADDRESS  ",Taddress_t);
     62  ALLOC0_SC_SIGNAL( in_EVENT_VAL             ," in_EVENT_VAL             ",Tcontrol_t);
     63  ALLOC0_SC_SIGNAL(out_EVENT_ADDRESS_VAL     ,"out_EVENT_ADDRESS_VAL     ",Tcontrol_t);
     64  ALLOC0_SC_SIGNAL(out_EVENT_QUEUE_VAL       ,"out_EVENT_QUEUE_VAL       ",Tcontrol_t);
     65  ALLOC0_SC_SIGNAL(out_EVENT_ACK             ,"out_EVENT_ACK             ",Tcontrol_t);
     66  ALLOC0_SC_SIGNAL( in_EVENT_ADDRESS_ACK     ," in_EVENT_ADDRESS_ACK     ",Tcontrol_t);
     67  ALLOC0_SC_SIGNAL( in_EVENT_QUEUE_ACK       ," in_EVENT_QUEUE_ACK       ",Tcontrol_t);
    6868 
    6969  /********************************************************
    … …  
    7676  (*(_Ifetch_unit_Glue->in_NRESET))       (*(in_NRESET));
    7777
    78   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_VAL        );
    79   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ADDRESS_VAL);
    80   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_QUEUE_VAL  );
    81   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ACK        );
    82   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_ADDRESS_ACK);
    83   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_QUEUE_ACK  );
    84   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_ADDRESS        );
    85   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ADDRESS_ADDRESS);
    86   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_QUEUE_ADDRESS  );
    87   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_TYPE       );
    88   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_VAL             );
    89   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_ADDRESS_VAL     );
    90   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_QUEUE_VAL       );
    91   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_ACK             );
    92   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_ADDRESS_ACK     );
    93   INSTANCE_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_QUEUE_ACK       );
     78  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_VAL        );
     79  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ADDRESS_VAL);
     80  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_QUEUE_VAL  );
     81  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ACK        );
     82  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_ADDRESS_ACK);
     83  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_QUEUE_ACK  );
     84  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_ADDRESS        );
     85  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_ICACHE_REQ_ADDRESS_ADDRESS);
     86  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_QUEUE_ADDRESS  );
     87  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_ICACHE_REQ_TYPE       );
     88  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_VAL             );
     89  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_ADDRESS_VAL     );
     90  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_QUEUE_VAL       );
     91  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue,out_EVENT_ACK             );
     92  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_ADDRESS_ACK     );
     93  INSTANCE0_SC_SIGNAL(_Ifetch_unit_Glue, in_EVENT_QUEUE_ACK       );
    9494
    9595  msg(_("<%s> : Start Simulation ............\n"),name.c_str());

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_allocation.cpp

    r88 r112  
    4848                                                         ,IN
    4949                                                         ,SOUTH,
    50                                                          "Generalist interface"
     50                                                         _("Generalist interface")
    5151#endif
    5252                                                         );
    … …  
    5858    // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5959    {
    60       ALLOC_INTERFACE("icache_req",OUT, WEST, "Instruction Cache request.");
     60      ALLOC0_INTERFACE_BEGIN("icache_req",OUT, WEST, "Instruction Cache request.");
    6161
    62       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_VAL            ,"val"            ,Tcontrol_t,1);
    63       ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_VAL    ,"address_val"    ,Tcontrol_t,1);
    64       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_VAL      ,"queue_val"      ,Tcontrol_t,1);
    65       ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ACK            ,"ack"            ,Tcontrol_t,1);
    66       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS_ACK    ,"address_ack"    ,Tcontrol_t,1);
    67       ALLOC_SIGNAL_IN ( in_ICACHE_REQ_QUEUE_ACK      ,"queue_ack"      ,Tcontrol_t,1);
    68       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_TYPE           ,"type"           ,Ticache_type_t,_param->_size_icache_type);
    69       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS        ,"address"        ,Taddress_t,_param->_size_instruction_address);
    70       ALLOC_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_ADDRESS,"address_address",Taddress_t,_param->_size_instruction_address);
    71       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_ADDRESS  ,"queue_address"  ,Taddress_t,_param->_size_instruction_address);
     62      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_VAL            ,"val"            ,Tcontrol_t,1);
     63      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_VAL    ,"address_val"    ,Tcontrol_t,1);
     64      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_VAL      ,"queue_val"      ,Tcontrol_t,1);
     65      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_ACK            ,"ack"            ,Tcontrol_t,1);
     66      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS_ACK    ,"address_ack"    ,Tcontrol_t,1);
     67      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_QUEUE_ACK      ,"queue_ack"      ,Tcontrol_t,1);
     68      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_TYPE           ,"type"           ,Ticache_type_t,_param->_size_icache_type);
     69      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS        ,"address"        ,Taddress_t,_param->_size_instruction_address);
     70      ALLOC0_SIGNAL_IN ( in_ICACHE_REQ_ADDRESS_ADDRESS,"address_address",Taddress_t,_param->_size_instruction_address);
     71      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_QUEUE_ADDRESS  ,"queue_address"  ,Taddress_t,_param->_size_instruction_address);
     72
     73      ALLOC0_INTERFACE_END();
    7274    }
    7375
    7476    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    7577    {
    76       ALLOC_INTERFACE("event",IN, EAST, "Event interface.");
     78      ALLOC0_INTERFACE_BEGIN("event",IN, EAST, _("Event interface."));
    7779
    78       ALLOC_SIGNAL_IN ( in_EVENT_VAL        ,"val"        ,Tcontrol_t,1);
    79       ALLOC_SIGNAL_OUT(out_EVENT_ADDRESS_VAL,"address_val",Tcontrol_t,1);
    80       ALLOC_SIGNAL_OUT(out_EVENT_QUEUE_VAL  ,"queue_val"  ,Tcontrol_t,1);
    81       ALLOC_SIGNAL_OUT(out_EVENT_ACK        ,"ack"        ,Tcontrol_t,1);
    82       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_ACK,"address_ack",Tcontrol_t,1);
    83       ALLOC_SIGNAL_IN ( in_EVENT_QUEUE_ACK  ,"queue_ack"  ,Tcontrol_t,1);
     80      ALLOC0_SIGNAL_IN ( in_EVENT_VAL        ,"val"        ,Tcontrol_t,1);
     81      ALLOC0_SIGNAL_OUT(out_EVENT_ADDRESS_VAL,"address_val",Tcontrol_t,1);
     82      ALLOC0_SIGNAL_OUT(out_EVENT_QUEUE_VAL  ,"queue_val"  ,Tcontrol_t,1);
     83      ALLOC0_SIGNAL_OUT(out_EVENT_ACK        ,"ack"        ,Tcontrol_t,1);
     84      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_ACK,"address_ack",Tcontrol_t,1);
     85      ALLOC0_SIGNAL_IN ( in_EVENT_QUEUE_ACK  ,"queue_ack"  ,Tcontrol_t,1);
     86
     87      ALLOC0_INTERFACE_END();
    8488    }
    8589

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_deallocation.cpp

    r88 r112  
    77
    88#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/include/Ifetch_unit_Glue.h"
     9#include "Behavioural/include/Allocation.h"
    910
    1011namespace morpheo                    {
    … …  
    2829        delete     in_NRESET;
    2930
    30         delete    out_ICACHE_REQ_VAL         ;
    31         delete     in_ICACHE_REQ_ADDRESS_VAL ;
    32         delete    out_ICACHE_REQ_QUEUE_VAL   ;
    33         delete     in_ICACHE_REQ_ACK         ;
    34         delete    out_ICACHE_REQ_ADDRESS_ACK ;
    35         delete     in_ICACHE_REQ_QUEUE_ACK   ;
    36         delete    out_ICACHE_REQ_TYPE        ;
    37         delete    out_ICACHE_REQ_ADDRESS         ;
    38         delete     in_ICACHE_REQ_ADDRESS_ADDRESS ;
    39         delete    out_ICACHE_REQ_QUEUE_ADDRESS   ;
    40        
    41         delete     in_EVENT_VAL              ;
    42         delete    out_EVENT_ADDRESS_VAL      ;
    43         delete    out_EVENT_QUEUE_VAL        ;
    44         delete    out_EVENT_ACK              ;
    45         delete     in_EVENT_ADDRESS_ACK      ;
    46         delete     in_EVENT_QUEUE_ACK        ;
     31        DELETE0_SIGNAL(out_ICACHE_REQ_VAL            ,1);
     32        DELETE0_SIGNAL( in_ICACHE_REQ_ADDRESS_VAL    ,1);
     33        DELETE0_SIGNAL(out_ICACHE_REQ_QUEUE_VAL      ,1);
     34        DELETE0_SIGNAL( in_ICACHE_REQ_ACK            ,1);
     35        DELETE0_SIGNAL(out_ICACHE_REQ_ADDRESS_ACK    ,1);
     36        DELETE0_SIGNAL( in_ICACHE_REQ_QUEUE_ACK      ,1);
     37        DELETE0_SIGNAL(out_ICACHE_REQ_TYPE           ,_param->_size_icache_type);
     38        DELETE0_SIGNAL(out_ICACHE_REQ_ADDRESS        ,_param->_size_instruction_address);
     39        DELETE0_SIGNAL( in_ICACHE_REQ_ADDRESS_ADDRESS,_param->_size_instruction_address);
     40        DELETE0_SIGNAL(out_ICACHE_REQ_QUEUE_ADDRESS  ,_param->_size_instruction_address);
     41       
     42        DELETE0_SIGNAL( in_EVENT_VAL        ,1);
     43        DELETE0_SIGNAL(out_EVENT_ADDRESS_VAL,1);
     44        DELETE0_SIGNAL(out_EVENT_QUEUE_VAL  ,1);
     45        DELETE0_SIGNAL(out_EVENT_ACK        ,1);
     46        DELETE0_SIGNAL( in_EVENT_ADDRESS_ACK,1);
     47        DELETE0_SIGNAL( in_EVENT_QUEUE_ACK  ,1);
    4748      }
    48 
    4949    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    5050

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/config.cfg

    r85 r112  
    11Ifetch_unit
    2 1       8       *2      # _size_queue                   
     28       16      *2      # _size_queue                   
    331       8       *2      # _nb_instruction               
    441       1       *2      # _size_branch_update_prediction

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/test.cpp

    r101 r112  
    6666  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
    6767
    68   ALLOC_SC_SIGNAL (out_ICACHE_REQ_VAL                     ,"out_ICACHE_REQ_VAL                     ",Tcontrol_t           );
    69   ALLOC_SC_SIGNAL ( in_ICACHE_REQ_ACK                     ," in_ICACHE_REQ_ACK                     ",Tcontrol_t           );
    70 //ALLOC_SC_SIGNAL (out_ICACHE_REQ_THREAD_ID               ,"out_ICACHE_REQ_THREAD_ID               ",Tcontext_t           );
    71   ALLOC_SC_SIGNAL (out_ICACHE_REQ_PACKET_ID               ,"out_ICACHE_REQ_PACKET_ID               ",Tpacket_t            );
    72   ALLOC_SC_SIGNAL (out_ICACHE_REQ_ADDRESS                 ,"out_ICACHE_REQ_ADDRESS                 ",Ticache_instruction_t);
    73   ALLOC_SC_SIGNAL (out_ICACHE_REQ_TYPE                    ,"out_ICACHE_REQ_TYPE                    ",Ticache_type_t       );
    74   ALLOC_SC_SIGNAL ( in_ICACHE_RSP_VAL                     ," in_ICACHE_RSP_VAL                     ",Tcontrol_t           );
    75   ALLOC_SC_SIGNAL (out_ICACHE_RSP_ACK                     ,"out_ICACHE_RSP_ACK                     ",Tcontrol_t           );
    76 //ALLOC_SC_SIGNAL ( in_ICACHE_RSP_THREAD_ID               ," in_ICACHE_RSP_THREAD_ID               ",Tcontext_t           );
    77   ALLOC_SC_SIGNAL ( in_ICACHE_RSP_PACKET_ID               ," in_ICACHE_RSP_PACKET_ID               ",Tpacket_t            );
     68  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_VAL                     ,"out_ICACHE_REQ_VAL                     ",Tcontrol_t           );
     69  ALLOC0_SC_SIGNAL( in_ICACHE_REQ_ACK                     ," in_ICACHE_REQ_ACK                     ",Tcontrol_t           );
     70//ALLOC0_SC_SIGNAL(out_ICACHE_REQ_THREAD_ID               ,"out_ICACHE_REQ_THREAD_ID               ",Tcontext_t           );
     71  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_PACKET_ID               ,"out_ICACHE_REQ_PACKET_ID               ",Tpacket_t            );
     72  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_ADDRESS                 ,"out_ICACHE_REQ_ADDRESS                 ",Ticache_instruction_t);
     73  ALLOC0_SC_SIGNAL(out_ICACHE_REQ_TYPE                    ,"out_ICACHE_REQ_TYPE                    ",Ticache_type_t       );
     74  ALLOC0_SC_SIGNAL( in_ICACHE_RSP_VAL                     ," in_ICACHE_RSP_VAL                     ",Tcontrol_t           );
     75  ALLOC0_SC_SIGNAL(out_ICACHE_RSP_ACK                     ,"out_ICACHE_RSP_ACK                     ",Tcontrol_t           );
     76//ALLOC0_SC_SIGNAL( in_ICACHE_RSP_THREAD_ID               ," in_ICACHE_RSP_THREAD_ID               ",Tcontext_t           );
     77  ALLOC0_SC_SIGNAL( in_ICACHE_RSP_PACKET_ID               ," in_ICACHE_RSP_PACKET_ID               ",Tpacket_t            );
    7878  ALLOC1_SC_SIGNAL( in_ICACHE_RSP_INSTRUCTION             ," in_ICACHE_RSP_INSTRUCTION             ",Ticache_instruction_t,_param->_nb_instruction);
    79   ALLOC_SC_SIGNAL ( in_ICACHE_RSP_ERROR                   ," in_ICACHE_RSP_ERROR                   ",Ticache_error_t      );
    80   ALLOC_SC_SIGNAL (out_PREDICT_VAL                        ,"out_PREDICT_VAL                        ",Tcontrol_t           );
    81   ALLOC_SC_SIGNAL ( in_PREDICT_ACK                        ," in_PREDICT_ACK                        ",Tcontrol_t           );
    82   ALLOC_SC_SIGNAL (out_PREDICT_PC_PREVIOUS                ,"out_PREDICT_PC_PREVIOUS                ",Tgeneral_address_t   );
    83   ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT                 ,"out_PREDICT_PC_CURRENT                 ",Tgeneral_address_t   );
    84   ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE      ",Tcontrol_t           );
    85   ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT                    ," in_PREDICT_PC_NEXT                    ",Tgeneral_address_t   );
    86   ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ," in_PREDICT_PC_NEXT_IS_DS_TAKE         ",Tcontrol_t           );
     79  ALLOC0_SC_SIGNAL( in_ICACHE_RSP_ERROR                   ," in_ICACHE_RSP_ERROR                   ",Ticache_error_t      );
     80  ALLOC0_SC_SIGNAL(out_PREDICT_VAL                        ,"out_PREDICT_VAL                        ",Tcontrol_t           );
     81  ALLOC0_SC_SIGNAL( in_PREDICT_ACK                        ," in_PREDICT_ACK                        ",Tcontrol_t           );
     82  ALLOC0_SC_SIGNAL(out_PREDICT_PC_PREVIOUS                ,"out_PREDICT_PC_PREVIOUS                ",Tgeneral_address_t   );
     83  ALLOC0_SC_SIGNAL(out_PREDICT_PC_CURRENT                 ,"out_PREDICT_PC_CURRENT                 ",Tgeneral_address_t   );
     84  ALLOC0_SC_SIGNAL(out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE      ",Tcontrol_t           );
     85  ALLOC0_SC_SIGNAL( in_PREDICT_PC_NEXT                    ," in_PREDICT_PC_NEXT                    ",Tgeneral_address_t   );
     86  ALLOC0_SC_SIGNAL( in_PREDICT_PC_NEXT_IS_DS_TAKE         ," in_PREDICT_PC_NEXT_IS_DS_TAKE         ",Tcontrol_t           );
    8787  ALLOC1_SC_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE         ," in_PREDICT_INSTRUCTION_ENABLE         ",Tcontrol_t           ,_param->_nb_instruction);
    88   ALLOC_SC_SIGNAL ( in_PREDICT_INST_IFETCH_PTR            ," in_PREDICT_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t   );
    89   ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_STATE               ," in_PREDICT_BRANCH_STATE               ",Tbranch_state_t      );
    90   ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t    );
     88  ALLOC0_SC_SIGNAL( in_PREDICT_INST_IFETCH_PTR            ," in_PREDICT_INST_IFETCH_PTR            ",Tinst_ifetch_ptr_t   );
     89  ALLOC0_SC_SIGNAL( in_PREDICT_BRANCH_STATE               ," in_PREDICT_BRANCH_STATE               ",Tbranch_state_t      );
     90  ALLOC0_SC_SIGNAL( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t    );
    9191  ALLOC1_SC_SIGNAL(out_DECOD_VAL                          ,"out_DECOD_VAL                          ",Tcontrol_t           ,_param->_nb_instruction);
    9292  ALLOC1_SC_SIGNAL( in_DECOD_ACK                          ," in_DECOD_ACK                          ",Tcontrol_t           ,_param->_nb_instruction);
    9393  ALLOC1_SC_SIGNAL(out_DECOD_INSTRUCTION                  ,"out_DECOD_INSTRUCTION                  ",Tinstruction_t       ,_param->_nb_instruction);
    94 //ALLOC_SC_SIGNAL (out_DECOD_CONTEXT_ID                   ,"out_DECOD_CONTEXT_ID                   ",Tcontext_t           );
    95   ALLOC_SC_SIGNAL (out_DECOD_ADDRESS                      ,"out_DECOD_ADDRESS                      ",Tgeneral_address_t   );
    96   ALLOC_SC_SIGNAL (out_DECOD_INST_IFETCH_PTR              ,"out_DECOD_INST_IFETCH_PTR              ",Tinst_ifetch_ptr_t   );
    97   ALLOC_SC_SIGNAL (out_DECOD_BRANCH_STATE                 ,"out_DECOD_BRANCH_STATE                 ",Tbranch_state_t      );
    98   ALLOC_SC_SIGNAL (out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t    );
    99   ALLOC_SC_SIGNAL (out_DECOD_EXCEPTION                    ,"out_DECOD_EXCEPTION                    ",Texception_t         );
    100   ALLOC_SC_SIGNAL ( in_EVENT_VAL                          ," in_EVENT_VAL                          ",Tcontrol_t           );
    101   ALLOC_SC_SIGNAL (out_EVENT_ACK                          ,"out_EVENT_ACK                          ",Tcontrol_t           );
    102   ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS                      ," in_EVENT_ADDRESS                      ",Tgeneral_address_t   );
    103   ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS_NEXT                 ," in_EVENT_ADDRESS_NEXT                 ",Tgeneral_address_t   );
    104   ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS_NEXT_VAL             ," in_EVENT_ADDRESS_NEXT_VAL             ",Tcontrol_t           );
    105   ALLOC_SC_SIGNAL ( in_EVENT_IS_DS_TAKE                   ," in_EVENT_IS_DS_TAKE                   ",Tcontrol_t           );
     94//ALLOC0_SC_SIGNAL(out_DECOD_CONTEXT_ID                   ,"out_DECOD_CONTEXT_ID                   ",Tcontext_t           );
     95  ALLOC0_SC_SIGNAL(out_DECOD_ADDRESS                      ,"out_DECOD_ADDRESS                      ",Tgeneral_address_t   );
     96  ALLOC0_SC_SIGNAL(out_DECOD_INST_IFETCH_PTR              ,"out_DECOD_INST_IFETCH_PTR              ",Tinst_ifetch_ptr_t   );
     97  ALLOC0_SC_SIGNAL(out_DECOD_BRANCH_STATE                 ,"out_DECOD_BRANCH_STATE                 ",Tbranch_state_t      );
     98  ALLOC0_SC_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID  ",Tprediction_ptr_t    );
     99  ALLOC0_SC_SIGNAL(out_DECOD_EXCEPTION                    ,"out_DECOD_EXCEPTION                    ",Texception_t         );
     100  ALLOC0_SC_SIGNAL( in_EVENT_VAL                          ," in_EVENT_VAL                          ",Tcontrol_t           );
     101  ALLOC0_SC_SIGNAL(out_EVENT_ACK                          ,"out_EVENT_ACK                          ",Tcontrol_t           );
     102  ALLOC0_SC_SIGNAL( in_EVENT_ADDRESS                      ," in_EVENT_ADDRESS                      ",Tgeneral_address_t   );
     103  ALLOC0_SC_SIGNAL( in_EVENT_ADDRESS_NEXT                 ," in_EVENT_ADDRESS_NEXT                 ",Tgeneral_address_t   );
     104  ALLOC0_SC_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL             ," in_EVENT_ADDRESS_NEXT_VAL             ",Tcontrol_t           );
     105  ALLOC0_SC_SIGNAL( in_EVENT_IS_DS_TAKE                   ," in_EVENT_IS_DS_TAKE                   ",Tcontrol_t           );
    106106 
    107107  /********************************************************
    … …  
    114114  (*(_Ifetch_unit->in_NRESET))       (*(in_NRESET));
    115115
    116   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_VAL                     );
    117   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_REQ_ACK                     );
    118 //INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_THREAD_ID               );
     116  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_ICACHE_REQ_VAL                     );
     117  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_ICACHE_REQ_ACK                     );
     118//INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_ICACHE_REQ_THREAD_ID               );
    119119  if (_param->_have_port_ifetch_queue_ptr)
    120   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_PACKET_ID               );
    121   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_ADDRESS                 );
    122   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_TYPE                    );
    123   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_VAL                     );
    124   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_RSP_ACK                     );
    125 //INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_THREAD_ID               );
     120  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_ICACHE_REQ_PACKET_ID               );
     121  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_ICACHE_REQ_ADDRESS                 );
     122  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_ICACHE_REQ_TYPE                    );
     123  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_VAL                     );
     124  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_ICACHE_RSP_ACK                     );
     125//INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_THREAD_ID               );
    126126  if (_param->_have_port_ifetch_queue_ptr)
    127   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_PACKET_ID               );
     127  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_PACKET_ID               );
    128128  INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_INSTRUCTION             ,_param->_nb_instruction);
    129   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_ERROR                   );
    130   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_VAL                        );
    131   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_ACK                        );
    132   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_PREVIOUS                );
    133   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_CURRENT                 );
    134   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_CURRENT_IS_DS_TAKE      );
    135   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_PC_NEXT                    );
    136   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_PC_NEXT_IS_DS_TAKE         );
     129  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_ERROR                   );
     130  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_PREDICT_VAL                        );
     131  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_PREDICT_ACK                        );
     132  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_PREDICT_PC_PREVIOUS                );
     133  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_PREDICT_PC_CURRENT                 );
     134  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_PREDICT_PC_CURRENT_IS_DS_TAKE      );
     135  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_PREDICT_PC_NEXT                    );
     136  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_PREDICT_PC_NEXT_IS_DS_TAKE         );
    137137  INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_PREDICT_INSTRUCTION_ENABLE         ,_param->_nb_instruction);
    138138  if (_param->_have_port_inst_ifetch_ptr)
    139   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_INST_IFETCH_PTR            );
    140   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_BRANCH_STATE               );
     139  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_PREDICT_INST_IFETCH_PTR            );
     140  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_PREDICT_BRANCH_STATE               );
    141141  if (_param->_have_port_depth)
    142   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID);
     142  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID);
    143143  INSTANCE1_SC_SIGNAL(_Ifetch_unit,out_DECOD_VAL                          ,_param->_nb_instruction);
    144144  INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_DECOD_ACK                          ,_param->_nb_instruction);
    145145  INSTANCE1_SC_SIGNAL(_Ifetch_unit,out_DECOD_INSTRUCTION                  ,_param->_nb_instruction);
    146 //INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_CONTEXT_ID                   );
    147   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_ADDRESS                      );
     146//INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_DECOD_CONTEXT_ID                   );
     147  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_DECOD_ADDRESS                      );
    148148  if (_param->_have_port_inst_ifetch_ptr)
    149   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_INST_IFETCH_PTR              );
    150   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_BRANCH_STATE                 );
     149  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_DECOD_INST_IFETCH_PTR              );
     150  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_DECOD_BRANCH_STATE                 );
    151151  if (_param->_have_port_depth)
    152   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_BRANCH_UPDATE_PREDICTION_ID  );
    153   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_EXCEPTION                    );
    154   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_VAL                          );
    155   INSTANCE_SC_SIGNAL (_Ifetch_unit,out_EVENT_ACK                          );
    156   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_ADDRESS                      );
    157   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_ADDRESS_NEXT                 );
    158   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_ADDRESS_NEXT_VAL             );
    159   INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_IS_DS_TAKE                   );
     152  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_DECOD_BRANCH_UPDATE_PREDICTION_ID  );
     153  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_DECOD_EXCEPTION                    );
     154  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_EVENT_VAL                          );
     155  INSTANCE0_SC_SIGNAL(_Ifetch_unit,out_EVENT_ACK                          );
     156  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_EVENT_ADDRESS                      );
     157  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_EVENT_ADDRESS_NEXT                 );
     158  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_EVENT_ADDRESS_NEXT_VAL             );
     159  INSTANCE0_SC_SIGNAL(_Ifetch_unit, in_EVENT_IS_DS_TAKE                   );
    160160
    161161  msg(_("<%s> : Start Simulation ............\n"),name.c_str());

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp

    r88 r112  
    4747                                                         ,IN
    4848                                                         ,SOUTH,
    49                                                          "Generalist interface"
     49                                                         _("Generalist interface")
    5050#endif
    5151                                                         );
    … …  
    5757    // ~~~~~[ Interface "icache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5858    {
    59       ALLOC_INTERFACE("icache_req",OUT, WEST, _("Instruction cache request."));
    60 
    61       ALLOC_VALACK_OUT(out_ICACHE_REQ_VAL      ,VAL);
    62       ALLOC_VALACK_IN ( in_ICACHE_REQ_ACK      ,ACK);
    63     //ALLOC_SIGNAL_OUT(out_ICACHE_REQ_THREAD_ID,"thread_id",Tcontext_t           ,_param->_size_context_id );
    64       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_PACKET_ID,"packet_id",Tpacket_t            ,_param->_size_ifetch_queue_ptr  );
    65       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS  ,"address"  ,Ticache_instruction_t,_param->_size_instruction_address    );
    66       ALLOC_SIGNAL_OUT(out_ICACHE_REQ_TYPE     ,"type"     ,Ticache_type_t       ,_param->_size_icache_type);
     59      ALLOC0_INTERFACE_BEGIN("icache_req",OUT, WEST, _("Instruction cache request."));
     60
     61      ALLOC0_VALACK_OUT(out_ICACHE_REQ_VAL      ,VAL);
     62      ALLOC0_VALACK_IN ( in_ICACHE_REQ_ACK      ,ACK);
     63    //ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_THREAD_ID,"thread_id",Tcontext_t           ,_param->_size_context_id );
     64      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_PACKET_ID,"packet_id",Tpacket_t            ,_param->_size_ifetch_queue_ptr  );
     65      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_ADDRESS  ,"address"  ,Ticache_instruction_t,_param->_size_instruction_address    );
     66      ALLOC0_SIGNAL_OUT(out_ICACHE_REQ_TYPE     ,"type"     ,Ticache_type_t       ,_param->_size_icache_type);
     67
     68      ALLOC0_INTERFACE_END();
    6769    }
    6870
    6971    // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    7072    {
    71       ALLOC_INTERFACE("icache_rsp",IN , WEST, _("Instruction cache respons."));
    72 
    73       ALLOC_VALACK_IN  ( in_ICACHE_RSP_VAL        ,VAL);
    74       ALLOC_VALACK_OUT (out_ICACHE_RSP_ACK        ,ACK);
    75     //ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_THREAD_ID  ,"thread_id"  ,Tcontext_t           ,_param->_size_context_id  );
    76       ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_PACKET_ID  ,"packet_id"  ,Tpacket_t            ,_param->_size_ifetch_queue_ptr   );
    77       ALLOC_SIGNAL_IN  ( in_ICACHE_RSP_ERROR      ,"error"      ,Ticache_error_t      ,_param->_size_icache_error);
    78     }
    79     {
    80       ALLOC1_INTERFACE("icache_rsp",IN , WEST, _("Instruction cache respons."),_param->_nb_instruction);
     73      ALLOC0_INTERFACE_BEGIN("icache_rsp",IN , WEST, _("Instruction cache respons."));
     74
     75      ALLOC0_VALACK_IN  ( in_ICACHE_RSP_VAL        ,VAL);
     76      ALLOC0_VALACK_OUT (out_ICACHE_RSP_ACK        ,ACK);
     77    //ALLOC0_SIGNAL_IN  ( in_ICACHE_RSP_THREAD_ID  ,"thread_id"  ,Tcontext_t           ,_param->_size_context_id  );
     78      ALLOC0_SIGNAL_IN  ( in_ICACHE_RSP_PACKET_ID  ,"packet_id"  ,Tpacket_t            ,_param->_size_ifetch_queue_ptr   );
     79      ALLOC0_SIGNAL_IN  ( in_ICACHE_RSP_ERROR      ,"error"      ,Ticache_error_t      ,_param->_size_icache_error);
     80
     81      ALLOC0_INTERFACE_END();
     82    }
     83    {
     84      ALLOC1_INTERFACE_BEGIN("icache_rsp",IN , WEST, _("Instruction cache respons."),_param->_nb_instruction);
    8185
    8286      ALLOC1_SIGNAL_IN ( in_ICACHE_RSP_INSTRUCTION,"instruction",Ticache_instruction_t,_param->_size_instruction );
     87
     88      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    8389    }
    8490
    8591    // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    8692    {
    87       ALLOC_INTERFACE("predict",OUT, NORTH, _("Predict the next pc."));
    88 
    89       ALLOC_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
    90       ALLOC_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
    91       ALLOC_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
    92       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
    93       ALLOC_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
    94       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
    95       ALLOC_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
    96       ALLOC_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
    97       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
    98       ALLOC_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
    99     }
    100     {
    101       ALLOC1_INTERFACE("predict",IN , NORTH, _("Predict the next pc."),_param->_nb_instruction);
     93      ALLOC0_INTERFACE_BEGIN("predict",OUT, NORTH, _("Predict the next pc."));
     94
     95      ALLOC0_VALACK_OUT (out_PREDICT_VAL                        ,VAL);
     96      ALLOC0_VALACK_IN  ( in_PREDICT_ACK                        ,ACK);
     97      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_PREVIOUS                ,"pc_previous"                ,Tgeneral_address_t,_param->_size_instruction_address);
     98      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT                 ,"pc_current"                 ,Tgeneral_address_t,_param->_size_instruction_address);
     99      ALLOC0_SIGNAL_OUT (out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,"pc_current_is_ds_take"      ,Tcontrol_t        ,1);
     100      ALLOC0_SIGNAL_IN  ( in_PREDICT_PC_NEXT                    ,"pc_next"                    ,Tgeneral_address_t,_param->_size_instruction_address);
     101      ALLOC0_SIGNAL_IN  ( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,"pc_next_is_ds_take"         ,Tcontrol_t        ,1);
     102      ALLOC0_SIGNAL_IN  ( in_PREDICT_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
     103      ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
     104      ALLOC0_SIGNAL_IN  ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     105
     106      ALLOC0_INTERFACE_END();
     107    }
     108    {
     109      ALLOC1_INTERFACE_BEGIN("predict",IN , NORTH, _("Predict the next pc."),_param->_nb_instruction);
    102110
    103111      ALLOC1_SIGNAL_IN ( in_PREDICT_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t        ,1);
     112
     113      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    104114    }
    105115
    106116    // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    107117    {
    108       ALLOC_INTERFACE("decod",OUT , EAST, _("Send bundle to the decod unit."));
    109 
    110     //ALLOC_SIGNAL_OUT (out_DECOD_CONTEXT_ID                 ,"context_id"                 ,Tcontext_t        ,_param->_size_context_id);
    111       ALLOC_SIGNAL_OUT (out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address);
    112       ALLOC_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
    113       ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
    114       ALLOC_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
    115       ALLOC_SIGNAL_OUT (out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
    116     }
    117     {
    118       ALLOC1_INTERFACE("decod",OUT , EAST, _("Send bundle to the decod unit."),_param->_nb_instruction);
     118      ALLOC0_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit."));
     119
     120    //ALLOC0_SIGNAL_OUT (out_DECOD_CONTEXT_ID                 ,"context_id"                 ,Tcontext_t        ,_param->_size_context_id);
     121      ALLOC0_SIGNAL_OUT (out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address);
     122      ALLOC0_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);
     123      ALLOC0_SIGNAL_OUT (out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
     124      ALLOC0_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
     125      ALLOC0_SIGNAL_OUT (out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
     126
     127      ALLOC0_INTERFACE_END();
     128    }
     129    {
     130      ALLOC1_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit."),_param->_nb_instruction);
    119131
    120132      ALLOC1_VALACK_OUT(out_DECOD_VAL                        ,VAL);
    121133      ALLOC1_VALACK_IN ( in_DECOD_ACK                        ,ACK);
    122134      ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION                ,"instruction"                ,Tinstruction_t    ,_param->_size_instruction);
     135
     136      ALLOC1_INTERFACE_END(_param->_nb_instruction);
    123137    }
    124138
    125139    // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    126140    {
    127       ALLOC_INTERFACE("event",IN , NORTH, _("Event interface."));
    128 
    129       ALLOC_VALACK_IN ( in_EVENT_VAL              ,VAL);
    130       ALLOC_VALACK_OUT(out_EVENT_ACK              ,ACK);
    131       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS          ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
    132       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT     ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
    133       ALLOC_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"address_next_val",Tcontrol_t,1);
    134       ALLOC_SIGNAL_IN ( in_EVENT_IS_DS_TAKE       ,"is_ds_take"      ,Tcontrol_t,1);
     141      ALLOC0_INTERFACE_BEGIN("event",IN , NORTH, _("Event interface."));
     142
     143      ALLOC0_VALACK_IN ( in_EVENT_VAL              ,VAL);
     144      ALLOC0_VALACK_OUT(out_EVENT_ACK              ,ACK);
     145      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS          ,"address"         ,Tgeneral_address_t,_param->_size_instruction_address);
     146      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT     ,"address_next"    ,Tgeneral_address_t,_param->_size_instruction_address);
     147      ALLOC0_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"address_next_val",Tcontrol_t,1);
     148      ALLOC0_SIGNAL_IN ( in_EVENT_IS_DS_TAKE       ,"is_ds_take"      ,Tcontrol_t,1);
     149 
     150      ALLOC0_INTERFACE_END();
    135151    }
    136152   

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp

    r88 r112  
    77
    88#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h"
     9#include "Behavioural/include/Allocation.h"
    910
    1011namespace morpheo                    {
    … …  
    2728        delete     in_NRESET;
    2829
    29         delete    out_ICACHE_REQ_VAL                      ;
    30         delete     in_ICACHE_REQ_ACK                      ;
    31       //delete    out_ICACHE_REQ_THREAD_ID                ;
    32         if (_param->_have_port_ifetch_queue_ptr)
    33         delete    out_ICACHE_REQ_PACKET_ID                ;
    34         delete    out_ICACHE_REQ_ADDRESS                  ;
    35         delete    out_ICACHE_REQ_TYPE                     ;
     30        DELETE0_SIGNAL(out_ICACHE_REQ_VAL      ,1);
     31        DELETE0_SIGNAL( in_ICACHE_REQ_ACK      ,1);
     32//      DELETE0_SIGNAL(out_ICACHE_REQ_THREAD_ID,_param->_size_context_id );
     33        DELETE0_SIGNAL(out_ICACHE_REQ_PACKET_ID,_param->_size_ifetch_queue_ptr  );
     34        DELETE0_SIGNAL(out_ICACHE_REQ_ADDRESS  ,_param->_size_instruction_address    );
     35        DELETE0_SIGNAL(out_ICACHE_REQ_TYPE     ,_param->_size_icache_type);
    3636
    37         delete     in_ICACHE_RSP_VAL                      ;
    38         delete    out_ICACHE_RSP_ACK                      ;
    39       //delete     in_ICACHE_RSP_THREAD_ID                ;
    40         if (_param->_have_port_ifetch_queue_ptr)
    41         delete     in_ICACHE_RSP_PACKET_ID                ;
    42         delete []  in_ICACHE_RSP_INSTRUCTION              ;
    43         delete     in_ICACHE_RSP_ERROR                    ;
     37        DELETE0_SIGNAL( in_ICACHE_RSP_VAL        ,1);
     38        DELETE0_SIGNAL(out_ICACHE_RSP_ACK        ,1);
     39    //  DELETE0_SIGNAL( in_ICACHE_RSP_THREAD_ID  ,_param->_size_context_id  );
     40        DELETE0_SIGNAL( in_ICACHE_RSP_PACKET_ID  ,_param->_size_ifetch_queue_ptr   );
     41        DELETE0_SIGNAL( in_ICACHE_RSP_ERROR      ,_param->_size_icache_error);
     42        DELETE1_SIGNAL( in_ICACHE_RSP_INSTRUCTION,_param->_size_instruction,_param->_nb_instruction);
    4443
    45         delete    out_PREDICT_VAL                         ;
    46         delete     in_PREDICT_ACK                         ;
    47         delete    out_PREDICT_PC_PREVIOUS                 ;
    48         delete    out_PREDICT_PC_CURRENT                  ;
    49         delete    out_PREDICT_PC_CURRENT_IS_DS_TAKE       ;
    50         delete     in_PREDICT_PC_NEXT                     ;
    51         delete     in_PREDICT_PC_NEXT_IS_DS_TAKE          ;
    52         delete []  in_PREDICT_INSTRUCTION_ENABLE          ;
    53         if (_param->_have_port_inst_ifetch_ptr)
    54         delete     in_PREDICT_INST_IFETCH_PTR             ;
    55         delete     in_PREDICT_BRANCH_STATE                ;
    56         if (_param->_have_port_depth)
    57         delete     in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ;
     44        DELETE0_SIGNAL(out_PREDICT_VAL                        ,1);
     45        DELETE0_SIGNAL( in_PREDICT_ACK                        ,1);
     46        DELETE0_SIGNAL(out_PREDICT_PC_PREVIOUS                ,_param->_size_instruction_address);
     47        DELETE0_SIGNAL(out_PREDICT_PC_CURRENT                 ,_param->_size_instruction_address);
     48        DELETE0_SIGNAL(out_PREDICT_PC_CURRENT_IS_DS_TAKE      ,1);
     49        DELETE0_SIGNAL( in_PREDICT_PC_NEXT                    ,_param->_size_instruction_address);
     50        DELETE0_SIGNAL( in_PREDICT_PC_NEXT_IS_DS_TAKE         ,1);
     51        DELETE0_SIGNAL( in_PREDICT_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr);
     52        DELETE0_SIGNAL( in_PREDICT_BRANCH_STATE               ,_param->_size_branch_state);
     53        DELETE0_SIGNAL( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
     54        DELETE1_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE         ,1,_param->_nb_instruction);
    5855
    59         delete [] out_DECOD_VAL                           ;
    60         delete []  in_DECOD_ACK                           ;
    61         delete [] out_DECOD_INSTRUCTION                   ;
    62       //delete    out_DECOD_CONTEXT_ID                    ;
    63         delete    out_DECOD_ADDRESS                       ;
    64         if (_param->_have_port_inst_ifetch_ptr)
    65         delete    out_DECOD_INST_IFETCH_PTR               ;
    66         delete    out_DECOD_BRANCH_STATE                  ;
    67         if (_param->_have_port_depth)
    68         delete    out_DECOD_BRANCH_UPDATE_PREDICTION_ID   ;
    69         delete    out_DECOD_EXCEPTION                     ;
     56    //  DELETE0_SIGNAL(out_DECOD_CONTEXT_ID                 ,_param->_size_context_id);
     57        DELETE0_SIGNAL(out_DECOD_ADDRESS                    ,_param->_size_instruction_address);
     58        DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr);
     59        DELETE0_SIGNAL(out_DECOD_BRANCH_STATE               ,_param->_size_branch_state);
     60        DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
     61        DELETE0_SIGNAL(out_DECOD_EXCEPTION                  ,_param->_size_exception_ifetch);
     62        DELETE1_SIGNAL(out_DECOD_VAL                        ,1,_param->_nb_instruction);
     63        DELETE1_SIGNAL( in_DECOD_ACK                        ,1,_param->_nb_instruction);
     64        DELETE1_SIGNAL(out_DECOD_INSTRUCTION                ,_param->_size_instruction,_param->_nb_instruction);
    7065
    71         delete     in_EVENT_VAL                           ;
    72         delete    out_EVENT_ACK                           ;
    73         delete     in_EVENT_ADDRESS                       ;
    74         delete     in_EVENT_ADDRESS_NEXT                  ;
    75         delete     in_EVENT_ADDRESS_NEXT_VAL              ;
    76         delete     in_EVENT_IS_DS_TAKE                    ;
     66        DELETE0_SIGNAL( in_EVENT_VAL              ,1);
     67        DELETE0_SIGNAL(out_EVENT_ACK              ,1);
     68        DELETE0_SIGNAL( in_EVENT_ADDRESS          ,_param->_size_instruction_address);
     69        DELETE0_SIGNAL( in_EVENT_ADDRESS_NEXT     ,_param->_size_instruction_address);
     70        DELETE0_SIGNAL( in_EVENT_ADDRESS_NEXT_VAL ,1);
     71        DELETE0_SIGNAL( in_EVENT_IS_DS_TAKE       ,1);
    7772      }
     73
    7874    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    7975    delete _component_address_management;
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