- Timestamp:
- Apr 20, 2009, 11:29:17 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo
- Files:
-
- 1 added
- 78 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h
r112 r115 66 66 public : uint32_t * _size_execute_queue ;//[nb_write_bloc] 67 67 public : uint32_t * _nb_bypass_write ;//[nb_write_bloc] 68 68 public : core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t 69 * _write_queue_scheme ;//[nb_write_bloc] 70 69 71 // Load_store_unit 70 72 public : uint32_t _nb_load_store_unit ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp
r112 r115 153 153 ALLOC1(_param->_size_execute_queue,uint32_t,_param->_nb_write_bloc); 154 154 ALLOC1(_param->_nb_bypass_write ,uint32_t,_param->_nb_write_bloc); 155 ALLOC1(_param->_write_queue_scheme,core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t,_param->_nb_write_bloc); 155 156 156 157 for (uint32_t i=0; i<_param->_nb_write_bloc; ++i) … … 161 162 _param->_size_execute_queue [i] = fromString<uint32_t> (getParam("size_execute_queue","write_bloc",toString(i).c_str(),"")); 162 163 _param->_nb_bypass_write [i] = fromString<uint32_t> (getParam("nb_bypass_write" ,"write_bloc",toString(i).c_str(),"")); 164 _param->_write_queue_scheme [i] = fromString<core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t> (getParam("write_queue_scheme","write_bloc",toString(i).c_str(),"")); 163 165 } 164 166 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp
r111 r115 27 27 bool READ_UNIT_ENABLE [_param->_nb_execute_loop][_param->_max_nb_read_unit ]; 28 28 29 // Init -> all at 0 29 30 for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i) 30 31 for (uint32_t j=0; j<_param->_nb_inst_issue[i]; ++j) … … 36 37 // Read unit is enable is signal ack is set 37 38 READ_UNIT_ENABLE [i][j] = (PORT_READ(in_ISSUE_EXECUTE_LOOP_ACK [i][j]) == 1); 39 log_printf(TRACE,Core_Glue,FUNCTION," * Read_unit [%d][%d] : %d",i,j,READ_UNIT_ENABLE[i][j]); 38 40 } 39 41 … … 42 44 log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop [%d]",i); 43 45 46 // for each issue of each ooo_engine ... 44 47 std::list<generic::priority::select_t> * select_ooo_engine = _priority_ooo_engine[i]->select(); 45 48 for (std::list<generic::priority::select_t>::iterator it_ooo_engine=select_ooo_engine->begin(); … … 47 50 ++it_ooo_engine) 48 51 { 52 // get id 49 53 const uint32_t ooo_engine_id = it_ooo_engine->grp; 50 54 const uint32_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][ooo_engine_id]; 51 55 const uint32_t num_inst_issue = it_ooo_engine->elt; 52 56 53 log_printf(TRACE,Core_Glue,FUNCTION," * num_ooo_engine [%d] (id :%d)",num_ooo_engine, ooo_engine_id);57 log_printf(TRACE,Core_Glue,FUNCTION," * num_ooo_engine [%d] (id -> %d)",num_ooo_engine, ooo_engine_id); 54 58 log_printf(TRACE,Core_Glue,FUNCTION," * num_inst_issue : %d",num_inst_issue); 55 log_printf(TRACE,Core_Glue,FUNCTION," * ISSUE_OOO_ENGINE_VAL : %d",PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue]));56 59 57 // have request ?58 60 Tcontrol_t ooo_engine_val = PORT_READ(in_ISSUE_OOO_ENGINE_VAL [num_ooo_engine][num_inst_issue]); 59 61 60 // if (ooo_engine_val) 62 log_printf(TRACE,Core_Glue,FUNCTION," * ISSUE_OOO_ENGINE_VAL : %d",ooo_engine_val); 63 64 // test if have a request ? 65 // if (ooo_engine_val) 61 66 { 62 67 // // If ooo_engine can issue instruction on multiple execute_loop 63 68 // if (not ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue]) 64 69 70 // Scan all read_unit 65 71 std::list<generic::priority::select_t> * select_read_unit = _priority_read_unit[i]->select(); 66 72 for (std::list<generic::priority::select_t>::iterator it_read_unit=select_read_unit->begin(); … … 69 75 { 70 76 uint32_t num_read_unit = it_read_unit->grp; 77 78 // Test if have an link and read unit is enable 79 log_printf(TRACE,Core_Glue,FUNCTION," * read_unit : %d",num_read_unit); 80 log_printf(TRACE,Core_Glue,FUNCTION," * READ_UNIT_ENABLE : %d",READ_UNIT_ENABLE [i][num_read_unit]); 81 log_printf(TRACE,Core_Glue,FUNCTION," * table_dispatch : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]); 82 83 Tcontrol_t read_unit_enable = READ_UNIT_ENABLE [i][num_read_unit]; 71 84 72 // Test if have an link and read unit is enable 73 log_printf(TRACE,Core_Glue,FUNCTION," * read_unit : %d",num_read_unit); 74 log_printf(TRACE,Core_Glue,FUNCTION," * READ_UNIT_ENABLE : %d",READ_UNIT_ENABLE [i][num_read_unit]); 75 log_printf(TRACE,Core_Glue,FUNCTION," * table_dispatch : %d",_param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]); 85 // Test if the read_unit is not busy and if an link is between the issue slot and read_unit 86 if (read_unit_enable and 87 _param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]) 88 { 89 log_printf(TRACE,Core_Glue,FUNCTION," * find !!!"); 90 91 // Transaction 92 READ_UNIT_ENABLE [i][num_read_unit] = false; // now, this read_unit is busy 93 ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val; // = 1 94 ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue] = read_unit_enable; // = 1 95 96 if (_param->_have_port_context_id) 97 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID [num_ooo_engine][num_inst_issue])); 98 if (_param->_have_port_front_end_id) 99 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID [num_ooo_engine][num_inst_issue])); 100 if (_param->_have_port_ooo_engine_id) 101 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID [i][num_read_unit],ooo_engine_id); 102 if (_param->_have_port_rob_ptr) 103 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID [num_ooo_engine][num_inst_issue])); 104 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION [num_ooo_engine][num_inst_issue])); 105 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE [num_ooo_engine][num_inst_issue])); 106 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); 107 if (_param->_have_port_load_queue_ptr) 108 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); 109 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT [num_ooo_engine][num_inst_issue])); 110 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT [num_ooo_engine][num_inst_issue])); 111 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA [num_ooo_engine][num_inst_issue])); 112 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA [num_ooo_engine][num_inst_issue])); 113 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB [num_ooo_engine][num_inst_issue])); 114 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB [num_ooo_engine][num_inst_issue])); 115 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC [num_ooo_engine][num_inst_issue])); 116 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC [num_ooo_engine][num_inst_issue])); 117 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD [num_ooo_engine][num_inst_issue])); 118 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD [num_ooo_engine][num_inst_issue])); 119 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE [num_ooo_engine][num_inst_issue])); 120 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE [num_ooo_engine][num_inst_issue])); 76 121 77 Tcontrol_t read_unit_enable = READ_UNIT_ENABLE [i][num_read_unit]; 78 if (read_unit_enable and 79 _param->_table_dispatch [num_ooo_engine][num_inst_issue][i][num_read_unit]) 80 { 81 // Transaction 82 ISSUE_EXECUTE_LOOP_VAL [i][num_read_unit] = ooo_engine_val; 83 ISSUE_OOO_ENGINE_ACK [num_ooo_engine][num_inst_issue] = read_unit_enable; // = 1 84 READ_UNIT_ENABLE [i][num_read_unit] = false; // now, this read_unit is busy 85 86 if (_param->_have_port_context_id) 87 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CONTEXT_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CONTEXT_ID [num_ooo_engine][num_inst_issue])); 88 if (_param->_have_port_front_end_id) 89 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_FRONT_END_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_FRONT_END_ID [num_ooo_engine][num_inst_issue])); 90 if (_param->_have_port_ooo_engine_id) 91 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OOO_ENGINE_ID [i][num_read_unit],ooo_engine_id); 92 if (_param->_have_port_rob_ptr) 93 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_PACKET_ID [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_PACKET_ID [num_ooo_engine][num_inst_issue])); 94 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION [num_ooo_engine][num_inst_issue])); 95 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_TYPE [num_ooo_engine][num_inst_issue])); 96 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); 97 if (_param->_have_port_load_queue_ptr) 98 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_LOAD_QUEUE_PTR_WRITE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_LOAD_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue])); 99 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_HAS_IMMEDIAT [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_HAS_IMMEDIAT [num_ooo_engine][num_inst_issue])); 100 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_IMMEDIAT [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_IMMEDIAT [num_ooo_engine][num_inst_issue])); 101 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RA [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RA [num_ooo_engine][num_inst_issue])); 102 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RA [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RA [num_ooo_engine][num_inst_issue])); 103 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RB [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RB [num_ooo_engine][num_inst_issue])); 104 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RB [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RB [num_ooo_engine][num_inst_issue])); 105 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_READ_RC [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_READ_RC [num_ooo_engine][num_inst_issue])); 106 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RC [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RC [num_ooo_engine][num_inst_issue])); 107 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RD [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RD [num_ooo_engine][num_inst_issue])); 108 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RD [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RD [num_ooo_engine][num_inst_issue])); 109 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_WRITE_RE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_WRITE_RE [num_ooo_engine][num_inst_issue])); 110 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_NUM_REG_RE [i][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_NUM_REG_RE [num_ooo_engine][num_inst_issue])); 111 } 122 break; // find : stop scan read_unit 123 } 112 124 } 113 125 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp
r88 r115 82 82 83 83 test (name,param); 84 85 delete param; 84 86 } 85 87 catch (morpheo::ErrorMorpheo & error) … … 94 96 } 95 97 96 delete timing; 98 for (uint32_t i=0; i< MAX_TYPE; i++) 99 delete timing [i]; 100 delete [] timing; 97 101 98 102 return (EXIT_SUCCESS); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
r112 r115 70 70 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 71 71 72 delete [] _execute_register; 73 delete _execute_param; 74 delete _execute_operation_in; 75 delete _execute_operation_out; 76 delete [] _function_execute; 72 for (uint32_t i=0; i<_param->_nb_context; i++) 73 for (uint32_t j=0; j<_param->_nb_front_end; j++) 74 for (uint32_t k=0; k<_param->_nb_ooo_engine; k++) 75 delete _execute_register [i][j][k]; 76 77 DELETE3(_execute_register,_param->_nb_context,_param->_nb_front_end,_param->_nb_ooo_engine); 78 DELETE0(_execute_param); 79 DELETE0(_execute_operation_in); 80 DELETE0(_execute_operation_out); 81 DELETE2(_function_execute,_param->_nb_type,_param->_nb_operation); 77 82 } 78 83 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration.cfg
r81 r115 11 11 16 16 *2 # uint32_t nb_special_register 12 12 1 8 *2 # uint32_t nb_bypass_write 13 0 1 +1 # write_queue_scheme -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/configuration_execute_queue_null.cfg
r81 r115 11 11 16 16 *2 # uint32_t nb_special_register 12 12 8 8 *2 # uint32_t nb_bypass_write 13 0 1 +1 # write_queue_scheme -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/src/main.cpp
r113 r115 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest/include/top.h" 9 9 10 <<<<<<< .mine 11 #define NB_PARAMS 12 12 13 void usage (int argc, char * argv[]) 14 { 15 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 16 err (_("list_params is :\n")); 17 err (_(" * size_write_queue (uint32_t)\n")); 18 err (_(" * size_execute_queue (uint32_t)\n")); 19 err (_(" * nb_context (uint32_t)\n")); 20 err (_(" * nb_front_end (uint32_t)\n")); 21 err (_(" * nb_ooo_engine (uint32_t)\n")); 22 err (_(" * nb_packet (uint32_t)\n")); 23 err (_(" * size_general_data (uint32_t)\n")); 24 err (_(" * nb_general_register (uint32_t)\n")); 25 err (_(" * size_special_data (uint32_t)\n")); 26 err (_(" * nb_special_register (uint32_t)\n")); 27 err (_(" * nb_bypass_write (uint32_t)\n")); 28 err (_(" * write_queue_scheme (Twrite_queue_scheme_t)\n")); 29 30 exit (1); 31 } 32 33 #ifndef SYSTEMC 34 ======= 10 35 #ifndef MTI_SYSTEMC 11 36 # ifndef SYSTEMC 37 >>>>>>> .r113 12 38 int main (int argc, char * argv[]) 13 39 # else … … 17 43 int _return = EXIT_SUCCESS; 18 44 45 <<<<<<< .mine 46 uint32_t x = 1; 47 48 const string name = argv[x++]; 49 const uint32_t size_write_queue = fromString<uint32_t>(argv[x++]); 50 const uint32_t size_execute_queue = fromString<uint32_t>(argv[x++]); 51 const uint32_t nb_context = fromString<uint32_t>(argv[x++]); 52 const uint32_t nb_front_end = fromString<uint32_t>(argv[x++]); 53 const uint32_t nb_ooo_engine = fromString<uint32_t>(argv[x++]); 54 const uint32_t nb_packet = fromString<uint32_t>(argv[x++]); 55 const uint32_t size_general_data = fromString<uint32_t>(argv[x++]); 56 const uint32_t nb_general_register = fromString<uint32_t>(argv[x++]); 57 const uint32_t size_special_data = fromString<uint32_t>(argv[x++]); 58 const uint32_t nb_special_register = fromString<uint32_t>(argv[x++]); 59 const uint32_t nb_bypass_write = fromString<uint32_t>(argv[x++]); 60 const write_queue::Twrite_queue_scheme_t write_queue_scheme = fromString<write_queue::Twrite_queue_scheme_t>(argv[x++]); 61 ======= 62 >>>>>>> .r113 19 63 try 20 64 { 65 <<<<<<< .mine 66 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::Parameters 67 (size_write_queue , 68 size_execute_queue , 69 nb_context , 70 nb_front_end , 71 nb_ooo_engine , 72 nb_packet , 73 size_general_data , 74 nb_general_register, 75 size_special_data , 76 nb_special_register, 77 nb_bypass_write , 78 write_queue_scheme , 79 true // is_toplevel 80 ); 81 82 msg(_("%s"),param->print(1).c_str()); 83 84 test (name,param); 85 ======= 21 86 top * my_top = new top ("my_top",argc,argv); 22 87 … … 24 89 25 90 delete my_top; 91 >>>>>>> .r113 26 92 } 27 93 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/configuration.cfg
r88 r115 1 1 Write_queue 2 8 8 *2 # uint32_t size_queue 3 1 1 *2 # uint32_t nb_context 4 1 1 *2 # uint32_t nb_front_end 5 1 4 *2 # uint32_t nb_ooo_engine 6 32 32 *2 # uint32_t nb_packet 7 32 32 *2 # uint32_t size_general_data 8 64 64 *2 # uint32_t nb_general_register 9 2 2 *2 # uint32_t size_special_data 10 16 16 *2 # uint32_t nb_special_register 11 1 8 *4 # uint32_t nb_bypass_write 2 8 8 *2 # uint32_t size_queue 3 1 1 *2 # uint32_t nb_context 4 1 1 *2 # uint32_t nb_front_end 5 1 4 *2 # uint32_t nb_ooo_engine 6 32 32 *2 # uint32_t nb_packet 7 32 32 *2 # uint32_t size_general_data 8 64 64 *2 # uint32_t nb_general_register 9 2 2 *2 # uint32_t size_special_data 10 16 16 *2 # uint32_t nb_special_register 11 1 8 *4 # uint32_t nb_bypass_write 12 0 1 +1 # Twrite_queue_scheme_t queue_scheme -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/src/main.cpp
r113 r115 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest/include/top.h" 9 9 10 <<<<<<< .mine 11 #define NB_PARAMS 11 12 13 void usage (int argc, char * argv[]) 14 { 15 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 16 err (_("list_params is :\n")); 17 err (_(" * size_queue (uint32_t )\n")); 18 err (_(" * nb_context (uint32_t )\n")); 19 err (_(" * nb_front_end (uint32_t )\n")); 20 err (_(" * nb_ooo_engine (uint32_t )\n")); 21 err (_(" * nb_packet (uint32_t )\n")); 22 err (_(" * size_general_data (uint32_t )\n")); 23 err (_(" * nb_general_register (uint32_t )\n")); 24 err (_(" * size_special_data (uint32_t )\n")); 25 err (_(" * nb_special_register (uint32_t )\n")); 26 err (_(" * nb_bypass_write (uint32_t )\n")); 27 err (_(" * queue_scheme (Twrite_queue_scheme_t)\n")); 28 29 exit (1); 30 } 31 32 #ifndef SYSTEMC 33 ======= 10 34 #ifndef MTI_SYSTEMC 11 35 # ifndef SYSTEMC 36 >>>>>>> .r113 12 37 int main (int argc, char * argv[]) 13 38 # else … … 17 42 int _return = EXIT_SUCCESS; 18 43 44 <<<<<<< .mine 45 uint32_t x = 1; 46 47 const string name = argv[x++]; 48 const uint32_t size_queue = fromString<uint32_t>(argv[x++]); 49 const uint32_t nb_context = fromString<uint32_t>(argv[x++]); 50 const uint32_t nb_front_end = fromString<uint32_t>(argv[x++]); 51 const uint32_t nb_ooo_engine = fromString<uint32_t>(argv[x++]); 52 const uint32_t nb_packet = fromString<uint32_t>(argv[x++]); 53 const uint32_t size_general_data = fromString<uint32_t>(argv[x++]); 54 const uint32_t nb_general_register = fromString<uint32_t>(argv[x++]); 55 const uint32_t size_special_data = fromString<uint32_t>(argv[x++]); 56 const uint32_t nb_special_register = fromString<uint32_t>(argv[x++]); 57 const uint32_t nb_bypass_write = fromString<uint32_t>(argv[x++]); 58 const Twrite_queue_scheme_t queue_scheme = fromString<Twrite_queue_scheme_t>(argv[x++]); 59 60 ======= 61 >>>>>>> .r113 19 62 try 20 63 { 64 <<<<<<< .mine 65 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Parameters 66 (size_queue , 67 nb_context , 68 nb_front_end , 69 nb_ooo_engine , 70 nb_packet , 71 size_general_data , 72 nb_general_register, 73 size_special_data , 74 nb_special_register, 75 nb_bypass_write , 76 queue_scheme , 77 true // is_toplevel 78 ); 79 80 msg(_("%s"),param->print(1).c_str()); 81 82 test (name,param); 83 ======= 21 84 top * my_top = new top ("my_top",argc,argv); 22 85 … … 24 87 25 88 delete my_top; 89 >>>>>>> .r113 26 90 } 27 91 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
r103 r115 11 11 #include "Common/include/Debug.h" 12 12 #include "Behavioural/include/Parameters.h" 13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h" 13 14 #include <math.h> 14 15 … … 26 27 { 27 28 //-----[ fields ]------------------------------------------------------------ 28 public : uint32_t _size_queue ; 29 public : uint32_t _nb_context ; 30 public : uint32_t _nb_front_end ; 31 public : uint32_t _nb_ooo_engine ; 32 public : uint32_t _nb_packet ; 33 //public : uint32_t _size_general_data ; 34 public : uint32_t _nb_general_register ; 35 //public : uint32_t _size_special_data ; 36 public : uint32_t _nb_special_register ; 37 public : uint32_t _nb_bypass_write ; 29 public : uint32_t _size_queue ; 30 public : uint32_t _nb_context ; 31 public : uint32_t _nb_front_end ; 32 public : uint32_t _nb_ooo_engine ; 33 public : uint32_t _nb_packet ; 34 //public : uint32_t _size_general_data ; 35 public : uint32_t _nb_general_register ; 36 //public : uint32_t _size_special_data ; 37 public : uint32_t _nb_special_register ; 38 public : uint32_t _nb_bypass_write ; 39 public : Twrite_queue_scheme_t _queue_scheme ; 38 40 39 public : uint32_t _nb_gpr_write ;40 public : uint32_t _nb_spr_write ;41 42 //public : uint32_t _size_context_id ;43 //public : uint32_t _size_front_end_id ;44 //public : uint32_t _size_ooo_engine_id ;45 //public : uint32_t _size_packet_id ;46 //public : uint32_t _size_general_register ;47 //public : uint32_t _size_special_register ;48 public : uint32_t _size_internal_queue ;49 50 //public : bool _have_port_context_id ;51 //public : bool _have_port_front_end_id ;52 //public : bool _have_port_ooo_engine_id ;53 //public : bool _have_port_packet_id ;41 public : uint32_t _nb_gpr_write ; 42 public : uint32_t _nb_spr_write ; 43 44 //public : uint32_t _size_context_id ; 45 //public : uint32_t _size_front_end_id ; 46 //public : uint32_t _size_ooo_engine_id ; 47 //public : uint32_t _size_packet_id ; 48 //public : uint32_t _size_general_register ; 49 //public : uint32_t _size_special_register ; 50 public : uint32_t _size_internal_queue ; 51 52 //public : bool _have_port_context_id ; 53 //public : bool _have_port_front_end_id ; 54 //public : bool _have_port_ooo_engine_id ; 55 //public : bool _have_port_packet_id ; 54 56 55 57 //-----[ methods ]----------------------------------------------------------- 56 public : Parameters (uint32_t size_queue , 57 uint32_t nb_context , 58 uint32_t nb_front_end , 59 uint32_t nb_ooo_engine , 60 uint32_t nb_packet , 61 uint32_t size_general_data , 62 uint32_t nb_general_register, 63 uint32_t size_special_data , 64 uint32_t nb_special_register, 65 uint32_t nb_bypass_write , 66 bool is_toplevel=false ); 58 public : Parameters (uint32_t size_queue , 59 uint32_t nb_context , 60 uint32_t nb_front_end , 61 uint32_t nb_ooo_engine , 62 uint32_t nb_packet , 63 uint32_t size_general_data , 64 uint32_t nb_general_register, 65 uint32_t size_special_data , 66 uint32_t nb_special_register, 67 uint32_t nb_bypass_write , 68 Twrite_queue_scheme_t queue_scheme , 69 bool is_toplevel=false ); 67 70 //public : Parameters (Parameters & param) ; 68 71 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h
r97 r115 19 19 namespace write_unit { 20 20 namespace write_queue { 21 22 typedef enum 23 { 24 WRITE_QUEUE_SCHEME_MOORE // Write register and pop is not in same cycle 25 ,WRITE_QUEUE_SCHEME_MEALY // Write register and pop can be in same cycle 26 } Twrite_queue_scheme_t; 21 27 22 28 class write_queue_entry_t … … 78 84 }; // end namespace multi_execute_loop 79 85 }; // end namespace core 86 }; // end namespace behavioural 80 87 81 }; // end namespace behavioural 88 template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t& x) 89 { 90 switch (x) 91 { 92 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE : return "moore"; break; 93 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY : return "mealy"; break; 94 default : return ""; break; 95 } 96 }; 97 98 template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(const std::string& x) 99 { 100 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE))) == 0) or 101 (x.compare("moore") == 0)) 102 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MOORE; 103 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY))) == 0) or 104 (x.compare("mealy") == 0)) 105 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::WRITE_QUEUE_SCHEME_MEALY; 106 107 throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\"")); 108 }; 109 82 110 }; // end namespace morpheo 83 111 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
r113 r115 139 139 Tcontrol_t internal_GPR_WRITE_VAL; 140 140 Tcontrol_t internal_SPR_WRITE_VAL; 141 142 // function pointer 143 // public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_transition) (void); 144 // public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_genMoore ) (void); 145 // public : void (morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Write_queue::*function_genMealy ) (void); 141 146 #endif 142 147 … … 167 172 public : void transition (void); 168 173 public : void genMoore (void); 174 public : void genMealy (void); 169 175 #endif 170 176 #ifdef STATISTICS -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
r113 r115 20 20 #undef FUNCTION 21 21 #define FUNCTION "Write_queue::Parameters" 22 Parameters::Parameters (uint32_t size_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 bool is_toplevel): 22 Parameters::Parameters (uint32_t size_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 Twrite_queue_scheme_t queue_scheme , 33 bool is_toplevel ): 33 34 behavioural::Parameters ("Write_queue") 34 35 { … … 43 44 _nb_special_register = nb_special_register; 44 45 _nb_bypass_write = nb_bypass_write ; 46 _queue_scheme = queue_scheme ; 45 47 46 48 _nb_gpr_write = 1; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_print.cpp
r81 r115 38 38 xml.singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register)); xml.singleton_end(); 39 39 xml.singleton_begin("nb_bypass_write "); xml.attribut("value",toString(_nb_bypass_write )); xml.singleton_end(); 40 xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); 40 41 xml.balise_close(); 41 42 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp
r113 r115 84 84 SC_METHOD (genMoore); 85 85 dont_initialize (); 86 sensitive << (*(in_CLOCK)).neg(); 86 sensitive << (*(in_CLOCK)).neg(); // need internal register 87 87 88 88 # ifdef SYSTEMCASS_SPECIFIC 89 89 // List dependency information 90 90 # endif 91 91 92 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY) 93 { 94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy"); 95 96 SC_METHOD (genMealy); 97 dont_initialize (); 98 sensitive << (*(in_CLOCK)).neg(); // need internal register 99 for (uint32_t i=0; i<_param->_nb_gpr_write; ++i) 100 sensitive << (*(in_GPR_WRITE_ACK [i])); 101 for (uint32_t i=0; i<_param->_nb_spr_write; ++i) 102 sensitive << (*(in_SPR_WRITE_ACK [i])); 103 104 # ifdef SYSTEMCASS_SPECIFIC 105 // List dependency information 106 # endif 107 } 108 92 109 #endif 93 110 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
r103 r115 26 26 log_function(Write_queue,FUNCTION,_name.c_str()); 27 27 28 // -----[ Interface "Write_queue_in" ]--------------------------------29 {30 internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue;31 32 PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK);33 }34 35 // -----[ Interface "Write_queue_out" ]--------------------------------36 {37 // TODO : make a genMealy version38 internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty() ) and39 (not _queue->front()->_write_rd) and40 (not _queue->front()->_write_re));41 42 PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);43 44 if (internal_WRITE_QUEUE_OUT_VAL)45 {46 if (_param->_have_port_context_id)47 PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id );48 if (_param->_have_port_front_end_id)49 PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );50 if (_param->_have_port_ooo_engine_id)51 PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);52 if (_param->_have_port_rob_ptr )53 PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id );54 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation );55 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type );56 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re );57 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception );58 PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence );59 PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address );60 PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd );61 }62 }63 64 // -----[ Interface "gpr_write" ]-------------------------------------65 // -----[ Interface "spr_write" ]-------------------------------------66 {67 bool val = not _queue->empty();68 69 internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd;70 internal_SPR_WRITE_VAL = val and _queue->front()->_write_re;71 72 PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);73 PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);74 75 if (val)76 {77 if (_param->_have_port_ooo_engine_id)78 {79 PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);80 PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);81 }82 PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd);83 PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd );84 PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re);85 PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re );86 }87 }88 28 // -----[ Interface "bypass_write" ]---------------------------------- 89 29 { … … 121 61 } 122 62 } 63 64 // -----[ Interface "Write_queue_in" ]-------------------------------- 65 { 66 internal_WRITE_QUEUE_IN_ACK = _queue->size() < _param->_size_queue; 67 68 PORT_WRITE(out_WRITE_QUEUE_IN_ACK, internal_WRITE_QUEUE_IN_ACK); 69 } 70 71 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MOORE) 72 { 73 // -----[ Interface "gpr_write" ]------------------------------------- 74 // -----[ Interface "spr_write" ]------------------------------------- 75 { 76 bool val = not _queue->empty(); 77 78 internal_GPR_WRITE_VAL = val and _queue->front()->_write_rd; 79 internal_SPR_WRITE_VAL = val and _queue->front()->_write_re; 80 81 PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL); 82 PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL); 83 84 if (val) 85 { 86 if (_param->_have_port_ooo_engine_id) 87 { 88 PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); 89 PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id); 90 } 91 PORT_WRITE(out_GPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_rd); 92 PORT_WRITE(out_GPR_WRITE_DATA [0], _queue->front()->_data_rd ); 93 PORT_WRITE(out_SPR_WRITE_NUM_REG [0], _queue->front()->_num_reg_re); 94 PORT_WRITE(out_SPR_WRITE_DATA [0], _queue->front()->_data_re ); 95 } 96 } 97 98 // -----[ Interface "Write_queue_out" ]-------------------------------- 99 { 100 internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty() ) and 101 (not _queue->front()->_write_rd) and 102 (not _queue->front()->_write_re)); 103 104 PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL); 105 106 if (internal_WRITE_QUEUE_OUT_VAL) 107 { 108 if (_param->_have_port_context_id) 109 PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID , _queue->front()->_context_id ); 110 if (_param->_have_port_front_end_id) 111 PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id ); 112 if (_param->_have_port_ooo_engine_id) 113 PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id); 114 if (_param->_have_port_rob_ptr ) 115 PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID , _queue->front()->_packet_id ); 116 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); 117 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); 118 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); 119 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); 120 PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE , _queue->front()->_no_sequence ); 121 PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS , _queue->front()->_address ); 122 PORT_WRITE(out_WRITE_QUEUE_OUT_DATA , _queue->front()->_data_rd ); 123 } 124 } 125 126 } // end WRITE_QUEUE_SCHEME_MOORE 123 127 log_end(Write_queue,FUNCTION); 124 128 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h
r88 r115 28 28 { 29 29 //-----[ fields ]------------------------------------------------------------ 30 public : uint32_t _size_write_queue ; 31 public : uint32_t _size_execute_queue ; 32 public : uint32_t _nb_context ; 33 public : uint32_t _nb_front_end ; 34 public : uint32_t _nb_ooo_engine ; 35 public : uint32_t _nb_packet ; 36 //public : uint32_t _size_general_data ; 37 public : uint32_t _nb_general_register ; 38 //public : uint32_t _size_special_data ; 39 public : uint32_t _nb_special_register ; 40 public : uint32_t _nb_bypass_write ; 30 public : uint32_t _size_write_queue ; 31 public : uint32_t _size_execute_queue ; 32 public : uint32_t _nb_context ; 33 public : uint32_t _nb_front_end ; 34 public : uint32_t _nb_ooo_engine ; 35 public : uint32_t _nb_packet ; 36 //public : uint32_t _size_general_data ; 37 public : uint32_t _nb_general_register ; 38 //public : uint32_t _size_special_data ; 39 public : uint32_t _nb_special_register ; 40 public : uint32_t _nb_bypass_write ; 41 public : write_queue::Twrite_queue_scheme_t _write_queue_scheme ; 41 42 42 public : uint32_t _nb_gpr_write ;43 public : uint32_t _nb_spr_write ;44 45 //public : uint32_t _size_context_id ;46 //public : uint32_t _size_front_end_id ;47 //public : uint32_t _size_ooo_engine_id ;48 //public : uint32_t _size_packet_id ;49 //public : uint32_t _size_general_register ;50 //public : uint32_t _size_special_register ;51 52 public : bool _have_component_execute_queue ;53 //public : bool _have_port_context_id ;54 //public : bool _have_port_front_end_id ;55 //public : bool _have_port_ooo_engine_id ;56 //public : bool _have_port_packet_id ;43 public : uint32_t _nb_gpr_write ; 44 public : uint32_t _nb_spr_write ; 45 46 //public : uint32_t _size_context_id ; 47 //public : uint32_t _size_front_end_id ; 48 //public : uint32_t _size_ooo_engine_id ; 49 //public : uint32_t _size_packet_id ; 50 //public : uint32_t _size_general_register ; 51 //public : uint32_t _size_special_register ; 52 53 public : bool _have_component_execute_queue ; 54 //public : bool _have_port_context_id ; 55 //public : bool _have_port_front_end_id ; 56 //public : bool _have_port_ooo_engine_id ; 57 //public : bool _have_port_packet_id ; 57 58 58 59 public : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue ::Parameters * _param_write_queue; … … 60 61 61 62 //-----[ methods ]----------------------------------------------------------- 62 public : Parameters (uint32_t size_write_queue , 63 uint32_t size_execute_queue , 64 uint32_t nb_context , 65 uint32_t nb_front_end , 66 uint32_t nb_ooo_engine , 67 uint32_t nb_packet , 68 uint32_t size_general_data , 69 uint32_t nb_general_register, 70 uint32_t size_special_data , 71 uint32_t nb_special_register, 72 uint32_t nb_bypass_write , 73 bool is_toplevel=false); 63 public : Parameters (uint32_t size_write_queue , 64 uint32_t size_execute_queue , 65 uint32_t nb_context , 66 uint32_t nb_front_end , 67 uint32_t nb_ooo_engine , 68 uint32_t nb_packet , 69 uint32_t size_general_data , 70 uint32_t nb_general_register, 71 uint32_t size_special_data , 72 uint32_t nb_special_register, 73 uint32_t nb_bypass_write , 74 write_queue::Twrite_queue_scheme_t write_queue_scheme , 75 bool is_toplevel=false); 74 76 //public : Parameters (Parameters & param) ; 75 77 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Parameters.cpp
r113 r115 19 19 #undef FUNCTION 20 20 #define FUNCTION "Write_unit::Parameters" 21 Parameters::Parameters (uint32_t size_write_queue , 22 uint32_t size_execute_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 bool is_toplevel ): 21 Parameters::Parameters (uint32_t size_write_queue , 22 uint32_t size_execute_queue , 23 uint32_t nb_context , 24 uint32_t nb_front_end , 25 uint32_t nb_ooo_engine , 26 uint32_t nb_packet , 27 uint32_t size_general_data , 28 uint32_t nb_general_register, 29 uint32_t size_special_data , 30 uint32_t nb_special_register, 31 uint32_t nb_bypass_write , 32 write_queue::Twrite_queue_scheme_t write_queue_scheme , 33 bool is_toplevel): 33 34 behavioural::Parameters("Write_unit") 34 35 { … … 44 45 _nb_special_register = nb_special_register; 45 46 _nb_bypass_write = nb_bypass_write ; 46 47 _write_queue_scheme = write_queue_scheme ; 48 47 49 _nb_gpr_write = 1; 48 50 _nb_spr_write = 1; … … 50 52 _have_component_execute_queue = _size_execute_queue > 0; 51 53 52 _param_write_queue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue ::Parameters(_size_write_queue , 53 _nb_context , 54 _nb_front_end , 55 _nb_ooo_engine , 56 _nb_packet , 57 size_general_data , 58 _nb_general_register, 59 size_special_data , 60 _nb_special_register, 61 _nb_bypass_write ); 54 _param_write_queue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue ::Parameters 55 (_size_write_queue , 56 _nb_context , 57 _nb_front_end , 58 _nb_ooo_engine , 59 _nb_packet , 60 size_general_data , 61 _nb_general_register, 62 size_special_data , 63 _nb_special_register, 64 _nb_bypass_write , 65 _write_queue_scheme ); 62 66 63 67 if (_have_component_execute_queue) 64 _param_execute_queue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Parameters(_size_execute_queue , 65 _nb_context , 66 _nb_front_end , 67 _nb_ooo_engine , 68 _nb_packet , 69 size_general_data , 70 size_special_data ); 71 68 _param_execute_queue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Parameters 69 (_size_execute_queue , 70 _nb_context , 71 _nb_front_end , 72 _nb_ooo_engine , 73 _nb_packet , 74 size_general_data , 75 size_special_data ); 76 72 77 test(); 73 78 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp
r112 r115 111 111 if (usage_is_set(_usage,USE_SYSTEMC)) 112 112 { 113 ALLOC3(_destination,std::list<destination_t>,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type); ;113 ALLOC3(_destination,std::list<destination_t>,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type); 114 114 } 115 115 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp
r112 r115 69 69 DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_NUM_REG_RD , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_general_register ); 70 70 71 DELETE3(_destination,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type); ;71 DELETE3(_destination,_param->_nb_read_unit,_param->_nb_thread,_param->_nb_type); 72 72 } 73 73 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_min.cfg
r88 r115 25 25 1 1 +1 # size_execute_queue [0] [nb_write_unit] 26 26 1 1 +1 # nb_bypass_write [0] [nb_write_unit] 27 0 1 +1 # write_queue_scheme [0] [nb_write_unit] 27 28 1 1 +1 # nb_gpr_bank 28 29 1 1 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2a.cfg
r88 r115 25 25 4 4 *4 # size_execute_queue [0] [nb_write_unit] 26 26 2 2 +1 # nb_bypass_write [0] [nb_write_unit] 27 0 1 +1 # write_queue_scheme [0] [nb_write_unit] 27 28 4 4 +1 # nb_gpr_bank 28 29 1 1 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_2b.cfg
r88 r115 43 43 1 1 +1 # nb_bypass_write [2] [nb_write_unit] 44 44 4 4 +1 # nb_bypass_write [3] [nb_write_unit] 45 0 0 +1 # write_queue_scheme [0] [nb_write_unit] 46 0 1 +1 # write_queue_scheme [1] [nb_write_unit] 47 0 0 +1 # write_queue_scheme [2] [nb_write_unit] 48 0 1 +1 # write_queue_scheme [3] [nb_write_unit] 45 49 4 4 +1 # nb_gpr_bank 46 50 2 2 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_3a.cfg
r88 r115 44 44 1 1 +1 # nb_bypass_write [2] [nb_write_unit] 45 45 4 4 +1 # nb_bypass_write [3] [nb_write_unit] 46 0 0 +1 # write_queue_scheme [0] [nb_write_unit] 47 0 1 +1 # write_queue_scheme [1] [nb_write_unit] 48 0 0 +1 # write_queue_scheme [2] [nb_write_unit] 49 0 1 +1 # write_queue_scheme [3] [nb_write_unit] 46 50 4 4 +1 # nb_gpr_bank 47 51 2 2 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_1_execute_6a.cfg
r88 r115 47 47 1 1 +1 # nb_bypass_write [2] [nb_write_unit] 48 48 4 4 +1 # nb_bypass_write [3] [nb_write_unit] 49 0 0 +1 # write_queue_scheme [0] [nb_write_unit] 50 0 1 +1 # write_queue_scheme [1] [nb_write_unit] 51 0 0 +1 # write_queue_scheme [2] [nb_write_unit] 52 0 1 +1 # write_queue_scheme [3] [nb_write_unit] 49 53 4 4 +1 # nb_gpr_bank 50 54 2 2 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2a.cfg
r88 r115 25 25 4 4 *4 # size_execute_queue [0] [nb_write_unit] 26 26 2 2 +1 # nb_bypass_write [0] [nb_write_unit] 27 0 0 +1 # write_queue_scheme [0] [nb_write_unit] 27 28 4 4 +1 # nb_gpr_bank 28 29 1 1 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2b.cfg
r88 r115 25 25 4 4 *4 # size_execute_queue [0] [nb_write_unit] 26 26 2 2 +1 # nb_bypass_write [0] [nb_write_unit] 27 0 1 +1 # write_queue_scheme [0] [nb_write_unit] 27 28 4 4 +1 # nb_gpr_bank 28 29 1 1 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/config_thread_8_execute_2c.cfg
r88 r115 25 25 4 4 *4 # size_execute_queue [0] [nb_write_unit] 26 26 2 2 +1 # nb_bypass_write [0] [nb_write_unit] 27 0 0 +1 # write_queue_scheme [0] [nb_write_unit] 27 28 4 4 +1 # nb_gpr_bank 28 29 1 1 +1 # nb_gpr_port_read_by_bank -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/SelfTest/src/main.cpp
r88 r115 39 39 err (_(" * size_execute_queue [nb_write_unit] (uint32_t )\n")); 40 40 err (_(" * nb_bypass_write [nb_write_unit] (uint32_t )\n")); 41 err (_(" * write_queue_scheme [nb_write_unit] (Twrite_queue_scheme_t)\n")); 41 42 err (_(" * nb_gpr_bank (uint32_t )\n")); 42 43 err (_(" * nb_gpr_port_read_by_bank (uint32_t )\n")); … … 97 98 1*nb_functionnal_unit+ 98 99 8*nb_load_store_unit+ 99 3*nb_write_unit+100 4*nb_write_unit+ 100 101 4*nb_ooo_engine+ 101 102 // sum_execute_unit_port*nb_write_unit+ … … 167 168 1*nb_functionnal_unit+ 168 169 8*nb_load_store_unit+ 169 3*nb_write_unit+170 4*nb_write_unit+ 170 171 4*nb_ooo_engine+ 171 172 sum_execute_unit_port*nb_write_unit+ … … 196 197 for (uint32_t i=0; i<nb_write_unit; i++) 197 198 nb_bypass_write [i] = atoi(argv[x++]); 199 200 multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme = new multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t [nb_write_unit]; 201 for (uint32_t i=0; i<nb_write_unit; i++) 202 write_queue_scheme [i] = fromString<multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t>(argv[x++]); 198 203 199 204 uint32_t nb_gpr_bank = atoi(argv[x++]); … … 339 344 size_execute_queue , 340 345 nb_bypass_write , 346 write_queue_scheme , 341 347 342 348 nb_gpr_bank , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h
r88 r115 73 73 public : uint32_t * _size_execute_queue ; //[nb_write_unit] 74 74 public : uint32_t * _nb_bypass_write ; //[nb_write_unit] 75 public : multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * _write_queue_scheme; //[nb_write_unit] 76 75 77 // * register_unit 76 78 public : uint32_t _nb_gpr_read ; … … 172 174 uint32_t * size_execute_queue ,//[nb_write_unit] 173 175 uint32_t * nb_bypass_write ,//[nb_write_unit] 174 176 multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_unit] 177 175 178 uint32_t nb_gpr_bank , 176 179 uint32_t nb_gpr_port_read_by_bank , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp
r109 r115 50 50 uint32_t * size_execute_queue ,//[nb_write_unit] 51 51 uint32_t * nb_bypass_write ,//[nb_write_unit] 52 multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_unit] 52 53 53 54 uint32_t nb_gpr_bank , … … 108 109 _size_execute_queue = size_execute_queue ; 109 110 _nb_bypass_write = nb_bypass_write ; 111 _write_queue_scheme = write_queue_scheme ; 110 112 111 113 _nb_gpr_bank = nb_gpr_bank ; … … 456 458 size_special_data , 457 459 _max_nb_special_register , 458 _nb_bypass_write [i] );459 460 _nb_bypass_write [i], 461 _write_queue_scheme [i]); 460 462 461 463 log_printf(TRACE,Execute_loop,FUNCTION,"Parameters : read_unit_to_execution_unit"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp
r112 r115 112 112 } 113 113 114 DELETE1(reg_QUEUE,_param->_nb_bank); break; 114 DELETE1(reg_QUEUE,_param->_nb_bank); 115 break; 115 116 } 116 117 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp
r111 r115 63 63 // ....... max ...X... min ....... KO 64 64 65 Tcontrol_t is_valid = ((depth == depth_min) or 66 depth_full or 67 ((depth_min <= depth_max)? 68 ((depth >= depth_min) and (depth <=depth_max)): 69 ((depth >= depth_min) or (depth <=depth_max)))); 65 Tcontrol_t is_valid = true; 66 67 // Tcontrol_t is_valid = ((depth == depth_min) or 68 // depth_full or 69 // ((depth_min <= depth_max)? 70 // ((depth >= depth_min) and (depth <=depth_max)): 71 // ((depth >= depth_min) or (depth <=depth_max)))); 70 72 //Tcontrol_t is_valid = ((depth == depth_min) or 71 73 // ((depth_min < depth_max)? -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_genMealy_decod_out.cpp
r111 r115 66 66 // ....... max ...X... min ....... KO 67 67 68 Tcontrol_t is_valid = ((depth == depth_min) or 69 depth_full or 70 ((depth_min <= depth_max)? 71 ((depth >= depth_min) and (depth <=depth_max)): 72 ((depth >= depth_min) or (depth <=depth_max)))); 68 Tcontrol_t is_valid = true; 69 // Tcontrol_t is_valid = ((depth == depth_min) or 70 // depth_full or 71 // ((depth_min <= depth_max)? 72 // ((depth >= depth_min) and (depth <=depth_max)): 73 // ((depth >= depth_min) or (depth <=depth_max)))); 73 74 //Tcontrol_t is_valid = ((depth == depth_min) or 74 75 // ((depth_min < depth_max)? -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_deallocation.cpp
r112 r115 63 63 if (_param->_have_component_victim) 64 64 { 65 delete [] _component_sort; 66 delete _component_victim; 65 for (uint32_t i=0; i<_param->_nb_inst_predict; i++) 66 delete _component_sort [i]; 67 delete [] _component_sort; 68 delete _component_victim; 67 69 } 68 70 delete _component_branch_target_buffer_glue; 69 71 delete _component_branch_target_buffer_register; 70 72 71 73 delete _component; 72 74 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Parameters.h
r112 r115 44 44 45 45 public : Thistory_t _bht_history_mask ; 46 public : Thistory_t _bht_history_ rshift;46 public : Thistory_t _bht_history_shift ; 47 47 public : Thistory_t _pht_history_mask ; 48 public : Thistory_t _pht_history_ rshift;48 public : Thistory_t _pht_history_shift ; 49 49 50 50 public : uint32_t _bht_size_address ; … … 55 55 public : uint32_t _pht_size_bank ; 56 56 public : Taddress_t _pht_address_share_mask ; 57 public : Taddress_t _pht_address_share_ lshift;57 public : Taddress_t _pht_address_share_shift ; 58 58 public : Taddress_t _pht_address_bank_mask ; 59 public : Taddress_t _pht_address_bank_ rshift;59 public : Taddress_t _pht_address_bank_shift ; 60 60 61 61 public : Thistory_t _bht_init_take ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h
r112 r115 88 88 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 89 89 private : Thistory_t * reg_BHT ;//[bht_nb_shifter] 90 private : Thistory_t ** reg_PHT ;//[pht_nb_ counter][pht_nb_bank]90 private : Thistory_t ** reg_PHT ;//[pht_nb_bank][pht_size_bank] 91 91 92 92 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp
r112 r115 57 57 // MSB : pht_history 58 58 // LSB : bht_history 59 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _have_bht : %d",_have_bht ); 60 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_size_shifter : %d",_bht_size_shifter); 61 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_nb_shifter : %d",_bht_nb_shifter ); 62 63 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _have_pht : %d",_have_pht ); 64 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_size_counter : %d",_pht_size_counter); 65 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_nb_counter : %d",_pht_nb_counter ); 59 66 60 67 _size_history = _bht_size_shifter + _pht_size_counter; 61 68 _bht_history_mask = gen_mask<Thistory_t>(_bht_size_shifter); 62 _bht_history_ rshift= 0;69 _bht_history_shift = 0; 63 70 _pht_history_mask = gen_mask<Thistory_t>(_pht_size_counter); 64 _pht_history_ rshift= _bht_size_shifter;71 _pht_history_shift = _bht_size_shifter; 65 72 66 73 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _size_history : %d",_size_history ); 67 74 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_mask : 0x%x",_bht_history_mask ); 68 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_ rshift : %d",_bht_history_rshift);75 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_shift : %d",_bht_history_shift ); 69 76 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_mask : 0x%x",_pht_history_mask ); 70 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_ rshift : %d",_pht_history_rshift);77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_shift : %d",_pht_history_shift ); 71 78 72 _bht_init_take = (Thistory_t)(-1)&_bht_history_mask;79 _bht_init_take = static_cast<Thistory_t>(-1)&_bht_history_mask; 73 80 _bht_init_ntake = 0; 74 81 _pht_init_take = (1<<(_pht_size_counter-1)); // size = 4 : 1000/2 … … 91 98 _pht_counter_max = (1<<_pht_size_counter)-1; 92 99 93 _pht_nb_bank = (_pht_nb_counter - (1<<_bht_size_shifter))+1; 94 _pht_size_bank = _pht_nb_counter / _pht_nb_bank; 100 _pht_size_bank = (_have_bht)?(1<<_bht_size_shifter):1; 101 _pht_nb_bank = _pht_nb_counter / _pht_size_bank; 102 103 // -------->| 104 // +---+ | 105 // | | |---> 106 // ---> --->| 107 // | | | 108 // +---+ 109 // 95 110 96 111 _pht_address_share_mask = gen_mask<Taddress_t>(_pht_size_address_share); 97 _pht_address_share_ lshift= _bht_size_shifter-_pht_size_address_share;112 _pht_address_share_shift = _bht_size_shifter-_pht_size_address_share; 98 113 _pht_address_bank_mask = gen_mask<Taddress_t>(log2(_pht_nb_bank)); 99 _pht_address_bank_ rshift= _pht_size_address_share;114 _pht_address_bank_shift = _pht_size_address_share; 100 115 101 116 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_nb_bank : %d" ,_pht_nb_bank ); 102 117 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_size_bank : %d" ,_pht_size_bank ); 103 118 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_share_mask : 0x%x",_pht_address_share_mask ); 104 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_share_ lshift : %d" ,_pht_address_share_lshift);119 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_share_shift : %d" ,_pht_address_share_shift ); 105 120 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_bank_mask : 0x%x",_pht_address_bank_mask ); 106 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_bank_ rshift : %d" ,_pht_address_bank_rshift);121 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_address_bank_shift : %d" ,_pht_address_bank_shift ); 107 122 } 108 123 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp
r111 r115 52 52 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %d",bht_num_reg); 53 53 54 history = (bht_history << _param->_bht_history_ rshift)&_param->_bht_history_mask ;54 history = (bht_history << _param->_bht_history_shift )&_param->_bht_history_mask ; 55 55 direction = (bht_history >> (_param->_bht_size_shifter-1))&1; 56 56 … … 61 61 if (_param->_have_pht) 62 62 { 63 Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_rshift)&_param->_pht_address_bank_mask; 64 Thistory_t pht_num_reg = (pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_lshift)); 63 Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_shift )&_param->_pht_address_bank_mask; 64 Thistory_t pht_num_reg = (pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_shift)); 65 66 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x%x",pht_bht_history); 67 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %d",pht_num_reg); 68 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %d",pht_num_bank); 69 65 70 Thistory_t pht_history = reg_PHT [pht_num_bank][pht_num_reg]; 66 71 67 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x%x",pht_bht_history);68 72 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history : 0x%x",pht_history); 69 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %d",pht_num_reg);70 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %d",pht_num_bank);71 73 72 history |= (pht_history << _param->_pht_history_ rshift)&_param->_pht_history_mask;74 history |= (pht_history << _param->_pht_history_shift )&_param->_pht_history_mask; 73 75 direction = (pht_history >> (_param->_pht_size_counter-1))&1; 74 76 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp
r112 r115 117 117 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht"); 118 118 119 Thistory_t bht_history = (history>>_param->_bht_history_ rshift)&_param->_bht_history_mask;119 Thistory_t bht_history = (history>>_param->_bht_history_shift )&_param->_bht_history_mask; 120 120 Thistory_t bht_num_reg = address & _param->_bht_address_mask; 121 121 … … 125 125 // BHT : shift register 126 126 if (not history_val) 127 bht_history = (direction)?_param->_bht_init_take:_param->_bht_init_ntake; 127 { 128 bht_history = (direction)?_param->_bht_init_take:_param->_bht_init_ntake; 129 } 128 130 else 129 bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ; 131 { 132 bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ; 133 } 130 134 131 135 pht_bht_history = bht_history; … … 138 142 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht"); 139 143 140 Thistory_t pht_history = (history>>_param->_pht_history_ rshift)&_param->_pht_history_mask;141 Thistory_t pht_num_ reg = pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_lshift);142 Thistory_t pht_num_ bank= (address>>_param->_pht_address_bank_rshift)&_param->_pht_address_bank_mask;144 Thistory_t pht_history = (history>>_param->_pht_history_shift )&_param->_pht_history_mask; 145 Thistory_t pht_num_bank= (address>>_param->_pht_address_bank_shift )&_param->_pht_address_bank_mask; 146 Thistory_t pht_num_reg = pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_shift); 143 147 144 148 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %x",pht_bht_history); … … 149 153 // PHT : saturation counter 150 154 if (not history_val) 151 pht_history = (direction)?_param->_pht_init_take:_param->_pht_init_ntake; 155 { 156 pht_history = (direction)?_param->_pht_init_take:_param->_pht_init_ntake; 157 } 152 158 else 153 pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history)); 159 { 160 pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history)); 161 } 154 162 155 163 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): %x",pht_history); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
r112 r115 53 53 public : Stat * _stat; 54 54 55 private : counter_t *** _stat_nb_branch_hit ; //[nb_context][MAX_BRANCH_CONDITION] 56 private : counter_t *** _stat_nb_branch_miss ; //[nb_context][MAX_BRANCH_CONDITION] 57 private : counter_t ** _stat_nb_branch_unused ; //[nb_context] 58 private : counter_t ** _stat_ufpt_queue_nb_elt ; //[nb_context] 59 private : counter_t ** _stat_upt_queue_nb_elt ; //[nb_context] 60 55 private : counter_t *** _stat_nb_branch_hit ; //[nb_context][MAX_BRANCH_CONDITION] 56 private : counter_t *** _stat_nb_branch_miss ; //[nb_context][MAX_BRANCH_CONDITION] 57 private : counter_t ** _stat_nb_branch_unused ; //[nb_context] 58 private : counter_t ** _stat_ufpt_queue_nb_elt ; //[nb_context] 59 private : counter_t ** _stat_upt_queue_nb_elt ; //[nb_context] 60 61 private : counter_t ** _stat_nb_branch_ifetch_prediction; //[nb_context] 62 private : counter_t ** _stat_nb_branch_accurate ; //[nb_context] 61 63 #endif 62 64 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp
r97 r115 31 31 32 32 { 33 ALLOC2(_stat_nb_branch_hit ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION); 34 ALLOC2(_stat_nb_branch_miss ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION); 35 ALLOC1(_stat_nb_branch_unused ,counter_t *,_param->_nb_context); 33 ALLOC2(_stat_nb_branch_hit ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION); 34 ALLOC2(_stat_nb_branch_miss ,counter_t *,_param->_nb_context,MAX_BRANCH_CONDITION); 35 ALLOC1(_stat_nb_branch_unused ,counter_t *,_param->_nb_context); 36 37 ALLOC1(_stat_nb_branch_ifetch_prediction,counter_t *,_param->_nb_context); 38 ALLOC1(_stat_nb_branch_accurate ,counter_t *,_param->_nb_context); 36 39 37 40 for (uint32_t i=0; i<_param->_nb_context; ++i) … … 74 77 toString(_("Percent miss by branchement (context %d)"),i)); 75 78 76 _stat_nb_branch_unused [i] = _stat->create_counter("nb_branch_unused_" +toString(i),"",toString(_("Branch unused (previous speculation) (context %d)"),i)); 79 _stat_nb_branch_unused [i] = _stat->create_counter("nb_branch_unused_" +toString(i),"",toString(_("Branch unused (previous speculation) (context %d)"),i)); 80 _stat_nb_branch_ifetch_prediction [i] = _stat->create_counter("nb_branch_ifetch_prediction_"+toString(i),"",toString(_("Branch used and ifetch prediction (context %d)"),i)); 81 _stat_nb_branch_accurate [i] = _stat->create_counter("nb_branch_accurate_" +toString(i),"",toString(_("Branch and is accurate (context %d)"),i)); 82 83 _stat->create_expr("nb_branch_used_"+toString(i),sum_branchement,TYPE_COUNTER,"",_("Branch used")); 77 84 } 78 85 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
r113 r115 468 468 reg_UPDATE_PREDICTION_TABLE [context][depth]._retire_ok = true; 469 469 reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_prediction = ko; 470 471 #ifdef STATISTICS 472 if (usage_is_set(_usage,USE_STATISTICS)) 473 { 474 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction) 475 (*_stat_nb_branch_ifetch_prediction [context])++; 476 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate) 477 (*_stat_nb_branch_accurate [context])++; 478 } 479 #endif 470 480 } 471 481 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
r112 r115 187 187 188 188 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 189 for (uint32_t i=0; i<_param->_nb_bank; ++i) 190 while(not _rob[i].empty()) 191 { 192 entry_t * entry = _rob[i].front(); 193 delete entry; 194 _rob[i].pop_front(); 195 } 196 189 197 DELETE2(_nb_cycle_idle ,_param->_nb_front_end,_param->_nb_context [it1]); 190 198 DELETE1(_rob ,_param->_nb_bank); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r114 r115 28 28 { 29 29 // Clear all bank 30 for (uint32_t i=0; i<_param->_nb_bank; i++)30 for (uint32_t i=0; i<_param->_nb_bank; ++i) 31 31 { 32 _rob [i].clear(); 32 while(not _rob[i].empty()) 33 { 34 delete _rob[i].front(); 35 _rob[i].pop_front(); 36 } 33 37 reg_BANK_PTR [i] = 0; 34 38 } … … 126 130 127 131 Texception_t exception = PORT_READ(in_INSERT_EXCEPTION [x][y]); 132 Tcontrol_t no_execute = PORT_READ(in_INSERT_NO_EXECUTE [x][y]); 128 133 129 134 log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id); … … 147 152 entry->exception = exception; 148 153 entry->exception_use = PORT_READ(in_INSERT_EXCEPTION_USE [x][y]); 149 entry->use_store_queue = (type == TYPE_MEMORY) and ( is_store) ;150 entry->use_load_queue = (type == TYPE_MEMORY) and (not is_store) ;154 entry->use_store_queue = (type == TYPE_MEMORY) and ( is_store) and (not no_execute); 155 entry->use_load_queue = (type == TYPE_MEMORY) and (not is_store) and (not no_execute); 151 156 entry->store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE [x][y]); 152 157 entry->load_queue_ptr_write = (_param->_have_port_load_queue_ptr)?PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE [x][y]):0; … … 200 205 if (exception == EXCEPTION_NONE) 201 206 { 202 Tcontrol_t no_execute = PORT_READ(in_INSERT_NO_EXECUTE [x][y]);203 207 // no_execute : l.j, l.nop, l.rfe 204 208 … … 208 212 { 209 213 case TYPE_BRANCH : {entry->state=(no_execute==1)?ROB_BRANCH_COMPLETE:ROB_BRANCH_WAIT_END ; break;} 210 case TYPE_MEMORY : {entry->state=( is_store ==1)?ROB_STORE_WAIT_HEAD_OK:ROB_OTHER_WAIT_END; break;}214 case TYPE_MEMORY : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:(entry->state=(is_store ==1)?ROB_STORE_WAIT_HEAD_OK:ROB_OTHER_WAIT_END); break;} 211 215 default : {entry->state=(no_execute==1)?ROB_END_OK_SPECULATIVE:ROB_OTHER_WAIT_END; break;} 212 216 } … … 331 335 default : 332 336 { 333 throw ERRORMORPHEO(FUNCTION,toString(_("Commit : invalid state value (%s).\n"),toString(state).c_str()));337 throw ERRORMORPHEO(FUNCTION,toString(_("Commit [%d] : Bank [%d][%d], invalid state value (%s).\n"),x,i,j,toString(state).c_str())); 334 338 break; 335 339 } … … 442 446 reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; 443 447 448 delete entry; 444 449 _rob [num_bank].pop_front(); 445 delete entry;446 450 447 451 // Transaction on retire interface : reset watch dog timer. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
r111 r115 98 98 entry_t* entry = _issue_queue [num_bank].front(); 99 99 100 // have valid instruction, search a valid issue slot. 100 101 for (uint32_t j=0; j<_param->_nb_inst_issue; j++) 101 102 { 102 log_printf(TRACE,Issue_queue,FUNCTION," * Issue [%d]",j); 103 log_printf(TRACE,Issue_queue,FUNCTION," * issue_ack : %d",PORT_READ(in_ISSUE_OUT_ACK [j])); 104 log_printf(TRACE,Issue_queue,FUNCTION," * previous transaction : %d",val[j]); 105 log_printf(TRACE,Issue_queue,FUNCTION," * can issue type : %d",_param->_table_issue_type [j][entry->_type]); 103 Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [j]); 104 105 log_printf(TRACE,Issue_queue,FUNCTION," * Issue [%d]",j); 106 log_printf(TRACE,Issue_queue,FUNCTION," * issue_ack : %d",issue_ack); 107 log_printf(TRACE,Issue_queue,FUNCTION," * previous transaction : %d",val[j]); 108 log_printf(TRACE,Issue_queue,FUNCTION," * can issue type : %d",_param->_table_issue_type [j][entry->_type]); 106 109 107 110 // test if no previous transaction and can accept this type 108 if ( (val[j] == 0)and111 if (not val[j] and 109 112 _param->_table_issue_type [j][entry->_type] and 110 PORT_READ(in_ISSUE_OUT_ACK [j]))113 issue_ack) 111 114 { 112 log_printf(TRACE,Issue_queue,FUNCTION," * find : %d",j);115 log_printf(TRACE,Issue_queue,FUNCTION," * find !!!"); 113 116 114 117 // find a issue port -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
r112 r115 99 99 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 100 100 for (uint32_t i=0; i<_param->_nb_bank; i++) 101 if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_EMPTY))101 while (not _reexecute_queue [i].empty()) 102 102 { 103 entry_t * entry =_reexecute_queue [i].front();103 delete _reexecute_queue [i].front(); 104 104 _reexecute_queue [i].pop_front(); 105 delete entry;106 105 } 107 106 DELETE1(_reexecute_queue ,_param->_nb_bank); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/SelfTest/src/test.cpp
r108 r115 227 227 in_RENAME_IN_VAL [i][j]->write((rand()%100)<percent_transaction_rename_in); 228 228 in_RENAME_IN_FRONT_END_ID [i][j]->write(range<Tcontext_t >(rand(),_param->_size_front_end_id )); 229 in_RENAME_IN_CONTEXT_ID [i][j]->write(ran ge<Tcontext_t >(rand(),log2(_param->_nb_context[i]) ));229 in_RENAME_IN_CONTEXT_ID [i][j]->write(rand()%_param->_nb_context[i]); 230 230 in_RENAME_IN_DEPTH [i][j]->write(range<Tdepth_t >(rand(),_param->_size_depth )); 231 231 in_RENAME_IN_TYPE [i][j]->write(range<Ttype_t >(rand(),_param->_size_type )); … … 293 293 find = true; 294 294 295 Tcontext_t context_id = (_param->_have_port_context_id)?in_RENAME_IN_CONTEXT_ID [x][y]->read():0; 296 295 297 if (_param->_have_port_front_end_id) 296 298 TEST(Tcontext_t ,out_RENAME_OUT_FRONT_END_ID [i]->read(),in_RENAME_IN_FRONT_END_ID [x][y]->read()); 297 299 if (_param->_have_port_context_id) 298 TEST(Tcontext_t ,out_RENAME_OUT_CONTEXT_ID [i]->read(), in_RENAME_IN_CONTEXT_ID [x][y]->read());300 TEST(Tcontext_t ,out_RENAME_OUT_CONTEXT_ID [i]->read(),context_id); 299 301 if (_param->_have_port_depth) 300 302 TEST(Tdepth_t ,out_RENAME_OUT_DEPTH [i]->read(),in_RENAME_IN_DEPTH [x][y]->read()); 301 303 TEST(Ttype_t ,out_RENAME_OUT_TYPE [i]->read(),in_RENAME_IN_TYPE [x][y]->read()); 302 304 TEST(Toperation_t ,out_RENAME_OUT_OPERATION [i]->read(),in_RENAME_IN_OPERATION [x][y]->read()); 303 TEST(Tcontrol_t ,out_RENAME_OUT_NO_EXECUTE [i]->read(),in_RENAME_IN_NO_EXECUTE [x][y]->read()); 305 Tcontrol_t have_event = in_RETIRE_EVENT_STATE[x][context_id]->read() != EVENT_STATE_NO_EVENT; 306 Tcontrol_t no_execute = in_RENAME_IN_NO_EXECUTE [x][y]->read() or have_event; 307 TEST(Tcontrol_t ,out_RENAME_OUT_NO_EXECUTE [i]->read(),no_execute); 304 308 TEST(Tcontrol_t ,out_RENAME_OUT_IS_DELAY_SLOT[i]->read(),in_RENAME_IN_IS_DELAY_SLOT[x][y]->read()); 305 309 TEST(Tcontrol_t ,out_RENAME_OUT_HAS_IMMEDIAT [i]->read(),in_RENAME_IN_HAS_IMMEDIAT [x][y]->read()); 306 310 TEST(Tgeneral_data_t ,out_RENAME_OUT_IMMEDIAT [i]->read(),in_RENAME_IN_IMMEDIAT [x][y]->read()); 307 TEST(Tcontrol_t ,out_RENAME_OUT_READ_RA [i]->read(),in_RENAME_IN_READ_RA [x][y]->read() );311 TEST(Tcontrol_t ,out_RENAME_OUT_READ_RA [i]->read(),in_RENAME_IN_READ_RA [x][y]->read() and not have_event); 308 312 TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RA [i]->read(),in_RENAME_IN_NUM_REG_RA [x][y]->read()); 309 TEST(Tcontrol_t ,out_RENAME_OUT_READ_RB [i]->read(),in_RENAME_IN_READ_RB [x][y]->read() );313 TEST(Tcontrol_t ,out_RENAME_OUT_READ_RB [i]->read(),in_RENAME_IN_READ_RB [x][y]->read() and not have_event); 310 314 TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RB [i]->read(),in_RENAME_IN_NUM_REG_RB [x][y]->read()); 311 TEST(Tcontrol_t ,out_RENAME_OUT_READ_RC [i]->read(),in_RENAME_IN_READ_RC [x][y]->read() );315 TEST(Tcontrol_t ,out_RENAME_OUT_READ_RC [i]->read(),in_RENAME_IN_READ_RC [x][y]->read() and not have_event); 312 316 TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RC [i]->read(),in_RENAME_IN_NUM_REG_RC [x][y]->read()); 313 TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RD [i]->read(),in_RENAME_IN_WRITE_RD [x][y]->read() );317 TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RD [i]->read(),in_RENAME_IN_WRITE_RD [x][y]->read() and not have_event); 314 318 TEST(Tgeneral_address_t,out_RENAME_OUT_NUM_REG_RD [i]->read(),in_RENAME_IN_NUM_REG_RD [x][y]->read()); 315 TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RE [i]->read(),in_RENAME_IN_WRITE_RE [x][y]->read() );319 TEST(Tcontrol_t ,out_RENAME_OUT_WRITE_RE [i]->read(),in_RENAME_IN_WRITE_RE [x][y]->read() and not have_event); 316 320 TEST(Tspecial_address_t,out_RENAME_OUT_NUM_REG_RE [i]->read(),in_RENAME_IN_NUM_REG_RE [x][y]->read()); 317 321 TEST(Texception_t ,out_RENAME_OUT_EXCEPTION_USE[i]->read(),in_RENAME_IN_EXCEPTION_USE[x][y]->read()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
r112 r115 64 64 65 65 log_printf(TRACE,Rename_select,FUNCTION," * in_RENAME_OUT_ACK : %d",PORT_READ(in_RENAME_OUT_ACK[i])); 66 67 66 Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y]):0; 68 67 Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_RENAME_IN_CONTEXT_ID [x][y]):0; 68 69 log_printf(TRACE,Rename_select,FUNCTION," * front_end_id : %d",front_end_id); 70 log_printf(TRACE,Rename_select,FUNCTION," * context_id : %d",context_id); 69 71 70 Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y])); 71 // Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y])); 72 // Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y])); 73 // Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y])); 74 // Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y])); 75 // Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y])); 72 // Test if ROB is Flushed 73 Tevent_state_t event_state = PORT_READ(in_RETIRE_EVENT_STATE [x][context_id]); 74 Tcontrol_t have_event = (event_state != EVENT_STATE_NO_EVENT); 75 Tcontrol_t can_register_access = not have_event; 76 Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]) or have_event); 77 Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y]) and can_register_access); 78 Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y]) and can_register_access); 79 Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y]) and can_register_access); 80 Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and can_register_access); 81 Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and can_register_access); 82 // Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y])); 83 // Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y])); 84 // Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y])); 85 // Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y])); 86 // Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y])); 76 87 77 // Test if ROB is Flushed78 Tevent_state_t event_state = PORT_READ(in_RETIRE_EVENT_STATE [front_end_id][context_id]);79 Tcontrol_t can_register_access = (event_state == EVENT_STATE_NO_EVENT);88 log_printf(TRACE,Rename_select,FUNCTION," * event_state : %d",event_state); 89 log_printf(TRACE,Rename_select,FUNCTION," * no_execute (before) : %d",PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y])); 90 log_printf(TRACE,Rename_select,FUNCTION," * no_execute (after) : %d",no_execute); 80 91 81 Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y]) and can_register_access);82 Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y]) and can_register_access);83 Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y]) and can_register_access);84 Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and can_register_access);85 Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and can_register_access);86 87 92 if (_param->_have_port_front_end_id) 88 93 PORT_WRITE(out_RENAME_OUT_FRONT_END_ID [i],front_end_id); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/SelfTest/src/test.cpp
r88 r115 58 58 ALLOC1_SC_SIGNAL(out_INSERT_EXCEPTION ,"out_INSERT_EXCEPTION ",Texception_t ,_param->_nb_inst_insert); 59 59 ALLOC1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW ,"out_INSERT_NUM_REG_RE_PHY_NEW ",Tspecial_address_t,_param->_nb_inst_insert); 60 ALLOC1_SC_SIGNAL(out_INSERT_NO_EXECUTE ,"out_INSERT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_inst_insert); 61 60 62 ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_VAL ," in_INSERT_RENAME_SELECT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); 61 63 ALLOC1_SC_SIGNAL(out_INSERT_RENAME_SELECT_ACK ,"out_INSERT_RENAME_SELECT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); … … 67 69 // ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE ," in_INSERT_RENAME_SELECT_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_insert); 68 70 ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION ," in_INSERT_RENAME_SELECT_EXCEPTION ",Texception_t ,_param->_nb_inst_insert); 71 ALLOC1_SC_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE ," in_INSERT_RENAME_SELECT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_inst_insert); 72 69 73 ALLOC1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL ,"out_INSERT_REGISTER_TRANSLATION_VAL ",Tcontrol_t ,_param->_nb_inst_insert); 70 74 ALLOC1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK ," in_INSERT_REGISTER_TRANSLATION_ACK ",Tcontrol_t ,_param->_nb_inst_insert); … … 109 113 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_EXCEPTION ,_param->_nb_inst_insert); 110 114 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert); 115 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert); 116 111 117 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_VAL ,_param->_nb_inst_insert); 112 118 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_RENAME_SELECT_ACK ,_param->_nb_inst_insert); … … 120 126 // INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_EXCEPTION_USE ,_param->_nb_inst_insert); 121 127 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_EXCEPTION ,_param->_nb_inst_insert); 128 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_RENAME_SELECT_NO_EXECUTE ,_param->_nb_inst_insert); 129 122 130 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue,out_INSERT_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_insert); 123 131 INSTANCE1_SC_SIGNAL(_Rename_unit_Glue, in_INSERT_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_insert); … … 201 209 DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION ,_param->_nb_inst_insert); 202 210 DELETE1_SC_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert); 211 DELETE1_SC_SIGNAL(out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert); 212 203 213 DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_VAL ,_param->_nb_inst_insert); 204 214 DELETE1_SC_SIGNAL(out_INSERT_RENAME_SELECT_ACK ,_param->_nb_inst_insert); … … 210 220 // DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,_param->_nb_inst_insert); 211 221 DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION ,_param->_nb_inst_insert); 222 DELETE1_SC_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE ,_param->_nb_inst_insert); 223 212 224 DELETE1_SC_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_insert); 213 225 DELETE1_SC_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_insert); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/include/Rename_unit_Glue.h
r88 r115 75 75 public : SC_OUT(Texception_t ) ** out_INSERT_EXCEPTION ;//[nb_inst_insert] 76 76 public : SC_OUT(Tspecial_address_t) ** out_INSERT_NUM_REG_RE_PHY_NEW ;//[nb_inst_insert] 77 public : SC_OUT(Tcontrol_t ) ** out_INSERT_NO_EXECUTE ;//[nb_inst_insert] 77 78 78 79 public : SC_IN (Tcontrol_t ) ** in_INSERT_RENAME_SELECT_VAL ;//[nb_inst_insert] … … 85 86 public : SC_IN (Texception_t ) ** in_INSERT_RENAME_SELECT_EXCEPTION_USE ;//[nb_inst_insert] 86 87 public : SC_IN (Texception_t ) ** in_INSERT_RENAME_SELECT_EXCEPTION ;//[nb_inst_insert] 88 public : SC_IN (Tcontrol_t ) ** in_INSERT_RENAME_SELECT_NO_EXECUTE ;//[nb_inst_insert] 87 89 88 90 public : SC_OUT(Tcontrol_t ) ** out_INSERT_REGISTER_TRANSLATION_VAL ;//[nb_inst_insert] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp
r88 r115 106 106 //<< (*(in_INSERT_ACK [i])) 107 107 << (*(in_INSERT_RENAME_SELECT_VAL [i])) 108 << (*(in_INSERT_RENAME_SELECT_NO_EXECUTE [i])) 108 109 << (*(in_INSERT_REGISTER_TRANSLATION_ACK [i])) 109 110 << (*(in_INSERT_LOAD_STORE_QUEUE_POINTER_ACK [i])) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_allocation.cpp
r112 r115 71 71 ALLOC1_SIGNAL_OUT(out_INSERT_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception); 72 72 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW ,"NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register); 73 ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1); 74 73 75 ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_VAL ,"RENAME_SELECT_VAL" ,Tcontrol_t ,1); 74 76 ALLOC1_SIGNAL_OUT(out_INSERT_RENAME_SELECT_ACK ,"RENAME_SELECT_ACK" ,Tcontrol_t ,1); … … 80 82 // ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,"RENAME_SELECT_EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use); 81 83 ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_EXCEPTION ,"RENAME_SELECT_EXCEPTION" ,Texception_t ,_param->_size_exception); 84 ALLOC1_SIGNAL_IN ( in_INSERT_RENAME_SELECT_NO_EXECUTE ,"RENAME_SELECT_NO_EXECUTE" ,Tcontrol_t ,1); 85 82 86 ALLOC1_SIGNAL_OUT(out_INSERT_REGISTER_TRANSLATION_VAL ,"REGISTER_TRANSLATION_VAL" ,Tcontrol_t ,1); 83 87 ALLOC1_SIGNAL_IN ( in_INSERT_REGISTER_TRANSLATION_ACK ,"REGISTER_TRANSLATION_ACK" ,Tcontrol_t ,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_deallocation.cpp
r88 r115 39 39 DELETE1_SIGNAL(out_INSERT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception); 40 40 DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register); 41 DELETE1_SIGNAL(out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert,1); 42 41 43 DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_VAL ,_param->_nb_inst_insert,1); 42 44 DELETE1_SIGNAL(out_INSERT_RENAME_SELECT_ACK ,_param->_nb_inst_insert,1); … … 48 50 // DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION_USE ,_param->_nb_inst_insert,_param->_size_exception_use); 49 51 DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_EXCEPTION ,_param->_nb_inst_insert,_param->_size_exception); 52 DELETE1_SIGNAL( in_INSERT_RENAME_SELECT_NO_EXECUTE ,_param->_nb_inst_insert,1); 53 50 54 DELETE1_SIGNAL(out_INSERT_REGISTER_TRANSLATION_VAL ,_param->_nb_inst_insert,1); 51 55 DELETE1_SIGNAL( in_INSERT_REGISTER_TRANSLATION_ACK ,_param->_nb_inst_insert,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp
r110 r115 31 31 { 32 32 //Tcontrol_t ACK = PORT_READ(in_INSERT_ACK [i]); 33 Tcontrol_t NO_EXECUTE = PORT_READ(in_INSERT_RENAME_SELECT_NO_EXECUTE [i]); 33 34 Tcontrol_t RENAME_SELECT_VAL = PORT_READ(in_INSERT_RENAME_SELECT_VAL [i]); 34 35 Tcontrol_t REGISTER_TRANSLATION_ACK = PORT_READ(in_INSERT_REGISTER_TRANSLATION_ACK [i]); … … 54 55 // ACK and 55 56 RENAME_SELECT_VAL and 56 REGISTER_TRANSLATION_ACK ); 57 REGISTER_TRANSLATION_ACK and 58 not NO_EXECUTE ); 57 59 58 60 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * insert [%d]",i); 61 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * no_execute (r) : %d",NO_EXECUTE); 59 62 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * rename_select_val (r) : %d",RENAME_SELECT_VAL ); 60 63 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * rename_select_ack (w) : %d",RENAME_SELECT_ACK ); … … 64 67 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * load_store_queue_pointer_ack (r) : %d",LOAD_STORE_QUEUE_POINTER_ACK); 65 68 69 PORT_WRITE(out_INSERT_NO_EXECUTE [i], NO_EXECUTE ); 66 70 // PORT_WRITE(out_INSERT_VAL [i], VAL ); 67 71 PORT_WRITE(out_INSERT_RENAME_SELECT_ACK [i], RENAME_SELECT_ACK ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
r112 r115 362 362 #endif 363 363 364 PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_NO_EXECUTE" ,365 dest,"out_INSERT_" +toString(i)+"_NO_EXECUTE" );366 364 PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_IS_DELAY_SLOT", 367 365 dest,"out_INSERT_" +toString(i)+"_IS_DELAY_SLOT"); … … 435 433 COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+ "_EXCEPTION" , 436 434 dest, "in_INSERT_" +toString(i)+"_RENAME_SELECT_EXCEPTION" ); 435 COMPONENT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+ "_NO_EXECUTE" , 436 dest, "in_INSERT_" +toString(i)+"_RENAME_SELECT_NO_EXECUTE" ); 437 437 } 438 438 … … 782 782 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW", 783 783 dest,"out_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW"); 784 784 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_NO_EXECUTE" , 785 dest,"out_INSERT_"+toString(i)+"_NO_EXECUTE" ); 785 786 786 787 // in_INSERT_RENAME_SELECT_VAL - rename_select -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp
r88 r115 76 76 77 77 test (name,param); 78 79 delete param; 78 80 } 79 81 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_deallocation.cpp
r112 r115 71 71 { 72 72 for (uint32_t k=0; k<NB_GROUP; k++) 73 { 74 if (_spr [i][j][k] != NULL) 75 { 76 for (uint32_t l=0; l<NB_REG_GROUP[k]; l++) 77 if (_spr [i][j][k][l] != NULL) 78 delete _spr [i][j][k][l]; 79 delete [] _spr [i][j][k]; 80 } 81 } 73 if (_spr [i][j][k] != NULL) 74 { 75 for (uint32_t l=0; l<NB_REG_GROUP[k]; l++) 76 if (_spr [i][j][k][l] != NULL) 77 delete _spr [i][j][k][l]; 78 delete [] _spr [i][j][k]; 79 } 82 80 delete [] _spr [i][j]; 83 81 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-min.cfg
r112 r115 33 33 1 1 +1 # size_execute_queue [0] [nb_write_bloc] 34 34 0 0 +1 # nb_bypass_write [0] [nb_write_bloc] 35 0 0 +1 # write_queue_scheme [0] [nb_write_bloc] 35 36 1 1 +1 # nb_load_store_unit 36 37 2 2 +1 # size_store_queue [0] [nb_load_store_unit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/config-w1a.cfg
r112 r115 33 33 4 4 +1 # size_execute_queue [0] [nb_write_bloc] 34 34 0 0 +1 # nb_bypass_write [0] [nb_write_bloc] 35 0 0 +1 # write_queue_scheme [0] [nb_write_bloc] 35 36 1 1 +1 # nb_load_store_unit 36 37 4 4 +1 # size_store_queue [0] [nb_load_store_unit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/main.cpp
r112 r115 56 56 err (_(" * size_execute_queue [nb_write_bloc] (uint32_t )\n")); 57 57 err (_(" * nb_bypass_write [nb_write_bloc] (uint32_t )\n")); 58 err (_(" * write_queue_scheme [nb_write_bloc] (Twrite_queue_scheme_t)\n")); 58 59 59 60 err (_(" * nb_load_store_unit (uint32_t )\n")); … … 222 223 uint32_t * _size_execute_queue ;//[nb_write_bloc] 223 224 uint32_t * _nb_bypass_write ;//[nb_write_bloc] 225 core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * _write_queue_scheme; //[nb_write_bloc] 224 226 225 227 // Load_store_unit … … 403 405 SELFTEST0(_nb_write_bloc ,uint32_t ,argv,x); 404 406 405 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+ 3*_nb_write_bloc))407 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc)) 406 408 usage (argc, argv); 407 409 … … 409 411 SELFTEST1(_size_execute_queue ,uint32_t ,argv,x,_nb_write_bloc); 410 412 SELFTEST1(_nb_bypass_write ,uint32_t ,argv,x,_nb_write_bloc); 413 SELFTEST1(_write_queue_scheme,core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t,argv,x,_nb_write_bloc); 411 414 412 415 // Load store unit … … 414 417 SELFTEST0(_nb_load_store_unit ,uint32_t ,argv,x); 415 418 416 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+ 3*_nb_write_bloc+8*_nb_load_store_unit))419 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit)) 417 420 usage (argc, argv); 418 421 … … 431 434 SELFTEST0(_nb_functionnal_unit ,uint32_t ,argv,x); 432 435 433 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+ 3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit))436 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit)) 434 437 usage (argc, argv); 435 438 … … 474 477 SELFTEST0(_nb_front_end ,uint32_t ,argv,x); 475 478 476 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+ 3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end))479 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end)) 477 480 usage (argc, argv); 478 481 … … 501 504 SELFTEST0(_nb_ooo_engine ,uint32_t ,argv,x); 502 505 503 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+ 3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine))506 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine)) 504 507 usage (argc, argv); 505 508 … … 529 532 SELFTEST0(_nb_execute_loop ,uint32_t ,argv,x); 530 533 531 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+ 3*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop))534 if (argc < static_cast<int>(2+NB_PARAMS+5*_nb_thread+6*_nb_decod_bloc+9*_nb_rename_bloc+3*_nb_read_bloc+4*_nb_write_bloc+8*_nb_load_store_unit+1*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop)) 532 535 usage (argc, argv); 533 536 … … 547 550 printf(" * Link\n"); 548 551 549 if (argc < static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+ 4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop))552 if (argc < static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+5*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop)) 550 553 usage (argc, argv); 551 554 … … 601 604 _sum_cache_port += _nb_cache_port[i]; 602 605 603 if (argc != static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+ 4*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop+606 if (argc != static_cast<int>(2+NB_PARAMS+6*_nb_thread+6*_nb_decod_bloc+10*_nb_rename_bloc+4*_nb_read_bloc+5*_nb_write_bloc+9*_nb_load_store_unit+2*_nb_functionnal_unit+31*_nb_front_end+19*_nb_ooo_engine+11*_nb_execute_loop+ 604 607 3*_nb_thread+_nb_front_end+_sum_inst_issue*_nb_read_bloc+_nb_load_store_unit*(_nb_read_bloc+_nb_write_bloc+_nb_thread)+_nb_functionnal_unit*(_nb_read_bloc+_nb_write_bloc)+_sum_cache_port)) 605 608 usage (argc, argv); … … 668 671 _size_execute_queue , 669 672 _nb_bypass_write , 673 _write_queue_scheme , 670 674 671 675 _nb_load_store_unit , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h
r112 r115 82 82 public : uint32_t * _size_execute_queue ;//[nb_write_bloc] 83 83 public : uint32_t * _nb_bypass_write ;//[nb_write_bloc] 84 public : multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * _write_queue_scheme; //[nb_write_bloc] 84 85 85 86 // Load_store_unit … … 287 288 public : uint32_t ** _execute_loop_size_execute_queue ;//[nb_execute_loop][nb_write_unit] 288 289 public : uint32_t ** _execute_loop_nb_bypass_write ;//[nb_execute_loop][nb_write_unit] 290 public : multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t ** _execute_loop_write_queue_scheme; //[nb_execute_loop][nb_write_unit] 291 289 292 public : uint32_t ** _execute_loop_nb_general_register ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 290 293 public : uint32_t ** _execute_loop_nb_special_register ;//[nb_execute_loop][execute_loop_nb_ooo_engine] … … 394 397 uint32_t * size_execute_queue ,//[nb_write_bloc] 395 398 uint32_t * nb_bypass_write ,//[nb_write_bloc] 399 multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_bloc] 396 400 397 401 // Load_store_unit -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp
r112 r115 120 120 uint32_t * size_execute_queue ,//[nb_write_bloc] 121 121 uint32_t * nb_bypass_write ,//[nb_write_bloc] 122 multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t * write_queue_scheme,//[nb_write_bloc] 122 123 123 124 // Load_store_unit … … 273 274 _size_execute_queue = size_execute_queue ; 274 275 _nb_bypass_write = nb_bypass_write ; 276 _write_queue_scheme = write_queue_scheme ; 275 277 276 278 _nb_load_store_unit = nb_load_store_unit ; … … 1501 1503 ALLOC2(_execute_loop_size_execute_queue ,uint32_t,_nb_execute_loop,_nb_write_unit[it1]); 1502 1504 ALLOC2(_execute_loop_nb_bypass_write ,uint32_t,_nb_execute_loop,_nb_write_unit[it1]); 1505 ALLOC2(_execute_loop_write_queue_scheme ,multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Twrite_queue_scheme_t,_nb_execute_loop,_nb_write_unit[it1]); 1503 1506 1504 1507 for (uint32_t i=0; i<_nb_execute_loop; ++i) … … 1510 1513 _execute_loop_size_execute_queue [i][j] = _size_execute_queue [num_write_bloc]; 1511 1514 _execute_loop_nb_bypass_write [i][j] = _nb_bypass_write [num_write_bloc]; 1515 _execute_loop_write_queue_scheme [i][j] = _write_queue_scheme [num_write_bloc]; 1512 1516 } 1513 1517 … … 1966 1970 _execute_loop_size_execute_queue [i], 1967 1971 _execute_loop_nb_bypass_write [i], 1972 _execute_loop_write_queue_scheme [i], 1968 1973 1969 1974 _nb_gpr_bank [i], … … 2104 2109 DELETE2(_execute_loop_nb_special_register ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 2105 2110 DELETE2(_execute_loop_nb_general_register ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 2111 DELETE2(_execute_loop_write_queue_scheme ,_nb_execute_loop,_nb_write_unit[it1]); 2106 2112 DELETE2(_execute_loop_nb_bypass_write ,_nb_execute_loop,_nb_write_unit[it1]); 2107 2113 DELETE2(_execute_loop_size_execute_queue ,_nb_execute_loop,_nb_write_unit[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Queue/SelfTest/src/main.cpp
r113 r115 24 24 25 25 delete my_top; 26 27 delete param; 26 28 } 27 29 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest
r113 r115 179 179 $(GREP) -q "Test KO" $@; \ 180 180 declare -i test_ko=$$?; \ 181 declare memory_leak=" "; \ 182 $(GREP) -q "Leaked memory at" $@; \ 183 if $(TEST) $$? -eq 0; \ 184 then memory_leak="*"; \ 185 fi; \ 181 186 if $(TEST) $$test_ko -ne 0 -a $$test_ok -eq 0 -a $$test_timing -eq 0; \ 182 then echo -e " $* ... OK \t$$timing";\187 then echo -e " $* ... OK $$memory_leak\t$$timing";\ 183 188 else echo " $* ... KO"; \ 184 189 fi; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h
r113 r115 252 252 #define ALLOC1_INTERFACE_BEGIN( name, direction, localisation, str, x1) \ 253 253 INTERFACE_PRINT(name); \ 254 const uint32_t iterator_1 = x1; \ 255 morpheo::behavioural::Interface_fifo * interface [iterator_1]; \ 256 { \ 257 std::string separator="_"; \ 254 uint32_t iterator_1 = 0; \ 255 morpheo::behavioural::Interface_fifo ** interface; \ 256 { \ 257 std::string separator="_"; \ 258 iterator_1 = x1; \ 259 interface = new morpheo::behavioural::Interface_fifo * [iterator_1]; \ 258 260 for (uint32_t it1=0; it1<iterator_1; it1++) \ 259 261 { \ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h
r113 r115 25 25 namespace behavioural { 26 26 27 /* 27 28 #ifdef DEBUG 28 29 # define PORT_MAP(x,a,b,c,d) \ … … 40 41 while (0) 41 42 #else 43 */ 42 44 # define PORT_MAP(x,a,b,c,d) \ 43 45 do \ … … 46 48 } \ 47 49 while (0) 48 #endif50 // #endif 49 51 50 52 #define COMPONENT_MAP(x,a,b,c,d) \ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r114 r115 10 10 #define MORPHEO_MAJOR_VERSION "0" 11 11 #define MORPHEO_MINOR_VERSION "2" 12 #define MORPHEO_REVISION "11 4"12 #define MORPHEO_REVISION "115" 13 13 #define MORPHEO_CODENAME "Castor" 14 14 15 #define MORPHEO_DATE_DAY " 17"15 #define MORPHEO_DATE_DAY "20" 16 16 #define MORPHEO_DATE_MONTH "04" 17 17 #define MORPHEO_DATE_YEAR "2009" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interfaces.cpp
r113 r115 39 39 #endif 40 40 41 for (std::list<Interface_fifo*>::iterator it = _list_interface->begin(); 42 it!=_list_interface->end(); 43 ++it) 44 delete (*it); 41 // for (std::list<Interface_fifo*>::iterator it = _list_interface->begin(); 42 // it!=_list_interface->end(); 43 // ++it) 44 // delete (*it); 45 46 while (not _list_interface->empty()) 47 { 48 delete _list_interface->front(); 49 _list_interface->pop_front(); 50 } 45 51 46 52 delete _list_interface; -
trunk/IPs/systemC/processor/Morpheo/Common/include/MemCheck.h
r112 r115 6 6 7 7 // Usurp the new operator (both scalar and array versions) 8 void* operator new (std::size_t, const char*, long);8 void* operator new (std::size_t, const char*, long); 9 9 void* operator new[](std::size_t, const char*, long); 10 10 #define new new (__FILE__, __LINE__) 11 11 12 12 extern bool traceFlag; 13 13 #define TRACE_ON() traceFlag = true -
trunk/IPs/systemC/processor/Morpheo/Common/src/MemCheck.cpp
r113 r115 1 1 #ifdef DEBUG_MEMORY_LEAK 2 2 3 #include "Common/include/Message.h" 3 4 #include <cstdio> 4 5 #include <cstdlib> 5 6 #include <cassert> 6 7 #include <cstddef> 8 #include <map> 9 7 10 using namespace std; 11 using namespace morpheo; 12 8 13 #undef new 9 14 10 15 // Global flags set by macros in MemCheck.h 11 bool traceFlag = false;16 bool traceFlag = true; 12 17 bool activeFlag = false; 13 18 14 19 namespace { 15 20 16 // Memory map entry type 17 struct Info { 18 void* ptr; 19 const char* file; 20 long line; 21 }; 21 // Memory map entry type 22 struct Info 23 { 24 // void* ptr; 25 const char* file; 26 long line; 27 size_t size; 28 }; 22 29 23 // Memory map data 24 const size_t MAXPTRS = 10000u; 25 Info memMap[MAXPTRS]; 26 size_t nptrs = 0; 30 bool Info_lt(std::pair<void *,Info> a, std::pair<void *,Info> b) 31 { 32 return a.second.size < b.second.size; 33 } 34 35 // Memory map data 36 typedef map<void *,Info> memMap_t; 37 typedef map<void *,Info>::iterator memMap_it; 27 38 28 // Searches the map for an address 29 int findPtr(void* p) { 30 for(size_t i = 0; i < nptrs; ++i) 31 if(memMap[i].ptr == p) 32 return i; 33 return -1; 39 memMap_t memMap; 40 41 // Searches the map for an address 42 memMap_it findPtr(void* p) 43 { 44 return memMap.find(p); 45 } 46 47 void delPtr(void* p) 48 { 49 memMap_it it = findPtr(p); 50 51 assert(it != memMap.end()); 52 53 // Remove pointer from map 54 memMap.erase(it); 55 } 56 57 // Dummy type for static destructor 58 struct Sentinel 59 { 60 ~Sentinel() 61 { 62 size_t size = memMap.size(); 63 if(size > 0) 64 { 65 size_t size_sum = 0; 66 msgWarning("Leaked memory at:\n"); 67 for (memMap_it it=memMap.begin(); 68 it!=memMap.end(); 69 ++it) 70 { 71 size_t s = it->second.size; 72 size_sum += s; 73 74 msgWarning("\t%p : %u bytes (file: %s, line %ld)\n", 75 it->first, 76 s, 77 it->second.file, 78 it->second.line); 79 } 80 msgWarning("Total : %u bytes on %d localisations\n",size_sum, size); 81 82 uint32_t nb_top = (size>10)?10:size; 83 msgWarning("Top %d of leaked memory\n",nb_top); 84 for (uint32_t i=0; i<nb_top; ++i) 85 { 86 memMap_it max = max_element(memMap.begin(), memMap.end(),Info_lt); 87 88 msgWarning(" * [%d] %u bytes (file: %s, line %ld)\n", 89 i, 90 max->second.size, 91 max->second.file, 92 max->second.line); 93 94 memMap.erase(max); 95 } 34 96 } 35 36 void delPtr(void* p) { 37 int pos = findPtr(p); 38 assert(pos >= 0); 39 // Remove pointer from map 40 for(size_t i = pos; i < nptrs-1; ++i) 41 memMap[i] = memMap[i+1]; 42 --nptrs; 43 } 44 45 // Dummy type for static destructor 46 struct Sentinel { 47 ~Sentinel() { 48 if(nptrs > 0) { 49 printf("Leaked memory at:\n"); 50 for(size_t i = 0; i < nptrs; ++i) 51 printf("\t%p (file: %s, line %ld)\n", 52 memMap[i].ptr, memMap[i].file, memMap[i].line); 53 } 54 else 55 printf("No user memory leaks!\n"); 56 } 57 }; 58 59 // Static dummy object 60 Sentinel s; 61 97 else 98 msgInformation("No user memory leaks!\n"); 99 } 100 }; 101 102 // Static dummy object 103 Sentinel s; 104 62 105 } // End anonymous namespace 63 106 64 107 // Overload scalar new 65 void* operator new(size_t siz, const char* file, long line) { 66 void* p = malloc(siz); 67 if(activeFlag) { 68 if(nptrs == MAXPTRS) { 69 printf("memory map too small (increase MAXPTRS)\n"); 70 exit(1); 71 } 72 memMap[nptrs].ptr = p; 73 memMap[nptrs].file = file; 74 memMap[nptrs].line = line; 75 ++nptrs; 76 } 77 if(traceFlag) { 78 printf("Allocated %u bytes at address %p ", siz, p); 79 printf("(file: %s, line: %ld)\n", file, line); 80 } 81 return p; 108 void* operator new(size_t size, const char* file, long line) 109 { 110 void* p = malloc(size); 111 112 if(activeFlag) 113 { 114 Info info; 115 info.file = file; 116 info.line = line; 117 info.size = size; 118 119 memMap[p] = info; 120 } 121 122 if(traceFlag) 123 { 124 msgInformation("Allocated %u bytes at address %p (file: %s, line: %ld)\n", size, p, file, line); 125 } 126 127 return p; 82 128 } 83 129 84 130 // Overload array new 85 void* operator new[](size_t siz, const char* file, long line) { 86 return operator new(siz, file, line); 131 void* operator new[](size_t size, const char* file, long line) 132 { 133 return operator new(size, file, line); 87 134 } 88 135 89 136 // Override scalar delete 90 void operator delete(void* p) { 91 if(findPtr(p) >= 0) { 92 free(p); 93 assert(nptrs > 0); 94 delPtr(p); 95 if(traceFlag) 96 printf("Deleted memory at address %p\n", p); 97 } 98 else if(!p && activeFlag) 99 printf("Attempt to delete unknown pointer: %p\n", p); 137 void operator delete(void* p) 138 { 139 memMap_it it = findPtr(p); 140 141 if (it != memMap.end()) 142 { 143 free(p); 144 delPtr(p); 145 146 if(traceFlag) 147 msgInformation("Deleted memory at address %p\n", p); 148 } 149 else 150 if(!p && activeFlag) 151 msgError("Attempt to delete unknown pointer: %p\n", p); 100 152 } 101 153 102 154 // Override array delete 103 void operator delete[](void* p) { 104 operator delete(p); 155 void operator delete[](void* p) 156 { 157 operator delete(p); 105 158 } 159 106 160 #endif // DEBUG_MEMORY_LEAK -
trunk/IPs/systemC/processor/Morpheo/Common/src/Message.cpp
r100 r115 6 6 */ 7 7 8 #include "Common/include/Debug.h"8 #include <sys/types.h> 9 9 #include "Common/include/Environment.h" 10 10 #include "Common/include/ErrorMorpheo.h" 11 11 #include "Common/include/Filename.h" 12 #include <sys/types.h>12 #include "Common/include/Debug.h" 13 13 14 14 namespace morpheo { -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg
r114 r115 36 36 </rename_bloc> 37 37 38 <<<<<<< .mine 39 <read_bloc id="0,1,2,3,4,5"> 40 <parameter name="size_read_queue" value="4" /> 41 <parameter name="size_reservation_station" value="4" /> 42 ======= 38 43 <read_bloc id="0"> 39 44 <parameter name="size_read_queue" value="1" /> 40 45 <parameter name="size_reservation_station" value="1" /> 46 >>>>>>> .r114 41 47 <parameter name="nb_inst_retire_reservation_station" value="1" /> 42 48 </read_bloc> 49 <<<<<<< .mine 50 51 <write_bloc id="0,1,2,3,4,5"> 52 <parameter name="size_write_queue" value="4" /> 53 <parameter name="size_execute_queue" value="4" /> 54 ======= 43 55 44 56 <write_bloc id="0"> 45 57 <parameter name="size_write_queue" value="1" /> 46 58 <parameter name="size_execute_queue" value="1" /> 59 >>>>>>> .r114 47 60 <parameter name="nb_bypass_write" value="0" /> 61 <parameter name="write_queue_scheme" value="1" /> 48 62 </write_bloc> 49 63 … … 62 76 <parameter name="nb_inst_functionnal_unit" value="1" /> 63 77 78 <timing type="2" latence="1" delay="1" /> 79 <timing type="8" latence="1" delay="1" /> 80 <timing type="10" latence="1" delay="1" /> 81 </functionnal_unit> 82 83 <functionnal_unit id="1"> 84 <parameter name="nb_inst_functionnal_unit" value="1" /> 85 86 <timing type="2" latence="1" delay="1" /> 87 <timing type="10" latence="1" delay="1" /> 88 </functionnal_unit> 89 90 <functionnal_unit id="2,3,4" > 91 <parameter name="nb_inst_functionnal_unit" value="1" /> 92 64 93 <timing type="0" latence="1" delay="1" /> 65 94 <timing type="1" latence="1" delay="1" /> 66 <timing type="2" latence="1" delay="1" />67 95 <timing type="3" latence="1" delay="1" /> 68 96 <timing type="4" latence="1" delay="1" /> 69 97 <timing type="6" latence="1" delay="1" /> 70 98 <timing type="7" latence="1" delay="1" /> 99 <<<<<<< .mine 100 </functionnal_unit> 101 102 ======= 71 103 <timing type="8" latence="1" delay="1" /> 72 104 <timing type="10" latence="1" delay="1" /> 73 105 </functionnal_unit> 74 106 107 >>>>>>> .r114 75 108 <front_end id="0"> 76 109 <parameter name="nb_decod_unit" value="1" /> … … 81 114 <parameter name="btb_associativity" value="1" /> 82 115 <parameter name="btb_size_counter" value="2" /> 116 <<<<<<< .mine 117 <parameter name="btb_victim_scheme" value="3" /> 118 <parameter name="dir_predictor_scheme" value="8" /> 119 ======= 83 120 <parameter name="btb_victim_scheme" value="1" /> 84 121 <parameter name="dir_predictor_scheme" value="1" /> 122 >>>>>>> .r114 85 123 86 124 <predictor id="0"> 125 <<<<<<< .mine 126 <parameter name="dir_have_bht" value="1" /> 127 <parameter name="dir_bht_size_shifter" value="4" /> 128 <parameter name="dir_bht_nb_shifter" value="64" /> 129 <parameter name="dir_have_pht" value="0" /> 130 <parameter name="dir_pht_size_counter" value="2" /> 131 <parameter name="dir_pht_nb_counter" value="128"/> 132 <parameter name="dir_pht_size_address_share" value="0" /> 133 ======= 87 134 <parameter name="dir_have_bht" value="0" /> 88 135 <parameter name="dir_have_pht" value="0" /> 136 >>>>>>> .r114 89 137 </predictor> 90 138 … … 96 144 <predictor id="2"> 97 145 <parameter name="dir_have_bht" value="0" /> 146 <<<<<<< .mine 147 <parameter name="dir_have_pht" value="0" /> 148 </predictor> 149 ======= 98 150 <parameter name="dir_have_pht" value="0" /> 99 151 </predictor> 152 >>>>>>> .r114 100 153 </front_end> 101 154 … … 123 176 124 177 <execute_loop id="0"> 178 <<<<<<< .mine 179 <parameter name="nb_read_unit" value="6" /> 180 <parameter name="nb_write_unit" value="6" /> 181 <parameter name="nb_execute_unit" value="6" /> 182 ======= 125 183 <parameter name="nb_read_unit" value="1" /> 126 184 <parameter name="nb_write_unit" value="1" /> 185 >>>>>>> .r114 127 186 <parameter name="nb_gpr_bank" value="1" /> 187 <<<<<<< .mine 188 <parameter name="nb_gpr_port_read_by_bank" value="10" /> 189 <parameter name="nb_gpr_port_write_by_bank" value="5" /> 190 ======= 128 191 <parameter name="nb_gpr_port_read_by_bank" value="1" /> 129 192 <parameter name="nb_gpr_port_write_by_bank" value="1" /> 193 >>>>>>> .r114 130 194 <parameter name="nb_spr_bank" value="1" /> 195 <<<<<<< .mine 196 <parameter name="nb_spr_port_read_by_bank" value="5" /> 197 <parameter name="nb_spr_port_write_by_bank" value="5" /> 198 ======= 131 199 <parameter name="nb_spr_port_read_by_bank" value="1" /> 132 200 <parameter name="nb_spr_port_write_by_bank" value="1" /> 201 >>>>>>> .r114 133 202 <parameter name="execution_unit_to_write_unit_priority" value="1" /> 134 203 <parameter name="read_unit_to_execution_unit_priority" value="1" /> … … 159 228 <link name="link_rename_unit_with_rename_bloc" src="0" dest="0.0" /> 160 229 <link name="link_read_unit_with_read_bloc" src="0" dest="0.0" /> 230 <link name="link_read_unit_with_read_bloc" src="4" dest="0.4" /> 231 <link name="link_read_unit_with_read_bloc" src="5" dest="0.5" /> 161 232 <link name="link_write_unit_with_write_bloc" src="0" dest="0.0" /> 233 <<<<<<< .mine 234 <link name="link_write_unit_with_write_bloc" src="1" dest="0.1" /> 235 <link name="link_write_unit_with_write_bloc" src="2" dest="0.2" /> 236 <link name="link_write_unit_with_write_bloc" src="3" dest="0.3" /> 237 <link name="link_write_unit_with_write_bloc" src="4" dest="0.4" /> 238 <link name="link_write_unit_with_write_bloc" src="5" dest="0.5" /> 239 ======= 240 >>>>>>> .r114 162 241 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> 163 242 <link name="link_rename_bloc_with_front_end" src="0" dest="0" /> 164 243 <link name="link_load_store_unit_with_thread" src="0" dest="0" /> 165 244 245 <<<<<<< .mine 246 <link name="link_execute_unit_with_load_store_unit" src="0" dest="0.0"/> 247 <link name="link_execute_unit_with_functionnal_unit" src="0" dest="0.1"/> 248 <link name="link_execute_unit_with_functionnal_unit" src="1" dest="0.2"/> 249 <link name="link_execute_unit_with_functionnal_unit" src="2" dest="0.3"/> 250 <link name="link_execute_unit_with_functionnal_unit" src="3" dest="0.4"/> 251 <link name="link_execute_unit_with_functionnal_unit" src="4" dest="0.5"/> 252 253 ======= 254 >>>>>>> .r114 166 255 <link name="link_icache_port_with_thread" src="0" dest="0" /> 167 256 <link name="link_dcache_port_with_load_store_unit" src="0.0" dest="0" /> 168 257 169 258 <link name="table_dispatch" src="0.0.0" dest="1" /> 259 <<<<<<< .mine 260 <link name="table_dispatch" src="0.1.0" dest="0" /> 261 <link name="table_dispatch" src="0.2.0" dest="0" /> 262 <link name="table_dispatch" src="0.3.0" dest="0" /> 263 264 <link name="table_dispatch" src="0.0.1" dest="1" /> 265 <link name="table_dispatch" src="0.1.1" dest="0" /> 266 <link name="table_dispatch" src="0.2.1" dest="0" /> 267 <link name="table_dispatch" src="0.3.1" dest="0" /> 268 269 <link name="table_dispatch" src="0.0.2" dest="0" /> 270 <link name="table_dispatch" src="0.1.2" dest="1" /> 271 <link name="table_dispatch" src="0.2.2" dest="1" /> 272 <link name="table_dispatch" src="0.3.2" dest="1" /> 273 274 <link name="table_dispatch" src="0.0.3" dest="0" /> 275 <link name="table_dispatch" src="0.1.3" dest="1" /> 276 <link name="table_dispatch" src="0.2.3" dest="1" /> 277 <link name="table_dispatch" src="0.3.3" dest="1" /> 278 279 ======= 280 >>>>>>> .r114 281 <link name="table_dispatch" src="0.0.4" dest="0" /> 282 <link name="table_dispatch" src="0.1.4" dest="1" /> 283 <link name="table_dispatch" src="0.2.4" dest="1" /> 284 <link name="table_dispatch" src="0.3.4" dest="1" /> 285 286 <link name="table_dispatch" src="0.0.5" dest="0" /> 287 <link name="table_dispatch" src="0.1.5" dest="1" /> 288 <link name="table_dispatch" src="0.2.5" dest="1" /> 289 <link name="table_dispatch" src="0.3.5" dest="1" /> 290 170 291 <link name="link_read_bloc_and_load_store_unit" src="0.0" dest="1" /> 292 <<<<<<< .mine 293 <link name="link_read_bloc_and_load_store_unit" src="1.0" dest="1" /> 294 <link name="link_read_bloc_and_load_store_unit" src="2.0" dest="0" /> 295 <link name="link_read_bloc_and_load_store_unit" src="3.0" dest="0" /> 296 <link name="link_read_bloc_and_load_store_unit" src="4.0" dest="0" /> 297 <link name="link_read_bloc_and_load_store_unit" src="5.0" dest="0" /> 171 298 <link name="link_read_bloc_and_functionnal_unit" src="0.0" dest="1" /> 299 <link name="link_read_bloc_and_functionnal_unit" src="1.0" dest="1" /> 300 <link name="link_read_bloc_and_functionnal_unit" src="2.0" dest="0" /> 301 <link name="link_read_bloc_and_functionnal_unit" src="3.0" dest="0" /> 302 <link name="link_read_bloc_and_functionnal_unit" src="4.0" dest="0" /> 303 <link name="link_read_bloc_and_functionnal_unit" src="5.0" dest="0" /> 304 <link name="link_read_bloc_and_functionnal_unit" src="0.1" dest="1" /> 305 <link name="link_read_bloc_and_functionnal_unit" src="1.1" dest="1" /> 306 <link name="link_read_bloc_and_functionnal_unit" src="2.1" dest="0" /> 307 <link name="link_read_bloc_and_functionnal_unit" src="3.1" dest="0" /> 308 <link name="link_read_bloc_and_functionnal_unit" src="4.1" dest="0" /> 309 <link name="link_read_bloc_and_functionnal_unit" src="5.1" dest="0" /> 310 <link name="link_read_bloc_and_functionnal_unit" src="0.2" dest="0" /> 311 <link name="link_read_bloc_and_functionnal_unit" src="1.2" dest="0" /> 312 <link name="link_read_bloc_and_functionnal_unit" src="2.2" dest="1" /> 313 <link name="link_read_bloc_and_functionnal_unit" src="3.2" dest="1" /> 314 ======= 315 <link name="link_read_bloc_and_functionnal_unit" src="0.0" dest="1" /> 316 >>>>>>> .r114 317 <link name="link_read_bloc_and_functionnal_unit" src="4.2" dest="1" /> 318 <link name="link_read_bloc_and_functionnal_unit" src="5.2" dest="1" /> 319 <link name="link_read_bloc_and_functionnal_unit" src="0.3" dest="0" /> 320 <link name="link_read_bloc_and_functionnal_unit" src="1.3" dest="0" /> 321 <link name="link_read_bloc_and_functionnal_unit" src="2.3" dest="1" /> 322 <link name="link_read_bloc_and_functionnal_unit" src="3.3" dest="1" /> 323 <link name="link_read_bloc_and_functionnal_unit" src="4.3" dest="1" /> 324 <link name="link_read_bloc_and_functionnal_unit" src="5.3" dest="1" /> 325 <link name="link_read_bloc_and_functionnal_unit" src="0.4" dest="0" /> 326 <link name="link_read_bloc_and_functionnal_unit" src="1.4" dest="0" /> 327 <link name="link_read_bloc_and_functionnal_unit" src="2.4" dest="1" /> 328 <link name="link_read_bloc_and_functionnal_unit" src="3.4" dest="1" /> 329 <link name="link_read_bloc_and_functionnal_unit" src="4.4" dest="1" /> 330 <link name="link_read_bloc_and_functionnal_unit" src="5.4" dest="1" /> 331 172 332 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> 333 <<<<<<< .mine 334 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="1" /> 335 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="0" /> 336 <link name="link_write_bloc_and_load_store_unit" src="3.0" dest="0" /> 337 <link name="link_write_bloc_and_load_store_unit" src="4.0" dest="0" /> 338 <link name="link_write_bloc_and_load_store_unit" src="5.0" dest="0" /> 339 173 340 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="1" /> 341 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 342 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="0" /> 343 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest="0" /> 344 <link name="link_write_bloc_and_functionnal_unit" src="4.0" dest="0" /> 345 <link name="link_write_bloc_and_functionnal_unit" src="5.0" dest="0" /> 346 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="0" /> 347 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest="1" /> 348 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" /> 349 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="0" /> 350 <link name="link_write_bloc_and_functionnal_unit" src="4.1" dest="0" /> 351 <link name="link_write_bloc_and_functionnal_unit" src="5.1" dest="0" /> 352 <link name="link_write_bloc_and_functionnal_unit" src="0.2" dest="0" /> 353 <link name="link_write_bloc_and_functionnal_unit" src="1.2" dest="0" /> 354 <link name="link_write_bloc_and_functionnal_unit" src="2.2" dest="1" /> 355 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest="1" /> 356 <link name="link_write_bloc_and_functionnal_unit" src="4.2" dest="1" /> 357 <link name="link_write_bloc_and_functionnal_unit" src="5.2" dest="1" /> 358 <link name="link_write_bloc_and_functionnal_unit" src="0.3" dest="0" /> 359 <link name="link_write_bloc_and_functionnal_unit" src="1.3" dest="0" /> 360 <link name="link_write_bloc_and_functionnal_unit" src="2.3" dest="1" /> 361 <link name="link_write_bloc_and_functionnal_unit" src="3.3" dest="1" /> 362 <link name="link_write_bloc_and_functionnal_unit" src="4.3" dest="1" /> 363 <link name="link_write_bloc_and_functionnal_unit" src="5.3" dest="1" /> 364 <link name="link_write_bloc_and_functionnal_unit" src="0.4" dest="0" /> 365 <link name="link_write_bloc_and_functionnal_unit" src="1.4" dest="0" /> 366 <link name="link_write_bloc_and_functionnal_unit" src="2.4" dest="1" /> 367 <link name="link_write_bloc_and_functionnal_unit" src="3.4" dest="1" /> 368 <link name="link_write_bloc_and_functionnal_unit" src="4.4" dest="1" /> 369 <link name="link_write_bloc_and_functionnal_unit" src="5.4" dest="1" /> 370 371 ======= 372 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="1" /> 373 >>>>>>> .r114 174 374 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> 375 <link name="link_thread_and_functionnal_unit" src="0.3" dest="1" /> 376 <link name="link_thread_and_functionnal_unit" src="0.4" dest="1" /> 175 377 176 378 </core> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen
r112 r115 50 50 <parameter name="size_execute_queue" min="1" max="8" step="* 2" default="2" level="..." description="..." /> 51 51 <parameter name="nb_bypass_write" min="0" max="8" step="+ 1" default="0" level="..." description="..." /> 52 <parameter name="write_queue_scheme" min="0" max="1" step="+ 1" default="0" level="..." description="0 : Moore, 1 : Mealy" /> 52 53 53 54 <parameter name="nb_load_store_unit" min="1" max="8" step="* 2" default="1" level="..." description="..." /> … … 109 110 <parameter name="nb_write_unit" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 110 111 <parameter name="nb_gpr_bank" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 111 <parameter name="nb_gpr_port_read_by_bank" min="1" max=" 8" step="* 2" default="1" level="..." description="..." />112 <parameter name="nb_gpr_port_write_by_bank" min="1" max="8" step=" * 2" default="1" level="..." description="..." />112 <parameter name="nb_gpr_port_read_by_bank" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 113 <parameter name="nb_gpr_port_write_by_bank" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 113 114 <parameter name="nb_spr_bank" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 114 <parameter name="nb_spr_port_read_by_bank" min="1" max="8" step=" * 2" default="1" level="..." description="..." />115 <parameter name="nb_spr_port_write_by_bank" min="1" max="8" step=" * 2" default="1" level="..." description="..." />115 <parameter name="nb_spr_port_read_by_bank" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 116 <parameter name="nb_spr_port_write_by_bank" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 116 117 <parameter name="execution_unit_to_write_unit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 117 118 <parameter name="read_unit_to_execution_unit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim
r114 r115 15 15 <parameter name="statistics_period" value="0" /> 16 16 17 <<<<<<< .mine 18 <parameter name="simulation_nb_cycle" value="1000000" /> 19 ======= 17 20 <parameter name="simulation_nb_cycle" value="10000000"/> 21 >>>>>>> .r114 18 22 <parameter name="simulation_nb_instruction" value="0" /> 19 23 … … 24 28 25 29 <parameter name="debug_level" value="0" /> 30 <<<<<<< .mine 31 <parameter name="debug_cycle_start" value="0" /> 32 <parameter name="debug_cycle_stop" value="2" /> 33 ======= 26 34 <parameter name="debug_cycle_start" value="600" /> 27 35 <parameter name="debug_cycle_stop" value="827" /> 36 >>>>>>> .r114 28 37 <parameter name="debug_have_log_file" value="0" /> 29 38 <parameter name="debug_idle_cycle" value="100" /> -
trunk/IPs/systemC/processor/Morpheo/Script/SelfTest.sh
r112 r115 167 167 if test ${make_test} -eq 1; then 168 168 cd ${dir}; 169 make clean; 169 170 make config; 170 171 make -j${nb_cpu} ${1}; -
trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp
r112 r115 83 83 param->_size_execute_queue , 84 84 param->_nb_bypass_write , 85 param->_write_queue_scheme , 85 86 86 87 param->_nb_load_store_unit ,
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