- Timestamp:
- Apr 30, 2009, 3:51:41 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural
- Files:
-
- 15 added
- 36 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps
r81 r116 16 16 include $(DIR_MORPHEO)/Behavioural/Custom/Makefile.deps 17 17 endif 18 ifndef Shifter 19 include $(DIR_MORPHEO)/Behavioural/Generic/Shifter/Makefile.deps 20 endif 18 21 19 22 #-----[ Library ]------------------------------------------ … … 21 24 $(Custom_LIBRARY) \ 22 25 -lFunctionnal_unit \ 23 $(Behavioural_LIBRARY) 26 $(Behavioural_LIBRARY) \ 27 -lFunctionnal_unit \ 28 $(Shifter_LIBRARY) 24 29 25 30 Functionnal_unit_DIR_LIBRARY = -L$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/lib \ 26 $(Custom_DIR_LIBRARY) \ 27 $(Behavioural_DIR_LIBRARY) 31 $(Custom_DIR_LIBRARY) \ 32 $(Behavioural_DIR_LIBRARY) \ 33 $(Shifter_DIR_LIBRARY) 28 34 29 Functionnal_unit_DEPENDENCIES = Custom_library \ 30 Behavioural_library 35 Functionnal_unit_DEPENDENCIES = Custom_library \ 36 Behavioural_library \ 37 Shifter_library 31 38 32 Functionnal_unit_CLEAN = Custom_library_clean \ 33 Behavioural_library_clean 39 Functionnal_unit_CLEAN = Custom_library_clean \ 40 Behavioural_library_clean \ 41 Shifter_library_clean 34 42 35 43 #-----[ Rules ]-------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h
r101 r116 1 #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_ h2 #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_ h1 #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Operation_h 2 #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Operation_h 3 3 4 4 /* -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h
r97 r116 1 #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_ Types_h2 #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_ Types_h1 #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Types_h 2 #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Types_h 3 3 4 4 /* -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp
r101 r116 50 50 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 51 51 op->_no_sequence = 0; 52 //op->_address = 0; 52 #ifdef SYSTEMC_VHDL_COMPATIBILITY 53 op->_address = 0; 54 #else 55 //op->_address = 0; 56 #endif 53 57 }; 54 58 … … 76 80 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 77 81 op->_no_sequence = 0; 78 //op->_address = 0; 82 #ifdef SYSTEMC_VHDL_COMPATIBILITY 83 op->_address = 0; 84 #else 85 //op->_address = 0; 86 #endif 79 87 }; 80 88 … … 102 110 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 103 111 op->_no_sequence = 0; 104 //op->_address = 0; 112 #ifdef SYSTEMC_VHDL_COMPATIBILITY 113 op->_address = 0; 114 #else 115 //op->_address = 0; 116 #endif 105 117 }; 106 118 … … 140 152 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 141 153 op->_no_sequence = 0; 142 //op->_address = 0; 154 #ifdef SYSTEMC_VHDL_COMPATIBILITY 155 op->_address = 0; 156 #else 157 //op->_address = 0; 158 #endif 143 159 }; 144 160 … … 178 194 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 179 195 op->_no_sequence = 0; 180 //op->_address = 0; 196 #ifdef SYSTEMC_VHDL_COMPATIBILITY 197 op->_address = 0; 198 #else 199 //op->_address = 0; 200 #endif 181 201 }; 182 202 … … 201 221 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 202 222 op->_no_sequence = 0; 203 //op->_address = 0; 223 #ifdef SYSTEMC_VHDL_COMPATIBILITY 224 op->_address = 0; 225 #else 226 //op->_address = 0; 227 #endif 204 228 }; 205 229 … … 224 248 op->_exception = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE; 225 249 op->_no_sequence = 0; 226 //op->_address = 0; 250 #ifdef SYSTEMC_VHDL_COMPATIBILITY 251 op->_address = 0; 252 #else 253 //op->_address = 0; 254 #endif 227 255 }; 228 256 … … 243 271 op->_exception = EXCEPTION_ALU_NONE; 244 272 op->_no_sequence = 0; 245 //op->_address = 0; 273 #ifdef SYSTEMC_VHDL_COMPATIBILITY 274 op->_address = 0; 275 #else 276 //op->_address = 0; 277 #endif 246 278 }; 247 279 … … 262 294 op->_exception = EXCEPTION_ALU_NONE; 263 295 op->_no_sequence = 0; 264 //op->_address = 0; 296 #ifdef SYSTEMC_VHDL_COMPATIBILITY 297 op->_address = 0; 298 #else 299 //op->_address = 0; 300 #endif 265 301 }; 266 302 … … 281 317 op->_exception = EXCEPTION_ALU_NONE; 282 318 op->_no_sequence = 0; 283 //op->_address = 0; 319 #ifdef SYSTEMC_VHDL_COMPATIBILITY 320 op->_address = 0; 321 #else 322 //op->_address = 0; 323 #endif 284 324 }; 285 325 … … 299 339 op->_exception = EXCEPTION_ALU_NONE; 300 340 op->_no_sequence = 0; 301 //op->_address = 0; 341 #ifdef SYSTEMC_VHDL_COMPATIBILITY 342 op->_address = 0; 343 #else 344 //op->_address = 0; 345 #endif 302 346 }; 303 347 … … 320 364 op->_exception = EXCEPTION_ALU_NONE; 321 365 op->_no_sequence = 0; 322 //op->_address = 0; 366 #ifdef SYSTEMC_VHDL_COMPATIBILITY 367 op->_address = 0; 368 #else 369 //op->_address = 0; 370 #endif 323 371 }; 324 372 … … 402 450 op->_exception = EXCEPTION_ALU_NONE; 403 451 op->_no_sequence = 0; 404 //op->_address = 0; 452 #ifdef SYSTEMC_VHDL_COMPATIBILITY 453 op->_address = 0; 454 #else 455 //op->_address = 0; 456 #endif 405 457 }; 406 458 … … 421 473 op->_exception = EXCEPTION_ALU_NONE; 422 474 op->_no_sequence = 0; 423 //op->_address = 0; 475 #ifdef SYSTEMC_VHDL_COMPATIBILITY 476 op->_address = 0; 477 #else 478 //op->_address = 0; 479 #endif 424 480 }; 425 481 … … 440 496 op->_exception = EXCEPTION_ALU_NONE; 441 497 op->_no_sequence = 0; 442 //op->_address = 0; 498 #ifdef SYSTEMC_VHDL_COMPATIBILITY 499 op->_address = 0; 500 #else 501 //op->_address = 0; 502 #endif 443 503 }; 444 504 … … 459 519 op->_exception = EXCEPTION_ALU_NONE; 460 520 op->_no_sequence = 0; 461 //op->_address = 0; 521 #ifdef SYSTEMC_VHDL_COMPATIBILITY 522 op->_address = 0; 523 #else 524 //op->_address = 0; 525 #endif 462 526 }; 463 527 … … 478 542 op->_exception = EXCEPTION_ALU_NONE; 479 543 op->_no_sequence = 0; 480 //op->_address = 0; 544 #ifdef SYSTEMC_VHDL_COMPATIBILITY 545 op->_address = 0; 546 #else 547 //op->_address = 0; 548 #endif 481 549 }; 482 550 … … 497 565 op->_exception = EXCEPTION_ALU_NONE; 498 566 op->_no_sequence = 0; 499 //op->_address = 0; 567 #ifdef SYSTEMC_VHDL_COMPATIBILITY 568 op->_address = 0; 569 #else 570 //op->_address = 0; 571 #endif 500 572 }; 501 573 … … 517 589 op->_exception = EXCEPTION_ALU_NONE; 518 590 op->_no_sequence = 0; 519 //op->_address = 0; 591 #ifdef SYSTEMC_VHDL_COMPATIBILITY 592 op->_address = 0; 593 #else 594 //op->_address = 0; 595 #endif 520 596 }; 521 597 … … 537 613 op->_exception = EXCEPTION_ALU_NONE; 538 614 op->_no_sequence = 0; 539 //op->_address = 0; 615 #ifdef SYSTEMC_VHDL_COMPATIBILITY 616 op->_address = 0; 617 #else 618 //op->_address = 0; 619 #endif 540 620 }; 541 621 … … 557 637 op->_exception = EXCEPTION_ALU_NONE; 558 638 op->_no_sequence = 0; 559 //op->_address = 0; 639 #ifdef SYSTEMC_VHDL_COMPATIBILITY 640 op->_address = 0; 641 #else 642 //op->_address = 0; 643 #endif 560 644 }; 561 645 … … 577 661 op->_exception = EXCEPTION_ALU_NONE; 578 662 op->_no_sequence = 0; 579 //op->_address = 0; 663 #ifdef SYSTEMC_VHDL_COMPATIBILITY 664 op->_address = 0; 665 #else 666 //op->_address = 0; 667 #endif 580 668 }; 581 669 … … 598 686 op->_exception = EXCEPTION_ALU_NONE; 599 687 op->_no_sequence = 0; 600 //op->_address = 0; 688 #ifdef SYSTEMC_VHDL_COMPATIBILITY 689 op->_address = 0; 690 #else 691 //op->_address = 0; 692 #endif 601 693 }; 602 694 … … 619 711 op->_exception = EXCEPTION_ALU_NONE; 620 712 op->_no_sequence = 0; 621 //op->_address = 0; 713 #ifdef SYSTEMC_VHDL_COMPATIBILITY 714 op->_address = 0; 715 #else 716 //op->_address = 0; 717 #endif 622 718 }; 623 719 … … 640 736 op->_exception = EXCEPTION_ALU_NONE; 641 737 op->_no_sequence = 0; 642 //op->_address = 0; 738 #ifdef SYSTEMC_VHDL_COMPATIBILITY 739 op->_address = 0; 740 #else 741 //op->_address = 0; 742 #endif 643 743 }; 644 744 … … 661 761 op->_exception = EXCEPTION_ALU_NONE; 662 762 op->_no_sequence = 0; 663 //op->_address = 0; 763 #ifdef SYSTEMC_VHDL_COMPATIBILITY 764 op->_address = 0; 765 #else 766 //op->_address = 0; 767 #endif 664 768 }; 665 769 … … 693 797 op->_exception = EXCEPTION_ALU_NONE; 694 798 op->_no_sequence = 0; 695 //op->_address = 0; 799 #ifdef SYSTEMC_VHDL_COMPATIBILITY 800 op->_address = 0; 801 #else 802 //op->_address = 0; 803 #endif 696 804 }; 697 805 … … 725 833 op->_exception = EXCEPTION_ALU_NONE; 726 834 op->_no_sequence = 0; 727 //op->_address = 0; 835 #ifdef SYSTEMC_VHDL_COMPATIBILITY 836 op->_address = 0; 837 #else 838 //op->_address = 0; 839 #endif 728 840 }; 729 841 … … 757 869 op->_exception = EXCEPTION_ALU_NONE; 758 870 op->_no_sequence = 0; 759 //op->_address = 0; 871 #ifdef SYSTEMC_VHDL_COMPATIBILITY 872 op->_address = 0; 873 #else 874 //op->_address = 0; 875 #endif 760 876 }; 761 877 … … 789 905 op->_exception = EXCEPTION_ALU_NONE; 790 906 op->_no_sequence = 0; 791 //op->_address = 0; 907 #ifdef SYSTEMC_VHDL_COMPATIBILITY 908 op->_address = 0; 909 #else 910 //op->_address = 0; 911 #endif 792 912 }; 793 913 … … 912 1032 op->_exception = EXCEPTION_ALU_NONE; 913 1033 op->_no_sequence = 0; 914 //op->_address = 0; 1034 #ifdef SYSTEMC_VHDL_COMPATIBILITY 1035 op->_address = 0; 1036 #else 1037 //op->_address = 0; 1038 #endif 915 1039 }; 916 1040 … … 936 1060 op->_exception = EXCEPTION_ALU_NONE; 937 1061 op->_no_sequence = 0; 938 //op->_address = 0; 1062 #ifdef SYSTEMC_VHDL_COMPATIBILITY 1063 op->_address = 0; 1064 #else 1065 //op->_address = 0; 1066 #endif 939 1067 }; 940 1068 … … 960 1088 op->_exception = EXCEPTION_ALU_NONE; 961 1089 op->_no_sequence = 0; 962 //op->_address = 0; 1090 #ifdef SYSTEMC_VHDL_COMPATIBILITY 1091 op->_address = 0; 1092 #else 1093 //op->_address = 0; 1094 #endif 963 1095 }; 964 1096 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp
r115 r116 60 60 timing[i][j]._delay = timing[i][j]._latence = 1; 61 61 } 62 62 timing[4][1]._delay = 1; 63 timing[4][1]._latence = 7; 64 timing[4][2]._delay = 1; 65 timing[4][2]._latence = 7; 63 66 try 64 67 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp
r104 r116 238 238 239 239 transaction_in.push_back(execute_transaction(_param,0,0,0, 0,OPERATION_ALU_L_ADD ,TYPE_ALU,0,0xdeadbeef,0x12344321,0x12345678,0 ,1,63,0x24689999,1,15,0 ,EXCEPTION_NONE ,0)); 240 241 240 242 transaction_in.push_back(execute_transaction(_param,0,0,0, 1,OPERATION_ALU_L_ADD ,TYPE_ALU,0,0xffffffff,0x12345678,0x12345678,0 ,1,56,0x2468acf0,1,3 ,0 ,EXCEPTION_NONE ,0)); 241 243 transaction_in.push_back(execute_transaction(_param,0,0,0, 2,OPERATION_ALU_L_ADD ,TYPE_ALU,1,0x12345678,0x12345678,0xffffffff,0 ,1,56,0x2468acf0,1,3 ,0 ,EXCEPTION_NONE ,0)); … … 245 247 transaction_in.push_back(execute_transaction(_param,0,0,0, 5,OPERATION_ALU_L_ADD ,TYPE_ALU,1,0x80000000,0x80001000,0x0 ,0 ,1,1 ,0x1000 ,1,0 ,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0)); 246 248 transaction_in.push_back(execute_transaction(_param,0,0,0, 6,OPERATION_ALU_L_ADD ,TYPE_ALU,1,0x7fffffff,0x00000001,0x0 ,FLAG_CY|FLAG_OV,1,1 ,0x80000000,1,0 , FLAG_OV,EXCEPTION_ALU_RANGE,0)); 247 248 249 250 249 251 transaction_in.push_back(execute_transaction(_param,0,0,0, 7,OPERATION_ALU_L_ADDC ,TYPE_ALU,0,0xdeadbeef,0x12344321,0x12345678,0 ,1,63,0x24689999,1,15,0 ,EXCEPTION_NONE ,0)); 250 252 transaction_in.push_back(execute_transaction(_param,0,0,0, 8,OPERATION_ALU_L_ADDC ,TYPE_ALU,0,0xffffffff,0x12345678,0x12345678,0 ,1,56,0x2468acf0,1,3 ,0 ,EXCEPTION_NONE ,0)); … … 254 256 transaction_in.push_back(execute_transaction(_param,0,0,0, 12,OPERATION_ALU_L_ADDC ,TYPE_ALU,1,0x80000000,0x80001000,0x0 ,0 ,1,1 ,0x1000 ,1,0 ,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0)); 255 257 transaction_in.push_back(execute_transaction(_param,0,0,0, 13,OPERATION_ALU_L_ADDC ,TYPE_ALU,1,0x7fffffff,0x00000001,0x0 ,0 ,1,1 ,0x80000000,1,0 , FLAG_OV,EXCEPTION_ALU_RANGE,0)); 256 258 257 259 transaction_in.push_back(execute_transaction(_param,0,0,0, 14,OPERATION_ALU_L_ADDC ,TYPE_ALU,0,0xdeadbeef,0x12344320,0x12345678,FLAG_CY ,1,63,0x24689999,1,15,0 ,EXCEPTION_NONE ,0)); 258 260 transaction_in.push_back(execute_transaction(_param,0,0,0, 15,OPERATION_ALU_L_ADDC ,TYPE_ALU,0,0xffffffff,0x12345677,0x12345678,FLAG_CY ,1,56,0x2468acf0,1,3 ,0 ,EXCEPTION_NONE ,0)); … … 262 264 transaction_in.push_back(execute_transaction(_param,0,0,0, 19,OPERATION_ALU_L_ADDC ,TYPE_ALU,1,0x80000000,0x8000000f,0x0 ,FLAG_CY ,1,1 ,0x00000010,1,0 ,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0)); 263 265 transaction_in.push_back(execute_transaction(_param,0,0,0, 20,OPERATION_ALU_L_ADDC ,TYPE_ALU,1,0x7fffffff,0x00000000,0x0 ,FLAG_CY ,1,1 ,0x80000000,1,0 , FLAG_OV,EXCEPTION_ALU_RANGE,0)); 264 265 266 267 266 268 transaction_in.push_back(execute_transaction(_param,0,0,0, 21,OPERATION_ALU_L_AND ,TYPE_ALU,0,0xdeadbeef,0x0000ffff,0x00ff00ff,0 ,1,63,0x000000ff,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 267 269 transaction_in.push_back(execute_transaction(_param,0,0,0, 22,OPERATION_ALU_L_OR ,TYPE_ALU,0,0xdeadbeef,0x0000ffff,0x00ff00ff,0 ,1,63,0x00ffffff,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 268 270 transaction_in.push_back(execute_transaction(_param,0,0,0, 23,OPERATION_ALU_L_XOR ,TYPE_ALU,0,0xdeadbeef,0x0000ffff,0x00ff00ff,0 ,1,63,0x00ffff00,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 269 271 270 272 transaction_in.push_back(execute_transaction(_param,0,0,0, 24,OPERATION_MOVE_L_CMOV ,TYPE_MOVE,0,0x0 ,0xdeadbeef,0x12345678,0 ,1,63,0x12345678,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 271 273 transaction_in.push_back(execute_transaction(_param,0,0,0, 25,OPERATION_MOVE_L_CMOV ,TYPE_MOVE,0,0x0 ,0xdeadbeef,0x12345678,FLAG_F ,1,63,0xdeadbeef,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 272 274 transaction_in.push_back(execute_transaction(_param,0,0,0, 26,OPERATION_MOVE_L_MOVHI ,TYPE_MOVE,1,0xdeadbeef,0x0 ,0x0 ,FLAG_F ,1,63,0xbeef0000,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 273 274 275 276 275 277 transaction_in.push_back(execute_transaction(_param,0,0,0, 27,OPERATION_BRANCH_L_TEST_F ,TYPE_BRANCH,1,0xdeadbeef,0x0 ,0x0 ,0 ,0,63,0xbeef0000,0,15,FLAG_CY ,EXCEPTION_NONE ,0,0x00000000)); 276 278 transaction_in.push_back(execute_transaction(_param,0,0,0, 28,OPERATION_BRANCH_L_TEST_F ,TYPE_BRANCH,1,0xdeadbeef,0x0 ,0x0 ,FLAG_F ,0,63,0xbeef0000,0,15,FLAG_CY ,EXCEPTION_NONE ,1,0xdeadbeef)); 277 279 transaction_in.push_back(execute_transaction(_param,0,0,0, 29,OPERATION_BRANCH_L_TEST_NF ,TYPE_BRANCH,1,0xdeadbeef,0x0 ,0x0 ,FLAG_F ,0,63,0xbeef0000,0,15,FLAG_CY ,EXCEPTION_NONE ,0,0x00000000)); 278 280 transaction_in.push_back(execute_transaction(_param,0,0,0, 30,OPERATION_BRANCH_L_TEST_NF ,TYPE_BRANCH,1,0xdeadbeef,0x0 ,0x0 ,0 ,0,63,0xbeef0000,0,15,FLAG_CY ,EXCEPTION_NONE ,1,0xdeadbeef)); 279 280 281 282 281 283 transaction_in.push_back(execute_transaction(_param,0,0,0, 31,OPERATION_BRANCH_L_JALR ,TYPE_BRANCH,0,0xdeadbeef,0x0 ,0x12345678,0 ,0,63,0xdeadbeef,0,15,FLAG_CY ,EXCEPTION_NONE ,1,0x12345678>>2)); // jr 282 284 transaction_in.push_back(execute_transaction(_param,0,0,0, 32,OPERATION_BRANCH_L_JALR ,TYPE_BRANCH,1,0xdeadbeef,0x0 ,0x12345678,0 ,1,63,0xdeadbeef<<2,0,15,FLAG_CY ,EXCEPTION_NONE ,1,0x12345678>>2)); // jal 283 285 transaction_in.push_back(execute_transaction(_param,0,0,0, 33,OPERATION_BRANCH_L_JALR ,TYPE_BRANCH,1,0xdeadbeef,0x0 ,0x12345678,0 ,1,63,0xdeadbeef<<2,0,15,FLAG_CY ,EXCEPTION_NONE ,1,0x12345678>>2)); // jalr 284 286 285 287 transaction_in.push_back(execute_transaction(_param,0,0,0, 34,OPERATION_EXTEND_L_EXTEND_S,TYPE_EXTEND,1,8 ,0x12345678,0x0 ,0 ,1,63,0x00000078,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 286 288 transaction_in.push_back(execute_transaction(_param,0,0,0, 35,OPERATION_EXTEND_L_EXTEND_S,TYPE_EXTEND,1,16 ,0x12345678,0x0 ,0 ,1,63,0x00005678,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); … … 296 298 transaction_in.push_back(execute_transaction(_param,0,0,0, 41,OPERATION_EXTEND_L_EXTEND_Z,TYPE_EXTEND,1,16 ,0xdeadbeef,0x0 ,0 ,1,63,0x0000beef,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 297 299 transaction_in.push_back(execute_transaction(_param,0,0,0, 42,OPERATION_EXTEND_L_EXTEND_Z,TYPE_EXTEND,1,32 ,0xdeadbeef,0x0 ,0 ,1,63,0xdeadbeef,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 298 300 299 301 transaction_in.push_back(execute_transaction(_param,0,0,0, 43,OPERATION_SHIFT_L_SLL ,TYPE_SHIFT,1,0 ,0xdeadbeef,0x0 ,0 ,1,63,0xdeadbeef,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 300 302 transaction_in.push_back(execute_transaction(_param,0,0,0, 44,OPERATION_SHIFT_L_SLL ,TYPE_SHIFT,1,4 ,0xdeadbeef,0x0 ,0 ,1,63,0xeadbeef0,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); … … 344 346 transaction_in.push_back(execute_transaction(_param,0,0,0, 88,OPERATION_SHIFT_L_ROR ,TYPE_SHIFT,1,24 ,0x12345678,0x0 ,0 ,1,63,0x34567812,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 345 347 transaction_in.push_back(execute_transaction(_param,0,0,0, 89,OPERATION_SHIFT_L_ROR ,TYPE_SHIFT,1,32 ,0x12345678,0x0 ,0 ,1,63,0x12345678,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 346 348 347 349 transaction_in.push_back(execute_transaction(_param,0,0,0, 90,OPERATION_FIND_L_FF1 ,TYPE_FIND,0,0 ,0x12345678,0x0 ,0 ,1,63,4 ,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 348 350 transaction_in.push_back(execute_transaction(_param,0,0,0, 91,OPERATION_FIND_L_FF1 ,TYPE_FIND,0,0 ,0x0 ,0x0 ,0 ,1,63,0 ,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); … … 355 357 transaction_in.push_back(execute_transaction(_param,0,0,0, 98,OPERATION_FIND_L_FL1 ,TYPE_FIND,0,0 ,0x1 ,0x0 ,0 ,1,63,1 ,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 356 358 transaction_in.push_back(execute_transaction(_param,0,0,0, 99,OPERATION_FIND_L_FL1 ,TYPE_FIND,0,0 ,0x80000000,0x0 ,0 ,1,63,32 ,0,15,FLAG_CY ,EXCEPTION_NONE ,0)); 357 359 358 360 transaction_in.push_back(execute_transaction(_param,0,0,0,100,OPERATION_ALU_L_SUB ,TYPE_ALU,0,0 ,0x12344321,0x1 ,0 ,1,63,0x12344320,1,15,0 ,EXCEPTION_NONE ,0)); 359 361 transaction_in.push_back(execute_transaction(_param,0,0,0,101,OPERATION_ALU_L_SUB ,TYPE_ALU,0,0 ,0x12345678,0xffffffff,0 ,1,56,0x12345679,1,3 ,0 ,EXCEPTION_NONE ,0)); … … 363 365 transaction_in.push_back(execute_transaction(_param,0,0,0,105,OPERATION_ALU_L_SUB ,TYPE_ALU,0,0 ,0x80001000,0x80000000,0 ,1,1 ,0x1000 ,1,0 , FLAG_OV,EXCEPTION_ALU_RANGE,0)); 364 366 transaction_in.push_back(execute_transaction(_param,0,0,0,106,OPERATION_ALU_L_SUB ,TYPE_ALU,0,0 ,0x00000001,0x7fffffff,FLAG_CY|FLAG_OV,1,1 ,0x80000002,1,0 ,FLAG_CY ,EXCEPTION_NONE ,0)); 365 367 366 368 transaction_in.push_back(execute_transaction(_param,0,0,0,120,OPERATION_TEST_L_SFEQ ,TYPE_TEST,0,0 ,0xdead ,0xdead ,0 ,0,63,0x0 ,1,15,FLAG_F ,EXCEPTION_NONE ,0)); // + == + 367 369 transaction_in.push_back(execute_transaction(_param,0,0,0,121,OPERATION_TEST_L_SFEQ ,TYPE_TEST,0,0 ,0x25071959,0x21071981,0 ,0,63,0x0 ,1,15,0 ,EXCEPTION_NONE ,0)); // + > + … … 484 486 transaction_in.push_back(execute_transaction(_param,0,0,0,300,OPERATION_TEST_L_SFLTS ,TYPE_TEST,0,0 ,0x33333333,0xdeadbeef,0 ,0,63,0x0 ,1,15,0 ,EXCEPTION_NONE ,0)); // + > - (in unsigned) 485 487 transaction_in.push_back(execute_transaction(_param,0,0,0,301,OPERATION_TEST_L_SFLTS ,TYPE_TEST,0,0 ,0x11111111,0xdeadbeef,0 ,0,63,0x0 ,1,15,0 ,EXCEPTION_NONE ,0)); // + < - (in unsigned) 486 488 /* 487 489 transaction_in.push_back(execute_transaction(_param,0,0,0,400,OPERATION_SPECIAL_L_MTSPR ,TYPE_SPECIAL,1,GROUP_ICACHE<<11, 3,0xdeadbeef,0 ,0,63,0xdeadbeef,0, 0,0 ,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE ,0,(GROUP_ICACHE<<11)| 3)); 488 490 transaction_in.push_back(execute_transaction(_param,0,0,0,401,OPERATION_SPECIAL_L_MTSPR ,TYPE_SPECIAL,1,GROUP_ICACHE<<11, 5,0xdeadbeef,0 ,0,63,0xdeadbeef,0, 0,0 ,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE ,0,(GROUP_ICACHE<<11)| 5)); … … 568 570 transaction_in.push_back(execute_transaction(_param,0,0,0,627,OPERATION_SPECIAL_L_MFSPR ,TYPE_SPECIAL,1,GROUP_CUSTOM_7<<11, 0,0x0 ,0 ,1,63,0xe ,0, 0,0 ,EXCEPTION_ALU_NONE ,0,(GROUP_CUSTOM_7<<11)|0)); 569 571 transaction_in.push_back(execute_transaction(_param,0,0,0,628,OPERATION_SPECIAL_L_MFSPR ,TYPE_SPECIAL,1,GROUP_CUSTOM_7<<11, 0,0x0 ,0 ,1,63,0xa ,0, 0,0 ,EXCEPTION_ALU_NONE ,0,(GROUP_CUSTOM_7<<11)|0)); 570 572 */ 571 573 transaction_in.push_back(execute_transaction(_param,0,0,0,700,OPERATION_MUL_L_MUL ,TYPE_MUL,0,0 ,0x00000001,0x00000001,0 ,1,63,0x00000001,1,15,0 ,EXCEPTION_NONE ,0)); 572 574 transaction_in.push_back(execute_transaction(_param,0,0,0,701,OPERATION_MUL_L_MUL ,TYPE_MUL,0,0 ,0x00002107,0x00001981,0 ,1,63,0x034a5387,1,15,0 ,EXCEPTION_NONE ,0)); … … 574 576 transaction_in.push_back(execute_transaction(_param,0,0,0,703,OPERATION_MUL_L_MUL ,TYPE_MUL,0,0 ,0x40000000,0x00000002,0 ,1,63,0x80000000,1,15,0 ,EXCEPTION_NONE ,0)); 575 577 transaction_in.push_back(execute_transaction(_param,0,0,0,704,OPERATION_MUL_L_MUL ,TYPE_MUL,0,0 ,0x40000000,0x00000004,0 ,1,63,0x00000000,1,15,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0)); 576 578 577 579 transaction_in.push_back(execute_transaction(_param,0,0,0,800,OPERATION_MUL_L_MULU ,TYPE_MUL,0,0 ,0x00000001,0x00000001,0 ,1,63,0x00000001,1,15,0 ,EXCEPTION_NONE ,0)); 578 580 transaction_in.push_back(execute_transaction(_param,0,0,0,801,OPERATION_MUL_L_MULU ,TYPE_MUL,0,0 ,0x00002107,0x00001981,0 ,1,63,0x034a5387,1,15,0 ,EXCEPTION_NONE ,0)); … … 580 582 transaction_in.push_back(execute_transaction(_param,0,0,0,803,OPERATION_MUL_L_MULU ,TYPE_MUL,0,0 ,0x40000000,0x00000002,0 ,1,63,0x80000000,1,15,0 ,EXCEPTION_NONE ,0)); 581 583 transaction_in.push_back(execute_transaction(_param,0,0,0,804,OPERATION_MUL_L_MULU ,TYPE_MUL,0,0 ,0x40000000,0x00000004,0 ,1,63,0x00000000,1,15,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0)); 582 584 583 585 584 586 … … 602 604 while (nb_transaction_out > 0) 603 605 { 604 Tcontrol_t val = ((rand()%100) < percent_transaction_execute_in) and not transaction_in.empty();606 Tcontrol_t val = ((rand()%100) < percent_transaction_execute_in) and not transaction_in.empty() and transaction_out.empty(); 605 607 in_EXECUTE_IN_VAL .write(val); 606 608 in_EXECUTE_OUT_ACK.write((rand()%100) < percent_transaction_execute_out); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
r97 r116 17 17 #include "Common/include/ToString.h" 18 18 #include "Common/include/Debug.h" 19 #include "Behavioural/include/Types.h"20 19 #include "Behavioural/include/Identification.h" 21 20 22 #include "Behavioural/include/Types.h" 21 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h" 22 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" 23 23 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h" 24 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"25 24 #ifdef STATISTICS 26 25 #include "Behavioural/include/Stat.h" … … 160 159 public : void transition (void); 161 160 public : void genMoore (void); 161 public : void genMealy (void); 162 162 163 163 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h
r88 r116 11 11 #include "Common/include/Debug.h" 12 12 #include "Behavioural/include/Parameters.h" 13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h" 13 14 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h" 14 15 #include "Behavioural/Custom/include/Custom.h" … … 38 39 //public : uint32_t _size_store_queue ; 39 40 //public : uint32_t _size_load_queue ; 41 public : const Tfunctionnal_unit_scheme_t _functionnal_unit_scheme; 40 42 41 43 public : execute_timing_t ** _timing ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit.cpp
r88 r116 84 84 SC_METHOD (genMoore); 85 85 dont_initialize (); 86 sensitive << (*(in_CLOCK)).neg(); 86 sensitive << (*(in_CLOCK)).neg(); // use internal register 87 88 # ifdef SYSTEMCASS_SPECIFIC 89 // List dependency information 90 # endif 91 92 log_printf(INFO,Functionnal_unit,FUNCTION,"Method - genMealy"); 93 94 SC_METHOD (genMealy); 95 dont_initialize (); 96 sensitive << (*(in_CLOCK)).neg() // use internal register 97 // << (*(in_EXECUTE_IN_VAL )) 98 << (*(in_EXECUTE_OUT_ACK)); 99 87 100 88 101 # ifdef SYSTEMCASS_SPECIFIC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp
r97 r116 20 20 21 21 #undef FUNCTION 22 #define FUNCTION "Functionnal_unit::genM ealy"22 #define FUNCTION "Functionnal_unit::genMoore" 23 23 void Functionnal_unit::genMoore (void) 24 24 { … … 27 27 28 28 { 29 internal_EXECUTE_IN_ACK = not reg_BUSY_IN;30 31 PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK);32 }33 34 {35 internal_EXECUTE_OUT_VAL = reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0);36 37 PORT_WRITE(out_EXECUTE_OUT_VAL , internal_EXECUTE_OUT_VAL);38 29 if (_param->_have_port_context_id) 39 30 PORT_WRITE(out_EXECUTE_OUT_CONTEXT_ID ,_execute_operation_out->_context_id ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp
r100 r116 58 58 } 59 59 60 61 if (reg_BUSY_IN and not reg_BUSY_OUT) 62 // if (not reg_BUSY_OUT_old or) 63 { 64 reg_BUSY_OUT = reg_BUSY_IN; 65 reg_BUSY_IN = false; 66 67 _execute_operation_out->_timing = _execute_operation_in->_timing ; 68 _execute_operation_out->_context_id = _execute_operation_in->_context_id ; 69 _execute_operation_out->_front_end_id = _execute_operation_in->_front_end_id ; 70 _execute_operation_out->_ooo_engine_id = _execute_operation_in->_ooo_engine_id; 71 _execute_operation_out->_packet_id = _execute_operation_in->_packet_id ; 72 _execute_operation_out->_operation = _execute_operation_in->_operation ; 73 _execute_operation_out->_type = _execute_operation_in->_type ; 74 _execute_operation_out->_has_immediat = _execute_operation_in->_has_immediat ; 75 _execute_operation_out->_immediat = _execute_operation_in->_immediat ; 76 _execute_operation_out->_data_ra = _execute_operation_in->_data_ra ; 77 _execute_operation_out->_data_rb = _execute_operation_in->_data_rb ; 78 _execute_operation_out->_data_rc = _execute_operation_in->_data_rc ; 79 _execute_operation_out->_data_rd = _execute_operation_in->_data_rd ; 80 _execute_operation_out->_data_re = _execute_operation_in->_data_re ; 81 _execute_operation_out->_write_rd = _execute_operation_in->_write_rd ; 82 _execute_operation_out->_num_reg_rd = _execute_operation_in->_num_reg_rd ; 83 _execute_operation_out->_write_re = _execute_operation_in->_write_re ; 84 _execute_operation_out->_num_reg_re = _execute_operation_in->_num_reg_re ; 85 _execute_operation_out->_exception = _execute_operation_in->_exception ; 86 _execute_operation_out->_no_sequence = _execute_operation_in->_no_sequence ; 87 _execute_operation_out->_address = _execute_operation_in->_address ; 88 } 89 90 91 60 92 // Test if push 61 93 execute_register_t * execute_register = NULL; … … 178 210 } 179 211 180 if (reg_BUSY_IN and not reg_BUSY_OUT)181 {182 reg_BUSY_OUT = reg_BUSY_IN;183 reg_BUSY_IN = false;184 185 _execute_operation_out->_timing = _execute_operation_in->_timing ;186 _execute_operation_out->_context_id = _execute_operation_in->_context_id ;187 _execute_operation_out->_front_end_id = _execute_operation_in->_front_end_id ;188 _execute_operation_out->_ooo_engine_id = _execute_operation_in->_ooo_engine_id;189 _execute_operation_out->_packet_id = _execute_operation_in->_packet_id ;190 _execute_operation_out->_operation = _execute_operation_in->_operation ;191 _execute_operation_out->_type = _execute_operation_in->_type ;192 _execute_operation_out->_has_immediat = _execute_operation_in->_has_immediat ;193 _execute_operation_out->_immediat = _execute_operation_in->_immediat ;194 _execute_operation_out->_data_ra = _execute_operation_in->_data_ra ;195 _execute_operation_out->_data_rb = _execute_operation_in->_data_rb ;196 _execute_operation_out->_data_rc = _execute_operation_in->_data_rc ;197 _execute_operation_out->_data_rd = _execute_operation_in->_data_rd ;198 _execute_operation_out->_data_re = _execute_operation_in->_data_re ;199 _execute_operation_out->_write_rd = _execute_operation_in->_write_rd ;200 _execute_operation_out->_num_reg_rd = _execute_operation_in->_num_reg_rd ;201 _execute_operation_out->_write_re = _execute_operation_in->_write_re ;202 _execute_operation_out->_num_reg_re = _execute_operation_in->_num_reg_re ;203 _execute_operation_out->_exception = _execute_operation_in->_exception ;204 _execute_operation_out->_no_sequence = _execute_operation_in->_no_sequence ;205 _execute_operation_out->_address = _execute_operation_in->_address ;206 }207 212 208 213 // each cycle : decrease the latence … … 210 215 _execute_operation_out->_timing._latence --; 211 216 } 212 217 213 218 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 214 219 end_cycle (); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl.cpp
r81 r116 9 9 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h" 10 10 #include "Behavioural/include/Vhdl.h" 11 #include "Behavioural/Generic/Shifter/include/Shifter.h" 11 12 12 13 namespace morpheo { … … 25 26 { 26 27 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); 28 29 morpheo::behavioural::generic::shifter::Parameters * param_shifter; 30 31 param_shifter = new morpheo::behavioural::generic::shifter::Parameters 32 ( 33 _param->_size_general_data, // size_data 34 1, // nb_port 35 0, // shift_value 36 generic::shifter::external_rotate, // rotate 37 generic::shifter::external_direction, // direction 38 generic::shifter::external_carry, // carry 39 false // type_completion_bool 40 ); 41 42 morpheo::behavioural::generic::shifter::Shifter * shifter; 43 44 std::string shifter_name = _name + "_shifter"; 45 shifter = new morpheo::behavioural::generic::shifter::Shifter 46 (shifter_name.c_str() 47 #ifdef STATISTICS 48 ,NULL 49 #endif 50 ,param_shifter 51 ,USE_VHDL); 52 53 _component->set_component(shifter->_component 54 #ifdef POSITION 55 , 50, 50, 50, 50 56 #endif 57 , INSTANCE_LIBRARY 58 ); 27 59 28 60 Vhdl * vhdl = new Vhdl (_name); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_body.cpp
r81 r116 25 25 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); 26 26 vhdl->set_body (""); 27 vhdl->set_comment(0,""); 28 vhdl->set_comment(0,"-----------------------------------"); 29 vhdl->set_comment(0,"-- Registers "); 30 vhdl->set_comment(0,"-----------------------------------"); 31 vhdl->set_comment(0,""); 32 vhdl->set_body (""); 33 vhdl->set_body (0,"process (in_CLOCK)"); 34 vhdl->set_body (0,"begin"); 35 vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then"); 36 37 vhdl->set_body (2,"if (in_NRESET = '0') then"); 38 vhdl->set_body (3,"reg_BUSY_IN <= '0';"); 39 vhdl->set_body (3,"reg_BUSY_OUT <= '0';"); 40 vhdl->set_body (2,"else"); 41 42 vhdl->set_comment (3,"Input Buffer"); 43 vhdl->set_body (3,"if (sig_EXECUTE_IN_ACK = '1') then"); 44 vhdl->set_body (4,"reg_BUSY_IN <= in_EXECUTE_IN_VAL;"); 45 if(_param->_have_port_context_id) 46 vhdl->set_body (4,"reg_EXECUTE_IN_CONTEXT_ID <= in_EXECUTE_IN_CONTEXT_ID;"); 47 if(_param->_have_port_front_end_id) 48 vhdl->set_body (4,"reg_EXECUTE_IN_FRONT_END_ID <= in_EXECUTE_IN_FRONT_END_ID;"); 49 if(_param->_have_port_ooo_engine_id) 50 vhdl->set_body (4,"reg_EXECUTE_IN_OOO_ENGINE_ID <= in_EXECUTE_IN_OOO_ENGINE_ID;"); 51 if(_param->_have_port_rob_ptr) 52 vhdl->set_body (4,"reg_EXECUTE_IN_PACKET_ID <= in_EXECUTE_IN_PACKET_ID;"); 53 vhdl->set_body (4,"reg_EXECUTE_IN_OPERATION <= in_EXECUTE_IN_OPERATION;"); 54 vhdl->set_body (4,"reg_EXECUTE_IN_TYPE <= in_EXECUTE_IN_TYPE;"); 55 vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RA <= in_EXECUTE_IN_DATA_RA;"); 56 vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RB <= in_EXECUTE_IN_DATA_RB;"); 57 vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RC <= in_EXECUTE_IN_DATA_RC;"); 58 vhdl->set_body (4,"reg_EXECUTE_IN_HAS_IMMEDIAT <= in_EXECUTE_IN_HAS_IMMEDIAT;"); 59 vhdl->set_body (4,"reg_EXECUTE_IN_IMMEDIAT <= in_EXECUTE_IN_IMMEDIAT;"); 60 vhdl->set_body (4,"reg_EXECUTE_IN_WRITE_RD <= in_EXECUTE_IN_WRITE_RD;"); 61 vhdl->set_body (4,"reg_EXECUTE_IN_NUM_REG_RD <= in_EXECUTE_IN_NUM_REG_RD;"); 62 vhdl->set_body (4,"reg_EXECUTE_IN_WRITE_RE <= in_EXECUTE_IN_WRITE_RE;"); 63 vhdl->set_body (4,"reg_EXECUTE_IN_NUM_REG_RE <= in_EXECUTE_IN_NUM_REG_RE;"); 64 vhdl->set_body (3,"end if;"); 65 66 vhdl->set_comment (3,"Output Buffer"); 67 vhdl->set_body (3,"if (sig_EXECUTE_OUT_UPDATE = '1') then"); 68 vhdl->set_body (4,"reg_BUSY_OUT <= reg_BUSY_IN;"); 69 if(_param->_have_port_context_id) 70 vhdl->set_body (4,"reg_EXECUTE_OUT_CONTEXT_ID <= sig_EXECUTE_OUT_CONTEXT_ID;"); 71 if(_param->_have_port_front_end_id) 72 vhdl->set_body (4,"reg_EXECUTE_OUT_FRONT_END_ID <= sig_EXECUTE_OUT_FRONT_END_ID;"); 73 if(_param->_have_port_ooo_engine_id) 74 vhdl->set_body (4,"reg_EXECUTE_OUT_OOO_ENGINE_ID <= sig_EXECUTE_OUT_OOO_ENGINE_ID;"); 75 if(_param->_have_port_rob_ptr) 76 vhdl->set_body (4,"reg_EXECUTE_OUT_PACKET_ID <= sig_EXECUTE_OUT_PACKET_ID;"); 77 vhdl->set_body (4,"reg_EXECUTE_OUT_WRITE_RD <= sig_EXECUTE_OUT_WRITE_RD;"); 78 vhdl->set_body (4,"reg_EXECUTE_OUT_NUM_REG_RD <= sig_EXECUTE_OUT_NUM_REG_RD;"); 79 vhdl->set_body (4,"reg_EXECUTE_OUT_DATA_RD <= sig_EXECUTE_OUT_DATA_RD;"); 80 vhdl->set_body (4,"reg_EXECUTE_OUT_WRITE_RE <= sig_EXECUTE_OUT_WRITE_RE;"); 81 vhdl->set_body (4,"reg_EXECUTE_OUT_NUM_REG_RE <= sig_EXECUTE_OUT_NUM_REG_RE;"); 82 vhdl->set_body (4,"reg_EXECUTE_OUT_DATA_RE <= sig_EXECUTE_OUT_DATA_RE;"); 83 vhdl->set_body (4,"reg_EXECUTE_OUT_EXCEPTION <= sig_EXECUTE_OUT_EXCEPTION;"); 84 vhdl->set_body (4,"reg_EXECUTE_OUT_NO_SEQUENCE <= sig_EXECUTE_OUT_NO_SEQUENCE;"); 85 vhdl->set_body (4,"reg_EXECUTE_OUT_ADDRESS <= sig_EXECUTE_OUT_ADDRESS;"); 86 vhdl->set_body (3,"end if;"); 87 vhdl->set_body (2,"end if;"); 88 vhdl->set_body (1,"end if;"); 89 vhdl->set_body (0,"end process;"); 90 91 vhdl->set_body (""); 92 vhdl->set_comment(0,""); 93 vhdl->set_comment(0,"-----------------------------------"); 94 vhdl->set_comment(0,"-- Insides "); 95 vhdl->set_comment(0,"-----------------------------------"); 96 vhdl->set_comment(0,""); 97 98 vhdl->set_body (0,""); 99 vhdl->set_body (0,"sig_B_OPERAND <= reg_EXECUTE_IN_IMMEDIAT when (reg_EXECUTE_IN_HAS_IMMEDIAT = '1') else"); 100 vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB;"); 101 102 vhdl->set_comment(0,""); 103 vhdl->set_comment(0,"ALU"); 104 vhdl->set_comment(0,""); 105 106 vhdl->set_body (0,"sig_IS_ARITH <= reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADD))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+");"); 107 108 vhdl->set_body (0,"sig_IS_LOGIC <= reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_AND))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_OR))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_XOR))+");"); 109 110 vhdl->set_body (0,"sig_CIN_ARITH <= reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+");"); 111 // vhdl->set_body (0,"sig_CIN_ARITH <= (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+")) or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+");"); 112 113 // vhdl->set_body (0,"sig_ARITH_B_OPERAND <= not (sig_B_OPERAND) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") = '1') else"); 114 vhdl->set_body (0,"sig_ARITH_B_OPERAND <= ((not sig_B_OPERAND) + 1) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") = '1') else"); 115 vhdl->set_body (1,"sig_B_OPERAND;"); 116 117 vhdl->set_body (0,"sig_RES_ARITH <= ('0' & reg_EXECUTE_IN_DATA_RA) + ('0' & sig_ARITH_B_OPERAND) + ("+std_logic_cst(_param->_size_general_data-2,0)+" & sig_CIN_ARITH);"); 118 119 vhdl->set_body (0,""); 120 vhdl->set_body (0,"sig_A_AND_B <= reg_EXECUTE_IN_DATA_RA and sig_B_OPERAND;"); 121 vhdl->set_body (0,"sig_A_OR_B <= reg_EXECUTE_IN_DATA_RA or sig_B_OPERAND;"); 122 vhdl->set_body (0,"sig_A_XOR_B <= reg_EXECUTE_IN_DATA_RA xor sig_B_OPERAND;"); 123 124 vhdl->set_body (0,""); 125 vhdl->set_body (0,"with reg_EXECUTE_IN_OPERATION select"); 126 vhdl->set_body (0,"sig_RES_LOGIC <="); 127 vhdl->set_body (1,"sig_A_AND_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_AND)+","); 128 vhdl->set_body (1,"sig_A_OR_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_OR)+","); 129 vhdl->set_body (1,"sig_A_XOR_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_XOR)+","); 130 vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+" when others;"); 131 132 vhdl->set_body (0,"sig_RES_ALU <="); 133 vhdl->set_body (1,"sig_RES_ARITH ("+toString(_param->_size_general_data-1)+" downto 0) when (sig_IS_ARITH = '1') else"); 134 vhdl->set_body (1,"sig_RES_LOGIC when (sig_IS_LOGIC = '1') else"); 135 vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";"); 136 137 vhdl->set_body (0,""); 138 vhdl->set_comment(0,"In ISA l.sub doesn't change carry flag."); 139 vhdl->set_body (0,"sig_COUT_ALU <= (sig_RES_ARITH("+toString(_param->_size_general_data)+") and (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADD))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+"))) or (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") and reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+"));"); 140 vhdl->set_body (0,"sig_OVR_ALU <= ((sig_ARITH_B_OPERAND("+toString(_param->_size_general_data-1)+") and reg_EXECUTE_IN_DATA_RA("+toString(_param->_size_general_data-1)+") and not sig_RES_ARITH("+toString(_param->_size_general_data-1)+")) or (not sig_ARITH_B_OPERAND("+toString(_param->_size_general_data-1)+") and not reg_EXECUTE_IN_DATA_RA("+toString(_param->_size_general_data-1)+") and sig_RES_ARITH("+toString(_param->_size_general_data-1)+"))) and sig_IS_ARITH;"); 141 142 vhdl->set_body (0,""); 143 vhdl->set_comment(0,""); 144 vhdl->set_comment(0,"MOVE"); 145 vhdl->set_comment(0,""); 146 vhdl->set_body (0,"sig_MOVHI <= reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-17)+" downto 0) & "+std_logic_cst(16,0)+";"); 147 148 vhdl->set_body (0,"sig_CMOV <="); 149 vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RA when (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") = '1') else"); 150 vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB;"); 151 152 vhdl->set_body (0,"sig_RES_MOVE <="); 153 vhdl->set_body (1,"sig_MOVHI when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_MOVE_L_MOVHI))+") = '1') else"); 154 vhdl->set_body (1,"sig_CMOV when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_MOVE_L_CMOV))+") = '1') else"); 155 vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";"); 156 157 vhdl->set_body (0,""); 158 vhdl->set_comment(0,""); 159 vhdl->set_comment(0,"BRANCH"); 160 vhdl->set_comment(0,""); 161 vhdl->set_body (0,"sig_NOSQ_BRANCH <= (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_TEST_F))+")) or (not reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_TEST_NF))+")) or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+");"); 162 163 #ifdef SYSTEMC_VHDL_COMPATIBILITY 164 vhdl->set_body (0,"sig_RES_BRANCH <="); 165 vhdl->set_body (1,"reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-3)+" downto 0) & "+std_logic_cst(2,0)+"when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+") = '1') else"); 166 vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";"); 167 #else 168 vhdl->set_body (0,"sig_RES_BRANCH <= reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-3)+" downto 0) & "+std_logic_cst(2,0)+";"); 169 #endif 170 171 vhdl->set_body (0,"sig_ADDR_BRANCH <="); 172 vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB("+toString(_param->_size_instruction_address+1)+" downto 2) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+") = '1') else"); 173 vhdl->set_body (1,"reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_instruction_address-1)+" downto 0);"); 174 175 vhdl->set_body (""); 176 vhdl->set_comment(0,""); 177 vhdl->set_comment(0,"SHIFTER"); 178 vhdl->set_comment(0,""); 179 180 vhdl->set_comment(0,"Instance shifter"); 181 vhdl->set_body (0,"instance_"+_name+"_shifter : "+_name+"_shifter"); 182 vhdl->set_body (0,"port map ("); 183 vhdl->set_body (1," in_SHIFTER_0_DATA \t=>\treg_EXECUTE_IN_DATA_RA"); 184 vhdl->set_body (1,", in_SHIFTER_0_SHIFT \t=>\tsig_B_OPERAND("+toString((log2(_param->_size_general_data))-1)+" downto 0)"); 185 vhdl->set_body (1,", in_SHIFTER_0_DIRECTION \t=>\treg_EXECUTE_IN_OPERATION(0)"); 186 vhdl->set_body (1,", in_SHIFTER_0_TYPE \t=>\treg_EXECUTE_IN_OPERATION(1)"); 187 vhdl->set_body (1,", in_SHIFTER_0_CARRY \t=>\treg_EXECUTE_IN_OPERATION(2)"); 188 vhdl->set_body (1,",out_SHIFTER_0_DATA \t=>\tsig_RES_SHIFTER"); 189 vhdl->set_body (0,");"); 190 vhdl->set_body (0,""); 191 192 vhdl->set_body (""); 193 vhdl->set_comment(0,""); 194 vhdl->set_comment(0,"EXTEND"); 195 vhdl->set_comment(0,""); 196 197 vhdl->set_body (0,"sig_EXT_BYTE_S <="); 198 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,(1<<_param->_size_general_data-8)-1)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0) when (reg_EXECUTE_IN_DATA_RA (7) = '1') else"); 199 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,0)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0);"); 200 vhdl->set_body (0,""); 201 202 vhdl->set_body (0,"sig_EXT_BYTE_Z <="); 203 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,0)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0);"); 204 vhdl->set_body (0,""); 205 206 vhdl->set_body (0,"sig_EXT_HALF_WORD_S <="); 207 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,(1<<_param->_size_general_data-16)-1)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0) when (reg_EXECUTE_IN_DATA_RA (15) = '1') else"); 208 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,0)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0);"); 209 vhdl->set_body (0,""); 210 211 vhdl->set_body (0,"sig_EXT_HALF_WORD_Z <="); 212 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,0)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0);"); 213 vhdl->set_body (0,""); 214 215 vhdl->set_body (0,"sig_EXT_WORD_S <="); 216 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,(1<<_param->_size_general_data-32)-1)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0) when (reg_EXECUTE_IN_DATA_RA (31) = '1') else"); 217 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,0)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0);"); 218 vhdl->set_body (0,""); 219 220 vhdl->set_body (0,"sig_EXT_WORD_Z <="); 221 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,0)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0);"); 222 vhdl->set_body (0,""); 223 224 vhdl->set_body (0,"sig_EXT_S <="); 225 vhdl->set_body (1,"sig_EXT_BYTE_S when (reg_EXECUTE_IN_IMMEDIAT = 8) else"); 226 vhdl->set_body (1,"sig_EXT_HALF_WORD_S when (reg_EXECUTE_IN_IMMEDIAT = 16) else"); 227 vhdl->set_body (1,"sig_EXT_WORD_S;"); 228 vhdl->set_body (0,""); 229 230 vhdl->set_body (0,"sig_EXT_Z <="); 231 vhdl->set_body (1,"sig_EXT_BYTE_Z when (reg_EXECUTE_IN_IMMEDIAT = 8) else"); 232 vhdl->set_body (1,"sig_EXT_HALF_WORD_Z when (reg_EXECUTE_IN_IMMEDIAT = 16) else"); 233 vhdl->set_body (1,"sig_EXT_WORD_Z;"); 234 vhdl->set_body (0,""); 235 236 vhdl->set_body (0,"sig_RES_EXTEND <="); 237 vhdl->set_body (1,"sig_EXT_Z when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_EXTEND_L_EXTEND_Z))+") = '1') else"); 238 vhdl->set_body (1,"sig_EXT_S;"); 239 vhdl->set_body (0,""); 240 241 vhdl->set_body (0,""); 242 vhdl->set_comment(0,""); 243 vhdl->set_comment(0,"FIND"); 244 vhdl->set_comment(0,""); 245 246 vhdl->set_body (0,"sig_FF1 <="); 247 for (uint32_t i=0; i<_param->_size_general_data; i++) 248 vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,i+1)+" \twhen (reg_EXECUTE_IN_DATA_RA ("+toString(i)+") = '1') \telse"); 249 vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,0)+";"); 250 vhdl->set_body (0,""); 251 252 vhdl->set_body (0,"sig_FL1 <="); 253 for (uint32_t i=_param->_size_general_data; i>0; i--) 254 vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,i)+" \twhen (reg_EXECUTE_IN_DATA_RA ("+toString(i-1)+") = '1') \telse"); 255 vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,0)+";"); 256 vhdl->set_body (0,""); 257 258 vhdl->set_body (0,"sig_RES_FIND <="); 259 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-log2(_param->_size_general_data)-1,0)+"&"+"sig_FF1 when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_FIND_L_FF1))+") = '1') else"); 260 vhdl->set_body (1,std_logic_cst(_param->_size_general_data-log2(_param->_size_general_data)-1,0)+"&"+"sig_FL1;"); 261 vhdl->set_body (0,""); 262 263 vhdl->set_body (0,""); 264 vhdl->set_comment(0,""); 265 vhdl->set_comment(0,"SPECIAL"); 266 vhdl->set_comment(0,""); 267 268 vhdl->set_body (0,"sig_SPR_IS_HERE <="); 269 // vhdl->set_body (1,"'1' when (sig_A_OR_B("+toString(_param->_size_special_address_group+_param->_size_special_address_register-1)+" downto "+toString(_param->_size_special_address_register)+") = "+std_logic_cst(_param->_size_special_address_group,GROUP_MAC)+") else"); 270 vhdl->set_body (1,"'1' when (sig_A_OR_B(15 downto 0) = "+std_logic_cst(_param->_size_special_address_group,GROUP_MAC)+") else"); 271 vhdl->set_body (1,"'0';"); 272 273 vhdl->set_comment(0,"MFSPR"); 274 vhdl->set_body (0,"sig_MFSPR <="); 275 vhdl->set_body (1,"reg_MACLO"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" when (sig_SPR_IS_HERE = '1' and sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACLO)+") else"); 276 vhdl->set_body (1,"reg_MACHI"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" when (sig_SPR_IS_HERE = '1' and sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACHI)+") else"); 277 vhdl->set_body (1,std_logic_cst(_param->_size_spr,0)+";"); 278 vhdl->set_body (0,""); 279 280 vhdl->set_body (0,""); 281 282 vhdl->set_comment(0,"MTSPR"); 283 vhdl->set_body (0,"process (in_CLOCK)"); 284 vhdl->set_body (0,"begin"); 285 vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then"); 286 vhdl->set_body (2,"if (sig_SPR_IS_HERE = '1') then"); 287 vhdl->set_body (3,"if (sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACLO)+") then"); 288 vhdl->set_body (4,"reg_MACLO"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" <= reg_EXECUTE_IN_DATA_RB;"); 289 vhdl->set_body (3,"end if;"); 290 vhdl->set_body (3,"if (sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACHI)+") then"); 291 vhdl->set_body (4,"reg_MACHI"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" <= reg_EXECUTE_IN_DATA_RB;"); 292 vhdl->set_body (3,"end if;"); 293 vhdl->set_body (2,"end if;"); 294 vhdl->set_body (1,"end if;"); 295 vhdl->set_body (0,"end process;"); 296 vhdl->set_body (0,""); 297 298 vhdl->set_body (0,"sig_RES_SPECIAL <="); 299 vhdl->set_body (1,"sig_MFSPR when (reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MFSPR)+") else"); 300 vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB when (reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MTSPR)+") else"); 301 vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";"); 302 vhdl->set_body (0,""); 303 304 vhdl->set_body (0,""); 305 vhdl->set_comment(0,""); 306 vhdl->set_comment(0,"TRANSACTION"); 307 vhdl->set_comment(0,""); 308 // vhdl->set_body (0,"sig_EXECUTE_OUT_VAL <= reg_BUSY_IN;"); 309 // vhdl->set_body (0,"sig_EXECUTE_IN_ACK <= not reg_BUSY_IN or (reg_BUSY_IN and in_EXECUTE_OUT_ACK);"); 310 311 vhdl->set_body (0,"sig_EXECUTE_OUT_VAL <= reg_BUSY_OUT;"); 312 vhdl->set_body (0,"sig_EXECUTE_OUT_UPDATE <= not reg_BUSY_OUT or (reg_BUSY_OUT and in_EXECUTE_OUT_ACK);"); 313 vhdl->set_body (0,"sig_EXECUTE_IN_ACK <= not reg_BUSY_IN or (reg_BUSY_IN and sig_EXECUTE_OUT_UPDATE);"); 314 315 vhdl->set_body (""); 316 vhdl->set_comment(0,""); 317 vhdl->set_comment(0,"-----------------------------------"); 318 vhdl->set_comment(0,"-- "); 319 vhdl->set_comment(0,"-----------------------------------"); 320 vhdl->set_comment(0,""); 321 vhdl->set_body (""); 322 if(_param->_have_port_context_id) 323 vhdl->set_body (0,"sig_EXECUTE_OUT_CONTEXT_ID <= reg_EXECUTE_IN_CONTEXT_ID;"); 324 325 if(_param->_have_port_front_end_id) 326 vhdl->set_body (0,"sig_EXECUTE_OUT_FRONT_END_ID <= reg_EXECUTE_IN_FRONT_END_ID;"); 327 328 if(_param->_have_port_ooo_engine_id) 329 vhdl->set_body (0,"sig_EXECUTE_OUT_OOO_ENGINE_ID <= reg_EXECUTE_IN_OOO_ENGINE_ID;"); 330 331 if(_param->_have_port_rob_ptr) 332 vhdl->set_body (0,"sig_EXECUTE_OUT_PACKET_ID <= reg_EXECUTE_IN_PACKET_ID;"); 333 334 vhdl->set_body (0,"sig_EXECUTE_OUT_WRITE_RD <= reg_EXECUTE_IN_WRITE_RD;"); 335 336 vhdl->set_body (0,"sig_EXECUTE_OUT_NUM_REG_RD <= reg_EXECUTE_IN_NUM_REG_RD;"); 337 338 vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); 339 vhdl->set_body (0,"sig_EXECUTE_OUT_DATA_RD <="); 340 vhdl->set_body (1,"sig_RES_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+","); 341 vhdl->set_body (1,"sig_RES_MOVE when "+std_logic_cst(_param->_size_type,TYPE_MOVE)+","); 342 vhdl->set_body (1,"sig_RES_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+","); 343 vhdl->set_body (1,"sig_RES_SHIFTER when "+std_logic_cst(_param->_size_type,TYPE_SHIFT)+","); 344 vhdl->set_body (1,"sig_RES_EXTEND when "+std_logic_cst(_param->_size_type,TYPE_EXTEND)+","); 345 vhdl->set_body (1,"sig_RES_FIND when "+std_logic_cst(_param->_size_type,TYPE_FIND)+","); 346 vhdl->set_body (1,"sig_RES_SPECIAL when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+","); 347 vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+" when others;"); 348 349 vhdl->set_body (0,"sig_EXECUTE_OUT_WRITE_RE <= reg_EXECUTE_IN_WRITE_RE;"); 350 351 vhdl->set_body (0,"sig_EXECUTE_OUT_NUM_REG_RE <= reg_EXECUTE_IN_NUM_REG_RE;"); 352 353 vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); 354 vhdl->set_body (0,"sig_EXECUTE_OUT_DATA_RE <="); 355 if(FLAG_POSITION_CY > FLAG_POSITION_OV) 356 vhdl->set_body (1,"sig_COUT_ALU & sig_OVR_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+","); 357 else 358 vhdl->set_body (1,"sig_OVR_ALU & sig_COUT_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+","); 359 vhdl->set_body (1,std_logic_cst(_param->_size_special_data,0)+" when others;"); 360 361 vhdl->set_body (0,"sig_EXECUTE_OUT_EXCEPTION <="); 362 vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_RANGE)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_ALU)+" and sig_OVR_ALU = '1') else"); 363 vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_SPR_ACCESS_MUST_READ)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+" and reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MFSPR)+" and sig_SPR_IS_HERE = '0') else"); 364 vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+" and reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MTSPR)+" and sig_SPR_IS_HERE = '0') else"); 365 vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_NONE)+";"); 366 367 vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); 368 vhdl->set_body (0,"sig_EXECUTE_OUT_NO_SEQUENCE <="); 369 vhdl->set_body (1,"sig_NOSQ_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+","); 370 vhdl->set_body (1,std_logic_cst(1,0)+"when others;"); 371 372 #ifdef SYSTEMC_VHDL_COMPATIBILITY 373 vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); 374 vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <="); 375 vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+","); 376 vhdl->set_body (1,"sig_A_OR_B("+toString(_param->_size_instruction_address-1)+" downto 0) when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+","); 377 vhdl->set_body (1,std_logic_cst(_param->_size_instruction_address,0)+" when others;"); 378 #else 379 vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select"); 380 vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <="); 381 vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+","); 382 vhdl->set_body (1,"sig_A_OR_B when others;"); 383 // vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <= sig_ADDR_BRANCH;"); 384 #endif 385 386 vhdl->set_body (""); 387 vhdl->set_comment(0,""); 388 vhdl->set_comment(0,"-----------------------------------"); 389 vhdl->set_comment(0,"-- Outputs "); 390 vhdl->set_comment(0,"-----------------------------------"); 391 vhdl->set_comment(0,""); 392 vhdl->set_body (""); 393 // if(_param->_have_port_context_id) 394 // vhdl->set_body (0,"out_EXECUTE_OUT_CONTEXT_ID <= sig_EXECUTE_OUT_CONTEXT_ID;"); 395 // if(_param->_have_port_front_end_id) 396 // vhdl->set_body (0,"out_EXECUTE_OUT_FRONT_END_ID <= sig_EXECUTE_OUT_FRONT_END_ID;"); 397 // if(_param->_have_port_ooo_engine_id) 398 // vhdl->set_body (0,"out_EXECUTE_OUT_OOO_ENGINE_ID <= sig_EXECUTE_OUT_OOO_ENGINE_ID;"); 399 // if(_param->_have_port_rob_ptr) 400 // vhdl->set_body (0,"out_EXECUTE_OUT_PACKET_ID <= sig_EXECUTE_OUT_PACKET_ID;"); 401 // vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RD <= sig_EXECUTE_OUT_WRITE_RD;"); 402 // vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RD <= sig_EXECUTE_OUT_NUM_REG_RD;"); 403 // vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RD <= sig_EXECUTE_OUT_DATA_RD;"); 404 // vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RE <= sig_EXECUTE_OUT_WRITE_RE;"); 405 // vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RE <= sig_EXECUTE_OUT_NUM_REG_RE;"); 406 // vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RE <= sig_EXECUTE_OUT_DATA_RE;"); 407 // vhdl->set_body (0,"out_EXECUTE_OUT_EXCEPTION <= sig_EXECUTE_OUT_EXCEPTION;"); 408 // vhdl->set_body (0,"out_EXECUTE_OUT_NO_SEQUENCE <= sig_EXECUTE_OUT_NO_SEQUENCE;"); 409 // vhdl->set_body (0,"out_EXECUTE_OUT_ADDRESS <= sig_EXECUTE_OUT_ADDRESS;"); 410 // vhdl->set_body (0,"out_EXECUTE_OUT_VAL <= sig_EXECUTE_OUT_VAL;"); 411 // vhdl->set_body (0,"out_EXECUTE_IN_ACK <= sig_EXECUTE_IN_ACK;"); 412 413 if(_param->_have_port_context_id) 414 vhdl->set_body (0,"out_EXECUTE_OUT_CONTEXT_ID <= reg_EXECUTE_OUT_CONTEXT_ID;"); 415 if(_param->_have_port_front_end_id) 416 vhdl->set_body (0,"out_EXECUTE_OUT_FRONT_END_ID <= reg_EXECUTE_OUT_FRONT_END_ID;"); 417 if(_param->_have_port_ooo_engine_id) 418 vhdl->set_body (0,"out_EXECUTE_OUT_OOO_ENGINE_ID <= reg_EXECUTE_OUT_OOO_ENGINE_ID;"); 419 if(_param->_have_port_rob_ptr) 420 vhdl->set_body (0,"out_EXECUTE_OUT_PACKET_ID <= reg_EXECUTE_OUT_PACKET_ID;"); 421 vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RD <= reg_EXECUTE_OUT_WRITE_RD;"); 422 vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RD <= reg_EXECUTE_OUT_NUM_REG_RD;"); 423 vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RD <= reg_EXECUTE_OUT_DATA_RD;"); 424 vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RE <= reg_EXECUTE_OUT_WRITE_RE;"); 425 vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RE <= reg_EXECUTE_OUT_NUM_REG_RE;"); 426 vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RE <= reg_EXECUTE_OUT_DATA_RE;"); 427 vhdl->set_body (0,"out_EXECUTE_OUT_EXCEPTION <= reg_EXECUTE_OUT_EXCEPTION;"); 428 vhdl->set_body (0,"out_EXECUTE_OUT_NO_SEQUENCE <= reg_EXECUTE_OUT_NO_SEQUENCE;"); 429 vhdl->set_body (0,"out_EXECUTE_OUT_ADDRESS <= reg_EXECUTE_OUT_ADDRESS;"); 430 vhdl->set_body (0,"out_EXECUTE_OUT_VAL <= sig_EXECUTE_OUT_VAL;"); 431 vhdl->set_body (0,"out_EXECUTE_IN_ACK <= sig_EXECUTE_IN_ACK;"); 432 27 433 log_printf(FUNC,Functionnal_unit,FUNCTION,"End"); 28 434 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_declaration.cpp
r81 r116 24 24 { 25 25 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); 26 vhdl->set_signal ("sig_EXECUTE_IN_ACK",1); 27 28 vhdl->set_signal ("reg_BUSY_IN",1); 29 30 if(_param->_have_port_context_id) 31 vhdl->set_signal ("reg_EXECUTE_IN_CONTEXT_ID", _param->_size_context_id); 32 if(_param->_have_port_front_end_id) 33 vhdl->set_signal ("reg_EXECUTE_IN_FRONT_END_ID", _param->_size_front_end_id); 34 if(_param->_have_port_ooo_engine_id) 35 vhdl->set_signal ("reg_EXECUTE_IN_OOO_ENGINE_ID", _param->_size_ooo_engine_id); 36 if(_param->_have_port_rob_ptr) 37 vhdl->set_signal ("reg_EXECUTE_IN_PACKET_ID", _param->_size_rob_ptr); 38 vhdl->set_signal ("reg_EXECUTE_IN_OPERATION", _param->_size_operation); 39 vhdl->set_signal ("reg_EXECUTE_IN_TYPE", _param->_size_type); 40 vhdl->set_signal ("reg_EXECUTE_IN_HAS_IMMEDIAT", 1); 41 vhdl->set_signal ("reg_EXECUTE_IN_IMMEDIAT", _param->_size_general_data); 42 vhdl->set_signal ("reg_EXECUTE_IN_DATA_RA", _param->_size_general_data); 43 vhdl->set_signal ("reg_EXECUTE_IN_DATA_RB", _param->_size_general_data); 44 vhdl->set_signal ("reg_EXECUTE_IN_DATA_RC", _param->_size_special_data); 45 vhdl->set_signal ("reg_EXECUTE_IN_WRITE_RD", 1); 46 vhdl->set_signal ("reg_EXECUTE_IN_NUM_REG_RD", _param->_size_general_register); 47 vhdl->set_signal ("reg_EXECUTE_IN_WRITE_RE", 1); 48 vhdl->set_signal ("reg_EXECUTE_IN_NUM_REG_RE", _param->_size_special_register); 49 50 vhdl->set_signal ("sig_B_OPERAND",_param->_size_general_data); 51 52 vhdl->set_signal ("sig_IS_ARITH",1); 53 vhdl->set_signal ("sig_IS_LOGIC",1); 54 vhdl->set_signal ("sig_CIN_ARITH",1); 55 vhdl->set_signal ("sig_ARITH_B_OPERAND",_param->_size_general_data); 56 vhdl->set_signal ("sig_RES_ARITH",_param->_size_general_data+1); 57 vhdl->set_signal ("sig_A_AND_B",_param->_size_general_data); 58 vhdl->set_signal ("sig_A_OR_B",_param->_size_general_data); 59 vhdl->set_signal ("sig_A_XOR_B",_param->_size_general_data); 60 vhdl->set_signal ("sig_RES_LOGIC",_param->_size_general_data); 61 vhdl->set_signal ("sig_RES_ALU",_param->_size_general_data); 62 vhdl->set_signal ("sig_OVR_ALU",1); 63 vhdl->set_signal ("sig_COUT_ALU",1); 64 65 vhdl->set_signal ("sig_RES_MOVE",_param->_size_general_data); 66 vhdl->set_signal ("sig_CMOV",_param->_size_general_data); 67 vhdl->set_signal ("sig_MOVHI",_param->_size_general_data); 68 69 vhdl->set_signal ("sig_RES_BRANCH",_param->_size_general_data); 70 vhdl->set_signal ("sig_ADDR_BRANCH",_param->_size_instruction_address); 71 vhdl->set_signal ("sig_NOSQ_BRANCH",1); 72 73 vhdl->set_signal ("sig_RES_SHIFTER",_param->_size_general_data); 74 75 vhdl->set_signal ("sig_EXT_BYTE_S",_param->_size_general_data); 76 vhdl->set_signal ("sig_EXT_BYTE_Z",_param->_size_general_data); 77 vhdl->set_signal ("sig_EXT_HALF_WORD_S",_param->_size_general_data); 78 vhdl->set_signal ("sig_EXT_HALF_WORD_Z",_param->_size_general_data); 79 vhdl->set_signal ("sig_EXT_WORD_S",_param->_size_general_data); 80 vhdl->set_signal ("sig_EXT_WORD_Z",_param->_size_general_data); 81 vhdl->set_signal ("sig_EXT_S",_param->_size_general_data); 82 vhdl->set_signal ("sig_EXT_Z",_param->_size_general_data); 83 vhdl->set_signal ("sig_RES_EXTEND",_param->_size_general_data); 84 85 vhdl->set_signal ("sig_FF1",log2(_param->_size_general_data)+1); 86 vhdl->set_signal ("sig_FL1",log2(_param->_size_general_data)+1); 87 vhdl->set_signal ("sig_RES_FIND",_param->_size_general_data); 88 89 vhdl->set_signal ("sig_SPR_IS_HERE",1); 90 vhdl->set_signal ("sig_MFSPR",_param->_size_spr); 91 vhdl->set_signal ("sig_MTSPR",_param->_size_spr); 92 93 vhdl->set_signal ("sig_RES_SPECIAL",_param->_size_general_data); 94 95 96 vhdl->set_signal ("sig_EXECUTE_OUT_VAL", 1); 97 vhdl->set_signal ("sig_EXECUTE_OUT_UPDATE", 1); 98 99 vhdl->set_signal ("reg_BUSY_OUT",1); 100 101 if(_param->_have_port_context_id){ 102 vhdl->set_signal ("reg_EXECUTE_OUT_CONTEXT_ID", _param->_size_context_id); 103 vhdl->set_signal ("sig_EXECUTE_OUT_CONTEXT_ID", _param->_size_context_id);} 104 if(_param->_have_port_front_end_id){ 105 vhdl->set_signal ("reg_EXECUTE_OUT_FRONT_END_ID", _param->_size_front_end_id); 106 vhdl->set_signal ("sig_EXECUTE_OUT_FRONT_END_ID", _param->_size_front_end_id);} 107 if(_param->_have_port_ooo_engine_id){ 108 vhdl->set_signal ("reg_EXECUTE_OUT_OOO_ENGINE_ID", _param->_size_ooo_engine_id); 109 vhdl->set_signal ("sig_EXECUTE_OUT_OOO_ENGINE_ID", _param->_size_ooo_engine_id);} 110 if(_param->_have_port_rob_ptr){ 111 vhdl->set_signal ("reg_EXECUTE_OUT_PACKET_ID", _param->_size_rob_ptr); 112 vhdl->set_signal ("sig_EXECUTE_OUT_PACKET_ID", _param->_size_rob_ptr);} 113 vhdl->set_signal ("reg_EXECUTE_OUT_WRITE_RD", 1); 114 vhdl->set_signal ("sig_EXECUTE_OUT_WRITE_RD", 1); 115 vhdl->set_signal ("reg_EXECUTE_OUT_NUM_REG_RD", _param->_size_general_register); 116 vhdl->set_signal ("sig_EXECUTE_OUT_NUM_REG_RD", _param->_size_general_register); 117 vhdl->set_signal ("reg_EXECUTE_OUT_DATA_RD", _param->_size_general_data); 118 vhdl->set_signal ("sig_EXECUTE_OUT_DATA_RD", _param->_size_general_data); 119 vhdl->set_signal ("reg_EXECUTE_OUT_WRITE_RE", 1); 120 vhdl->set_signal ("sig_EXECUTE_OUT_WRITE_RE", 1); 121 vhdl->set_signal ("reg_EXECUTE_OUT_NUM_REG_RE", _param->_size_special_register); 122 vhdl->set_signal ("sig_EXECUTE_OUT_NUM_REG_RE", _param->_size_special_register); 123 vhdl->set_signal ("reg_EXECUTE_OUT_DATA_RE", _param->_size_special_data); 124 vhdl->set_signal ("sig_EXECUTE_OUT_DATA_RE", _param->_size_special_data); 125 vhdl->set_signal ("reg_EXECUTE_OUT_EXCEPTION", _param->_size_exception); 126 vhdl->set_signal ("sig_EXECUTE_OUT_EXCEPTION", _param->_size_exception); 127 vhdl->set_signal ("reg_EXECUTE_OUT_NO_SEQUENCE", 1); 128 vhdl->set_signal ("sig_EXECUTE_OUT_NO_SEQUENCE", 1); 129 vhdl->set_signal ("reg_EXECUTE_OUT_ADDRESS", _param->_size_instruction_address); 130 vhdl->set_signal ("sig_EXECUTE_OUT_ADDRESS", _param->_size_instruction_address); 131 132 vhdl->set_type ("Tmac","array ("+toString(_param->_nb_context)+" downto 0) of "+std_logic(_param->_size_spr)); 133 vhdl->set_signal ("reg_MACLO ", "Tmac"); 134 vhdl->set_signal ("reg_MACHI ", "Tmac"); 135 26 136 log_printf(FUNC,Functionnal_unit,FUNCTION,"End"); 27 137 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp
r97 r116 32 32 execute_timing_t** timing , 33 33 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), 34 bool is_toplevel) 34 bool is_toplevel): 35 _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE) 35 36 { 36 37 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp
r88 r116 28 28 Parameters_test test("Functionnal_unit"); 29 29 30 for (uint32_t i=0; i<_nb_type; i++) 31 for (uint32_t j=0; j<_nb_operation; j++) 32 if (_timing[i][j]._delay != _timing[i][j]._latence) 33 test.error(toString(_("For the type '%d', and the operation '%d', the delay and the latence must be equal.\n"),i,j)); 30 // for (uint32_t i=0; i<_nb_type; i++) 31 // for (uint32_t j=0; j<_nb_operation; j++) 32 // if (_timing[i][j]._delay != _timing[i][j]._latence) 33 // test.error(toString(_("For the type '%d', and the operation '%d', the delay and the latence must be equal.\n"),i,j)); 34 35 // if ((_timing[TYPE_ALU][OPERATION_ALU_ADD]._delay != 1) or 36 // (_timing[TYPE_ALU][OPERATION_ALU_ADD]._latence != 1)) 37 // test.error(toString(_("Valid timing for operation [%d][%d] is : {%d,%d}.\n"),TYPE_ALU,OPERATION_ALU_ADD,1,1)); 38 34 39 35 40 if (_have_groupe_MAC and ((_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC ]._latence == 0) or 36 41 (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MACRC]._latence == 0) or 37 42 (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MSB ]._latence == 0))) 38 test.error( "The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.\n");43 test.error(_("The functionnal unit implements a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.\n")); 39 44 40 45 log_printf(FUNC,Functionnal_unit,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Comparator/src/Comparator_vhdl_xilinx_body.cpp
r113 r116 20 20 { 21 21 log_begin(Comparator,FUNCTION); 22 vhdl->set_body (""); 22 vhdl->set_body (0,"ins_c_compare_v9_0 : c_compare_v9_0"); 23 vhdl->set_body (1,"generic map ("); 24 vhdl->set_body (2,"c_width => "+toString(_param->_size_data)+","); 25 vhdl->set_body (2,"c_data_type => "+toString(!_param->_is_signed)+", -- 0 = signed, 1 = unsigned"); 26 std::string print_res_pin = ""; 27 switch (_param->_type) 28 { 29 case COMPARATOR_EQUAL : 30 vhdl->set_body (2,"c_has_a_eq_b => 1)"); 31 print_res_pin = "a_eq_b"; 32 break; 33 case COMPARATOR_NOT_EQUAL : 34 vhdl->set_body (2,"c_has_a_eq_b => 0,"); 35 vhdl->set_body (2,"c_has_a_ne_b => 1)"); 36 print_res_pin = "a_ne_b"; 37 break; 38 case COMPARATOR_GREATER : 39 vhdl->set_body (2,"c_has_a_eq_b => 0,"); 40 vhdl->set_body (2,"c_has_a_gt_b => 1)"); 41 print_res_pin = "a_gt_b"; 42 break; 43 case COMPARATOR_GREATER_OR_EQUAL : 44 vhdl->set_body (2,"c_has_a_eq_b => 0,"); 45 vhdl->set_body (2,"c_has_a_ge_b => 1)"); 46 print_res_pin = "a_ge_b"; 47 break; 48 case COMPARATOR_LESS : 49 vhdl->set_body (2,"c_has_a_eq_b => 0,"); 50 vhdl->set_body (2,"c_has_a_lt_b => 1)"); 51 print_res_pin = "a_lt_b"; 52 break; 53 case COMPARATOR_LESS_OR_EQUAL : 54 vhdl->set_body (2,"c_has_a_eq_b => 0,"); 55 vhdl->set_body (2,"c_has_a_le_b => 1)"); 56 print_res_pin = "a_le_b"; 57 break; 58 } 59 60 vhdl->set_body (1,"port map ("); 61 vhdl->set_body (2,"a => in_COMPARE_DATA_0,"); 62 vhdl->set_body (2,"b => in_COMPARE_DATA_1,"); 63 vhdl->set_body (2,print_res_pin+" => out_COMPARE_TEST);"); 64 23 65 log_end(Comparator,FUNCTION); 24 66 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/SelfTest/configuration.cfg
r112 r116 1 1 Multiplier 2 16 32 *2 #size_data 3 0 1 +1 #sign 4 6 32 *3 #latency 5 1 1 +1 #delay -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/SelfTest/include/test.h
r112 r116 11 11 #endif 12 12 13 #define NB_ITERATION 1 13 #define NB_ITERATION 128 14 14 #define CYCLE_MAX (1024*NB_ITERATION) 15 15 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/SelfTest/src/main.cpp
r112 r116 7 7 8 8 #include "Behavioural/Generic/Multiplier/SelfTest/include/test.h" 9 #include "Behavioural/include/Selftest.h" 9 10 10 #define NB_PARAMS 011 #define NB_PARAMS 4 11 12 12 13 void usage (int argc, char * argv[]) … … 14 15 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 15 16 err (_("list_params is :\n")); 16 err (_(" * ()\n")); 17 err (_(" * size_data (uint32_t)\n")); 18 err (_(" * sign (bool )\n")); 19 err (_(" * latency (uint32_t)\n")); 20 err (_(" * delay (uint32_t)\n")); 17 21 18 22 exit (1); … … 30 34 uint32_t x = 1; 31 35 36 uint32_t _size_data; 37 bool _sign ; 38 uint32_t _latency ; 39 uint32_t _delay ; 40 32 41 string name = argv[x++]; 42 43 SELFTEST0(_size_data,uint32_t,argv,x); 44 SELFTEST0(_sign ,bool ,argv,x); 45 SELFTEST0(_latency ,uint32_t,argv,x); 46 SELFTEST0(_delay ,uint32_t,argv,x); 33 47 34 48 int _return = EXIT_SUCCESS; … … 37 51 morpheo::behavioural::generic::multiplier::Parameters * param = new morpheo::behavioural::generic::multiplier::Parameters 38 52 ( 53 _size_data, 54 _sign , 55 _latency , 56 _delay , 39 57 true //is_toplevel 40 58 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/SelfTest/src/test.cpp
r112 r116 9 9 #include "Behavioural/Generic/Multiplier/SelfTest/include/test.h" 10 10 #include "Behavioural/include/Allocation.h" 11 #include "Common/include/BitManipulation.h" 11 12 12 13 void test (string name, … … 50 51 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 51 52 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 52 53 54 sc_signal<Tdata_t > * in_MULTIPLIER_DATA_IN_0; 55 sc_signal<Tdata_t > * in_MULTIPLIER_DATA_IN_1; 56 sc_signal<Tcontrol_t> * in_MULTIPLIER_NSTALL ; 57 58 sc_signal<Tdata_t > * out_MULTIPLIER_DATA_LSB_OUT; 59 sc_signal<Tdata_t > * out_MULTIPLIER_DATA_MSB_OUT; 60 61 62 ALLOC0_SC_SIGNAL( in_MULTIPLIER_DATA_IN_0,"in_MULTIPLIER_DATA_IN_0",Tdata_t ); 63 ALLOC0_SC_SIGNAL( in_MULTIPLIER_DATA_IN_1,"in_MULTIPLIER_DATA_IN_1",Tdata_t ); 64 ALLOC0_SC_SIGNAL( in_MULTIPLIER_NSTALL ,"in_MULTIPLIER_NSTALL ",Tcontrol_t); 65 66 ALLOC0_SC_SIGNAL(out_MULTIPLIER_DATA_LSB_OUT,"out_MULTIPLIER_DATA_LSB_OUT",Tdata_t ); 67 ALLOC0_SC_SIGNAL(out_MULTIPLIER_DATA_MSB_OUT,"out_MULTIPLIER_DATA_MSB_OUT",Tdata_t ); 68 53 69 /******************************************************** 54 70 * Instanciation … … 60 76 (*(_Multiplier->in_NRESET)) (*(in_NRESET)); 61 77 78 INSTANCE0_SC_SIGNAL(_Multiplier, in_MULTIPLIER_DATA_IN_0); 79 INSTANCE0_SC_SIGNAL(_Multiplier, in_MULTIPLIER_DATA_IN_1); 80 INSTANCE0_SC_SIGNAL(_Multiplier, in_MULTIPLIER_NSTALL); 81 82 INSTANCE0_SC_SIGNAL(_Multiplier,out_MULTIPLIER_DATA_LSB_OUT); 83 INSTANCE0_SC_SIGNAL(_Multiplier,out_MULTIPLIER_DATA_MSB_OUT); 62 84 63 85 msg(_("<%s> : Start Simulation ............\n"),name.c_str()); … … 89 111 { 90 112 LABEL("Iteration %d",iteration); 113 114 uint64_t data0 = range<uint64_t>(rand(),_param->_size_data); 115 uint64_t data1 = range<uint64_t>(rand(),_param->_size_data); 116 117 in_MULTIPLIER_DATA_IN_0->write(static_cast<Tdata_t>(data0)); 118 in_MULTIPLIER_DATA_IN_1->write(static_cast<Tdata_t>(data1)); 119 in_MULTIPLIER_NSTALL->write(static_cast<Tcontrol_t>(1)); 120 121 sc_uint<32> res_lsb = 0; 122 sc_uint<32> res_msb = 0; 123 124 switch (_param->_size_data) 125 { 126 case 8 : 127 { 128 if (_param->_sign){ // 0 = signed, 1 = unsigned 129 sc_uint<16> mask = 0xff; 130 sc_uint<16> tmp = (static_cast<sc_uint<16> >(data0)) * (static_cast<sc_uint<16> >(data1)); 131 res_lsb = tmp.range(7,0); 132 res_msb = tmp.range(15,8); 133 } 134 else{ 135 sc_int<8> data_0 = static_cast<sc_int<8> >(data0); 136 sc_int<8> data_1 = static_cast<sc_int<8> >(data1); 137 sc_int<16> tmp = (static_cast<sc_int<16> >(data_0) * 138 static_cast<sc_int<16> >(data_1)); 139 res_lsb = static_cast<Tdata_t>(_param->_mask & tmp); 140 res_msb = static_cast<Tdata_t>(_param->_mask & (tmp>>8)); 141 } 142 break; 143 } 144 case 16 : 145 { 146 if (_param->_sign){ // 0 = signed, 1 = unsigned 147 sc_uint<32> mask = 0xffff; 148 sc_uint<32> tmp = (static_cast<sc_uint<32> >(data0)) * (static_cast<sc_uint<32> >(data1)); 149 res_lsb = tmp.range(15,0); 150 res_msb = tmp.range(31,16); 151 } 152 else{ 153 sc_int<16> data_0 = static_cast<sc_int<16> >(data0); 154 sc_int<16> data_1 = static_cast<sc_int<16> >(data1); 155 sc_int<32> tmp = (static_cast<sc_int<32> >(data_0) * 156 static_cast<sc_int<32> >(data_1)); 157 res_lsb = static_cast<Tdata_t>(_param->_mask & tmp); 158 res_msb = static_cast<Tdata_t>(_param->_mask & (tmp>>16)); 159 160 cout << "data_0 : " << std::hex << data_0 << std::dec << " - dec : " << data_0<< endl; 161 cout << "data_1 : " << std::hex << data_1 << std::dec << " - dec : " << data_1<< endl; 162 cout << "tmp : " << std::hex << tmp << std::dec << " - dec : " << tmp << endl; 163 cout << "res_lsb : " << std::hex << res_lsb << std::dec << endl; 164 cout << "res_msb : " << std::hex << res_msb << std::dec << endl; 165 } 166 break; 167 } 168 case 32 : 169 { 170 if (_param->_sign){ // 0 = signed, 1 = unsigned 171 sc_uint<32> data_0 = static_cast<sc_uint<32> >(data0); 172 sc_uint<32> data_1 = static_cast<sc_uint<32> >(data1); 173 sc_uint<64> tmp = (data0) * (data1); 174 res_lsb = static_cast<Tdata_t>(_param->_mask & tmp); 175 res_msb = static_cast<Tdata_t>(_param->_mask & (tmp>>32)); 176 177 cout << "tmp : " << std::hex << tmp << std::dec << endl; 178 } 179 else{ 180 sc_int<32> data_0 = static_cast<sc_int<32> >(data0); 181 sc_int<32> data_1 = static_cast<sc_int<32> >(data1); 182 sc_int<64> tmp = (data0) * (data1); 183 res_lsb = static_cast<Tdata_t>(_param->_mask & tmp); 184 res_msb = static_cast<Tdata_t>(_param->_mask & (tmp>>32)); 185 186 cout << "data_0 : " << std::hex << data_0 << std::dec << endl; 187 cout << "data_1 : " << std::hex << data_1 << std::dec << endl; 188 cout << "tmp : " << std::hex << tmp << std::dec << endl; 189 cout << "res_lsb : " << std::hex << res_lsb << std::dec << endl; 190 cout << "res_msb : " << std::hex << res_msb << std::dec << endl; 191 192 193 } 194 break; 195 } 196 // case 64 : 197 // { 198 // if (_param->_sign){ 0 = signed, 1 = unsigned 199 // uint64_t tmp = static_cast<uint64_t>(data0) * static_cast<uint64_t>(data1); 200 // res_lsb = tmp; 201 // } 202 // else{ 203 // int64_t tmp = static_cast< int64_t>(data0) * static_cast< int64_t>(data1); 204 // res_lsb = 0xffffffffffffffff&tmp; 205 // } 206 // break; 207 // } 208 default : 209 { 210 TEST_KO("Invalid size for the test."); 211 } 212 } 213 SC_START(_param->_latency); 214 TEST(Tdata_t,out_MULTIPLIER_DATA_LSB_OUT->read(),res_lsb); 215 TEST(Tdata_t,out_MULTIPLIER_DATA_MSB_OUT->read(),res_msb); 91 216 92 217 SC_START(1); … … 104 229 delete in_CLOCK; 105 230 delete in_NRESET; 231 232 DELETE0_SC_SIGNAL( in_MULTIPLIER_DATA_IN_0); 233 DELETE0_SC_SIGNAL( in_MULTIPLIER_DATA_IN_1); 234 DELETE0_SC_SIGNAL( in_MULTIPLIER_NSTALL); 235 DELETE0_SC_SIGNAL(out_MULTIPLIER_DATA_LSB_OUT); 236 DELETE0_SC_SIGNAL(out_MULTIPLIER_DATA_MSB_OUT); 237 106 238 } 107 239 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/include/Multiplier.h
r112 r116 29 29 30 30 #include <iostream> 31 #include <vector> 31 32 32 33 namespace morpheo { … … 57 58 #ifdef SYSTEMC 58 59 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 60 59 61 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 60 62 public : SC_CLOCK * in_CLOCK ; 61 63 public : SC_IN (Tcontrol_t) * in_NRESET ; 62 64 65 // ~~~~~[ Interface : "multiplier" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 66 public : SC_IN (Tdata_t) * in_MULTIPLIER_DATA_IN_0; 67 public : SC_IN (Tdata_t) * in_MULTIPLIER_DATA_IN_1; 68 public : SC_IN (Tcontrol_t) * in_MULTIPLIER_NSTALL; 69 70 public : SC_OUT(Tdata_t) * out_MULTIPLIER_DATA_LSB_OUT; 71 public : SC_OUT(Tdata_t) * out_MULTIPLIER_DATA_MSB_OUT; 72 73 63 74 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 64 75 65 76 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 66 77 private : std::vector<result_t> * _pipeline; 67 78 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 79 private : Tdata_t sig_MULTIPLIER_DATA_IN_0; 80 private : Tdata_t sig_MULTIPLIER_DATA_IN_1; 68 81 #endif 69 82 … … 99 112 #ifdef SYSTEMC 100 113 public : void transition (void); 101 //public : void genMoore(void);114 public : void genMealy (void); 102 115 #endif 103 116 … … 106 119 private : void vhdl_declaration (Vhdl * & vhdl); 107 120 private : void vhdl_body (Vhdl * & vhdl); 121 122 private : void vhdl_xilinx_declaration (Vhdl * & vhdl); 123 private : void vhdl_xilinx_body (Vhdl * & vhdl); 108 124 #endif 109 125 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/include/Parameters.h
r112 r116 11 11 #include "Behavioural/include/Parameters.h" 12 12 #include "Common/include/Debug.h" 13 #include "Behavioural/Generic/Multiplier/include/Types.h" 13 14 14 15 namespace morpheo { … … 21 22 { 22 23 //-----[ fields ]------------------------------------------------------------ 24 public : uint32_t _size_data; 25 public : bool _sign ; 26 public : uint32_t _latency ; 27 public : uint32_t _delay ; 28 29 public : Tdata_t _mask ; 30 // public : Tdata_t _shift_sign; 23 31 24 32 //-----[ methods ]----------------------------------------------------------- 25 public : Parameters (bool is_toplevel=false); 33 public : Parameters (uint32_t size_data, 34 bool sign , 35 uint32_t latency , 36 uint32_t delay , 37 bool is_toplevel=false); 26 38 //public : Parameters (Parameters & param) ; 27 39 public : ~Parameters (void); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/include/Types.h
r112 r116 16 16 namespace multiplier { 17 17 18 typedef Tgeneral_data_t Tdata_t; 19 20 typedef struct 21 { 22 Tdata_t MSB; 23 Tdata_t LSB; 24 } result_t; 18 25 19 26 }; // end namespace multiplier -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Multiplier.cpp
r112 r116 77 77 # endif 78 78 79 // log_printf(INFO,Multiplier,FUNCTION,_("<%s> : Method - genMoore"),_name.c_str());79 log_printf(INFO,Multiplier,FUNCTION,_("<%s> : Method - genMealy"),_name.c_str()); 80 80 81 // SC_METHOD (genMoore); 82 // dont_initialize (); 83 // sensitive << (*(in_CLOCK)).neg(); // need internal register 81 SC_METHOD (genMealy); 82 dont_initialize (); 83 sensitive << (*(in_CLOCK)).neg(); // need internal register 84 85 if (_param->_latency == 0) 86 sensitive << (*(in_MULTIPLIER_DATA_IN_0)) 87 << (*(in_MULTIPLIER_DATA_IN_1)); 84 88 85 //# ifdef SYSTEMCASS_SPECIFIC86 //// List dependency information87 //# endif89 # ifdef SYSTEMCASS_SPECIFIC 90 // List dependency information 91 # endif 88 92 89 93 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Multiplier_allocation.cpp
r112 r116 53 53 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); 54 54 } 55 56 // ~~~~~[ Interface "multiplier" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 57 { 58 ALLOC0_INTERFACE_BEGIN("multiplier", IN, WEST, _("Multiplier's interface.")); 59 60 ALLOC0_SIGNAL_IN ( in_MULTIPLIER_DATA_IN_0,"data_in_0",Tdata_t ,_param->_size_data); 61 ALLOC0_SIGNAL_IN ( in_MULTIPLIER_DATA_IN_1,"data_in_1",Tdata_t ,_param->_size_data); 62 ALLOC0_SIGNAL_IN ( in_MULTIPLIER_NSTALL ,"nstall" ,Tcontrol_t,1); 63 ALLOC0_SIGNAL_OUT(out_MULTIPLIER_DATA_LSB_OUT ,"data_lsb_out" ,Tdata_t ,_param->_size_data); 64 ALLOC0_SIGNAL_OUT(out_MULTIPLIER_DATA_MSB_OUT ,"data_msb_out" ,Tdata_t ,_param->_size_data); 65 66 ALLOC0_INTERFACE_END(); 67 } 68 69 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 70 #ifdef SYSTEMC 71 if (usage_is_set(_usage,USE_SYSTEMC_BODY)) 72 { 73 _pipeline = new std::vector<result_t>(_param->_latency+1); 74 } 75 #endif 76 55 77 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 56 78 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Multiplier_deallocation.cpp
r112 r116 25 25 delete in_CLOCK ; 26 26 delete in_NRESET; 27 28 DELETE0_SIGNAL(in_MULTIPLIER_DATA_IN_0,_param->_size_data); 29 DELETE0_SIGNAL(in_MULTIPLIER_DATA_IN_1,_param->_size_data); 30 DELETE0_SIGNAL(in_MULTIPLIER_NSTALL ,1); 31 32 DELETE0_SIGNAL(out_MULTIPLIER_DATA_LSB_OUT,_param->_size_data); 33 DELETE0_SIGNAL(out_MULTIPLIER_DATA_MSB_OUT,_param->_size_data); 34 27 35 } 28 36 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 37 #ifdef SYSTEMC 38 if (usage_is_set(_usage,USE_SYSTEMC_BODY)) 39 { 40 delete _pipeline; 41 } 42 #endif 29 43 30 44 delete _component; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Multiplier_transition.cpp
r112 r116 20 20 { 21 21 log_begin(Multiplier,FUNCTION); 22 22 23 // Test if stall 24 if (PORT_READ(in_MULTIPLIER_NSTALL)) 25 { 26 // Pop a slot of array 27 for (uint32_t i=1;i<_pipeline->size();i++) 28 _pipeline->at(i-1)=_pipeline->at(i); 29 30 result_t data; 31 32 switch (_param->_size_data) 33 { 34 case 8 : 35 { 36 if (_param->_sign) // 0 = signed, 1 = unsigned 37 { 38 sc_uint<8> data_0 = static_cast<sc_uint<8> >(PORT_READ(in_MULTIPLIER_DATA_IN_0)); 39 sc_uint<8> data_1 = static_cast<sc_uint<8> >(PORT_READ(in_MULTIPLIER_DATA_IN_1)); 40 sc_uint<16> tmp = (static_cast<sc_uint<16> >(data_0) * 41 static_cast<sc_uint<16> >(data_1)); 42 43 data.LSB = static_cast<Tdata_t>(_param->_mask & tmp); 44 data.MSB = static_cast<Tdata_t>(_param->_mask & (tmp>>8)); 45 46 // std::cout << "uint8 : data_0 : " << std::hex << data_0 << std::dec << std::endl; 47 // std::cout << "uint8 : data_1 : " << std::hex << data_1 << std::dec << std::endl; 48 // std::cout << "uint8 : tmp : " << std::hex << tmp << std::dec << std::endl; 49 // std::cout << "uint8 : lsb : " << std::hex << data.LSB << std::dec << std::endl; 50 // std::cout << "uint8 : msb : " << std::hex << data.MSB << std::dec << std::endl; 51 52 // log_printf(TRACE,Multiplier,FUNCTION," * signed"); 53 // log_printf(TRACE,Multiplier,FUNCTION," * data0 = %llx(%lld)",data_0, data_0); 54 // log_printf(TRACE,Multiplier,FUNCTION," * data1 = %llx(%lld)",data_1, data_1); 55 // log_printf(TRACE,Multiplier,FUNCTION," * res = %llx(%lld)",tmp, tmp); 56 // log_printf(TRACE,Multiplier,FUNCTION," * LSB = %x (%d)",data.LSB, data.LSB); 57 // log_printf(TRACE,Multiplier,FUNCTION," * MSB = %x (%d)",data.MSB, data.MSB); 58 } 59 else 60 { 61 sc_int<8> data_0 = static_cast<sc_int<8> >(PORT_READ(in_MULTIPLIER_DATA_IN_0)); 62 sc_int<8> data_1 = static_cast<sc_int<8> >(PORT_READ(in_MULTIPLIER_DATA_IN_1)); 63 sc_int<16> tmp = (static_cast<sc_int<16> >(data_0) * 64 static_cast<sc_int<16> >(data_1)); 65 66 data.LSB = static_cast<Tdata_t>(_param->_mask & tmp); 67 data.MSB = static_cast<Tdata_t>(_param->_mask & (tmp>>8)); 68 69 // std::cout << "int8 : data_0 : " << std::hex << data_0 << std::dec << std::endl; 70 // std::cout << "int8 : data_1 : " << std::hex << data_1 << std::dec << std::endl; 71 // std::cout << "int8 : tmp : " << std::hex << tmp << std::dec << std::endl; 72 // std::cout << "int8 : lsb : " << std::hex << data.LSB << std::dec << std::endl; 73 // std::cout << "int8 : msb : " << std::hex << data.MSB << std::dec << std::endl; 74 75 // log_printf(TRACE,Multiplier,FUNCTION," * signed"); 76 // log_printf(TRACE,Multiplier,FUNCTION," * data0 = %llx(%lld)",data_0, data_0); 77 // log_printf(TRACE,Multiplier,FUNCTION," * data1 = %llx(%lld)",data_1, data_1); 78 // log_printf(TRACE,Multiplier,FUNCTION," * res = %llx(%lld)",tmp, tmp); 79 // log_printf(TRACE,Multiplier,FUNCTION," * LSB = %x (%d)",data.LSB, data.LSB); 80 // log_printf(TRACE,Multiplier,FUNCTION," * MSB = %x (%d)",data.MSB, data.MSB); 81 } 82 break; 83 } 84 case 16 : 85 { 86 if (_param->_sign) // 0 = signed, 1 = unsigned 87 { 88 sc_uint<16> data_0 = static_cast<sc_uint<16> >(PORT_READ(in_MULTIPLIER_DATA_IN_0)); 89 sc_uint<16> data_1 = static_cast<sc_uint<16> >(PORT_READ(in_MULTIPLIER_DATA_IN_1)); 90 sc_uint<32> tmp = (static_cast<sc_uint<32> >(data_0) * 91 static_cast<sc_uint<32> >(data_1)); 92 93 data.LSB = static_cast<Tdata_t>(_param->_mask & tmp); 94 data.MSB = static_cast<Tdata_t>(_param->_mask & (tmp>>16)); 95 96 // std::cout << "uint16 : data_0 : " << std::hex << data_0 << std::dec << std::endl; 97 // std::cout << "uint16 : data_1 : " << std::hex << data_1 << std::dec << std::endl; 98 // std::cout << "uint16 : tmp : " << std::hex << tmp << std::dec << std::endl; 99 // std::cout << "uint16 : lsb : " << std::hex << data.LSB << std::dec << std::endl; 100 // std::cout << "uint16 : msb : " << std::hex << data.MSB << std::dec << std::endl; 101 102 // log_printf(TRACE,Multiplier,FUNCTION," * signed"); 103 // log_printf(TRACE,Multiplier,FUNCTION," * data0 = %llx(%lld)",data_0, data_0); 104 // log_printf(TRACE,Multiplier,FUNCTION," * data1 = %llx(%lld)",data_1, data_1); 105 // log_printf(TRACE,Multiplier,FUNCTION," * res = %llx(%lld)",tmp, tmp); 106 // log_printf(TRACE,Multiplier,FUNCTION," * LSB = %x (%d)",data.LSB, data.LSB); 107 // log_printf(TRACE,Multiplier,FUNCTION," * MSB = %x (%d)",data.MSB, data.MSB); 108 } 109 else 110 { 111 sc_int<16> data_0 = static_cast<sc_int<16> >(PORT_READ(in_MULTIPLIER_DATA_IN_0)); 112 sc_int<16> data_1 = static_cast<sc_int<16> >(PORT_READ(in_MULTIPLIER_DATA_IN_1)); 113 sc_int<32> tmp = (static_cast<sc_int<32> >(data_0) * 114 static_cast<sc_int<32> >(data_1)); 115 116 data.LSB = static_cast<Tdata_t>(_param->_mask & tmp); 117 data.MSB = static_cast<Tdata_t>(_param->_mask & (tmp>>16)); 118 119 std::cout << "int16 : data_0 : " << std::hex << data_0 << std::dec << " - dec : " << data_0 << std::endl; 120 std::cout << "int16 : data_1 : " << std::hex << data_1 << std::dec << " - dec : " << data_1 << std::endl; 121 std::cout << "int16 : tmp : " << std::hex << tmp << std::dec << " - dec : " << tmp << std::endl; 122 std::cout << "int16 : lsb : " << std::hex << data.LSB << std::dec << std::endl; 123 std::cout << "int16 : msb : " << std::hex << data.MSB << std::dec << std::endl; 124 125 // log_printf(TRACE,Multiplier,FUNCTION," * signed"); 126 // log_printf(TRACE,Multiplier,FUNCTION," * data0 = %llx(%lld)",data_0, data_0); 127 // log_printf(TRACE,Multiplier,FUNCTION," * data1 = %llx(%lld)",data_1, data_1); 128 // log_printf(TRACE,Multiplier,FUNCTION," * res = %llx(%lld)",tmp, tmp); 129 // log_printf(TRACE,Multiplier,FUNCTION," * LSB = %x (%d)",data.LSB, data.LSB); 130 // log_printf(TRACE,Multiplier,FUNCTION," * MSB = %x (%d)",data.MSB, data.MSB); 131 } 132 break; 133 } 134 case 32 : 135 { 136 if (_param->_sign) // 0 = signed, 1 = unsigned 137 { 138 sc_uint<32> data_0 = static_cast<sc_uint<32> >(PORT_READ(in_MULTIPLIER_DATA_IN_0)); 139 sc_uint<32> data_1 = static_cast<sc_uint<32> >(PORT_READ(in_MULTIPLIER_DATA_IN_1)); 140 sc_uint<64> tmp = (static_cast<sc_uint<64> >(data_0) * 141 static_cast<sc_uint<64> >(data_1)); 142 143 data.LSB = static_cast<Tdata_t>(_param->_mask & tmp); 144 data.MSB = static_cast<Tdata_t>(_param->_mask & (tmp>>32)); 145 146 // std::cout << "uint32 : data_0 : " << std::hex << data_0 << std::dec << std::endl; 147 // std::cout << "uint32 : data_1 : " << std::hex << data_1 << std::dec << std::endl; 148 // std::cout << "uint32 : tmp : " << std::hex << tmp << std::dec << std::endl; 149 // std::cout << "uint32 : lsb : " << std::hex << data.LSB << std::dec << std::endl; 150 // std::cout << "uint32 : msb : " << std::hex << data.MSB << std::dec << std::endl; 151 152 // log_printf(TRACE,Multiplier,FUNCTION," * signed"); 153 // log_printf(TRACE,Multiplier,FUNCTION," * data0 = %llx(%lld)",data_0, data_0); 154 // log_printf(TRACE,Multiplier,FUNCTION," * data1 = %llx(%lld)",data_1, data_1); 155 // log_printf(TRACE,Multiplier,FUNCTION," * res = %llx(%lld)",tmp, tmp); 156 // log_printf(TRACE,Multiplier,FUNCTION," * LSB = %x (%d)",data.LSB, data.LSB); 157 // log_printf(TRACE,Multiplier,FUNCTION," * MSB = %x (%d)",data.MSB, data.MSB); 158 } 159 else 160 { 161 sc_int<32> data_0 = static_cast<sc_int<32> >(PORT_READ(in_MULTIPLIER_DATA_IN_0)); 162 sc_int<32> data_1 = static_cast<sc_int<32> >(PORT_READ(in_MULTIPLIER_DATA_IN_1)); 163 sc_int<64> tmp = (static_cast<sc_int<64> >(data_0) * 164 static_cast<sc_int<64> >(data_1)); 165 166 data.LSB = static_cast<Tdata_t>(_param->_mask & tmp); 167 data.MSB = static_cast<Tdata_t>(_param->_mask & (tmp>>32)); 168 169 // std::cout << "int32 : data_0 : " << std::hex << data_0 << std::dec << std::endl; 170 // std::cout << "int32 : data_1 : " << std::hex << data_1 << std::dec << std::endl; 171 // std::cout << "int32 : tmp : " << std::hex << tmp << std::dec << std::endl; 172 // std::cout << "int32 : lsb : " << std::hex << data.LSB << std::dec << std::endl; 173 // std::cout << "int32 : msb : " << std::hex << data.MSB << std::dec << std::endl; 174 175 // log_printf(TRACE,Multiplier,FUNCTION," * signed"); 176 // log_printf(TRACE,Multiplier,FUNCTION," * data0 = %llx(%lld)",data_0, data_0); 177 // log_printf(TRACE,Multiplier,FUNCTION," * data1 = %llx(%lld)",data_1, data_1); 178 // log_printf(TRACE,Multiplier,FUNCTION," * res = %llx(%lld)",tmp, tmp); 179 // log_printf(TRACE,Multiplier,FUNCTION," * LSB = %x (%d)",data.LSB, data.LSB); 180 // log_printf(TRACE,Multiplier,FUNCTION," * MSB = %x (%d)",data.MSB, data.MSB); 181 } 182 break; 183 } 184 default : 185 { 186 break; 187 } 188 } 189 190 _pipeline->at(_param->_latency-1) = data; 191 192 } 193 23 194 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 24 195 end_cycle (); 25 196 #endif 26 197 27 198 log_end(Multiplier,FUNCTION); 28 199 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Multiplier_vhdl.cpp
r112 r116 27 27 _component->vhdl_instance(vhdl); 28 28 29 // default architecture 29 30 vhdl_declaration (vhdl); 30 31 vhdl_body (vhdl); 32 33 // Xilinx architecture 34 vhdl->set_architecture("xilinx"); 35 vhdl_xilinx_declaration (vhdl); 36 vhdl_xilinx_body (vhdl); 31 37 32 38 vhdl->generate_file(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Parameters.cpp
r112 r116 7 7 8 8 #include "Behavioural/Generic/Multiplier/include/Parameters.h" 9 #include "Common/include/BitManipulation.h" 9 10 10 11 namespace morpheo { … … 16 17 #undef FUNCTION 17 18 #define FUNCTION "Multiplier::Parameters" 18 Parameters::Parameters (bool is_toplevel) 19 Parameters::Parameters (uint32_t size_data, 20 bool sign , 21 uint32_t latency , 22 uint32_t delay , 23 bool is_toplevel) 19 24 { 25 20 26 log_begin(Multiplier,FUNCTION); 27 28 _size_data = size_data; 29 _sign = sign ; 30 _latency = latency ; 31 _delay = delay ; 32 _mask = gen_mask<Tdata_t>(_size_data); 33 // _shift_sign = size_data-1; 21 34 22 35 test(); … … 35 48 // { 36 49 // log_begin(Multiplier,FUNCTION); 37 // test(); 50 // test();x 38 51 // log_end(Multiplier,FUNCTION); 39 52 // }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Multiplier/src/Parameters_msg_error.cpp
r112 r116 24 24 Parameters_test test ("Multiplier"); 25 25 26 if ((_size_data < 2) or (_size_data > 64)) 27 test.error(toString(_("size_data (%d) 's valid range is 2 to 64.\n"),_size_data)); 28 29 if (_delay > 1) 30 test.error(toString(_("delay must be set at 1\n"))); 31 32 if (_latency > 32) 33 test.error(toString(_("latency's valid range is 0 to 32\n"))); 34 26 35 log_end(Multiplier,FUNCTION); 27 36 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis
r113 r116 95 95 $(XILINX_ENV); $(MAKE) -f Makefile.mkf $*.ngc &> $@; 96 96 97 $(DIR_WORK) : 97 $(DIR_WORK) : $(XILINX_CORELIB) 98 98 @\ 99 99 $(ECHO) "Create work-space : $@"; \ … … 104 104 $(ECHO) "Run manualy \"$(XILINX_COMPXLIB)\" with $(XILINX_CORELIB) directory"; \ 105 105 fi; 106 107 $(XILINX_CORELIB) : 108 @\ 109 $(ECHO) "Create Corelib : $@"; \ 110 $(MODELTECH_ENV); $(XILINX_COMPXLIB) 111 112 # $(MODELTECH_ENV); $(XILINX_COMPXLIB) -s mti_se -arch all -lib all -l vhdl -dir $(XILINX_CORELIB) -w -p $(MODELTECH_BIN) -smartmodel_setup 113 106 114 107 115 $(DIR_LOG)/%.sim.log : $(DIR_VHDL)/%.vhdl $(DIR_LOG)/%.vhdl.log -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf
r103 r116 3 3 # 4 4 5 all: _Generic/Queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_ Write_unit/Write_unit/Execute_queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest5 all: _Generic/Queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest 6 6 7 7 _Generic/Queue/SelfTest: 8 8 gmake all -C Generic/Queue/SelfTest 9 10 _Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest: 11 gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest 9 12 10 13 _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest: … … 16 19 clean: 17 20 gmake clean -C Generic/Queue/SelfTest 21 gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest 18 22 gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest 19 23 gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest … … 23 27 install: 24 28 gmake install -C Generic/Queue/SelfTest 29 gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest 25 30 gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest 26 31 gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h
r109 r116 40 40 { 41 41 TYPE_ALU = 0x0, // 00000 - unit multiple 42 TYPE_SHIFT = 0x1, // 0000 0- unit multiple43 TYPE_MOVE = 0x2, // 000 00 - unit multiple44 TYPE_TEST = 0x3, // 000 00- unit multiple45 TYPE_MUL = 0x4, // 00 000 - unit multiple46 TYPE_DIV = 0x5, // 00 000- unit multiple, type optionnal47 TYPE_EXTEND = 0x6, // 00 000 - unit multiple, type optionnal48 TYPE_FIND = 0x7, // 00 000- unit multiple, type optionnal49 TYPE_SPECIAL = 0x8, // 0 0000 - unit uniq50 TYPE_CUSTOM = 0x9, // 0 0000- unit uniq , type optionnal51 TYPE_BRANCH = 0xa, // 0 0000 - unit multiple52 TYPE_MEMORY = 0xb // 0 0000 - unit uniq , type exclusive42 TYPE_SHIFT = 0x1, // 00001 - unit multiple 43 TYPE_MOVE = 0x2, // 00010 - unit multiple 44 TYPE_TEST = 0x3, // 00011 - unit multiple 45 TYPE_MUL = 0x4, // 00100 - unit multiple 46 TYPE_DIV = 0x5, // 00101 - unit multiple, type optionnal 47 TYPE_EXTEND = 0x6, // 00110 - unit multiple, type optionnal 48 TYPE_FIND = 0x7, // 00111 - unit multiple, type optionnal 49 TYPE_SPECIAL = 0x8, // 01000 - unit uniq 50 TYPE_CUSTOM = 0x9, // 01001 - unit uniq , type optionnal 51 TYPE_BRANCH = 0xa, // 01010 - unit multiple 52 TYPE_MEMORY = 0xb // 01011 - unit uniq 53 53 } type_t; 54 54 … … 202 202 203 203 //---------------------------------------------[ Functionnal Unit ]----- 204 # define OPERATION_ALU_L_ADD 0x1 // 000_0000 l.add , l.addi 205 # define OPERATION_ALU_L_ADDC 0x2 // 000_0000 l.addc , l.addic 206 # define OPERATION_ALU_L_SUB 0x4 // 000_0000 l.sub 207 # define OPERATION_ALU_L_AND 0x8 // 000_0000 l.and , l.andi 208 # define OPERATION_ALU_L_OR 0x10 // 000_0000 l.or , l.ori 209 # define OPERATION_ALU_L_XOR 0x20 // 000_0000 l.xor , l.xori 210 211 # define OPERATION_SHIFT_L_SLL 0x1 // 000_0000 l.sll , l.slli 212 # define OPERATION_SHIFT_L_SRA 0x2 // 000_0000 l.sra , l.srai 213 # define OPERATION_SHIFT_L_SRL 0x4 // 000_0000 l.srl , l.srli 214 # define OPERATION_SHIFT_L_ROR 0x8 // 000_0000 l.ror , l.rori 215 216 # define OPERATION_MOVE_L_MOVHI 0x1 // 000_0000 l.movhi 217 # define OPERATION_MOVE_L_CMOV 0x2 // 000_0000 l.cmov 218 219 # define OPERATION_TEST_L_SFGES 0x41 // 000_0000 l.sfges , l.sfges 220 # define OPERATION_TEST_L_SFGEU 0x1 // 000_0000 l.sfgeu , l.sfgeu 221 # define OPERATION_TEST_L_SFGTS 0x42 // 000_0000 L.sfgts , l.sfgts 222 # define OPERATION_TEST_L_SFGTU 0x2 // 000_0000 l.sfgtu , l.sfgtu 223 # define OPERATION_TEST_L_SFLES 0x44 // 000_0000 l.sfles , l.sfles 224 # define OPERATION_TEST_L_SFLEU 0x4 // 000_0000 l.sfleu , l.sfleu 225 # define OPERATION_TEST_L_SFLTS 0x48 // 000_0000 l.sflts , l.sflts 226 # define OPERATION_TEST_L_SFLTU 0x8 // 000_0000 l.sfltu , l.sfltu 227 # define OPERATION_TEST_L_SFEQ 0x10 // 000_0000 l.sfeq , l.sfeqi 228 # define OPERATION_TEST_L_SFNE 0x20 // 000_0000 l.sfne , l.sfnei 229 230 # define OPERATION_MUL_L_MUL 0x1 // 000_0000 l.mul , l.muli 231 # define OPERATION_MUL_L_MULU 0x2 // 000_0000 l.mulu 232 233 # define OPERATION_DIV_L_DIV 0x1 // 000_0000 l.div 234 # define OPERATION_DIV_L_DIVU 0x2 // 000_0000 l.divu 235 236 # define OPERATION_EXTEND_L_EXTEND_Z 0x1 // 000_0000 l.extbz , l.exthz, l.extwz 237 # define OPERATION_EXTEND_L_EXTEND_S 0x2 // 000_0000 l.extbs , l.exths, l.extws 238 239 # define OPERATION_FIND_L_FF1 0x1 // 000_0000 l.ff1 240 # define OPERATION_FIND_L_FL1 0x2 // 000_0000 l.fl1 241 242 # define OPERATION_SPECIAL_L_NOP 0x7f // 000_0000 l.nop 204 205 // WARNING : Operations are coded in a one-hot implementation that is used in the functional unit's vhdl code. 206 // Do not change that (you can still change the values as long as it respects the one-hot encoding). 207 208 # define OPERATION_ALU_L_ADD 0x1 // 000_0001 l.add , l.addi 209 # define OPERATION_ALU_L_ADDC 0x2 // 000_0010 l.addc , l.addic 210 # define OPERATION_ALU_L_SUB 0x4 // 000_0100 l.sub 211 # define OPERATION_ALU_L_AND 0x8 // 000_1000 l.and , l.andi 212 # define OPERATION_ALU_L_OR 0x10 // 001_0000 l.or , l.ori 213 # define OPERATION_ALU_L_XOR 0x20 // 010_0000 l.xor , l.xori 214 215 // WARNING : Shift and rotate operation codes are hard-coded in the functional unit's vhdl code, 216 // with bit 0 corresponding to the direction (0 for right, and 1 for left), 217 // bit 1 to the type (0 for shift, 1 for rotate) and bit 2 is to be set to 0 for a logic 218 // operation and 1 for an arithmetic operation. 219 // Do not change that (unless you respect the one-hot encoding described above). 220 221 # define OPERATION_SHIFT_L_SLL 0x1 // 000_0001 l.sll , l.slli 222 # define OPERATION_SHIFT_L_SRA 0x4 // 000_0100 l.sra , l.srai 223 # define OPERATION_SHIFT_L_SRL 0x0 // 000_0000 l.srl , l.srli 224 # define OPERATION_SHIFT_L_ROR 0x2 // 000_0010 l.ror , l.rori 225 226 # define OPERATION_MOVE_L_MOVHI 0x1 // 000_0001 l.movhi 227 # define OPERATION_MOVE_L_CMOV 0x2 // 000_0010 l.cmov 228 229 # define OPERATION_TEST_L_SFGES 0x45 // 100_0101 l.sfges , l.sfges 230 # define OPERATION_TEST_L_SFGEU 0x5 // 000_0101 l.sfgeu , l.sfgeu 231 # define OPERATION_TEST_L_SFGTS 0x46 // 100_0110 L.sfgts , l.sfgts 232 # define OPERATION_TEST_L_SFGTU 0x6 // 000_0110 l.sfgtu , l.sfgtu 233 # define OPERATION_TEST_L_SFLES 0x49 // 100_1001 l.sfles , l.sfles 234 # define OPERATION_TEST_L_SFLEU 0x9 // 000_1001 l.sfleu , l.sfleu 235 # define OPERATION_TEST_L_SFLTS 0x4A // 100_1010 l.sflts , l.sflts 236 # define OPERATION_TEST_L_SFLTU 0xA // 000_1010 l.sfltu , l.sfltu 237 # define OPERATION_TEST_L_SFEQ 0x10 // 001_0000 l.sfeq , l.sfeqi 238 # define OPERATION_TEST_L_SFNE 0x20 // 010_0000 l.sfne , l.sfnei 239 240 # define OPERATION_MUL_L_MUL 0x1 // 000_0001 l.mul , l.muli 241 # define OPERATION_MUL_L_MULU 0x2 // 000_0010 l.mulu 242 243 # define OPERATION_DIV_L_DIV 0x1 // 000_0001 l.div 244 # define OPERATION_DIV_L_DIVU 0x2 // 000_0010 l.divu 245 246 # define OPERATION_EXTEND_L_EXTEND_Z 0x1 // 000_0001 l.extbz , l.exthz, l.extwz 247 # define OPERATION_EXTEND_L_EXTEND_S 0x2 // 000_0010 l.extbs , l.exths, l.extws 248 249 # define OPERATION_FIND_L_FF1 0x1 // 000_0001 l.ff1 250 # define OPERATION_FIND_L_FL1 0x2 // 000_0010 l.fl1 251 252 # define OPERATION_SPECIAL_L_NOP 0x7f // 111_1111 l.nop 243 253 # define OPERATION_SPECIAL_L_MFSPR 0x1 // 000_0001 l.mfspr 244 254 # define OPERATION_SPECIAL_L_MTSPR 0x2 // 000_0010 l.mtspr … … 253 263 # define OPERATION_SPECIAL_L_TRAP 0x42 // 100_0010 l.trap 254 264 255 # define OPERATION_BRANCH_NONE 0x1 // 000_000 0l.j256 # define OPERATION_BRANCH_L_TEST_NF 0x2 // 000_00 00 l.bnf257 # define OPERATION_BRANCH_L_TEST_F 0x4 // 000_0 000 l.bf258 # define OPERATION_BRANCH_L_JALR 0x8 // 000_ 0000 l.jal , l.jalr , l.jr265 # define OPERATION_BRANCH_NONE 0x1 // 000_0001 l.j 266 # define OPERATION_BRANCH_L_TEST_NF 0x2 // 000_0010 l.bnf 267 # define OPERATION_BRANCH_L_TEST_F 0x4 // 000_0100 l.bf 268 # define OPERATION_BRANCH_L_JALR 0x8 // 000_1000 l.jal , l.jalr , l.jr 259 269 260 270 //-------------------------------------------------------[ Custom ]----- … … 342 352 # define EXCEPTION_DECOD_BUS_ERROR 0x02 // Access at a invalid physical address 343 353 354 // WARNING : Keep EXCEPTION_ALU_NONE value at 0x00 (kind of hard coded in functional unit's vhdl code). 344 355 # define EXCEPTION_ALU_NONE 0x00 // Functionnal unit generate none exception 345 356 # define EXCEPTION_ALU_RANGE 0x0b // -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r115 r116 10 10 #define MORPHEO_MAJOR_VERSION "0" 11 11 #define MORPHEO_MINOR_VERSION "2" 12 #define MORPHEO_REVISION "11 5"12 #define MORPHEO_REVISION "116" 13 13 #define MORPHEO_CODENAME "Castor" 14 14 15 #define MORPHEO_DATE_DAY " 20"15 #define MORPHEO_DATE_DAY "30" 16 16 #define MORPHEO_DATE_MONTH "04" 17 17 #define MORPHEO_DATE_YEAR "2009" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info
r103 r116 15 15 16 16 # build src directory content 17 target_dep all Generic/Queue/SelfTest17 target_dep all Generic/Queue/SelfTest 18 18 #target_dep all Generic/RegisterFile/RegisterFile_Monolithic/SelfTest 19 19 #target_dep all Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest … … 23 23 #target_dep all Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest 24 24 #target_dep all Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest 25 target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest 26 target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest 27 target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest 25 target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest 26 target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest 27 target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/SelfTest 28 #target_dep all Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/SelfTest 28 29 29 30
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