Changeset 117 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp

Timestamp:

May 16, 2009, 4:42:39 PM (15 years ago)

Author:

rosiere

Message:

1) Platforms : add new organization for test
2) Load_Store_Unit : add array to count nb_check in store_queue
3) Issue_queue and Core_Glue : rewrite the issue network
4) Special_Register_Unit : add reset value to register CID
5) Softwares : add multicontext test
6) Softwares : add SPECINT
7) Softwares : add MiBench?
7) Read_queue : inhib access for r0
8) Change Core_Glue (network) - dont yet support priority and load balancing scheme

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp

@@ -100 +100 @@
       internal_WRITE_QUEUE_OUT_VAL = ((not _queue->empty()           ) and
                                       (not _queue->front()->_write_rd) and
-                                      (not _queue->front()->_write_re));
+                                      (not _queue->front()->_write_re) and
+                                      (_queue->front()->_exception != EXCEPTION_MEMORY_LOAD_SPECULATIVE)
+                                      );
       
       PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);