Changeset 117 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h

Timestamp:

May 16, 2009, 4:42:39 PM (15 years ago)

Author:

rosiere

Message:

1) Platforms : add new organization for test
2) Load_Store_Unit : add array to count nb_check in store_queue
3) Issue_queue and Core_Glue : rewrite the issue network
4) Special_Register_Unit : add reset value to register CID
5) Softwares : add multicontext test
6) Softwares : add SPECINT
7) Softwares : add MiBench?
7) Read_queue : inhib access for r0
8) Change Core_Glue (network) - dont yet support priority and load balancing scheme

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h

@@ -545 +545 @@
   // [0][21] CID
   //----------------------------------------------------------
-  class CID : public GENERIC 
-  {
-  public : CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
-  };
-
-  //----------------------------------------------------------
-  // [0][22] TID
-  //----------------------------------------------------------
-  class TID : public GENERIC 
-  {
-  public : TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {};
-  };
-
-  //----------------------------------------------------------
-  // [0][23] TSR
+  class CID : public morpheo::behavioural::SPR
+  {
+  private: const Tspr_t _cpu_id : 32; // cpu_id reset value
+  public :       Tspr_t  cpu_id : 32;
+
+  public :        CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 
+    _cpu_id ((param==NULL)?0:param->_translate_num_context_to_num_thread[num_front_end][num_context])
+    {};
+  public : void   reset (void  ) 
+    {
+      cpu_id = _cpu_id;
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((cpu_id << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      cpu_id = x >> 0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][22] TID - Thread Id
+  //----------------------------------------------------------
+  class TID : public morpheo::behavioural::SPR
+  {
+  public :       Tspr_t  thread_id : 32;
+
+  public :        TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL)
+    {};
+  public : void   reset (void  ) 
+    {
+    };
+  public : Tspr_t read  (void  )
+    {
+      return ((thread_id << 0));
+    };
+  public : void   write (Tspr_t x) 
+    {
+      thread_id = x >> 0;
+    };
+  };
+
+  //----------------------------------------------------------
+  // [0][23] TSR - Thread Status Register
   //----------------------------------------------------------
   class TSR : public GENERIC