Changeset 118 for trunk/IPs/systemC/processor/Morpheo
- Timestamp:
- May 21, 2009, 12:01:32 AM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo
- Files:
-
- 4 added
- 63 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Simulator_fromFile.cpp
r112 r118 82 82 testSingleton (xml,true); 83 83 84 attributes_t 84 attributes_t attributes = xml->getAttributes(); 85 85 86 std::string 87 model_type_t 88 debug_verbosity_t value_debug = fromString<debug_verbosity_t>(getAttribute(xml,attributes,"debug"));86 std::string value_name = getAttribute(xml,attributes,"name" ); 87 model_type_t value_model = fromString<model_type_t >(getAttribute(xml,attributes,"model")); 88 bool value_debug = fromString<bool>(getAttribute(xml,attributes,"debug")); 89 89 90 90 testAttributesEmpty(xml,attributes); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h
r117 r118 209 209 210 210 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 211 private : uint32_t reg_PRIORITY ; 211 212 212 213 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp
r117 r118 142 142 for (uint32_t num_execute_loop=0; num_execute_loop<_param->_nb_execute_loop; ++num_execute_loop) 143 143 { 144 for (uint32_t num_read_unit=0; num_read_unit<_param->_nb_read_unit[num_execute_loop]; ++num_read_unit)144 for (uint32_t _num_read_unit=0; _num_read_unit<_param->_nb_read_unit[num_execute_loop]; ++_num_read_unit) 145 145 { 146 uint32_t num_read_unit = (_num_read_unit+reg_PRIORITY)%_param->_nb_read_unit[num_execute_loop]; 146 147 Tcontrol_t ack = READ_UNIT_ENABLE [num_execute_loop][num_read_unit]; 147 148 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_transition.cpp
r117 r118 29 29 } 30 30 _priority_ooo_engine->reset(); 31 31 32 reg_PRIORITY = 0; 32 33 } 33 34 else … … 40 41 } 41 42 _priority_ooo_engine->transition(); 43 44 reg_PRIORITY ++; 42 45 } 43 46 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
r116 r118 40 40 namespace execute_unit { 41 41 namespace functionnal_unit { 42 43 42 44 43 class Functionnal_unit -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h
r116 r118 40 40 //public : uint32_t _size_load_queue ; 41 41 public : const Tfunctionnal_unit_scheme_t _functionnal_unit_scheme; 42 public : const bool _have_pipeline_in ; 42 43 43 44 public : execute_timing_t ** _timing ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp
r112 r118 104 104 if (usage_is_set(_usage,USE_SYSTEMC)) 105 105 { 106 if (_param->_have_pipeline_in) 106 107 _execute_operation_in = new execute_operation_t; 107 108 _execute_operation_out = new execute_operation_t; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
r115 r118 77 77 DELETE3(_execute_register,_param->_nb_context,_param->_nb_front_end,_param->_nb_ooo_engine); 78 78 DELETE0(_execute_param); 79 if (_param->_have_pipeline_in) 79 80 DELETE0(_execute_operation_in); 80 81 DELETE0(_execute_operation_out); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp
r117 r118 29 29 { 30 30 { 31 // Can out if : have an instruction and is finish (latence == 0) 31 32 internal_EXECUTE_OUT_VAL = (reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0)); 32 33 33 PORT_WRITE(out_EXECUTE_OUT_VAL 34 PORT_WRITE(out_EXECUTE_OUT_VAL, internal_EXECUTE_OUT_VAL); 34 35 } 35 36 36 37 { 38 // Can accept an instruction if : 39 // * pipeline in is not busy (not previous instruction) 40 // * pipeline in is busy ( previous instruction) and the instruction go to pipeline out 41 if (_param->_have_pipeline_in) 42 { 37 43 internal_EXECUTE_IN_ACK = (not reg_BUSY_IN or 38 44 (reg_BUSY_IN and (not reg_BUSY_OUT or 39 45 (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK))))); 40 41 PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK); 46 } 47 else 48 { 49 internal_EXECUTE_IN_ACK = (not reg_BUSY_OUT or 50 (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK))); 51 } 52 53 PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK); 42 54 } 43 55 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp
r117 r118 28 28 if (PORT_READ(in_NRESET) == 0) 29 29 { 30 if (_param->_have_pipeline_in) 30 31 reg_BUSY_IN = false; 31 32 reg_BUSY_OUT = false; … … 50 51 else 51 52 { 52 // Test if pop 53 // Test if pop an instruction 53 54 if (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK)) 54 55 { 55 56 log_printf(TRACE,Functionnal_unit,FUNCTION," * EXECUTE_OUT : Transaction Accepted"); 56 // transaction57 57 reg_BUSY_OUT = false; 58 58 } 59 59 60 60 // Test if can move instruction in pipeline in to pipeline out 61 if (_param->_have_pipeline_in) 61 62 if (reg_BUSY_IN and not reg_BUSY_OUT) 62 63 { … … 87 88 } 88 89 89 90 91 90 // Test if push 92 91 execute_register_t * execute_register = NULL; … … 96 95 log_printf(TRACE,Functionnal_unit,FUNCTION," * EXECUTE_IN : Transaction Accepted"); 97 96 98 reg_BUSY_IN = true; 97 execute_operation_t * execute_operation; 98 99 if (_param->_have_pipeline_in) 100 { 101 reg_BUSY_IN = true; 102 execute_operation = _execute_operation_in; 103 } 104 else 105 { 106 reg_BUSY_OUT = true; 107 execute_operation = _execute_operation_out; 108 } 99 109 100 110 Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_EXECUTE_IN_CONTEXT_ID ):0; … … 104 114 Toperation_t operation = PORT_READ(in_EXECUTE_IN_OPERATION); 105 115 Ttype_t type = PORT_READ(in_EXECUTE_IN_TYPE); 106 107 _execute_operation_in->_context_id = context_id ;108 _execute_operation_in->_front_end_id = front_end_id ;109 _execute_operation_in->_ooo_engine_id = ooo_engine_id;110 _execute_operation_in->_packet_id = packet_id ;111 _execute_operation_in->_operation = operation ;112 _execute_operation_in->_type = type ;113 _execute_operation_in->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT);114 _execute_operation_in->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT );115 _execute_operation_in->_data_ra = PORT_READ(in_EXECUTE_IN_DATA_RA );116 _execute_operation_in->_data_rb = PORT_READ(in_EXECUTE_IN_DATA_RB );117 _execute_operation_in->_data_rc = PORT_READ(in_EXECUTE_IN_DATA_RC );118 _execute_operation_in->_write_rd = PORT_READ(in_EXECUTE_IN_WRITE_RD );119 _execute_operation_in->_num_reg_rd = PORT_READ(in_EXECUTE_IN_NUM_REG_RD );120 _execute_operation_in->_data_rd = 0; // no necessaray121 _execute_operation_in->_write_re = PORT_READ(in_EXECUTE_IN_WRITE_RE );122 _execute_operation_in->_num_reg_re = PORT_READ(in_EXECUTE_IN_NUM_REG_RE );123 _execute_operation_in->_data_re = 0; // no necessaray124 125 log_printf(TRACE,Functionnal_unit,FUNCTION," * context_id : %d", _execute_operation_in->_context_id );126 log_printf(TRACE,Functionnal_unit,FUNCTION," * front_end_id : %d", _execute_operation_in->_front_end_id );127 log_printf(TRACE,Functionnal_unit,FUNCTION," * ooo_engine_id : %d", _execute_operation_in->_ooo_engine_id);128 log_printf(TRACE,Functionnal_unit,FUNCTION," * packet_id : %d", _execute_operation_in->_packet_id );129 log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d", _execute_operation_in->_operation );130 log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString( _execute_operation_in->_type).c_str());131 log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d", _execute_operation_in->_has_immediat );132 log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x", _execute_operation_in->_immediat );133 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x", _execute_operation_in->_data_ra );134 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x", _execute_operation_in->_data_rb );135 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rc : %.8x", _execute_operation_in->_data_rc );136 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_rd : %d" , _execute_operation_in->_write_rd );137 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_rd : %d" , _execute_operation_in->_num_reg_rd );138 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_re : %d" , _execute_operation_in->_write_re );139 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_re : %d" , _execute_operation_in->_num_reg_re );116 117 execute_operation->_context_id = context_id ; 118 execute_operation->_front_end_id = front_end_id ; 119 execute_operation->_ooo_engine_id = ooo_engine_id; 120 execute_operation->_packet_id = packet_id ; 121 execute_operation->_operation = operation ; 122 execute_operation->_type = type ; 123 execute_operation->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT); 124 execute_operation->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT ); 125 execute_operation->_data_ra = PORT_READ(in_EXECUTE_IN_DATA_RA ); 126 execute_operation->_data_rb = PORT_READ(in_EXECUTE_IN_DATA_RB ); 127 execute_operation->_data_rc = PORT_READ(in_EXECUTE_IN_DATA_RC ); 128 execute_operation->_write_rd = PORT_READ(in_EXECUTE_IN_WRITE_RD ); 129 execute_operation->_num_reg_rd = PORT_READ(in_EXECUTE_IN_NUM_REG_RD ); 130 execute_operation->_data_rd = 0; // no necessaray 131 execute_operation->_write_re = PORT_READ(in_EXECUTE_IN_WRITE_RE ); 132 execute_operation->_num_reg_re = PORT_READ(in_EXECUTE_IN_NUM_REG_RE ); 133 execute_operation->_data_re = 0; // no necessaray 134 135 log_printf(TRACE,Functionnal_unit,FUNCTION," * context_id : %d",execute_operation->_context_id ); 136 log_printf(TRACE,Functionnal_unit,FUNCTION," * front_end_id : %d",execute_operation->_front_end_id ); 137 log_printf(TRACE,Functionnal_unit,FUNCTION," * ooo_engine_id : %d",execute_operation->_ooo_engine_id); 138 log_printf(TRACE,Functionnal_unit,FUNCTION," * packet_id : %d",execute_operation->_packet_id ); 139 log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d",execute_operation->_operation ); 140 log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString(execute_operation->_type).c_str()); 141 log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d",execute_operation->_has_immediat ); 142 log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x",execute_operation->_immediat ); 143 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x",execute_operation->_data_ra ); 144 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x",execute_operation->_data_rb ); 145 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rc : %.8x",execute_operation->_data_rc ); 146 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_rd : %d" ,execute_operation->_write_rd ); 147 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_rd : %d" ,execute_operation->_num_reg_rd ); 148 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_re : %d" ,execute_operation->_write_re ); 149 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_re : %d" ,execute_operation->_num_reg_re ); 140 150 141 151 #ifdef DEBUG_TEST … … 156 166 // ooo_engine_id,_param->_size_ooo_engine_id); 157 167 158 (*(_param->_get_custom_information()._get_custom_execute_genMoore(operation))) ( _execute_operation_in, execute_register, _execute_param);168 (*(_param->_get_custom_information()._get_custom_execute_genMoore(operation))) (execute_operation, execute_register, _execute_param); 159 169 } 160 170 else 161 (*(_function_execute[type][operation])) ( _execute_operation_in, execute_register, _execute_param);171 (*(_function_execute[type][operation])) (execute_operation, execute_register, _execute_param); 162 172 163 173 164 174 log_printf(TRACE,Functionnal_unit,FUNCTION," -----------------"); 165 log_printf(TRACE,Functionnal_unit,FUNCTION," * latence : %.8x", _execute_operation_in->_timing._latence);166 log_printf(TRACE,Functionnal_unit,FUNCTION," * delay : %.8x", _execute_operation_in->_timing._delay);167 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rd : %.8x", _execute_operation_in->_data_rd );168 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_re : %.8x", _execute_operation_in->_data_re );169 log_printf(TRACE,Functionnal_unit,FUNCTION," * exception : %d" , _execute_operation_in->_exception );170 log_printf(TRACE,Functionnal_unit,FUNCTION," * no_sequence : %d" , _execute_operation_in->_no_sequence);171 log_printf(TRACE,Functionnal_unit,FUNCTION," * address : %.8x (%.8x)", _execute_operation_in->_address,_execute_operation_in->_address<<2);175 log_printf(TRACE,Functionnal_unit,FUNCTION," * latence : %.8x",execute_operation->_timing._latence); 176 log_printf(TRACE,Functionnal_unit,FUNCTION," * delay : %.8x",execute_operation->_timing._delay); 177 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rd : %.8x",execute_operation->_data_rd ); 178 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_re : %.8x",execute_operation->_data_re ); 179 log_printf(TRACE,Functionnal_unit,FUNCTION," * exception : %d" ,execute_operation->_exception ); 180 log_printf(TRACE,Functionnal_unit,FUNCTION," * no_sequence : %d" ,execute_operation->_no_sequence); 181 log_printf(TRACE,Functionnal_unit,FUNCTION," * address : %.8x (%.8x)",execute_operation->_address,execute_operation->_address<<2); 172 182 173 183 #ifdef STATISTICS … … 175 185 { 176 186 (*_stat_use_functionnal_unit) ++; 177 (*_stat_sum_delay) += _execute_operation_in->_timing._delay;178 (*_stat_sum_latence) += _execute_operation_in->_timing._latence;187 (*_stat_sum_delay) += execute_operation->_timing._delay; 188 (*_stat_sum_latence) += execute_operation->_timing._latence; 179 189 } 180 190 #endif … … 213 223 if (reg_BUSY_OUT and (_execute_operation_out->_timing._latence > 0)) 214 224 _execute_operation_out->_timing._latence --; 225 226 #if defined(DEBUG) and DEBUG_Functionnal_unit and (DEBUG >= DEBUG_TRACE) 227 { 228 log_printf(TRACE,Functionnal_unit,FUNCTION," * Dump ALU (Functionnal_unit)"); 229 230 if (_param->_have_pipeline_in) 231 log_printf(TRACE,Functionnal_unit,FUNCTION," * reg_BUSY_IN : %d",reg_BUSY_IN ); 232 log_printf(TRACE,Functionnal_unit,FUNCTION," * reg_BUSY_OUT : %d",reg_BUSY_OUT); 233 } 234 #endif 215 235 } 216 236 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp
r116 r118 33 33 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), 34 34 bool is_toplevel): 35 _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE) 35 _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE), 36 _have_pipeline_in (false) 36 37 { 37 38 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r117 r118 350 350 // find a entry that it need a check 351 351 Tlsq_ptr_t index_store = _load_queue[index_load]._store_queue_ptr_write; 352 Tlsq_ptr_t index_store_old = index_store;352 // Tlsq_ptr_t index_store_old = index_store; 353 353 354 354 // Init variable … … 1091 1091 _load_queue [packet_id]._exception = EXCEPTION_MEMORY_BUS_ERROR; 1092 1092 _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT; 1093 1094 1095 uint32_t i=_load_queue[packet_id]._store_queue_ptr_write; 1096 while (i!=reg_STORE_QUEUE_PTR_READ) 1097 { 1098 i=((i==0)?_param->_size_store_queue:i)-1; 1099 1100 #ifdef DEBUG 1101 if (reg_STORE_QUEUE_NB_CHECK [i] == 0) 1102 throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n")); 1103 #endif 1104 1105 reg_STORE_QUEUE_NB_CHECK [i] --; 1106 //i=(i+1)%_param->_size_store_queue; 1107 } 1093 1108 } 1094 1109 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
r98 r118 60 60 log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_control->nb_elt()); \ 61 61 for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ 62 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ 63 (*_queue_control)[it_dump], \ 64 _queue[(*_queue_control)[it_dump]]._context_id , \ 65 _queue[(*_queue_control)[it_dump]]._front_end_id , \ 66 _queue[(*_queue_control)[it_dump]]._ooo_engine_id , \ 67 _queue[(*_queue_control)[it_dump]]._rob_id , \ 68 _queue[(*_queue_control)[it_dump]]._type , \ 69 _queue[(*_queue_control)[it_dump]]._operation , \ 70 _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ 71 _queue[(*_queue_control)[it_dump]]._load_queue_ptr_write , \ 72 _queue[(*_queue_control)[it_dump]]._has_immediat , \ 73 _queue[(*_queue_control)[it_dump]]._immediat , \ 74 _queue[(*_queue_control)[it_dump]]._num_reg_ra , \ 75 _queue[(*_queue_control)[it_dump]]._data_ra_val , \ 76 _queue[(*_queue_control)[it_dump]]._data_ra , \ 77 _queue[(*_queue_control)[it_dump]]._num_reg_rb , \ 78 _queue[(*_queue_control)[it_dump]]._data_rb_val , \ 79 _queue[(*_queue_control)[it_dump]]._data_rb , \ 80 _queue[(*_queue_control)[it_dump]]._num_reg_rc , \ 81 _queue[(*_queue_control)[it_dump]]._data_rc_val , \ 82 _queue[(*_queue_control)[it_dump]]._data_rc , \ 83 _queue[(*_queue_control)[it_dump]]._write_rd , \ 84 _queue[(*_queue_control)[it_dump]]._num_reg_rd , \ 85 _queue[(*_queue_control)[it_dump]]._write_re , \ 86 _queue[(*_queue_control)[it_dump]]._num_reg_re , \ 87 toString(_queue[(*_queue_control)[it_dump]]._type).c_str()); \ 62 if (it_dump < _queue_control->nb_elt()) \ 63 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ 64 (*_queue_control)[it_dump], \ 65 _queue[(*_queue_control)[it_dump]]._context_id , \ 66 _queue[(*_queue_control)[it_dump]]._front_end_id , \ 67 _queue[(*_queue_control)[it_dump]]._ooo_engine_id , \ 68 _queue[(*_queue_control)[it_dump]]._rob_id , \ 69 _queue[(*_queue_control)[it_dump]]._type , \ 70 _queue[(*_queue_control)[it_dump]]._operation , \ 71 _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ 72 _queue[(*_queue_control)[it_dump]]._load_queue_ptr_write , \ 73 _queue[(*_queue_control)[it_dump]]._has_immediat , \ 74 _queue[(*_queue_control)[it_dump]]._immediat , \ 75 _queue[(*_queue_control)[it_dump]]._num_reg_ra , \ 76 _queue[(*_queue_control)[it_dump]]._data_ra_val , \ 77 _queue[(*_queue_control)[it_dump]]._data_ra , \ 78 _queue[(*_queue_control)[it_dump]]._num_reg_rb , \ 79 _queue[(*_queue_control)[it_dump]]._data_rb_val , \ 80 _queue[(*_queue_control)[it_dump]]._data_rb , \ 81 _queue[(*_queue_control)[it_dump]]._num_reg_rc , \ 82 _queue[(*_queue_control)[it_dump]]._data_rc_val , \ 83 _queue[(*_queue_control)[it_dump]]._data_rc , \ 84 _queue[(*_queue_control)[it_dump]]._write_rd , \ 85 _queue[(*_queue_control)[it_dump]]._num_reg_rd , \ 86 _queue[(*_queue_control)[it_dump]]._write_re , \ 87 _queue[(*_queue_control)[it_dump]]._num_reg_re , \ 88 toString(_queue[(*_queue_control)[it_dump]]._type).c_str()); \ 89 else \ 90 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d]", \ 91 (*_queue_control)[it_dump]); \ 88 92 } while (0) 89 93 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
r115 r118 24 24 25 25 26 26 27 class Parameters : public morpheo::behavioural::Parameters 27 28 { 28 29 //-----[ fields ]------------------------------------------------------------ 29 public : uint32_t _size_queue;30 public : uint32_t _nb_context;31 public : uint32_t _nb_front_end;32 public : uint32_t _nb_ooo_engine;33 public : uint32_t _nb_packet;34 //public : uint32_t _size_general_data;35 public : uint32_t _nb_general_register;36 //public : uint32_t _size_special_data;37 public : uint32_t _nb_special_register;38 public : uint32_t _nb_bypass_write;39 public : Twrite_queue_scheme_t _queue_scheme;40 41 public : uint32_t _nb_gpr_write;42 public : uint32_t _nb_spr_write;43 44 //public : uint32_t _size_context_id;45 //public : uint32_t _size_front_end_id;46 //public : uint32_t _size_ooo_engine_id;47 //public : uint32_t _size_packet_id;48 //public : uint32_t _size_general_register;49 //public : uint32_t _size_special_register;50 public : uint32_t _size_internal_queue;51 52 //public : bool _have_port_context_id;53 //public : bool _have_port_front_end_id;54 //public : bool _have_port_ooo_engine_id;55 //public : bool _have_port_packet_id;30 public : uint32_t _size_queue ; 31 public : uint32_t _nb_context ; 32 public : uint32_t _nb_front_end ; 33 public : uint32_t _nb_ooo_engine ; 34 public : uint32_t _nb_packet ; 35 //public : uint32_t _size_general_data ; 36 public : uint32_t _nb_general_register ; 37 //public : uint32_t _size_special_data ; 38 public : uint32_t _nb_special_register ; 39 public : uint32_t _nb_bypass_write ; 40 public : Twrite_queue_scheme_t _queue_scheme ; 41 public : Tbypass_write_scheme_t _bypass_write_scheme ; 42 public : uint32_t _nb_gpr_write ; 43 public : uint32_t _nb_spr_write ; 44 45 //public : uint32_t _size_context_id ; 46 //public : uint32_t _size_front_end_id ; 47 //public : uint32_t _size_ooo_engine_id ; 48 //public : uint32_t _size_packet_id ; 49 //public : uint32_t _size_general_register ; 50 //public : uint32_t _size_special_register ; 51 public : uint32_t _size_internal_queue ; 52 53 //public : bool _have_port_context_id ; 54 //public : bool _have_port_front_end_id ; 55 //public : bool _have_port_ooo_engine_id; 56 //public : bool _have_port_packet_id ; 56 57 57 58 //-----[ methods ]----------------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h
r115 r118 25 25 ,WRITE_QUEUE_SCHEME_MEALY // Write register and pop can be in same cycle 26 26 } Twrite_queue_scheme_t; 27 28 typedef enum 29 { 30 BYPASS_WRITE_FROM_ALU, 31 BYPASS_WRITE_FROM_QUEUE 32 } Tbypass_write_scheme_t; 27 33 28 34 class write_queue_entry_t … … 108 114 }; 109 115 116 template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t& x) 117 { 118 switch (x) 119 { 120 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU : return "alu" ; break; 121 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE : return "queue"; break; 122 default : return ""; break; 123 } 124 }; 125 126 template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t>(const std::string& x) 127 { 128 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU))) == 0) or 129 (x.compare("alu") == 0)) 130 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU; 131 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE))) == 0) or 132 (x.compare("queue") == 0)) 133 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE; 134 135 throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\"")); 136 }; 137 110 138 }; // end namespace morpheo 111 139 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
r115 r118 172 172 public : void transition (void); 173 173 public : void genMoore (void); 174 public : void genMealy (void); 174 public : void genMealy_write (void); 175 public : void genMealy_bypass (void); 175 176 #endif 176 177 #ifdef STATISTICS -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
r115 r118 45 45 _nb_bypass_write = nb_bypass_write ; 46 46 _queue_scheme = queue_scheme ; 47 _bypass_write_scheme = BYPASS_WRITE_FROM_ALU; 48 // _bypass_write_scheme = BYPASS_WRITE_FROM_QUEUE; 47 49 48 50 _nb_gpr_write = 1; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp
r113 r118 28 28 Parameters_test test (_type); 29 29 30 if ( _nb_bypass_write > _size_queue)30 if ((_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and (_nb_bypass_write > _size_queue)) 31 31 test.error("The write_queue can't have more bypass_write than entry in the queue.\n"); 32 if ((_bypass_write_scheme == BYPASS_WRITE_FROM_QUEUE) and (_nb_bypass_write > _size_queue-1)) 33 test.error("The write_queue can't have more bypass_write than entry in the queue -1 (the write_queue[0] is unnecessary).\n"); 32 34 33 35 log_printf(FUNC,Write_queue,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp
r115 r118 92 92 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY) 93 93 { 94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy ");94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_write"); 95 95 96 SC_METHOD (genMealy );96 SC_METHOD (genMealy_write); 97 97 dont_initialize (); 98 98 sensitive << (*(in_CLOCK)).neg(); // need internal register … … 106 106 # endif 107 107 } 108 109 if ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and 110 (_param->_nb_bypass_write > 0)) 111 { 112 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_bypass"); 113 114 SC_METHOD (genMealy_bypass); 115 dont_initialize (); 116 // sensitive << (*(in_CLOCK)).neg(); // don't need internal register 117 sensitive << (*(in_WRITE_QUEUE_IN_VAL )) 118 << (*(in_WRITE_QUEUE_IN_WRITE_RD )) 119 << (*(in_WRITE_QUEUE_IN_NUM_REG_RD )) 120 << (*(in_WRITE_QUEUE_IN_DATA_RD )) 121 << (*(in_WRITE_QUEUE_IN_WRITE_RE )) 122 << (*(in_WRITE_QUEUE_IN_NUM_REG_RE )) 123 << (*(in_WRITE_QUEUE_IN_DATA_RE )); 124 if (_param->_have_port_ooo_engine_id) 125 sensitive << (*(in_WRITE_QUEUE_IN_OOO_ENGINE_ID)); 126 127 128 # ifdef SYSTEMCASS_SPECIFIC 129 // List dependency information 130 # endif 131 } 108 132 109 133 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp
r116 r118 20 20 21 21 #undef FUNCTION 22 #define FUNCTION "Write_queue::genMealy "23 void Write_queue::genMealy (void)22 #define FUNCTION "Write_queue::genMealy_write" 23 void Write_queue::genMealy_write (void) 24 24 { 25 25 log_begin(Write_queue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
r117 r118 29 29 { 30 30 std::list<write_queue_entry_t *>::iterator it = _queue->begin(); 31 for (uint32_t i=0; i<_param->_nb_bypass_write; i++) 31 32 // first bypass is the write_queue_in 33 uint32_t first_index = ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU)?1:0); 34 for (uint32_t i=first_index; i<_param->_nb_bypass_write; i++) 32 35 { 33 bool val = i < _queue->size(); 34 36 // before because first slot is on {GPR|SPR}_WRITE. Also, take next 37 if (it != _queue->end()) 38 it++; 39 40 uint32_t index = i; 41 // bool val = (i+1) < _queue->size(); 42 bool val = (it != _queue->end()); 43 35 44 if (val) 36 45 { 37 46 if (_param->_have_port_ooo_engine_id) 38 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i ], (*it)->_ooo_engine_id);39 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i ], (*it)->_num_reg_rd);40 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i ], (*it)->_data_rd );41 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i ], (*it)->_num_reg_re);42 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i ], (*it)->_data_re );47 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], (*it)->_ooo_engine_id); 48 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [index], (*it)->_num_reg_rd); 49 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [index], (*it)->_data_rd ); 50 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [index], (*it)->_num_reg_re); 51 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [index], (*it)->_data_re ); 43 52 } 44 53 #ifdef SYSTEMC_VHDL_COMPATIBILITY … … 46 55 { 47 56 if (_param->_have_port_ooo_engine_id) 48 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i ], 0);49 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i ], 0);50 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i ], 0);51 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i ], 0);52 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i ], 0);57 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], 0); 58 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [index], 0); 59 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [index], 0); 60 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [index], 0); 61 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [index], 0); 53 62 } 54 63 #endif 55 64 56 PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [i], val and (*it)->_write_rd ); 57 PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [i], val and (*it)->_write_re ); 58 59 if (it != _queue->end()) 60 it++; 65 PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [index], val and (*it)->_write_rd ); 66 PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [index], val and (*it)->_write_re ); 61 67 } 62 68 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp
r112 r118 138 138 ALLOC1_INTERFACE_BEGIN("nb_inst",OUT,NORTH,_("Instruction's number"), _param->_nb_context); 139 139 140 ALLOC1_SIGNAL_OUT(out_NB_INST_ALL ,"all" ,Tco ntext_t ,_param->_size_nb_inst_decod);140 ALLOC1_SIGNAL_OUT(out_NB_INST_ALL ,"all" ,Tcounter_t ,_param->_size_nb_inst_decod); 141 141 142 142 ALLOC1_INTERFACE_END(_param->_nb_context); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h
r110 r118 137 137 public : SC_IN (Tcontrol_t ) * in_CONTEXT_EVENT_ACK ; 138 138 public : SC_OUT(Tcontext_t ) * out_CONTEXT_EVENT_CONTEXT_ID ; 139 public : SC_OUT(T context_t) * out_CONTEXT_EVENT_DEPTH ;139 public : SC_OUT(Tdepth_t ) * out_CONTEXT_EVENT_DEPTH ; 140 140 public : SC_OUT(Tevent_type_t ) * out_CONTEXT_EVENT_TYPE ; 141 141 public : SC_OUT(Tcontrol_t ) * out_CONTEXT_EVENT_IS_DELAY_SLOT ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp
r112 r118 149 149 ALLOC1_INTERFACE_BEGIN("nb_inst",OUT,NORTH,_("Instruction's number"), _param->_nb_context); 150 150 151 ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL ,"decod_all" ,Tco ntext_t ,_param->_size_nb_inst_decod);151 ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL ,"decod_all" ,Tcounter_t ,_param->_size_nb_inst_decod); 152 152 153 153 ALLOC1_INTERFACE_END(_param->_nb_context); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp
r100 r118 25 25 log_function(Return_Address_Stack,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET) == 1) 28 { 27 29 #ifdef DEBUG_TEST 28 30 // just to test if have many transaction on a same context … … 63 65 PORT_WRITE(out_DECOD_INDEX [i], top); 64 66 } 65 67 } 66 68 log_end(Return_Address_Stack,FUNCTION); 67 69 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp
r100 r118 25 25 log_function(Return_Address_Stack,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET) == 1) 28 { 27 29 #ifdef DEBUG_TEST 28 30 // just to test if have many transaction on a same context … … 63 65 64 66 PORT_WRITE(out_PREDICT_ADDRESS_POP [i], reg_stack[context][top]._address); 67 65 68 PORT_WRITE(out_PREDICT_INDEX [i], top); 69 } 66 70 } 67 71 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r117 r118 342 342 if (_param->_have_thread [i]) 343 343 { 344 std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+" -"+toString(getpid())+".log";344 std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+".log"; 345 345 346 346 instruction_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp
r105 r118 28 28 // =================================================================== 29 29 { 30 log_printf(TRACE,Commit_unit,FUNCTION," * REEXECUTE [0]"); 31 30 32 // Store instruction comming Out Of Order in Load Store Unit. 31 33 // Must be executed in no speculative mode. Also, send a signal when an Store is in head of ROB 32 34 33 Tcontrol_t val = false; 34 35 if (not _rob[reg_NUM_BANK_HEAD].empty()) 36 { 37 entry_t * entry = _rob [reg_NUM_BANK_HEAD].front(); 35 Tcontrol_t val = false; 36 uint32_t num_bank = reg_NUM_BANK_HEAD; 37 38 if (not _rob[num_bank].empty()) 39 { 40 log_printf(TRACE,Commit_unit,FUNCTION," * ROB is not empty"); 41 log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",num_bank); 42 43 entry_t * entry = _rob [num_bank].front(); 38 44 rob_state_t state = entry->state; 39 45 … … 41 47 val = ((state == ROB_STORE_HEAD_OK) or 42 48 (state == ROB_STORE_HEAD_KO)); 43 49 50 log_printf(TRACE,Commit_unit,FUNCTION," * val : %d",val); 44 51 if (val) 45 52 { 53 Tpacket_t packet_id = ((entry->ptr << _param->_shift_num_slot) | num_bank); 54 55 log_printf(TRACE,Commit_unit,FUNCTION," * packet_id : %d",packet_id); 56 46 57 // Reexecute store 47 58 if (_param->_have_port_context_id) … … 50 61 PORT_WRITE(out_REEXECUTE_FRONT_END_ID [0], entry->front_end_id ); 51 62 if (_param->_have_port_rob_ptr ) 52 PORT_WRITE(out_REEXECUTE_PACKET_ID [0], entry->ptr);63 PORT_WRITE(out_REEXECUTE_PACKET_ID [0], packet_id ); 53 64 PORT_WRITE(out_REEXECUTE_TYPE [0], entry->type ); 54 65 PORT_WRITE(out_REEXECUTE_STORE_QUEUE_PTR_WRITE [0], entry->store_queue_ptr_write); … … 58 69 59 70 internal_REEXECUTE_VAL [0] = val; 60 internal_REEXECUTE_NUM_BANK [0] = reg_NUM_BANK_HEAD;71 internal_REEXECUTE_NUM_BANK [0] = num_bank; 61 72 62 73 PORT_WRITE(out_REEXECUTE_VAL[0], internal_REEXECUTE_VAL [0]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp
r98 r118 34 34 Tcontrol_t ack; 35 35 36 log_printf(TRACE,Reexecute_unit,FUNCTION," * REEXECUTE[%d]",i); 37 36 38 if (not _reexecute_queue [i].empty() and (_reexecute_queue [i].front()->state == STATE_REEXECUTE)) 37 39 { … … 40 42 41 43 entry_t * entry = _reexecute_queue [i].front(); 44 Tpacket_t packet_id = (_param->_have_port_rob_ptr)?entry->packet_id:0; 45 46 log_printf(TRACE,Reexecute_unit,FUNCTION," * From Reexecute_queue"); 47 log_printf(TRACE,Reexecute_unit,FUNCTION," * packet_id : %d",packet_id); 42 48 43 49 if (_param->_have_port_context_id) … … 46 52 PORT_WRITE(out_REEXECUTE_FRONT_END_ID [i],entry->front_end_id ); 47 53 if (_param->_have_port_rob_ptr ) 48 PORT_WRITE(out_REEXECUTE_PACKET_ID [i], entry->packet_id );54 PORT_WRITE(out_REEXECUTE_PACKET_ID [i], packet_id ); 49 55 PORT_WRITE(out_REEXECUTE_OPERATION [i],entry->operation ); 50 56 PORT_WRITE(out_REEXECUTE_TYPE [i],entry->type ); … … 60 66 ack = PORT_READ(in_REEXECUTE_ACK [i]); 61 67 68 Tpacket_t packet_id = (_param->_have_port_rob_ptr)?PORT_READ(in_REEXECUTE_ROB_PACKET_ID [i]):0; 69 70 log_printf(TRACE,Reexecute_unit,FUNCTION," * From ROB"); 71 log_printf(TRACE,Reexecute_unit,FUNCTION," * val & ack : %d",val and ack); 72 log_printf(TRACE,Reexecute_unit,FUNCTION," * have ?? : %d",_param->_have_port_rob_ptr); 73 log_printf(TRACE,Reexecute_unit,FUNCTION," * packet_id : %d",packet_id); 74 62 75 if (_param->_have_port_context_id) 63 76 PORT_WRITE(out_REEXECUTE_CONTEXT_ID [i], PORT_READ(in_REEXECUTE_ROB_CONTEXT_ID [i])); … … 65 78 PORT_WRITE(out_REEXECUTE_FRONT_END_ID [i], PORT_READ(in_REEXECUTE_ROB_FRONT_END_ID [i])); 66 79 if (_param->_have_port_rob_ptr ) 67 PORT_WRITE(out_REEXECUTE_PACKET_ID [i], PORT_READ(in_REEXECUTE_ROB_PACKET_ID [i]));80 PORT_WRITE(out_REEXECUTE_PACKET_ID [i], packet_id ); 68 81 PORT_WRITE(out_REEXECUTE_OPERATION [i], PORT_READ(in_REEXECUTE_ROB_OPERATION [i])); 69 82 PORT_WRITE(out_REEXECUTE_TYPE [i], PORT_READ(in_REEXECUTE_ROB_TYPE [i])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
r117 r118 121 121 private : Tcontrol_t * internal_PUSH_GPR_VAL ;//[nb_reg_free] 122 122 private : uint32_t * internal_PUSH_GPR_NUM_BANK;//[nb_reg_free] 123 private : uint32_t * internal_PUSH_GPR_NUM_REG ;//[nb_reg_free] 123 124 private : Tcontrol_t * internal_PUSH_SPR_VAL ;//[nb_reg_free] 124 125 private : uint32_t * internal_PUSH_SPR_NUM_BANK;//[nb_reg_free] 126 private : uint32_t * internal_PUSH_SPR_NUM_REG ;//[nb_reg_free] 125 127 #endif 126 128 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
r117 r118 134 134 ALLOC1(internal_PUSH_GPR_VAL ,Tcontrol_t,_param->_nb_reg_free); 135 135 ALLOC1(internal_PUSH_GPR_NUM_BANK,uint32_t ,_param->_nb_reg_free); 136 ALLOC1(internal_PUSH_GPR_NUM_REG ,uint32_t ,_param->_nb_reg_free); 136 137 ALLOC1(internal_PUSH_SPR_VAL ,Tcontrol_t,_param->_nb_reg_free); 137 138 ALLOC1(internal_PUSH_SPR_NUM_BANK,uint32_t ,_param->_nb_reg_free); 139 ALLOC1(internal_PUSH_SPR_NUM_REG ,uint32_t ,_param->_nb_reg_free); 138 140 } 139 141 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
r117 r118 77 77 DELETE1(internal_PUSH_GPR_VAL ,_param->_nb_reg_free); 78 78 DELETE1(internal_PUSH_GPR_NUM_BANK,_param->_nb_reg_free); 79 DELETE1(internal_PUSH_GPR_NUM_REG ,_param->_nb_reg_free); 79 80 DELETE1(internal_PUSH_SPR_VAL ,_param->_nb_reg_free); 80 81 DELETE1(internal_PUSH_SPR_NUM_BANK,_param->_nb_reg_free); 82 DELETE1(internal_PUSH_SPR_NUM_REG ,_param->_nb_reg_free); 81 83 } 82 84 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp
r112 r118 8 8 9 9 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h" 10 #include <set> 10 11 11 12 namespace morpheo { … … 18 19 namespace stat_list_unit { 19 20 21 #define STAT_LIST_SCAN_ALL 20 22 21 23 #undef FUNCTION … … 26 28 log_function(Stat_List_unit,FUNCTION,_name.c_str()); 27 29 28 uint32_t gpr_ptr = reg_GPR_PTR_FREE; 29 uint32_t spr_ptr = reg_SPR_PTR_FREE; 30 uint32_t gpr_ptr = reg_GPR_PTR_FREE; 31 uint32_t spr_ptr = reg_SPR_PTR_FREE; 32 #ifdef STAT_LIST_SCAN_ALL 33 std::set<Tgeneral_address_t> list_gpr_free; 34 std::set<Tspecial_address_t> list_spr_free; 35 #endif 30 36 31 37 for (uint32_t i=0; i<_param->_nb_reg_free; i++) 32 38 { 39 log_printf(TRACE,Stat_List_unit,FUNCTION," * PUSH [%d]",i); 40 33 41 uint32_t offset = i*_param->_nb_bank_by_port_free; 34 42 35 43 // PUSH_GPR 36 44 { 37 uint32_t bank_gpr; 38 39 for (bank_gpr=offset; bank_gpr<offset+_param->_nb_bank_by_port_free; bank_gpr++) 40 if (gpr_stat_list[bank_gpr][gpr_ptr].can_free()) 41 break; 42 43 bool val = (bank_gpr != offset+_param->_nb_bank_by_port_free); 44 45 bool val = false; 46 uint32_t bank_gpr = offset; 47 48 #ifdef STAT_LIST_SCAN_ALL 49 for (uint32_t _gpr_ptr=0; _gpr_ptr<_param->_nb_general_register_by_bank; ++_gpr_ptr) 50 { 51 gpr_ptr = (gpr_ptr+1)%_param->_nb_general_register_by_bank; 52 #endif 53 for (bank_gpr = offset; bank_gpr<offset+_param->_nb_bank_by_port_free; bank_gpr++) 54 if (gpr_stat_list[bank_gpr][gpr_ptr].can_free()) 55 { 56 #ifdef STAT_LIST_SCAN_ALL 57 Tgeneral_address_t num_reg = ((bank_gpr<<_param->_shift_gpr) | gpr_ptr); 58 if (list_gpr_free.find(num_reg) == list_gpr_free.end()) 59 { 60 list_gpr_free.insert(num_reg); 61 #endif 62 val = true; 63 break; 64 #ifdef STAT_LIST_SCAN_ALL 65 } 66 #endif 67 } 68 #ifdef STAT_LIST_SCAN_ALL 69 if (val) 70 break; 71 } 72 #endif 73 74 log_printf(TRACE,Stat_List_unit,FUNCTION," * val : %d",val); 75 log_printf(TRACE,Stat_List_unit,FUNCTION," * bank_gpr : %d",bank_gpr); 76 log_printf(TRACE,Stat_List_unit,FUNCTION," * gpr_ptr : %d",gpr_ptr); 77 log_printf(TRACE,Stat_List_unit,FUNCTION," * num_reg : %d",((bank_gpr<<_param->_shift_gpr) | gpr_ptr)); 78 45 79 internal_PUSH_GPR_VAL [i] = val; 46 80 internal_PUSH_GPR_NUM_BANK [i] = bank_gpr; 81 internal_PUSH_GPR_NUM_REG [i] = gpr_ptr ; 47 82 48 83 PORT_WRITE(out_PUSH_GPR_VAL [i], val); … … 53 88 // PUSH_SPR 54 89 { 55 uint32_t bank_spr; 56 57 for (bank_spr=offset; bank_spr<offset+_param->_nb_bank_by_port_free; bank_spr++) 58 if (spr_stat_list[bank_spr][spr_ptr].can_free()) 59 break; 90 bool val = false; 91 uint32_t bank_spr = offset; 60 92 61 bool val = (bank_spr != (offset+_param->_nb_bank_by_port_free)); 62 93 #ifdef STAT_LIST_SCAN_ALL 94 for (uint32_t _spr_ptr=0; _spr_ptr<_param->_nb_special_register_by_bank; ++_spr_ptr) 95 { 96 spr_ptr = (spr_ptr+1)%_param->_nb_special_register_by_bank; 97 #endif 98 for (bank_spr = offset; bank_spr<offset+_param->_nb_bank_by_port_free; bank_spr++) 99 if (spr_stat_list[bank_spr][spr_ptr].can_free()) 100 { 101 #ifdef STAT_LIST_SCAN_ALL 102 Tspecial_address_t num_reg = ((bank_spr<<_param->_shift_spr) | spr_ptr); 103 if (list_spr_free.find(num_reg) == list_spr_free.end()) 104 { 105 list_spr_free.insert(num_reg); 106 #endif 107 val = true; 108 break; 109 #ifdef STAT_LIST_SCAN_ALL 110 } 111 #endif 112 } 113 #ifdef STAT_LIST_SCAN_ALL 114 if (val) 115 break; 116 } 117 #endif 118 119 log_printf(TRACE,Stat_List_unit,FUNCTION," * val : %d",val); 120 log_printf(TRACE,Stat_List_unit,FUNCTION," * bank_spr : %d",bank_spr); 121 log_printf(TRACE,Stat_List_unit,FUNCTION," * spr_ptr : %d",spr_ptr); 122 log_printf(TRACE,Stat_List_unit,FUNCTION," * num_reg : %d",((bank_spr<<_param->_shift_spr) | spr_ptr)); 123 63 124 internal_PUSH_SPR_VAL [i] = val; 64 125 internal_PUSH_SPR_NUM_BANK [i] = bank_spr; 126 internal_PUSH_SPR_NUM_REG [i] = spr_ptr ; 65 127 66 128 PORT_WRITE(out_PUSH_SPR_VAL [i], val); … … 68 130 PORT_WRITE(out_PUSH_SPR_NUM_REG[i], ((bank_spr<<_param->_shift_spr) | spr_ptr)); 69 131 } 132 133 70 134 } 71 135 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
r117 r118 233 233 // ===================================================== 234 234 if (internal_PUSH_GPR_VAL [i] and PORT_READ(in_PUSH_GPR_ACK [i])) 235 gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][ reg_GPR_PTR_FREE].free();235 gpr_stat_list[internal_PUSH_GPR_NUM_BANK [i]][internal_PUSH_GPR_NUM_REG [i]].free(); 236 236 237 237 // ===================================================== … … 239 239 // ===================================================== 240 240 if (internal_PUSH_SPR_VAL [i] and PORT_READ(in_PUSH_SPR_ACK [i])) 241 spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][ reg_SPR_PTR_FREE].free();241 spr_stat_list[internal_PUSH_SPR_NUM_BANK [i]][internal_PUSH_SPR_NUM_REG [i]].free(); 242 242 } 243 243 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_transition.cpp
r100 r118 133 133 } 134 134 } 135 136 #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Special_Register_unit == true) 137 { 138 log_printf(TRACE,Special_Register_unit,FUNCTION," * Dump SPR"); 139 140 for (uint32_t i=0; i<_param->_nb_front_end; i++) 141 for (uint32_t j=0; j<_param->_nb_context[i]; j++) 142 { 143 log_printf(TRACE,Special_Register_unit,FUNCTION," * SR [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR ]->read()); 144 log_printf(TRACE,Special_Register_unit,FUNCTION," * CID [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_CID ]->read()); 145 log_printf(TRACE,Special_Register_unit,FUNCTION," * TID [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_TID ]->read()); 146 log_printf(TRACE,Special_Register_unit,FUNCTION," * TSR [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_TSR ]->read()); 147 // log_printf(TRACE,Special_Register_unit,FUNCTION," * MACLO [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_MAC ][SPR_MACLO ]->read()); 148 // log_printf(TRACE,Special_Register_unit,FUNCTION," * MACHI [%d][%d] : %.8x",i,j,_spr [i][j][GROUP_MAC ][SPR_MACHI ]->read()); 149 } 150 } 151 #endif 135 152 } 136 153 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r112 r118 51 51 # define DEBUG_Meta_Predictor_Glue true 52 52 # define DEBUG_Two_Level_Branch_Predictor true 53 # define DEBUG_Two_Level_Branch_Predictor_Glue true54 # define DEBUG_Branch_History_Table true55 # define DEBUG_Pattern_History_Table true56 53 # define DEBUG_Prediction_unit_Glue true 57 54 # define DEBUG_Return_Address_Stack true … … 98 95 # define DEBUG_Allocation true 99 96 # define DEBUG_Interface true 97 98 //---------------------------------------------------------------------- 99 100 // Boolean 101 # define NAME_true "true" 102 # define NAME_false "false" 103 104 // Others 105 # define NAME_Allocation "Allocation" 106 # define NAME_Interface "Interface" 107 108 // Component 109 # define NAME_Morpheo "Morpheo" 110 # define NAME_Behavioural "Behavioural" 111 # define NAME_Configuration "Configuration" 112 # define NAME_Generic "Generic" 113 # define NAME_Comparator "Comparator" 114 # define NAME_Counter "Counter" 115 # define NAME_Divider "Divider" 116 # define NAME_Multiplier "Multiplier" 117 # define NAME_Priority "Priority" 118 # define NAME_Queue "Queue" 119 # define NAME_Queue_Control "Queue_Control" 120 # define NAME_RegisterFile "RegisterFile" 121 # define NAME_RegisterFile_Monolithic "RegisterFile_Monolithic" 122 # define NAME_RegisterFile_Multi_Banked "RegisterFile_Multi_Banked" 123 # define NAME_Select "Select" 124 # define NAME_Select_Priority_Fixed "Select_Priority_Fixed" 125 # define NAME_Shifter "Shifter" 126 # define NAME_Sort "Sort" 127 # define NAME_Victim "Victim" 128 # define NAME_Victim_Pseudo_LRU "Victim_Pseudo_LRU" 129 # define NAME_Core "Core" 130 # define NAME_Core_Glue "Core_Glue" 131 # define NAME_Dcache_Access "Dcache_Access" 132 # define NAME_Icache_Access "Icache_Access" 133 # define NAME_Multi_Front_end "Multi_Front_end" 134 # define NAME_Front_end "Front_end" 135 # define NAME_Context_State "Context_State" 136 # define NAME_Decod_unit "Decod_unit" 137 # define NAME_Decod "Decod" 138 # define NAME_Decod_queue "Decod_queue" 139 # define NAME_Front_end_Glue "Front_end_Glue" 140 # define NAME_Ifetch_unit "Ifetch_unit" 141 # define NAME_Address_management "Address_management" 142 # define NAME_Ifetch_queue "Ifetch_queue" 143 # define NAME_Ifetch_unit_Glue "Ifetch_unit_Glue" 144 # define NAME_Prediction_unit "Prediction_unit" 145 # define NAME_Branch_Target_Buffer "Branch_Target_Buffer" 146 # define NAME_Branch_Target_Buffer_Glue "Branch_Target_Buffer_Glue" 147 # define NAME_Branch_Target_Buffer_Register "Branch_Target_Buffer_Register" 148 # define NAME_Direction "Direction" 149 # define NAME_Direction_Glue "Direction_Glue" 150 # define NAME_Meta_Predictor "Meta_Predictor" 151 # define NAME_Meta_Predictor_Glue "Meta_Predictor_Glue" 152 # define NAME_Two_Level_Branch_Predictor "Two_Level_Branch_Predictor" 153 # define NAME_Prediction_unit_Glue "Prediction_unit_Glue" 154 # define NAME_Return_Address_Stack "Return_Address_Stack" 155 # define NAME_Update_Prediction_Table "Update_Prediction_Table" 156 # define NAME_Multi_OOO_Engine "Multi_OOO_Engine" 157 # define NAME_OOO_Engine "OOO_Engine" 158 # define NAME_Commit_unit "Commit_unit" 159 # define NAME_Issue_queue "Issue_queue" 160 # define NAME_OOO_Engine_Glue "OOO_Engine_Glue" 161 # define NAME_Reexecute_unit "Reexecute_unit" 162 # define NAME_Rename_unit "Rename_unit" 163 # define NAME_Load_Store_pointer_unit "Load_Store_pointer_unit" 164 # define NAME_Register_translation_unit "Register_translation_unit" 165 # define NAME_Dependency_checking_unit "Dependency_checking_unit" 166 # define NAME_Free_List_unit "Free_List_unit" 167 # define NAME_Register_Address_Translation_unit "Register_Address_Translation_unit" 168 # define NAME_Register_translation_unit_Glue "Register_translation_unit_Glue" 169 # define NAME_Stat_List_unit "Stat_List_unit" 170 # define NAME_Rename_select "Rename_select" 171 # define NAME_Rename_unit_Glue "Rename_unit_Glue" 172 # define NAME_Special_Register_unit "Special_Register_unit" 173 # define NAME_Multi_Execute_loop "Multi_Execute_loop" 174 # define NAME_Execute_loop "Execute_loop" 175 # define NAME_Execute_loop_Glue "Execute_loop_Glue" 176 # define NAME_Multi_Execute_unit "Multi_Execute_unit" 177 # define NAME_Execute_unit "Execute_unit" 178 # define NAME_Functionnal_unit "Functionnal_unit" 179 # define NAME_Load_store_unit "Load_store_unit" 180 # define NAME_Multi_Read_unit "Multi_Read_unit" 181 # define NAME_Read_unit "Read_unit" 182 # define NAME_Read_queue "Read_queue" 183 # define NAME_Reservation_station "Reservation_station" 184 # define NAME_Multi_Write_unit "Multi_Write_unit" 185 # define NAME_Write_unit "Write_unit" 186 # define NAME_Execute_queue "Execute_queue" 187 # define NAME_Write_queue "Write_queue" 188 # define NAME_Network "Network" 189 # define NAME_Execution_unit_to_Write_unit "Execution_unit_to_Write_unit" 190 # define NAME_Read_unit_to_Execution_unit "Read_unit_to_Execution_unit" 191 # define NAME_Register_unit "Register_unit" 192 # define NAME_Register_unit_Glue "Register_unit_Glue" 193 100 194 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Model.h
r113 r118 9 9 */ 10 10 11 #include "Common/include/Debug.h" 11 #include "Common/include/ToString.h" 12 #include "Common/include/FromString.h" 12 13 #include "Common/include/ErrorMorpheo.h" 13 14 #include <map> … … 24 25 typedef struct 25 26 { 26 model_type_t 27 debug_verbosity_tdebug;27 model_type_t type ; 28 bool debug; 28 29 } model_t; 29 30 30 31 class Model 31 32 { 32 private : static const model_type_t 33 private : static const debug_verbosity_t default_debug = DEBUG_NONE;33 private : static const model_type_t default_type = MODEL_SYSTEMC; 34 private : static const bool default_debug = false; 34 35 35 36 private : std::map<std::string,model_t> models; 36 37 37 public : 38 public : 39 public : void set_model (std::string component, model_type_t type, debug_verbosity_tdebug);40 public : model_type_t 41 public : debug_verbosity_tget_debug (std::string component);42 public : void 38 public : Model (void); 39 public : ~Model (void); 40 public : void set_model (std::string component, model_type_t type, bool debug); 41 public : model_type_t get_type (std::string component); 42 public : bool get_debug (std::string component); 43 public : void print (void); 43 44 }; 44 45 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h
r111 r118 20 20 typedef uint8_t Texception_t; 21 21 typedef uint8_t Tcontext_t; 22 typedef uint 8_tTpacket_t;22 typedef uint16_t Tpacket_t; 23 23 typedef uint8_t Toperation_t; 24 24 typedef uint8_t Ttype_t; 25 typedef uint 8_tTcounter_t; // universal counter26 typedef uint 8_tTptr_t; // universal pointer25 typedef uint32_t Tcounter_t; // universal counter 26 typedef uint32_t Tptr_t; // universal pointer 27 27 typedef uint32_t Tspr_t; 28 28 typedef uint16_t Tspr_address_t; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r117 r118 10 10 #define MORPHEO_MAJOR_VERSION "0" 11 11 #define MORPHEO_MINOR_VERSION "2" 12 #define MORPHEO_REVISION "11 7"12 #define MORPHEO_REVISION "118" 13 13 #define MORPHEO_CODENAME "Castor" 14 14 15 #define MORPHEO_DATE_DAY " 16"15 #define MORPHEO_DATE_DAY "20" 16 16 #define MORPHEO_DATE_MONTH "05" 17 17 #define MORPHEO_DATE_YEAR "2009" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model.cpp
r112 r118 7 7 8 8 #include "Behavioural/include/Model.h" 9 #include "Common/include/Debug.h" 9 10 10 11 namespace morpheo { … … 16 17 { 17 18 log_begin(Behavioural,FUNCTION); 19 20 set_model(NAME_true ,MODEL_SYSTEMC,true ); 21 set_model(NAME_false,MODEL_SYSTEMC,false); 22 18 23 log_end(Behavioural,FUNCTION); 19 24 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_debug.cpp
r112 r118 7 7 8 8 #include "Behavioural/include/Model.h" 9 #include "Common/include/Debug.h" 9 10 10 11 namespace morpheo { … … 13 14 #undef FUNCTION 14 15 #define FUNCTION "Model::get_debug" 15 debug_verbosity_tModel::get_debug (std::string component)16 bool Model::get_debug (std::string component) 16 17 { 17 18 log_begin(Behavioural,FUNCTION); 18 19 19 debug_verbosity_t_return;20 bool _return; 20 21 21 22 std::map<std::string,model_t>::iterator it = models.find(component); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_get_type.cpp
r112 r118 7 7 8 8 #include "Behavioural/include/Model.h" 9 #include "Common/include/Debug.h" 9 10 10 11 namespace morpheo { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_print.cpp
r113 r118 7 7 8 8 #include "Behavioural/include/Model.h" 9 #include "Common/include/Debug.h" 9 10 10 11 namespace morpheo { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Model_set_model.cpp
r113 r118 7 7 8 8 #include "Behavioural/include/Model.h" 9 #include "Common/include/Debug.h" 9 10 10 11 namespace morpheo { … … 13 14 #undef FUNCTION 14 15 #define FUNCTION "Model::set_model" 15 void Model::set_model (std::string component, model_type_t type, debug_verbosity_tdebug)16 void Model::set_model (std::string component, model_type_t type, bool debug) 16 17 { 17 18 log_begin(Behavioural,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h
r113 r118 24 24 */ 25 25 26 #include "Common/include/Debug_type.h" 26 27 #include "Common/include/Systemc.h" 27 28 #include "Common/include/Message.h" … … 29 30 #include "Common/include/ChangeCase.h" 30 31 #include "Behavioural/include/Debug_component.h" 32 #include "Behavioural/include/Model.h" 33 #include "Behavioural/include/Simulation.h" 31 34 #include <systemc.h> 32 35 #include <stdio.h> … … 39 42 namespace morpheo { 40 43 41 typedef enum42 {43 DEBUG_NONE ,44 DEBUG_INFO ,45 DEBUG_TRACE,46 DEBUG_FUNC ,47 DEBUG_ALL48 } debug_verbosity_t;44 // typedef enum 45 // { 46 // DEBUG_NONE , 47 // DEBUG_INFO , 48 // DEBUG_TRACE, 49 // DEBUG_FUNC , 50 // DEBUG_ALL 51 // } debug_verbosity_t; 49 52 50 53 extern debug_verbosity_t debug; … … 81 84 if ((debug == DEBUG_ALL ) or \ 82 85 (DEBUG_ ## level == DEBUG_NONE) or \ 83 (( DEBUG_ ## level <= debug) and\84 ( DEBUG_ ## component == true )) )\86 (( DEBUG_ ## level <= debug) and \ 87 ( morpheo::behavioural::_model.get_debug(NAME_ ## component))) ) \ 85 88 { \ 86 89 if (DEBUG_ ## level <= DEBUG_INFO) \ -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_0.cfg
r117 r118 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_ min">3 <core name="Instance_x1_w1_0"> 4 4 5 5 <thread id="0"> … … 46 46 <parameter name="size_execute_queue" value="1" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="0" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_1.cfg
r117 r118 39 39 <parameter name="size_read_queue" value="2" /> 40 40 <parameter name="size_reservation_station" value="2" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="2" /> 42 42 </read_bloc> 43 43 … … 46 46 <parameter name="size_execute_queue" value="2" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 83 84 <parameter name="btb_size_counter" value="2" /> 84 85 <parameter name="btb_victim_scheme" value="1" /> 85 <parameter name="dir_predictor_scheme" value=" 1" />86 <parameter name="dir_predictor_scheme" value="2" /> 86 87 87 88 <predictor id="0"> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_2.cfg
r117 r118 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 … … 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 83 84 <parameter name="btb_size_counter" value="2" /> 84 85 <parameter name="btb_victim_scheme" value="3" /> 85 <parameter name="dir_predictor_scheme" value=" 1" />86 <parameter name="dir_predictor_scheme" value="2" /> 86 87 87 88 <predictor id="0"> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_3.cfg
r117 r118 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 … … 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 83 84 <parameter name="btb_size_counter" value="2" /> 84 85 <parameter name="btb_victim_scheme" value="3" /> 85 <parameter name="dir_predictor_scheme" value=" 1" />86 <parameter name="dir_predictor_scheme" value="2" /> 86 87 87 88 <predictor id="0"> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_4.cfg
r117 r118 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 … … 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 97 98 <parameter name="btb_size_counter" value="2" /> 98 99 <parameter name="btb_victim_scheme" value="3" /> 99 <parameter name="dir_predictor_scheme" value=" 1" />100 <parameter name="dir_predictor_scheme" value="2" /> 100 101 </front_end> 101 102 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_1.cfg
r117 r118 17 17 <decod_bloc id="0"> 18 18 <parameter name="size_decod_queue" value="4" /> 19 <parameter name="decod_queue_scheme" value=" 0" />19 <parameter name="decod_queue_scheme" value="1" /> 20 20 <parameter name="nb_inst_decod" value="2" /> 21 21 <parameter name="nb_context_select" value="1" /> … … 36 36 </rename_bloc> 37 37 38 <read_bloc id="0,1 ,2">38 <read_bloc id="0,1"> 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 <write_bloc id="0,1 ,2">44 <write_bloc id="0,1"> 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 <parameter name="nb_bypass_write" value="0" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 60 61 61 62 <functionnal_unit id="0"> 62 <parameter name="nb_inst_functionnal_unit" value="1" />63 64 <timing type="0" latence="1" delay="1" />65 <timing type="1" latence="1" delay="1" />66 <timing type="2" latence="1" delay="1" />67 <timing type="3" latence="1" delay="1" />68 <timing type="4" latence="1" delay="1" />69 <timing type="6" latence="1" delay="1" />70 <timing type="7" latence="1" delay="1" />71 72 <timing type="10" latence="1" delay="1" />73 </functionnal_unit>74 75 <functionnal_unit id="1">76 63 <parameter name="nb_inst_functionnal_unit" value="1" /> 77 64 … … 123 110 124 111 <execute_loop id="0"> 125 <parameter name="nb_read_unit" value=" 3" />126 <parameter name="nb_write_unit" value=" 3" />112 <parameter name="nb_read_unit" value="2" /> 113 <parameter name="nb_write_unit" value="2" /> 127 114 <parameter name="nb_gpr_bank" value="2" /> 128 115 <parameter name="nb_gpr_port_read_by_bank" value="2" /> … … 135 122 136 123 <execute_unit id="0"> 137 <link name="link_execute_unit_with_ functionnal_unit"src="0"/>124 <link name="link_execute_unit_with_load_store_unit" src="0"/> 138 125 </execute_unit> 139 126 <execute_unit id="1"> 140 <link name="link_execute_unit_with_functionnal_unit" src="1"/> 141 </execute_unit> 142 <execute_unit id="2"> 143 <link name="link_execute_unit_with_load_store_unit" src="0"/> 127 <link name="link_execute_unit_with_functionnal_unit" src="0"/> 144 128 </execute_unit> 145 129 … … 165 149 <link name="link_read_unit_with_read_bloc" src="0" dest="0.0" /> 166 150 <link name="link_read_unit_with_read_bloc" src="1" dest="0.1" /> 167 <link name="link_read_unit_with_read_bloc" src="2" dest="0.2" />168 151 <link name="link_write_unit_with_write_bloc" src="0" dest="0.0" /> 169 152 <link name="link_write_unit_with_write_bloc" src="1" dest="0.1" /> 170 <link name="link_write_unit_with_write_bloc" src="2" dest="0.2" />171 153 172 154 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> … … 178 160 179 161 <link name="table_dispatch" src="0.0.0" dest="1" /> 180 <link name="table_dispatch" src="0.0.1" dest="1" /> 181 <link name="table_dispatch" src="0.0.2" dest="1" /> 182 <link name="table_dispatch" src="0.1.0" dest="1" /> 162 <link name="table_dispatch" src="0.0.1" dest="0" /> 163 <link name="table_dispatch" src="0.1.0" dest="0" /> 183 164 <link name="table_dispatch" src="0.1.1" dest="1" /> 184 <link name="table_dispatch" src="0.1.2" dest="1" />185 165 186 166 <link name="link_read_bloc_and_load_store_unit" src="0.0" dest="1" /> 187 167 <link name="link_read_bloc_and_load_store_unit" src="1.0" dest="0" /> 188 <link name="link_read_bloc_and_load_store_unit" src="2.0" dest="0" />189 168 190 169 <link name="link_read_bloc_and_functionnal_unit" src="0.0" dest="0" /> 191 <link name="link_read_bloc_and_functionnal_unit" src="0.1" dest="0" />192 170 <link name="link_read_bloc_and_functionnal_unit" src="1.0" dest="1" /> 193 <link name="link_read_bloc_and_functionnal_unit" src="1.1" dest="0" /> 194 <link name="link_read_bloc_and_functionnal_unit" src="2.0" dest="0" /> 195 <link name="link_read_bloc_and_functionnal_unit" src="2.1" dest="1" /> 196 171 197 172 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> 198 173 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="1" /> 199 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="1" />200 174 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="1" /> 201 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="1" />202 175 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 203 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest="1" />204 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="1" />205 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" />206 176 207 177 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> 208 <link name="link_thread_and_functionnal_unit" src="0.1" dest="1" />209 178 210 179 </core> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_2.cfg
r117 r118 17 17 <decod_bloc id="0"> 18 18 <parameter name="size_decod_queue" value="8" /> 19 <parameter name="decod_queue_scheme" value=" 0" />19 <parameter name="decod_queue_scheme" value="1" /> 20 20 <parameter name="nb_inst_decod" value="2" /> 21 21 <parameter name="nb_context_select" value="1" /> … … 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 … … 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 <parameter name="nb_bypass_write" value="0" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_3.cfg
r117 r118 17 17 <decod_bloc id="0"> 18 18 <parameter name="size_decod_queue" value="8" /> 19 <parameter name="decod_queue_scheme" value=" 0" />19 <parameter name="decod_queue_scheme" value="1" /> 20 20 <parameter name="nb_inst_decod" value="2" /> 21 21 <parameter name="nb_context_select" value="1" /> … … 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 <write_bloc id="0,1,2 ,3">44 <write_bloc id="0,1,2"> 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 <parameter name="nb_bypass_write" value="0" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 124 125 <execute_loop id="0"> 125 126 <parameter name="nb_read_unit" value="3" /> 126 <parameter name="nb_write_unit" value=" 4" />127 <parameter name="nb_write_unit" value="3" /> 127 128 <parameter name="nb_gpr_bank" value="2" /> 128 129 <parameter name="nb_gpr_port_read_by_bank" value="2" /> … … 170 171 <link name="link_write_unit_with_write_bloc" src="1" dest="0.1" /> 171 172 <link name="link_write_unit_with_write_bloc" src="2" dest="0.2" /> 172 <link name="link_write_unit_with_write_bloc" src="3" dest="0.3" />173 173 174 174 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> … … 200 200 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="1" /> 201 201 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="1" /> 202 <link name="link_write_bloc_and_load_store_unit" src="3.0" dest="1" /> 202 203 203 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="1" /> 204 204 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="1" /> … … 207 207 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="1" /> 208 208 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" /> 209 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest="1" />210 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="1" />211 209 212 210 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_4.cfg
r117 r118 17 17 <decod_bloc id="0"> 18 18 <parameter name="size_decod_queue" value="8" /> 19 <parameter name="decod_queue_scheme" value=" 0" />19 <parameter name="decod_queue_scheme" value="1" /> 20 20 <parameter name="nb_inst_decod" value="2" /> 21 21 <parameter name="nb_context_select" value="1" /> … … 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 <write_bloc id="0,1,2,3 ,4,5">44 <write_bloc id="0,1,2,3"> 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 <parameter name="nb_bypass_write" value="0" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 124 125 <execute_loop id="0"> 125 126 <parameter name="nb_read_unit" value="4" /> 126 <parameter name="nb_write_unit" value=" 6" />127 <parameter name="nb_write_unit" value="4" /> 127 128 <parameter name="nb_gpr_bank" value="2" /> 128 129 <parameter name="nb_gpr_port_read_by_bank" value="2" /> … … 175 176 <link name="link_write_unit_with_write_bloc" src="2" dest="0.2" /> 176 177 <link name="link_write_unit_with_write_bloc" src="3" dest="0.3" /> 177 <link name="link_write_unit_with_write_bloc" src="4" dest="0.4" />178 <link name="link_write_unit_with_write_bloc" src="5" dest="0.5" />179 178 180 179 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> … … 213 212 214 213 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> 215 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest=" 1" />214 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="0" /> 216 215 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="0" /> 217 216 <link name="link_write_bloc_and_load_store_unit" src="3.0" dest="0" /> 218 <link name="link_write_bloc_and_load_store_unit" src="4.0" dest="0" />219 <link name="link_write_bloc_and_load_store_unit" src="5.0" dest="0" />220 217 221 218 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="0" /> 222 219 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="0" /> 223 220 <link name="link_write_bloc_and_functionnal_unit" src="0.2" dest="0" /> 224 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest=" 0" />225 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest=" 0" />226 <link name="link_write_bloc_and_functionnal_unit" src="1.2" dest=" 0" />221 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 222 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest="1" /> 223 <link name="link_write_bloc_and_functionnal_unit" src="1.2" dest="1" /> 227 224 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="1" /> 228 225 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" /> … … 231 228 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="1" /> 232 229 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest="1" /> 233 <link name="link_write_bloc_and_functionnal_unit" src="4.0" dest="1" />234 <link name="link_write_bloc_and_functionnal_unit" src="4.1" dest="1" />235 <link name="link_write_bloc_and_functionnal_unit" src="4.2" dest="1" />236 <link name="link_write_bloc_and_functionnal_unit" src="5.0" dest="1" />237 <link name="link_write_bloc_and_functionnal_unit" src="5.1" dest="1" />238 <link name="link_write_bloc_and_functionnal_unit" src="5.2" dest="1" />239 230 240 231 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_1.cfg
r117 r118 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 <write_bloc id="0,1,2,3 ,4,5,6">44 <write_bloc id="0,1,2,3"> 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 <parameter name="nb_bypass_write" value="0" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 88 89 <parameter name="btb_size_counter" value="2" /> 89 90 <parameter name="btb_victim_scheme" value="3" /> 90 <parameter name="dir_predictor_scheme" value=" 4" />91 <parameter name="dir_predictor_scheme" value="2" /> 91 92 92 93 <predictor id="0"> … … 122 123 <parameter name="nb_inst_reexecute" value="1" /> 123 124 <parameter name="nb_inst_commit" value="4" /> 124 <parameter name="nb_inst_branch_complete" value=" 1" />125 <parameter name="nb_inst_branch_complete" value="2" /> 125 126 <parameter name="nb_rename_unit_select" value="1" /> 126 127 <parameter name="nb_execute_loop_select" value="1" /> … … 129 130 <parameter name="commit_priority" value="1" /> 130 131 <parameter name="commit_load_balancing" value="1" /> 131 <parameter name="size_issue_queue" value=" 8" />132 <parameter name="size_issue_queue" value="16" /> 132 133 <parameter name="nb_issue_queue_bank" value="4" /> 133 134 <parameter name="issue_queue_scheme" value="0" /> … … 141 142 <execute_loop id="0"> 142 143 <parameter name="nb_read_unit" value="4" /> 143 <parameter name="nb_write_unit" value=" 7" />144 <parameter name="nb_write_unit" value="4" /> 144 145 <parameter name="nb_execute_unit" value="4" /> 145 146 <parameter name="nb_gpr_bank" value="1" /> … … 177 178 <link name="link_write_unit_with_write_bloc" src="2" dest="0.2" /> 178 179 <link name="link_write_unit_with_write_bloc" src="3" dest="0.3" /> 179 <link name="link_write_unit_with_write_bloc" src="4" dest="0.4" />180 <link name="link_write_unit_with_write_bloc" src="5" dest="0.5" />181 <link name="link_write_unit_with_write_bloc" src="6" dest="0.6" />182 180 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> 183 181 <link name="link_rename_bloc_with_front_end" src="0" dest="0" /> … … 230 228 231 229 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> 232 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest=" 1" />230 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="0" /> 233 231 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="0" /> 234 232 <link name="link_write_bloc_and_load_store_unit" src="3.0" dest="0" /> 235 <link name="link_write_bloc_and_load_store_unit" src="4.0" dest="0" /> 236 <link name="link_write_bloc_and_load_store_unit" src="5.0" dest="0" /> 237 <link name="link_write_bloc_and_load_store_unit" src="6.0" dest="0" /> 233 238 234 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="0" /> 239 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest=" 0" />235 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 240 236 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="1" /> 241 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest="1" /> 242 <link name="link_write_bloc_and_functionnal_unit" src="4.0" dest="1" /> 243 <link name="link_write_bloc_and_functionnal_unit" src="5.0" dest="0" /> 244 <link name="link_write_bloc_and_functionnal_unit" src="6.0" dest="0" /> 237 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest="0" /> 238 245 239 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="0" /> 246 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest=" 0" />240 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest="1" /> 247 241 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" /> 248 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="1" /> 249 <link name="link_write_bloc_and_functionnal_unit" src="4.1" dest="1" /> 250 <link name="link_write_bloc_and_functionnal_unit" src="5.1" dest="0" /> 251 <link name="link_write_bloc_and_functionnal_unit" src="6.1" dest="0" /> 242 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="0" /> 243 252 244 <link name="link_write_bloc_and_functionnal_unit" src="0.2" dest="0" /> 253 245 <link name="link_write_bloc_and_functionnal_unit" src="1.2" dest="0" /> 254 246 <link name="link_write_bloc_and_functionnal_unit" src="2.2" dest="0" /> 255 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest="0" /> 256 <link name="link_write_bloc_and_functionnal_unit" src="4.2" dest="0" /> 257 <link name="link_write_bloc_and_functionnal_unit" src="5.2" dest="1" /> 258 <link name="link_write_bloc_and_functionnal_unit" src="6.2" dest="1" /> 247 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest="1" /> 259 248 260 249 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_2.cfg
r117 r118 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 1" />41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 <write_bloc id="0,1,2,3,4,5 ,6,7,8,9,10,11">44 <write_bloc id="0,1,2,3,4,5"> 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 <parameter name="nb_bypass_write" value="0" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 <parameter name="write_queue_scheme" value="1" /> 48 49 </write_bloc> 49 50 … … 88 89 <parameter name="btb_size_counter" value="2" /> 89 90 <parameter name="btb_victim_scheme" value="3" /> 90 <parameter name="dir_predictor_scheme" value=" 4" />91 <parameter name="dir_predictor_scheme" value="2" /> 91 92 92 93 <predictor id="0"> 93 <parameter name="dir_have_bht" value=" 0" />94 <parameter name="dir_bht_size_shifter" value=" 1" />94 <parameter name="dir_have_bht" value="1" /> 95 <parameter name="dir_bht_size_shifter" value="4" /> 95 96 <parameter name="dir_bht_nb_shifter" value="64" /> 96 97 <parameter name="dir_have_pht" value="1" /> 97 98 <parameter name="dir_pht_size_counter" value="2" /> 98 <parameter name="dir_pht_nb_counter" value=" 16" />99 <parameter name="dir_pht_nb_counter" value="64" /> 99 100 <parameter name="dir_pht_size_address_share" value="0" /> 100 101 </predictor> … … 105 106 <parameter name="dir_have_pht" value="1" /> 106 107 <parameter name="dir_pht_size_counter" value="2" /> 107 <parameter name="dir_pht_nb_counter" value=" 64" />108 <parameter name="dir_pht_nb_counter" value="128" /> 108 109 <parameter name="dir_pht_size_address_share" value="0" /> 109 110 </predictor> … … 122 123 <parameter name="nb_inst_reexecute" value="1" /> 123 124 <parameter name="nb_inst_commit" value="4" /> 124 <parameter name="nb_inst_branch_complete" value=" 1" />125 <parameter name="nb_inst_branch_complete" value="2" /> 125 126 <parameter name="nb_rename_unit_select" value="1" /> 126 127 <parameter name="nb_execute_loop_select" value="1" /> 127 <parameter name="size_re_order_buffer" value=" 64"/>128 <parameter name="size_re_order_buffer" value="128"/> 128 129 <parameter name="nb_re_order_buffer_bank" value="64" /> 129 130 <parameter name="commit_priority" value="1" /> 130 131 <parameter name="commit_load_balancing" value="1" /> 131 <parameter name="size_issue_queue" value=" 8" />132 <parameter name="size_issue_queue" value="16" /> 132 133 <parameter name="nb_issue_queue_bank" value="4" /> 133 134 <parameter name="issue_queue_scheme" value="0" /> … … 141 142 <execute_loop id="0"> 142 143 <parameter name="nb_read_unit" value="6" /> 143 <parameter name="nb_write_unit" value=" 12"/>144 <parameter name="nb_write_unit" value="6" /> 144 145 <parameter name="nb_execute_unit" value="6" /> 145 146 <parameter name="nb_gpr_bank" value="1" /> … … 183 184 <link name="link_write_unit_with_write_bloc" src="4" dest="0.4" /> 184 185 <link name="link_write_unit_with_write_bloc" src="5" dest="0.5" /> 185 <link name="link_write_unit_with_write_bloc" src="6" dest="0.6" />186 <link name="link_write_unit_with_write_bloc" src="7" dest="0.7" />187 <link name="link_write_unit_with_write_bloc" src="8" dest="0.8" />188 <link name="link_write_unit_with_write_bloc" src="9" dest="0.9" />189 <link name="link_write_unit_with_write_bloc" src="10" dest="0.10"/>190 <link name="link_write_unit_with_write_bloc" src="11" dest="0.11"/>191 186 192 187 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> … … 273 268 274 269 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> 275 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest=" 1" />270 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="0" /> 276 271 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="0" /> 277 272 <link name="link_write_bloc_and_load_store_unit" src="3.0" dest="0" /> 278 273 <link name="link_write_bloc_and_load_store_unit" src="4.0" dest="0" /> 279 274 <link name="link_write_bloc_and_load_store_unit" src="5.0" dest="0" /> 280 <link name="link_write_bloc_and_load_store_unit" src="6.0" dest="0" />281 <link name="link_write_bloc_and_load_store_unit" src="7.0" dest="0" />282 <link name="link_write_bloc_and_load_store_unit" src="8.0" dest="0" />283 <link name="link_write_bloc_and_load_store_unit" src="9.0" dest="0" />284 <link name="link_write_bloc_and_load_store_unit" src="10.0" dest="0" />285 <link name="link_write_bloc_and_load_store_unit" src="11.0" dest="0" />286 275 287 276 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="0" /> 288 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest=" 0" />289 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest=" 1" />290 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest=" 1" />277 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 278 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="0" /> 279 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest="0" /> 291 280 <link name="link_write_bloc_and_functionnal_unit" src="4.0" dest="0" /> 292 281 <link name="link_write_bloc_and_functionnal_unit" src="5.0" dest="0" /> 293 <link name="link_write_bloc_and_functionnal_unit" src="6.0" dest="0" />294 <link name="link_write_bloc_and_functionnal_unit" src="7.0" dest="0" />295 <link name="link_write_bloc_and_functionnal_unit" src="8.0" dest="0" />296 <link name="link_write_bloc_and_functionnal_unit" src="9.0" dest="0" />297 <link name="link_write_bloc_and_functionnal_unit" src="10.0" dest="0" />298 <link name="link_write_bloc_and_functionnal_unit" src="11.0" dest="0" />299 282 300 283 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="0" /> 301 284 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest="0" /> 302 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest=" 0" />303 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest=" 0" />285 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" /> 286 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="1" /> 304 287 <link name="link_write_bloc_and_functionnal_unit" src="4.1" dest="1" /> 305 288 <link name="link_write_bloc_and_functionnal_unit" src="5.1" dest="1" /> 306 <link name="link_write_bloc_and_functionnal_unit" src="6.1" dest="1" /> 307 <link name="link_write_bloc_and_functionnal_unit" src="7.1" dest="1" /> 308 <link name="link_write_bloc_and_functionnal_unit" src="8.1" dest="1" /> 309 <link name="link_write_bloc_and_functionnal_unit" src="9.1" dest="1" /> 310 <link name="link_write_bloc_and_functionnal_unit" src="10.1" dest="1" /> 311 <link name="link_write_bloc_and_functionnal_unit" src="11.1" dest="1" /> 289 312 290 <link name="link_write_bloc_and_functionnal_unit" src="0.2" dest="0" /> 313 291 <link name="link_write_bloc_and_functionnal_unit" src="1.2" dest="0" /> 314 <link name="link_write_bloc_and_functionnal_unit" src="2.2" dest=" 0" />315 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest=" 0" />292 <link name="link_write_bloc_and_functionnal_unit" src="2.2" dest="1" /> 293 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest="1" /> 316 294 <link name="link_write_bloc_and_functionnal_unit" src="4.2" dest="1" /> 317 295 <link name="link_write_bloc_and_functionnal_unit" src="5.2" dest="1" /> 318 <link name="link_write_bloc_and_functionnal_unit" src="6.2" dest="1" /> 319 <link name="link_write_bloc_and_functionnal_unit" src="7.2" dest="1" /> 320 <link name="link_write_bloc_and_functionnal_unit" src="8.2" dest="1" /> 321 <link name="link_write_bloc_and_functionnal_unit" src="9.2" dest="1" /> 322 <link name="link_write_bloc_and_functionnal_unit" src="10.2" dest="1" /> 323 <link name="link_write_bloc_and_functionnal_unit" src="11.2" dest="1" /> 296 324 297 <link name="link_write_bloc_and_functionnal_unit" src="0.3" dest="0" /> 325 298 <link name="link_write_bloc_and_functionnal_unit" src="1.3" dest="0" /> 326 <link name="link_write_bloc_and_functionnal_unit" src="2.3" dest=" 0" />327 <link name="link_write_bloc_and_functionnal_unit" src="3.3" dest=" 0" />299 <link name="link_write_bloc_and_functionnal_unit" src="2.3" dest="1" /> 300 <link name="link_write_bloc_and_functionnal_unit" src="3.3" dest="1" /> 328 301 <link name="link_write_bloc_and_functionnal_unit" src="4.3" dest="1" /> 329 302 <link name="link_write_bloc_and_functionnal_unit" src="5.3" dest="1" /> 330 <link name="link_write_bloc_and_functionnal_unit" src="6.3" dest="1" /> 331 <link name="link_write_bloc_and_functionnal_unit" src="7.3" dest="1" /> 332 <link name="link_write_bloc_and_functionnal_unit" src="8.3" dest="1" /> 333 <link name="link_write_bloc_and_functionnal_unit" src="9.3" dest="1" /> 334 <link name="link_write_bloc_and_functionnal_unit" src="10.3" dest="1" /> 335 <link name="link_write_bloc_and_functionnal_unit" src="11.3" dest="1" /> 303 336 304 <link name="link_write_bloc_and_functionnal_unit" src="0.4" dest="0" /> 337 305 <link name="link_write_bloc_and_functionnal_unit" src="1.4" dest="0" /> 338 <link name="link_write_bloc_and_functionnal_unit" src="2.4" dest=" 0" />339 <link name="link_write_bloc_and_functionnal_unit" src="3.4" dest=" 0" />306 <link name="link_write_bloc_and_functionnal_unit" src="2.4" dest="1" /> 307 <link name="link_write_bloc_and_functionnal_unit" src="3.4" dest="1" /> 340 308 <link name="link_write_bloc_and_functionnal_unit" src="4.4" dest="1" /> 341 309 <link name="link_write_bloc_and_functionnal_unit" src="5.4" dest="1" /> 342 <link name="link_write_bloc_and_functionnal_unit" src="6.4" dest="1" />343 <link name="link_write_bloc_and_functionnal_unit" src="7.4" dest="1" />344 <link name="link_write_bloc_and_functionnal_unit" src="8.4" dest="1" />345 <link name="link_write_bloc_and_functionnal_unit" src="9.4" dest="1" />346 <link name="link_write_bloc_and_functionnal_unit" src="10.4" dest="1" />347 <link name="link_write_bloc_and_functionnal_unit" src="11.4" dest="1" />348 310 349 311 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_0.cfg
r117 r118 46 46 <parameter name="size_execute_queue" value="1" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="0" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_1.cfg
r117 r118 46 46 <parameter name="size_execute_queue" value="2" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="0" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_2.cfg
r117 r118 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="0" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_3.cfg
r117 r118 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="0" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x2_w1_4.cfg
r117 r118 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 <parameter name="write_queue_scheme" value="0" /> 48 49 </write_bloc> 49 50 -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen
r117 r118 6 6 <parameter name="dispatch_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 7 7 8 <parameter name="nb_icache_port" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />8 <parameter name="nb_icache_port" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 9 9 <parameter name="icache_port_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 10 10 <parameter name="icache_port_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 11 11 12 <parameter name="nb_dcache_port" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />12 <parameter name="nb_dcache_port" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 13 13 <parameter name="dcache_port_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 14 14 <parameter name="dcache_port_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 15 15 16 16 <parameter name="nb_thread" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 17 <parameter name="size_ifetch_queue" min="1" max=" 32" step="* 2" default="2" level="..." description="..." />18 <parameter name="nb_inst_fetch" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />17 <parameter name="size_ifetch_queue" min="1" max="64" step="* 2" default="2" level="..." description="..." /> 18 <parameter name="nb_inst_fetch" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 19 19 <parameter name="implement_group" default="0" level="..." description="..." /> 20 <parameter name="ras_size_queue" min="2" max=" 8"step="* 2" default="2" level="..." description="..." />21 <parameter name="upt_size_queue" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />22 <parameter name="ufpt_size_queue" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />20 <parameter name="ras_size_queue" min="2" max="16" step="* 2" default="2" level="..." description="..." /> 21 <parameter name="upt_size_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 22 <parameter name="ufpt_size_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 23 23 24 24 <parameter name="nb_decod_bloc" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 25 25 <parameter name="size_decod_queue" min="1" max="32" step="+ 1" default="2" level="..." description="..." /> 26 26 <parameter name="decod_queue_scheme" min="0" max="1" step="+ 1" default="0" level="..." description="0 : one_fifo, 1 : multi_fifo" /> 27 <parameter name="nb_inst_decod" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />27 <parameter name="nb_inst_decod" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 28 28 <parameter name="nb_context_select" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 29 29 <parameter name="context_select_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> … … 31 31 32 32 <parameter name="nb_rename_bloc" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 33 <parameter name="nb_inst_insert" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />34 <parameter name="nb_inst_retire" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />33 <parameter name="nb_inst_insert" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 34 <parameter name="nb_inst_retire" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 35 35 <parameter name="rename_select_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 36 36 <parameter name="rename_select_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> … … 38 38 <parameter name="nb_general_register" min="64" max="1024" step="* 2" default="64" level="..." description="..." /> 39 39 <parameter name="nb_special_register" min="4" max="512" step="* 2" default="4" level="..." description="..." /> 40 <parameter name="nb_reg_free" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />41 <parameter name="nb_rename_unit_bank" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />40 <parameter name="nb_reg_free" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 41 <parameter name="nb_rename_unit_bank" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 42 42 43 <parameter name="nb_read_bloc" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />44 <parameter name="size_read_queue" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />45 <parameter name="size_reservation_station" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />46 <parameter name="nb_inst_retire_reservation_station" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />43 <parameter name="nb_read_bloc" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 44 <parameter name="size_read_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 45 <parameter name="size_reservation_station" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 46 <parameter name="nb_inst_retire_reservation_station" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 47 47 48 <parameter name="nb_write_bloc" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />49 <parameter name="size_write_queue" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />50 <parameter name="size_execute_queue" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />51 <parameter name="nb_bypass_write" min="0" max=" 8"step="+ 1" default="0" level="..." description="..." />48 <parameter name="nb_write_bloc" min="1" max="32" step="* 2" default="1" level="..." description="..." /> 49 <parameter name="size_write_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 50 <parameter name="size_execute_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 51 <parameter name="nb_bypass_write" min="0" max="16" step="+ 1" default="0" level="..." description="..." /> 52 52 <parameter name="write_queue_scheme" min="0" max="1" step="+ 1" default="0" level="..." description="0 : Moore, 1 : Mealy" /> 53 53 54 <parameter name="nb_load_store_unit" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />54 <parameter name="nb_load_store_unit" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 55 55 <parameter name="size_store_queue" min="2" max="16" step="* 2" default="2" level="..." description="..." /> 56 56 <parameter name="size_load_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 57 57 <parameter name="size_speculative_access_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 58 <parameter name="nb_port_check" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />58 <parameter name="nb_port_check" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 59 59 <parameter name="speculative_load" min="0" max="3" step="+ 1" default="2" level="..." description="..." /> 60 <parameter name="nb_bypass_memory" min="0" max=" 8"step="+ 1" default="0" level="..." description="..." />61 <parameter name="nb_cache_port" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />62 <parameter name="nb_inst_memory" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />60 <parameter name="nb_bypass_memory" min="0" max="16" step="+ 1" default="0" level="..." description="..." /> 61 <parameter name="nb_cache_port" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 62 <parameter name="nb_inst_memory" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 63 63 64 <parameter name="nb_functionnal_unit" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />65 <parameter name="nb_inst_functionnal_unit" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />64 <parameter name="nb_functionnal_unit" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 65 <parameter name="nb_inst_functionnal_unit" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 66 66 67 67 <parameter name="nb_front_end" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 68 68 <parameter name="nb_context" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 69 69 <parameter name="nb_decod_unit" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 70 <parameter name="nb_inst_branch_predict" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />71 <parameter name="nb_inst_branch_decod" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />72 <parameter name="nb_inst_branch_update" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />70 <parameter name="nb_inst_branch_predict" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 71 <parameter name="nb_inst_branch_decod" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 72 <parameter name="nb_inst_branch_update" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 73 73 <parameter name="btb_size_queue" min="1" max="512" step="* 2" default="2" level="..." description="..." /> 74 <parameter name="btb_associativity" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />75 <parameter name="btb_size_counter" min="2" max=" 8"step="* 2" default="2" level="..." description="..." />74 <parameter name="btb_associativity" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 75 <parameter name="btb_size_counter" min="2" max="16" step="* 2" default="2" level="..." description="..." /> 76 76 <parameter name="btb_victim_scheme" min="0" max="5" step="+ 1" default="1" level="..." description="0 : Random, 1 : Round Robin, 2 : Not Last Used, 3 : Pseudo LRU, 4 : Least Recently Used, 5 : FIFO" /> 77 77 <parameter name="dir_predictor_scheme" min="0" max="8" step="+ 1" default="1" level="..." description="0 : Never take, 1 : Always Take, 2 : Static, 3 : Last Take, 4 : Counter, 5 : Local predictor, 6 : Global predictor, 7 : Meta predictor, 8 : Custom predictor" /> … … 86 86 <parameter name="nb_ooo_engine" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 87 87 <parameter name="nb_rename_unit" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 88 <parameter name="nb_inst_issue" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />89 <parameter name="nb_inst_reexecute" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />90 <parameter name="nb_inst_commit" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />91 <parameter name="nb_inst_branch_complete" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />92 <parameter name="nb_rename_unit_select" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />88 <parameter name="nb_inst_issue" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 89 <parameter name="nb_inst_reexecute" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 90 <parameter name="nb_inst_commit" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 91 <parameter name="nb_inst_branch_complete" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 92 <parameter name="nb_rename_unit_select" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 93 93 <parameter name="nb_execute_loop_select" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 94 94 <parameter name="size_re_order_buffer" min="1" max="256" step="* 2" default="1" level="..." description="..." /> … … 96 96 <parameter name="commit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 97 97 <parameter name="commit_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 98 <parameter name="size_issue_queue" min="1" max=" 32" step="* 2" default="2" level="..." description="..." />99 <parameter name="nb_issue_queue_bank" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />98 <parameter name="size_issue_queue" min="1" max="64" step="* 2" default="2" level="..." description="..." /> 99 <parameter name="nb_issue_queue_bank" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 100 100 <parameter name="issue_queue_scheme" min="0" max="1" step="+ 1" default="0" level="..." description="0 : in_order, 1 : in_bundle_order, 2 : out_of_order" /> 101 101 <parameter name="issue_priority" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 102 102 <parameter name="issue_load_balancing" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 103 <parameter name="size_reexecute_queue" min="1" max=" 8"step="* 2" default="2" level="..." description="..." />103 <parameter name="size_reexecute_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 104 104 <parameter name="reexecute_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 105 105 <parameter name="reexecute_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 106 106 107 107 <parameter name="nb_execute_loop" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 108 <parameter name="nb_read_unit" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />109 <parameter name="nb_execute_unit" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />110 <parameter name="nb_write_unit" min="1" max=" 16" step="+ 1" default="1" level="..." description="..." />111 <parameter name="nb_gpr_bank" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />112 <parameter name="nb_gpr_port_read_by_bank" min="1" max=" 16" step="+ 1" default="1" level="..." description="..." />113 <parameter name="nb_gpr_port_write_by_bank" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />114 <parameter name="nb_spr_bank" min="1" max=" 8"step="* 2" default="1" level="..." description="..." />115 <parameter name="nb_spr_port_read_by_bank" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />116 <parameter name="nb_spr_port_write_by_bank" min="1" max=" 8"step="+ 1" default="1" level="..." description="..." />108 <parameter name="nb_read_unit" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 109 <parameter name="nb_execute_unit" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 110 <parameter name="nb_write_unit" min="1" max="32" step="+ 1" default="1" level="..." description="..." /> 111 <parameter name="nb_gpr_bank" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 112 <parameter name="nb_gpr_port_read_by_bank" min="1" max="32" step="+ 1" default="1" level="..." description="..." /> 113 <parameter name="nb_gpr_port_write_by_bank" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 114 <parameter name="nb_spr_bank" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 115 <parameter name="nb_spr_port_read_by_bank" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 116 <parameter name="nb_spr_port_write_by_bank" min="1" max="16" step="+ 1" default="1" level="..." description="..." /> 117 117 <parameter name="execution_unit_to_write_unit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 118 118 <parameter name="read_unit_to_execution_unit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim
r117 r118 11 11 <parameter name="use_information" value="0" /> 12 12 <parameter name="use_header" value="0" /> 13 14 <parameter name="directory_statistics" value="." /> 15 <parameter name="directory_vhdl" value="." /> 16 <parameter name="directory_position" value="." /> 17 <parameter name="directory_log" value="/dsk/l1/misc/Morpheo/log/" /> 13 18 14 19 <parameter name="statistics_cycle_start" value="5" /> … … 17 22 <parameter name="simulation_nb_cycle" value="1000000000"/> 18 23 <parameter name="simulation_nb_instruction" value="0" /> 19 20 <parameter name="directory_statistics" value="." />21 <parameter name="directory_vhdl" value="." />22 <parameter name="directory_position" value="." />23 <parameter name="directory_log" value="/dsk/l1/misc/Morpheo/log/" />24 24 25 25 <parameter name="debug_level" value="0" /> -
trunk/IPs/systemC/processor/Morpheo/Files/debug.sim
r117 r118 11 11 <parameter name="use_information" value="0" /> 12 12 <parameter name="use_header" value="0" /> 13 14 <parameter name="directory_statistics" value="." /> 15 <parameter name="directory_vhdl" value="." /> 16 <parameter name="directory_position" value="." /> 17 <parameter name="directory_log" value="/dsk/l1/misc/Morpheo/log/" /> 13 18 14 19 <parameter name="statistics_cycle_start" value="5" /> 15 20 <parameter name="statistics_period" value="0" /> 16 21 17 <parameter name="simulation_nb_cycle" value=" 100000" />22 <parameter name="simulation_nb_cycle" value="500000" /> 18 23 <parameter name="simulation_nb_instruction" value="0" /> 19 24 20 <parameter name="directory_statistics" value="." />21 <parameter name="directory_vhdl" value="." />22 <parameter name="directory_position" value="." />23 <parameter name="directory_log" value="." />24 25 25 <parameter name="debug_level" value="0" /> 26 <parameter name="debug_cycle_start" value=" 000"/>27 <parameter name="debug_cycle_stop" value=" 100"/>26 <parameter name="debug_cycle_start" value="4900" /> 27 <parameter name="debug_cycle_stop" value="5050" /> 28 28 <parameter name="debug_have_log_file" value="0" /> 29 29 <parameter name="debug_idle_cycle" value="1000" /> 30 30 <parameter name="debug_idle_time" value="10" /> 31 31 32 <component name="Comparator" model="systemc" debug=" 0" />33 <component name="Counter" model="systemc" debug=" 0" />34 <component name="Divider" model="systemc" debug=" 0" />35 <component name="Multiplier" model="systemc" debug=" 0" />36 <component name="Priority" model="systemc" debug=" 0" />37 <component name="Queue_Control" model="systemc" debug=" 0" />38 <component name="Queue" model="systemc" debug=" 0" />39 <component name="RegisterFile_Monolithic" model="systemc" debug=" 0" />40 <component name="RegisterFile_Multi_Banked" model="systemc" debug=" 0" />41 <component name="RegisterFile" model="systemc" debug=" 0" />42 <component name="Select_Priority_Fixed" model="systemc" debug=" 0" />43 <component name="Select" model="systemc" debug=" 0" />44 <component name="Shifter" model="systemc" debug=" 0" />45 <component name="Sort" model="systemc" debug=" 0" />46 <component name="Victim_Pseudo_LRU" model="systemc" debug=" 0" />47 <component name="Victim" model="systemc" debug=" 0" />48 <component name="Execute_loop_Glue" model="systemc" debug=" 0" />49 <component name="Functionnal_unit" model="systemc" debug=" 0" />50 <component name="Load_store_unit" model="systemc" debug=" 0" />51 <component name="Read_queue" model="systemc" debug=" 0" />52 <component name="Reservation_station" model="systemc" debug=" 0" />53 <component name="Read_unit" model="systemc" debug=" 0" />54 <component name="Execute_queue" model="systemc" debug=" 0" />55 <component name="Write_queue" model="systemc" debug=" 0" />56 <component name="Write_unit" model="systemc" debug=" 0" />57 <component name="Execution_unit_to_Write_unit" model="systemc" debug=" 0" />58 <component name="Read_unit_to_Execution_unit" model="systemc" debug=" 0" />59 <component name="Register_unit_Glue" model="systemc" debug=" 0" />60 <component name="Register_unit" model="systemc" debug=" 0" />61 <component name="Execute_loop" model="systemc" debug=" 0" />62 <component name="Commit_unit" model="systemc" debug=" 0" />63 <component name="Issue_queue" model="systemc" debug=" 0" />64 <component name="OOO_Engine_Glue" model="systemc" debug=" 0" />65 <component name="Reexecute_unit" model="systemc" debug=" 0" />66 <component name="Load_Store_pointer_unit" model="systemc" debug=" 0" />67 <component name="Dependency_checking_unit" model="systemc" debug=" 0" />68 <component name="Free_List_unit" model="systemc" debug=" 0" />69 <component name="Register_Address_Translation_unit" model="systemc" debug=" 0" />70 <component name="Register_translation_unit_Glue" model="systemc" debug=" 0" />71 <component name="Stat_List_unit" model="systemc" debug=" 0" />72 <component name="Register_translation_unit" model="systemc" debug=" 0" />73 <component name="Rename_unit_Glue" model="systemc" debug=" 0" />74 <component name="Rename_select" model="systemc" debug=" 0" />75 <component name="Rename_unit" model="systemc" debug=" 0" />76 <component name="Special_Register_unit" model="systemc" debug=" 0" />77 <component name="OOO_Engine" model="systemc" debug=" 0" />78 <component name="Context_State" model="systemc" debug=" 0" />79 <component name="Decod" model="systemc" debug=" 0" />80 <component name="Decod_queue" model="systemc" debug=" 0" />81 <component name="Decod_unit" model="systemc" debug=" 0" />82 <component name="Front_end_Glue" model="systemc" debug=" 0" />83 <component name="Address_management" model="systemc" debug=" 0" />84 <component name="Ifetch_queue" model="systemc" debug=" 0" />85 <component name="Ifetch_unit_Glue" model="systemc" debug=" 0" />86 <component name="Ifetch_unit" model="systemc" debug=" 0" />87 <component name="Branch_Target_Buffer_Glue" model="systemc" debug=" 0" />88 <component name="Branch_Target_Buffer_Register" model="systemc" debug=" 0" />89 <component name="Branch_Target_Buffer" model="systemc" debug=" 0" />90 <component name="Direction_Glue" model="systemc" debug=" 0" />91 <component name="Direction" model="systemc" debug=" 0" />92 <component name="Prediction_unit_Glue" model="systemc" debug=" 0" />93 <component name="Return_Address_Stack" model="systemc" debug=" 0" />94 <component name="Update_Prediction_Table" model="systemc" debug=" 0" />95 <component name="Prediction_unit" model="systemc" debug=" 0" />96 <component name="Front_end" model="systemc" debug=" 0" />97 <component name="Icache_Access" model="systemc" debug=" 0" />98 <component name="Dcache_Access" model="systemc" debug=" 0" />99 <component name="Core_Glue" model="systemc" debug=" 0" />100 <component name="Core" model="systemc" debug=" 0" />101 <component name="TopLevel" model="systemc" debug=" 0" />32 <component name="Comparator" model="systemc" debug="1" /> 33 <component name="Counter" model="systemc" debug="1" /> 34 <component name="Divider" model="systemc" debug="1" /> 35 <component name="Multiplier" model="systemc" debug="1" /> 36 <component name="Priority" model="systemc" debug="1" /> 37 <component name="Queue_Control" model="systemc" debug="1" /> 38 <component name="Queue" model="systemc" debug="1" /> 39 <component name="RegisterFile_Monolithic" model="systemc" debug="1" /> 40 <component name="RegisterFile_Multi_Banked" model="systemc" debug="1" /> 41 <component name="RegisterFile" model="systemc" debug="1" /> 42 <component name="Select_Priority_Fixed" model="systemc" debug="1" /> 43 <component name="Select" model="systemc" debug="1" /> 44 <component name="Shifter" model="systemc" debug="1" /> 45 <component name="Sort" model="systemc" debug="1" /> 46 <component name="Victim_Pseudo_LRU" model="systemc" debug="1" /> 47 <component name="Victim" model="systemc" debug="1" /> 48 <component name="Execute_loop_Glue" model="systemc" debug="1" /> 49 <component name="Functionnal_unit" model="systemc" debug="1" /> 50 <component name="Load_store_unit" model="systemc" debug="1" /> 51 <component name="Read_queue" model="systemc" debug="1" /> 52 <component name="Reservation_station" model="systemc" debug="1" /> 53 <component name="Read_unit" model="systemc" debug="1" /> 54 <component name="Execute_queue" model="systemc" debug="1" /> 55 <component name="Write_queue" model="systemc" debug="1" /> 56 <component name="Write_unit" model="systemc" debug="1" /> 57 <component name="Execution_unit_to_Write_unit" model="systemc" debug="1" /> 58 <component name="Read_unit_to_Execution_unit" model="systemc" debug="1" /> 59 <component name="Register_unit_Glue" model="systemc" debug="1" /> 60 <component name="Register_unit" model="systemc" debug="1" /> 61 <component name="Execute_loop" model="systemc" debug="1" /> 62 <component name="Commit_unit" model="systemc" debug="1" /> 63 <component name="Issue_queue" model="systemc" debug="1" /> 64 <component name="OOO_Engine_Glue" model="systemc" debug="1" /> 65 <component name="Reexecute_unit" model="systemc" debug="1" /> 66 <component name="Load_Store_pointer_unit" model="systemc" debug="1" /> 67 <component name="Dependency_checking_unit" model="systemc" debug="1" /> 68 <component name="Free_List_unit" model="systemc" debug="1" /> 69 <component name="Register_Address_Translation_unit" model="systemc" debug="1" /> 70 <component name="Register_translation_unit_Glue" model="systemc" debug="1" /> 71 <component name="Stat_List_unit" model="systemc" debug="1" /> 72 <component name="Register_translation_unit" model="systemc" debug="1" /> 73 <component name="Rename_unit_Glue" model="systemc" debug="1" /> 74 <component name="Rename_select" model="systemc" debug="1" /> 75 <component name="Rename_unit" model="systemc" debug="1" /> 76 <component name="Special_Register_unit" model="systemc" debug="1" /> 77 <component name="OOO_Engine" model="systemc" debug="1" /> 78 <component name="Context_State" model="systemc" debug="1" /> 79 <component name="Decod" model="systemc" debug="1" /> 80 <component name="Decod_queue" model="systemc" debug="1" /> 81 <component name="Decod_unit" model="systemc" debug="1" /> 82 <component name="Front_end_Glue" model="systemc" debug="1" /> 83 <component name="Address_management" model="systemc" debug="1" /> 84 <component name="Ifetch_queue" model="systemc" debug="1" /> 85 <component name="Ifetch_unit_Glue" model="systemc" debug="1" /> 86 <component name="Ifetch_unit" model="systemc" debug="1" /> 87 <component name="Branch_Target_Buffer_Glue" model="systemc" debug="1" /> 88 <component name="Branch_Target_Buffer_Register" model="systemc" debug="1" /> 89 <component name="Branch_Target_Buffer" model="systemc" debug="1" /> 90 <component name="Direction_Glue" model="systemc" debug="1" /> 91 <component name="Direction" model="systemc" debug="1" /> 92 <component name="Prediction_unit_Glue" model="systemc" debug="1" /> 93 <component name="Return_Address_Stack" model="systemc" debug="1" /> 94 <component name="Update_Prediction_Table" model="systemc" debug="1" /> 95 <component name="Prediction_unit" model="systemc" debug="1" /> 96 <component name="Front_end" model="systemc" debug="1" /> 97 <component name="Icache_Access" model="systemc" debug="1" /> 98 <component name="Dcache_Access" model="systemc" debug="1" /> 99 <component name="Core_Glue" model="systemc" debug="1" /> 100 <component name="Core" model="systemc" debug="1" /> 101 <component name="TopLevel" model="systemc" debug="1" /> 102 102 103 103 </parameters>
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