- Timestamp:
- May 21, 2009, 12:01:32 AM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop
- Files:
-
- 1 added
- 16 edited
- 1 moved
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Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h (modified) (1 diff)
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Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h (modified) (1 diff)
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Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp (modified) (1 diff)
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Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp (modified) (1 diff)
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Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp (modified) (1 diff)
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Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp (modified) (8 diffs)
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Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp (modified) (1 diff)
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Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (modified) (2 diffs)
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Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp (modified) (1 diff)
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Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h (modified) (1 diff)
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Multi_Write_unit/Write_unit/Write_queue/include/Types.h (modified) (2 diffs)
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Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h (modified) (1 diff)
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Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp (modified) (1 diff)
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Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp (modified) (1 diff)
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Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp (modified) (2 diffs)
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Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_bypass.cpp (added)
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Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp (moved) (moved from trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp) (1 diff)
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Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
r116 r118 40 40 namespace execute_unit { 41 41 namespace functionnal_unit { 42 43 42 44 43 class Functionnal_unit -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h
r116 r118 40 40 //public : uint32_t _size_load_queue ; 41 41 public : const Tfunctionnal_unit_scheme_t _functionnal_unit_scheme; 42 public : const bool _have_pipeline_in ; 42 43 43 44 public : execute_timing_t ** _timing ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp
r112 r118 104 104 if (usage_is_set(_usage,USE_SYSTEMC)) 105 105 { 106 if (_param->_have_pipeline_in) 106 107 _execute_operation_in = new execute_operation_t; 107 108 _execute_operation_out = new execute_operation_t; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
r115 r118 77 77 DELETE3(_execute_register,_param->_nb_context,_param->_nb_front_end,_param->_nb_ooo_engine); 78 78 DELETE0(_execute_param); 79 if (_param->_have_pipeline_in) 79 80 DELETE0(_execute_operation_in); 80 81 DELETE0(_execute_operation_out); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMealy.cpp
r117 r118 29 29 { 30 30 { 31 // Can out if : have an instruction and is finish (latence == 0) 31 32 internal_EXECUTE_OUT_VAL = (reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0)); 32 33 33 PORT_WRITE(out_EXECUTE_OUT_VAL 34 PORT_WRITE(out_EXECUTE_OUT_VAL, internal_EXECUTE_OUT_VAL); 34 35 } 35 36 36 37 { 38 // Can accept an instruction if : 39 // * pipeline in is not busy (not previous instruction) 40 // * pipeline in is busy ( previous instruction) and the instruction go to pipeline out 41 if (_param->_have_pipeline_in) 42 { 37 43 internal_EXECUTE_IN_ACK = (not reg_BUSY_IN or 38 44 (reg_BUSY_IN and (not reg_BUSY_OUT or 39 45 (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK))))); 40 41 PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK); 46 } 47 else 48 { 49 internal_EXECUTE_IN_ACK = (not reg_BUSY_OUT or 50 (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK))); 51 } 52 53 PORT_WRITE(out_EXECUTE_IN_ACK , internal_EXECUTE_IN_ACK); 42 54 } 43 55 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp
r117 r118 28 28 if (PORT_READ(in_NRESET) == 0) 29 29 { 30 if (_param->_have_pipeline_in) 30 31 reg_BUSY_IN = false; 31 32 reg_BUSY_OUT = false; … … 50 51 else 51 52 { 52 // Test if pop 53 // Test if pop an instruction 53 54 if (internal_EXECUTE_OUT_VAL and PORT_READ(in_EXECUTE_OUT_ACK)) 54 55 { 55 56 log_printf(TRACE,Functionnal_unit,FUNCTION," * EXECUTE_OUT : Transaction Accepted"); 56 // transaction57 57 reg_BUSY_OUT = false; 58 58 } 59 59 60 60 // Test if can move instruction in pipeline in to pipeline out 61 if (_param->_have_pipeline_in) 61 62 if (reg_BUSY_IN and not reg_BUSY_OUT) 62 63 { … … 87 88 } 88 89 89 90 91 90 // Test if push 92 91 execute_register_t * execute_register = NULL; … … 96 95 log_printf(TRACE,Functionnal_unit,FUNCTION," * EXECUTE_IN : Transaction Accepted"); 97 96 98 reg_BUSY_IN = true; 97 execute_operation_t * execute_operation; 98 99 if (_param->_have_pipeline_in) 100 { 101 reg_BUSY_IN = true; 102 execute_operation = _execute_operation_in; 103 } 104 else 105 { 106 reg_BUSY_OUT = true; 107 execute_operation = _execute_operation_out; 108 } 99 109 100 110 Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_EXECUTE_IN_CONTEXT_ID ):0; … … 104 114 Toperation_t operation = PORT_READ(in_EXECUTE_IN_OPERATION); 105 115 Ttype_t type = PORT_READ(in_EXECUTE_IN_TYPE); 106 107 _execute_operation_in->_context_id = context_id ;108 _execute_operation_in->_front_end_id = front_end_id ;109 _execute_operation_in->_ooo_engine_id = ooo_engine_id;110 _execute_operation_in->_packet_id = packet_id ;111 _execute_operation_in->_operation = operation ;112 _execute_operation_in->_type = type ;113 _execute_operation_in->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT);114 _execute_operation_in->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT );115 _execute_operation_in->_data_ra = PORT_READ(in_EXECUTE_IN_DATA_RA );116 _execute_operation_in->_data_rb = PORT_READ(in_EXECUTE_IN_DATA_RB );117 _execute_operation_in->_data_rc = PORT_READ(in_EXECUTE_IN_DATA_RC );118 _execute_operation_in->_write_rd = PORT_READ(in_EXECUTE_IN_WRITE_RD );119 _execute_operation_in->_num_reg_rd = PORT_READ(in_EXECUTE_IN_NUM_REG_RD );120 _execute_operation_in->_data_rd = 0; // no necessaray121 _execute_operation_in->_write_re = PORT_READ(in_EXECUTE_IN_WRITE_RE );122 _execute_operation_in->_num_reg_re = PORT_READ(in_EXECUTE_IN_NUM_REG_RE );123 _execute_operation_in->_data_re = 0; // no necessaray124 125 log_printf(TRACE,Functionnal_unit,FUNCTION," * context_id : %d", _execute_operation_in->_context_id );126 log_printf(TRACE,Functionnal_unit,FUNCTION," * front_end_id : %d", _execute_operation_in->_front_end_id );127 log_printf(TRACE,Functionnal_unit,FUNCTION," * ooo_engine_id : %d", _execute_operation_in->_ooo_engine_id);128 log_printf(TRACE,Functionnal_unit,FUNCTION," * packet_id : %d", _execute_operation_in->_packet_id );129 log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d", _execute_operation_in->_operation );130 log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString( _execute_operation_in->_type).c_str());131 log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d", _execute_operation_in->_has_immediat );132 log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x", _execute_operation_in->_immediat );133 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x", _execute_operation_in->_data_ra );134 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x", _execute_operation_in->_data_rb );135 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rc : %.8x", _execute_operation_in->_data_rc );136 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_rd : %d" , _execute_operation_in->_write_rd );137 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_rd : %d" , _execute_operation_in->_num_reg_rd );138 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_re : %d" , _execute_operation_in->_write_re );139 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_re : %d" , _execute_operation_in->_num_reg_re );116 117 execute_operation->_context_id = context_id ; 118 execute_operation->_front_end_id = front_end_id ; 119 execute_operation->_ooo_engine_id = ooo_engine_id; 120 execute_operation->_packet_id = packet_id ; 121 execute_operation->_operation = operation ; 122 execute_operation->_type = type ; 123 execute_operation->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT); 124 execute_operation->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT ); 125 execute_operation->_data_ra = PORT_READ(in_EXECUTE_IN_DATA_RA ); 126 execute_operation->_data_rb = PORT_READ(in_EXECUTE_IN_DATA_RB ); 127 execute_operation->_data_rc = PORT_READ(in_EXECUTE_IN_DATA_RC ); 128 execute_operation->_write_rd = PORT_READ(in_EXECUTE_IN_WRITE_RD ); 129 execute_operation->_num_reg_rd = PORT_READ(in_EXECUTE_IN_NUM_REG_RD ); 130 execute_operation->_data_rd = 0; // no necessaray 131 execute_operation->_write_re = PORT_READ(in_EXECUTE_IN_WRITE_RE ); 132 execute_operation->_num_reg_re = PORT_READ(in_EXECUTE_IN_NUM_REG_RE ); 133 execute_operation->_data_re = 0; // no necessaray 134 135 log_printf(TRACE,Functionnal_unit,FUNCTION," * context_id : %d",execute_operation->_context_id ); 136 log_printf(TRACE,Functionnal_unit,FUNCTION," * front_end_id : %d",execute_operation->_front_end_id ); 137 log_printf(TRACE,Functionnal_unit,FUNCTION," * ooo_engine_id : %d",execute_operation->_ooo_engine_id); 138 log_printf(TRACE,Functionnal_unit,FUNCTION," * packet_id : %d",execute_operation->_packet_id ); 139 log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d",execute_operation->_operation ); 140 log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString(execute_operation->_type).c_str()); 141 log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d",execute_operation->_has_immediat ); 142 log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x",execute_operation->_immediat ); 143 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_ra : %.8x",execute_operation->_data_ra ); 144 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rb : %.8x",execute_operation->_data_rb ); 145 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rc : %.8x",execute_operation->_data_rc ); 146 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_rd : %d" ,execute_operation->_write_rd ); 147 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_rd : %d" ,execute_operation->_num_reg_rd ); 148 log_printf(TRACE,Functionnal_unit,FUNCTION," * write_re : %d" ,execute_operation->_write_re ); 149 log_printf(TRACE,Functionnal_unit,FUNCTION," * num_reg_re : %d" ,execute_operation->_num_reg_re ); 140 150 141 151 #ifdef DEBUG_TEST … … 156 166 // ooo_engine_id,_param->_size_ooo_engine_id); 157 167 158 (*(_param->_get_custom_information()._get_custom_execute_genMoore(operation))) ( _execute_operation_in, execute_register, _execute_param);168 (*(_param->_get_custom_information()._get_custom_execute_genMoore(operation))) (execute_operation, execute_register, _execute_param); 159 169 } 160 170 else 161 (*(_function_execute[type][operation])) ( _execute_operation_in, execute_register, _execute_param);171 (*(_function_execute[type][operation])) (execute_operation, execute_register, _execute_param); 162 172 163 173 164 174 log_printf(TRACE,Functionnal_unit,FUNCTION," -----------------"); 165 log_printf(TRACE,Functionnal_unit,FUNCTION," * latence : %.8x", _execute_operation_in->_timing._latence);166 log_printf(TRACE,Functionnal_unit,FUNCTION," * delay : %.8x", _execute_operation_in->_timing._delay);167 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rd : %.8x", _execute_operation_in->_data_rd );168 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_re : %.8x", _execute_operation_in->_data_re );169 log_printf(TRACE,Functionnal_unit,FUNCTION," * exception : %d" , _execute_operation_in->_exception );170 log_printf(TRACE,Functionnal_unit,FUNCTION," * no_sequence : %d" , _execute_operation_in->_no_sequence);171 log_printf(TRACE,Functionnal_unit,FUNCTION," * address : %.8x (%.8x)", _execute_operation_in->_address,_execute_operation_in->_address<<2);175 log_printf(TRACE,Functionnal_unit,FUNCTION," * latence : %.8x",execute_operation->_timing._latence); 176 log_printf(TRACE,Functionnal_unit,FUNCTION," * delay : %.8x",execute_operation->_timing._delay); 177 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_rd : %.8x",execute_operation->_data_rd ); 178 log_printf(TRACE,Functionnal_unit,FUNCTION," * data_re : %.8x",execute_operation->_data_re ); 179 log_printf(TRACE,Functionnal_unit,FUNCTION," * exception : %d" ,execute_operation->_exception ); 180 log_printf(TRACE,Functionnal_unit,FUNCTION," * no_sequence : %d" ,execute_operation->_no_sequence); 181 log_printf(TRACE,Functionnal_unit,FUNCTION," * address : %.8x (%.8x)",execute_operation->_address,execute_operation->_address<<2); 172 182 173 183 #ifdef STATISTICS … … 175 185 { 176 186 (*_stat_use_functionnal_unit) ++; 177 (*_stat_sum_delay) += _execute_operation_in->_timing._delay;178 (*_stat_sum_latence) += _execute_operation_in->_timing._latence;187 (*_stat_sum_delay) += execute_operation->_timing._delay; 188 (*_stat_sum_latence) += execute_operation->_timing._latence; 179 189 } 180 190 #endif … … 213 223 if (reg_BUSY_OUT and (_execute_operation_out->_timing._latence > 0)) 214 224 _execute_operation_out->_timing._latence --; 225 226 #if defined(DEBUG) and DEBUG_Functionnal_unit and (DEBUG >= DEBUG_TRACE) 227 { 228 log_printf(TRACE,Functionnal_unit,FUNCTION," * Dump ALU (Functionnal_unit)"); 229 230 if (_param->_have_pipeline_in) 231 log_printf(TRACE,Functionnal_unit,FUNCTION," * reg_BUSY_IN : %d",reg_BUSY_IN ); 232 log_printf(TRACE,Functionnal_unit,FUNCTION," * reg_BUSY_OUT : %d",reg_BUSY_OUT); 233 } 234 #endif 215 235 } 216 236 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp
r116 r118 33 33 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), 34 34 bool is_toplevel): 35 _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE) 35 _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE), 36 _have_pipeline_in (false) 36 37 { 37 38 log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r117 r118 350 350 // find a entry that it need a check 351 351 Tlsq_ptr_t index_store = _load_queue[index_load]._store_queue_ptr_write; 352 Tlsq_ptr_t index_store_old = index_store;352 // Tlsq_ptr_t index_store_old = index_store; 353 353 354 354 // Init variable … … 1091 1091 _load_queue [packet_id]._exception = EXCEPTION_MEMORY_BUS_ERROR; 1092 1092 _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT; 1093 1094 1095 uint32_t i=_load_queue[packet_id]._store_queue_ptr_write; 1096 while (i!=reg_STORE_QUEUE_PTR_READ) 1097 { 1098 i=((i==0)?_param->_size_store_queue:i)-1; 1099 1100 #ifdef DEBUG 1101 if (reg_STORE_QUEUE_NB_CHECK [i] == 0) 1102 throw ERRORMORPHEO(FUNCTION,_("reg_STORE_QUEUE_NB_CHECK must be > 0\n")); 1103 #endif 1104 1105 reg_STORE_QUEUE_NB_CHECK [i] --; 1106 //i=(i+1)%_param->_size_store_queue; 1107 } 1093 1108 } 1094 1109 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
r98 r118 60 60 log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_control->nb_elt()); \ 61 61 for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ 62 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ 63 (*_queue_control)[it_dump], \ 64 _queue[(*_queue_control)[it_dump]]._context_id , \ 65 _queue[(*_queue_control)[it_dump]]._front_end_id , \ 66 _queue[(*_queue_control)[it_dump]]._ooo_engine_id , \ 67 _queue[(*_queue_control)[it_dump]]._rob_id , \ 68 _queue[(*_queue_control)[it_dump]]._type , \ 69 _queue[(*_queue_control)[it_dump]]._operation , \ 70 _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ 71 _queue[(*_queue_control)[it_dump]]._load_queue_ptr_write , \ 72 _queue[(*_queue_control)[it_dump]]._has_immediat , \ 73 _queue[(*_queue_control)[it_dump]]._immediat , \ 74 _queue[(*_queue_control)[it_dump]]._num_reg_ra , \ 75 _queue[(*_queue_control)[it_dump]]._data_ra_val , \ 76 _queue[(*_queue_control)[it_dump]]._data_ra , \ 77 _queue[(*_queue_control)[it_dump]]._num_reg_rb , \ 78 _queue[(*_queue_control)[it_dump]]._data_rb_val , \ 79 _queue[(*_queue_control)[it_dump]]._data_rb , \ 80 _queue[(*_queue_control)[it_dump]]._num_reg_rc , \ 81 _queue[(*_queue_control)[it_dump]]._data_rc_val , \ 82 _queue[(*_queue_control)[it_dump]]._data_rc , \ 83 _queue[(*_queue_control)[it_dump]]._write_rd , \ 84 _queue[(*_queue_control)[it_dump]]._num_reg_rd , \ 85 _queue[(*_queue_control)[it_dump]]._write_re , \ 86 _queue[(*_queue_control)[it_dump]]._num_reg_re , \ 87 toString(_queue[(*_queue_control)[it_dump]]._type).c_str()); \ 62 if (it_dump < _queue_control->nb_elt()) \ 63 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ 64 (*_queue_control)[it_dump], \ 65 _queue[(*_queue_control)[it_dump]]._context_id , \ 66 _queue[(*_queue_control)[it_dump]]._front_end_id , \ 67 _queue[(*_queue_control)[it_dump]]._ooo_engine_id , \ 68 _queue[(*_queue_control)[it_dump]]._rob_id , \ 69 _queue[(*_queue_control)[it_dump]]._type , \ 70 _queue[(*_queue_control)[it_dump]]._operation , \ 71 _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ 72 _queue[(*_queue_control)[it_dump]]._load_queue_ptr_write , \ 73 _queue[(*_queue_control)[it_dump]]._has_immediat , \ 74 _queue[(*_queue_control)[it_dump]]._immediat , \ 75 _queue[(*_queue_control)[it_dump]]._num_reg_ra , \ 76 _queue[(*_queue_control)[it_dump]]._data_ra_val , \ 77 _queue[(*_queue_control)[it_dump]]._data_ra , \ 78 _queue[(*_queue_control)[it_dump]]._num_reg_rb , \ 79 _queue[(*_queue_control)[it_dump]]._data_rb_val , \ 80 _queue[(*_queue_control)[it_dump]]._data_rb , \ 81 _queue[(*_queue_control)[it_dump]]._num_reg_rc , \ 82 _queue[(*_queue_control)[it_dump]]._data_rc_val , \ 83 _queue[(*_queue_control)[it_dump]]._data_rc , \ 84 _queue[(*_queue_control)[it_dump]]._write_rd , \ 85 _queue[(*_queue_control)[it_dump]]._num_reg_rd , \ 86 _queue[(*_queue_control)[it_dump]]._write_re , \ 87 _queue[(*_queue_control)[it_dump]]._num_reg_re , \ 88 toString(_queue[(*_queue_control)[it_dump]]._type).c_str()); \ 89 else \ 90 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d]", \ 91 (*_queue_control)[it_dump]); \ 88 92 } while (0) 89 93 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h
r115 r118 24 24 25 25 26 26 27 class Parameters : public morpheo::behavioural::Parameters 27 28 { 28 29 //-----[ fields ]------------------------------------------------------------ 29 public : uint32_t _size_queue;30 public : uint32_t _nb_context;31 public : uint32_t _nb_front_end;32 public : uint32_t _nb_ooo_engine;33 public : uint32_t _nb_packet;34 //public : uint32_t _size_general_data;35 public : uint32_t _nb_general_register;36 //public : uint32_t _size_special_data;37 public : uint32_t _nb_special_register;38 public : uint32_t _nb_bypass_write;39 public : Twrite_queue_scheme_t _queue_scheme;40 41 public : uint32_t _nb_gpr_write;42 public : uint32_t _nb_spr_write;43 44 //public : uint32_t _size_context_id;45 //public : uint32_t _size_front_end_id;46 //public : uint32_t _size_ooo_engine_id;47 //public : uint32_t _size_packet_id;48 //public : uint32_t _size_general_register;49 //public : uint32_t _size_special_register;50 public : uint32_t _size_internal_queue;51 52 //public : bool _have_port_context_id;53 //public : bool _have_port_front_end_id;54 //public : bool _have_port_ooo_engine_id;55 //public : bool _have_port_packet_id;30 public : uint32_t _size_queue ; 31 public : uint32_t _nb_context ; 32 public : uint32_t _nb_front_end ; 33 public : uint32_t _nb_ooo_engine ; 34 public : uint32_t _nb_packet ; 35 //public : uint32_t _size_general_data ; 36 public : uint32_t _nb_general_register ; 37 //public : uint32_t _size_special_data ; 38 public : uint32_t _nb_special_register ; 39 public : uint32_t _nb_bypass_write ; 40 public : Twrite_queue_scheme_t _queue_scheme ; 41 public : Tbypass_write_scheme_t _bypass_write_scheme ; 42 public : uint32_t _nb_gpr_write ; 43 public : uint32_t _nb_spr_write ; 44 45 //public : uint32_t _size_context_id ; 46 //public : uint32_t _size_front_end_id ; 47 //public : uint32_t _size_ooo_engine_id ; 48 //public : uint32_t _size_packet_id ; 49 //public : uint32_t _size_general_register ; 50 //public : uint32_t _size_special_register ; 51 public : uint32_t _size_internal_queue ; 52 53 //public : bool _have_port_context_id ; 54 //public : bool _have_port_front_end_id ; 55 //public : bool _have_port_ooo_engine_id; 56 //public : bool _have_port_packet_id ; 56 57 57 58 //-----[ methods ]----------------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h
r115 r118 25 25 ,WRITE_QUEUE_SCHEME_MEALY // Write register and pop can be in same cycle 26 26 } Twrite_queue_scheme_t; 27 28 typedef enum 29 { 30 BYPASS_WRITE_FROM_ALU, 31 BYPASS_WRITE_FROM_QUEUE 32 } Tbypass_write_scheme_t; 27 33 28 34 class write_queue_entry_t … … 108 114 }; 109 115 116 template<> inline std::string toString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t>(const morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t& x) 117 { 118 switch (x) 119 { 120 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU : return "alu" ; break; 121 case morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE : return "queue"; break; 122 default : return ""; break; 123 } 124 }; 125 126 template<> inline morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t fromString<morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::Tbypass_write_scheme_t>(const std::string& x) 127 { 128 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU))) == 0) or 129 (x.compare("alu") == 0)) 130 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_ALU; 131 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE))) == 0) or 132 (x.compare("queue") == 0)) 133 return morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue::BYPASS_WRITE_FROM_QUEUE; 134 135 throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\"")); 136 }; 137 110 138 }; // end namespace morpheo 111 139 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
r115 r118 172 172 public : void transition (void); 173 173 public : void genMoore (void); 174 public : void genMealy (void); 174 public : void genMealy_write (void); 175 public : void genMealy_bypass (void); 175 176 #endif 176 177 #ifdef STATISTICS -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp
r115 r118 45 45 _nb_bypass_write = nb_bypass_write ; 46 46 _queue_scheme = queue_scheme ; 47 _bypass_write_scheme = BYPASS_WRITE_FROM_ALU; 48 // _bypass_write_scheme = BYPASS_WRITE_FROM_QUEUE; 47 49 48 50 _nb_gpr_write = 1; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp
r113 r118 28 28 Parameters_test test (_type); 29 29 30 if ( _nb_bypass_write > _size_queue)30 if ((_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and (_nb_bypass_write > _size_queue)) 31 31 test.error("The write_queue can't have more bypass_write than entry in the queue.\n"); 32 if ((_bypass_write_scheme == BYPASS_WRITE_FROM_QUEUE) and (_nb_bypass_write > _size_queue-1)) 33 test.error("The write_queue can't have more bypass_write than entry in the queue -1 (the write_queue[0] is unnecessary).\n"); 32 34 33 35 log_printf(FUNC,Write_queue,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp
r115 r118 92 92 if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY) 93 93 { 94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy ");94 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_write"); 95 95 96 SC_METHOD (genMealy );96 SC_METHOD (genMealy_write); 97 97 dont_initialize (); 98 98 sensitive << (*(in_CLOCK)).neg(); // need internal register … … 106 106 # endif 107 107 } 108 109 if ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and 110 (_param->_nb_bypass_write > 0)) 111 { 112 log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_bypass"); 113 114 SC_METHOD (genMealy_bypass); 115 dont_initialize (); 116 // sensitive << (*(in_CLOCK)).neg(); // don't need internal register 117 sensitive << (*(in_WRITE_QUEUE_IN_VAL )) 118 << (*(in_WRITE_QUEUE_IN_WRITE_RD )) 119 << (*(in_WRITE_QUEUE_IN_NUM_REG_RD )) 120 << (*(in_WRITE_QUEUE_IN_DATA_RD )) 121 << (*(in_WRITE_QUEUE_IN_WRITE_RE )) 122 << (*(in_WRITE_QUEUE_IN_NUM_REG_RE )) 123 << (*(in_WRITE_QUEUE_IN_DATA_RE )); 124 if (_param->_have_port_ooo_engine_id) 125 sensitive << (*(in_WRITE_QUEUE_IN_OOO_ENGINE_ID)); 126 127 128 # ifdef SYSTEMCASS_SPECIFIC 129 // List dependency information 130 # endif 131 } 108 132 109 133 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp
r116 r118 20 20 21 21 #undef FUNCTION 22 #define FUNCTION "Write_queue::genMealy "23 void Write_queue::genMealy (void)22 #define FUNCTION "Write_queue::genMealy_write" 23 void Write_queue::genMealy_write (void) 24 24 { 25 25 log_begin(Write_queue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
r117 r118 29 29 { 30 30 std::list<write_queue_entry_t *>::iterator it = _queue->begin(); 31 for (uint32_t i=0; i<_param->_nb_bypass_write; i++) 31 32 // first bypass is the write_queue_in 33 uint32_t first_index = ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU)?1:0); 34 for (uint32_t i=first_index; i<_param->_nb_bypass_write; i++) 32 35 { 33 bool val = i < _queue->size(); 34 36 // before because first slot is on {GPR|SPR}_WRITE. Also, take next 37 if (it != _queue->end()) 38 it++; 39 40 uint32_t index = i; 41 // bool val = (i+1) < _queue->size(); 42 bool val = (it != _queue->end()); 43 35 44 if (val) 36 45 { 37 46 if (_param->_have_port_ooo_engine_id) 38 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i ], (*it)->_ooo_engine_id);39 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i ], (*it)->_num_reg_rd);40 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i ], (*it)->_data_rd );41 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i ], (*it)->_num_reg_re);42 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i ], (*it)->_data_re );47 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], (*it)->_ooo_engine_id); 48 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [index], (*it)->_num_reg_rd); 49 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [index], (*it)->_data_rd ); 50 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [index], (*it)->_num_reg_re); 51 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [index], (*it)->_data_re ); 43 52 } 44 53 #ifdef SYSTEMC_VHDL_COMPATIBILITY … … 46 55 { 47 56 if (_param->_have_port_ooo_engine_id) 48 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i ], 0);49 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [i ], 0);50 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [i ], 0);51 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [i ], 0);52 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [i ], 0);57 PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], 0); 58 PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG [index], 0); 59 PORT_WRITE(out_BYPASS_WRITE_GPR_DATA [index], 0); 60 PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG [index], 0); 61 PORT_WRITE(out_BYPASS_WRITE_SPR_DATA [index], 0); 53 62 } 54 63 #endif 55 64 56 PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [i], val and (*it)->_write_rd ); 57 PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [i], val and (*it)->_write_re ); 58 59 if (it != _queue->end()) 60 it++; 65 PORT_WRITE(out_BYPASS_WRITE_GPR_VAL [index], val and (*it)->_write_rd ); 66 PORT_WRITE(out_BYPASS_WRITE_SPR_VAL [index], val and (*it)->_write_re ); 61 67 } 62 68 }
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