Changeset 118 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src

Timestamp:

May 21, 2009, 12:01:32 AM (15 years ago)

Author:

rosiere

Message:

1) Stat List : scan all queue to find free register
2) Write_queue : test "genMealy" add bypass [0]
3) Functionnal_unit : add const parameters to add or not the pipeline_in
4) Load Store Unit : if load make an exception, free nb_check
5) Debug, change test to add model

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src

Files:

• Parameters.cpp (modified) (1 diff)
• Parameters_msg_error.cpp (modified) (1 diff)
• Write_queue.cpp (modified) (2 diffs)
• Write_queue_genMealy_bypass.cpp (added)
• Write_queue_genMealy_write.cpp (moved) (moved from trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp) (1 diff)
• Write_queue_genMoore.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters.cpp

@@ -45 +45 @@
     _nb_bypass_write         = nb_bypass_write    ;
     _queue_scheme            = queue_scheme       ;
+    _bypass_write_scheme     = BYPASS_WRITE_FROM_ALU;
+//  _bypass_write_scheme     = BYPASS_WRITE_FROM_QUEUE;
 
     _nb_gpr_write            = 1;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Parameters_msg_error.cpp

@@ -28 +28 @@
     Parameters_test test (_type);
 
-    if (_nb_bypass_write > _size_queue)
+    if ((_bypass_write_scheme == BYPASS_WRITE_FROM_ALU)   and (_nb_bypass_write > _size_queue))
       test.error("The write_queue can't have more bypass_write than entry in the queue.\n");
+    if ((_bypass_write_scheme == BYPASS_WRITE_FROM_QUEUE) and (_nb_bypass_write > _size_queue-1))
+      test.error("The write_queue can't have more bypass_write than entry in the queue -1 (the write_queue[0] is unnecessary).\n");
 
     log_printf(FUNC,Write_queue,FUNCTION,"End");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue.cpp

@@ -92 +92 @@
         if (_param->_queue_scheme == WRITE_QUEUE_SCHEME_MEALY)
           {
-        log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy");
+        log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_write");
 
-        SC_METHOD (genMealy);
+        SC_METHOD (genMealy_write);
         dont_initialize ();
         sensitive << (*(in_CLOCK)).neg(); // need internal register
@@ -106 +106 @@
 # endif    
           }
+
+        if ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU) and
+            (_param->_nb_bypass_write > 0))
+          {
+        log_printf(INFO,Write_queue,FUNCTION,"Method - genMealy_bypass");
+
+        SC_METHOD (genMealy_bypass);
+        dont_initialize ();
+//      sensitive << (*(in_CLOCK)).neg(); // don't need internal register
+        sensitive << (*(in_WRITE_QUEUE_IN_VAL          ))
+                  << (*(in_WRITE_QUEUE_IN_WRITE_RD     ))
+                  << (*(in_WRITE_QUEUE_IN_NUM_REG_RD   ))
+                  << (*(in_WRITE_QUEUE_IN_DATA_RD      ))
+                  << (*(in_WRITE_QUEUE_IN_WRITE_RE     ))
+                  << (*(in_WRITE_QUEUE_IN_NUM_REG_RE   ))
+                  << (*(in_WRITE_QUEUE_IN_DATA_RE      ));
+        if (_param->_have_port_ooo_engine_id)
+        sensitive << (*(in_WRITE_QUEUE_IN_OOO_ENGINE_ID));
+
+
+# ifdef SYSTEMCASS_SPECIFIC
+        // List dependency information
+# endif    
+          }
 
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp

@@ -20 +20 @@
 
 #undef  FUNCTION
-#define FUNCTION "Write_queue::genMealy"
-  void Write_queue::genMealy (void)
+#define FUNCTION "Write_queue::genMealy_write"
+  void Write_queue::genMealy_write (void)
   {
     log_begin(Write_queue,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp

@@ -29 +29 @@
     {
       std::list<write_queue_entry_t *>::iterator it = _queue->begin();
-      for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
+
+      // first bypass is the write_queue_in
+      uint32_t first_index = ((_param->_bypass_write_scheme == BYPASS_WRITE_FROM_ALU)?1:0);
+      for (uint32_t i=first_index; i<_param->_nb_bypass_write; i++)
         {
-          bool val     = i < _queue->size();
-          
+          // before because first slot is on {GPR|SPR}_WRITE. Also, take next
+          if (it != _queue->end())
+            it++;
+
+          uint32_t index = i;
+//        bool val = (i+1) < _queue->size();
+          bool val = (it != _queue->end());
+
           if (val)
             {
               if (_param->_have_port_ooo_engine_id)
-              PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i], (*it)->_ooo_engine_id);
-              PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG   [i], (*it)->_num_reg_rd);
-              PORT_WRITE(out_BYPASS_WRITE_GPR_DATA      [i], (*it)->_data_rd   );
-              PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG   [i], (*it)->_num_reg_re);
-              PORT_WRITE(out_BYPASS_WRITE_SPR_DATA      [i], (*it)->_data_re   );
+              PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], (*it)->_ooo_engine_id);
+              PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG   [index], (*it)->_num_reg_rd);
+              PORT_WRITE(out_BYPASS_WRITE_GPR_DATA      [index], (*it)->_data_rd   );
+              PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG   [index], (*it)->_num_reg_re);
+              PORT_WRITE(out_BYPASS_WRITE_SPR_DATA      [index], (*it)->_data_re   );
             }
 #ifdef SYSTEMC_VHDL_COMPATIBILITY
@@ -46 +55 @@
             {
               if (_param->_have_port_ooo_engine_id)
-              PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [i], 0);
-              PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG   [i], 0);
-              PORT_WRITE(out_BYPASS_WRITE_GPR_DATA      [i], 0);
-              PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG   [i], 0);
-              PORT_WRITE(out_BYPASS_WRITE_SPR_DATA      [i], 0);
+              PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [index], 0);
+              PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG   [index], 0);
+              PORT_WRITE(out_BYPASS_WRITE_GPR_DATA      [index], 0);
+              PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG   [index], 0);
+              PORT_WRITE(out_BYPASS_WRITE_SPR_DATA      [index], 0);
             }
 #endif
 
-          PORT_WRITE(out_BYPASS_WRITE_GPR_VAL       [i], val and (*it)->_write_rd  );
-          PORT_WRITE(out_BYPASS_WRITE_SPR_VAL       [i], val and (*it)->_write_re  );
-          
-          if (it != _queue->end())
-            it++;
+          PORT_WRITE(out_BYPASS_WRITE_GPR_VAL       [index], val and (*it)->_write_rd  );
+          PORT_WRITE(out_BYPASS_WRITE_SPR_VAL       [index], val and (*it)->_write_re  );
         }
     }