Changeset 122 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp

Timestamp:

Jun 3, 2009, 10:15:51 AM (15 years ago)

Author:

rosiere

Message:

Modif for performance :
1) Load Store Unit : store send request to valid exeception
2) Commit_unit : retire can bypass store
3) Commit_unit : add stat to manage store instruction
4) Load Store Unit and Load Store Pointer Manager : add store_queue_ptr_read
5) Fix lot of bug

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp (modified) (6 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp

@@ -56 +56 @@
 
         }
+
     // Scan Top of each bank
     internal_BANK_RETIRE_HEAD = reg_NUM_BANK_HEAD;
@@ -62 +63 @@
         uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank;
 
+        // Test if have instruction
         if (not _rob[num_bank].empty())
           {
@@ -68 +70 @@
             uint32_t   x     = entry->rename_unit_id;
             uint32_t   y     = num_inst_retire [x];
-        
+            bool       bypass= false;
             // test if :
             //  * can retire (all previous instruction is retired)
@@ -77 +79 @@
               {
                 rob_state_t state        = entry->state;
+                Tcontext_t  front_end_id = entry->front_end_id;
+                Tcontext_t  context_id   = entry->context_id;  
+                
                   if ((state == ROB_END_OK         ) or 
                       (state == ROB_END_KO         ) or 
@@ -87 +92 @@
                       Tcontrol_t         write_re       = entry->write_re;
                       Tspecial_address_t num_reg_re_log = entry->num_reg_re_log;
-                      Tcontext_t         front_end_id   = entry->front_end_id;
-                      Tcontext_t         context_id     = entry->context_id;  
                       
                       // if state is ok, when write flags in the SR regsiters
@@ -173 +176 @@
                         can_retire [x] = false;
                     }
+
+                  bypass = ((state == ROB_END              ) or 
+                            (state == ROB_STORE_OK         ) or 
+                            (state == ROB_STORE_KO         ) or
+                            (state == ROB_STORE_OK_WAIT_END) or 
+                            (state == ROB_STORE_KO_WAIT_END));
+                  
+                  uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | num_bank);
+
+                  // if future event, don't update after this event
+                  if (reg_EVENT_STOP [front_end_id][context_id] and
+                      (reg_EVENT_PACKET [entry->front_end_id][entry->context_id]  == packet))
+                    bypass = false;
               }
 
             // Retire "in-order"
-            can_retire [x] &= retire_val [x][y];
+            can_retire [x]  &= (retire_val [x][y] or bypass);
           }
       }