Changeset 123 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
- Timestamp:
- Jun 8, 2009, 10:43:30 PM (15 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
r122 r123 27 27 log_function(Load_store_unit,FUNCTION,_name.c_str()); 28 28 29 if (PORT_READ(in_NRESET)) 30 { 29 31 // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 30 32 … … 140 142 141 143 // write output 142 PORT_WRITE(out_MEMORY_OUT_VAL [0], internal_MEMORY_OUT_VAL);143 144 144 if (_param->_have_port_context_id) 145 145 PORT_WRITE(out_MEMORY_OUT_CONTEXT_ID [0], memory_out_context_id ); … … 171 171 // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 172 172 173 Tcontext_t dcache_req_context_id ;174 Tpacket_t dcache_req_packet_id ;175 Tdcache_address_t dcache_req_address ;176 Tdcache_type_t dcache_req_type ;177 Tdcache_data_t dcache_req_wdata ;173 Tcontext_t dcache_req_context_id = 0; 174 Tpacket_t dcache_req_packet_id = 0; 175 Tdcache_address_t dcache_req_address = 0; 176 Tdcache_type_t dcache_req_type = 0; 177 Tdcache_data_t dcache_req_wdata = 0; 178 178 179 179 log_printf(TRACE,Load_store_unit,FUNCTION," * Test DCACHE_REQ"); … … 241 241 } 242 242 243 PORT_WRITE(out_DCACHE_REQ_VAL [0], internal_DCACHE_REQ_VAL);244 243 if (_param->_have_port_dcache_context_id) 245 244 PORT_WRITE(out_DCACHE_REQ_CONTEXT_ID[0], dcache_req_context_id); … … 248 247 PORT_WRITE(out_DCACHE_REQ_TYPE [0], dcache_req_type ); 249 248 PORT_WRITE(out_DCACHE_REQ_WDATA [0], dcache_req_wdata ); 250 249 } 250 else 251 { 252 // Reset 253 internal_MEMORY_OUT_VAL = 0; 254 // internal_MEMORY_OUT_PTR =0 255 // internal_MEMORY_OUT_SELECT_QUEUE = SELECT_STORE_QUEUE; 256 257 internal_DCACHE_REQ_VAL = 0; 258 internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ = 0; 259 // internal_DCACHE_REQ_SELECT_QUEUE = SELECT_LOAD_QUEUE_SPECULATIVE; 260 } 261 262 // Write output 263 PORT_WRITE(out_MEMORY_OUT_VAL [0], internal_MEMORY_OUT_VAL); 264 PORT_WRITE(out_DCACHE_REQ_VAL [0], internal_DCACHE_REQ_VAL); 265 266 251 267 log_end(Load_store_unit,FUNCTION); 252 268 };
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