- Timestamp:
- Jun 8, 2009, 10:43:30 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine
- Files:
-
- 1 added
- 77 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
r122 r123 85 85 public : SC_IN (Toperation_t ) *** in_INSERT_OPERATION ;//[nb_rename_unit][nb_inst_insert] 86 86 public : SC_IN (Tcontrol_t ) *** in_INSERT_NO_EXECUTE ;//[nb_rename_unit][nb_inst_insert] 87 public : SC_IN (Tcontrol_t ) *** in_INSERT_LAST_EVENT ;//[nb_rename_unit][nb_inst_insert] 87 88 public : SC_IN (Tcontrol_t ) *** in_INSERT_IS_DELAY_SLOT ;//[nb_rename_unit][nb_inst_insert] 88 89 #ifdef DEBUG … … 143 144 public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_ACK ;//[nb_front_end][nb_context] 144 145 public : SC_OUT(Tevent_state_t ) *** out_RETIRE_EVENT_STATE ;//[nb_front_end][nb_context] 145 146 //public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_FLUSH ;//[nb_front_end][nb_context] 146 147 public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_STOP ;//[nb_front_end][nb_context] 147 148 … … 225 226 public : SC_OUT(Tcontrol_t ) *** out_SPR_WRITE_SR_OV ;//[nb_front_end][nb_context] 226 227 228 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 229 #ifdef DEBUG_TEST 230 public : SC_OUT(bool ) * out_INFO_ROB_EMPTY ; 231 #endif 232 227 233 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 228 234 private : generic::priority::Priority * _priority_insert ; … … 243 249 private : Tcommit_event_state_t ** reg_EVENT_STATE ;//[nb_front_end][nb_context] 244 250 //private : bool ** reg_EVENT_FLUSH ;//[nb_front_end][nb_context] 245 251 //private : bool ** reg_EVENT_STOP ;//[nb_front_end][nb_context] 246 252 private : uint32_t ** reg_EVENT_NUM_BANK ;//[nb_front_end][nb_context] 247 253 private : uint32_t ** reg_EVENT_NUM_PTR ;//[nb_front_end][nb_context] 248 254 //private : bool ** reg_EVENT_CAN_RESTART ;//[nb_front_end][nb_context] 249 255 private : uint32_t ** reg_EVENT_PACKET ;//[nb_front_end][nb_context] 250 256 private : bool ** reg_EVENT_LAST ;//[nb_front_end][nb_context] 251 257 private : uint32_t ** reg_EVENT_LAST_NUM_BANK ;//[nb_front_end][nb_context] 252 258 private : uint32_t ** reg_EVENT_LAST_NUM_PTR ;//[nb_front_end][nb_context] 259 260 private : bool ** reg_EVENT_NEXT_STOP ;//[nb_front_end][nb_context] 261 private : uint32_t ** reg_EVENT_NEXT_PACKET ;//[nb_front_end][nb_context] 253 262 254 263 //private : Taddress_t ** reg_PC_PREVIOUS ;//[nb_front_end][nb_context] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h
r122 r123 62 62 typedef enum 63 63 { 64 COMMIT_EVENT_STATE_NO_EVENT , 65 COMMIT_EVENT_STATE_EVENT , 66 COMMIT_EVENT_STATE_WAIT_DECOD, 67 COMMIT_EVENT_STATE_WAIT_END , 64 COMMIT_EVENT_STATE_NO_EVENT , 65 COMMIT_EVENT_STATE_NOT_YET_EVENT, 66 COMMIT_EVENT_STATE_EVENT , 67 // COMMIT_EVENT_STATE_WAIT_DECOD , 68 COMMIT_EVENT_STATE_WAIT_END , 68 69 COMMIT_EVENT_STATE_END 69 70 } Tcommit_event_state_t; 70 71 71 #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_DECOD)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT)))) 72 #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT))) 73 // #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_DECOD)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT)))) 72 74 73 75 … … 147 149 case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_OK_WAIT_END : return "ROB_STORE_OK_WAIT_END" ; break; 148 150 case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_KO_WAIT_END : return "ROB_STORE_KO_WAIT_END" ; break; 151 case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_STORE_EVENT : return "ROB_STORE_EVENT" ; break; 149 152 case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_OTHER_WAIT_END : return "ROB_OTHER_WAIT_END" ; break; 150 153 case morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::ROB_EVENT_WAIT_END : return "ROB_EVENT_WAIT_END" ; break; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp
r121 r123 40 40 usage_environment(_usage); 41 41 42 #if DEBUG_Commit_unit == true43 log_printf(TRACE,Commit_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());44 45 std::cout << *param << std::endl;46 #endif42 // #if DEBUG_Commit_unit == true 43 // log_printf(TRACE,Commit_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 44 45 // std::cout << *param << std::endl; 46 // #endif 47 47 48 48 log_printf(INFO,Commit_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r122 r123 71 71 _ALLOC2_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 72 72 _ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 73 _ALLOC2_SIGNAL_IN ( in_INSERT_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 73 74 _ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 74 75 #ifdef DEBUG … … 141 142 _ALLOC2_VALACK_IN ( in_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end,_param->_nb_context[it1]); 142 143 _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state ,_param->_nb_front_end,_param->_nb_context[it1]); 143 144 // _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); 144 145 _ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]); 145 146 … … 282 283 } 283 284 285 #ifdef DEBUG_TEST 286 { 287 ALLOC0_INTERFACE_BEGIN("info",OUT,EAST,_("Information.")); 288 ALLOC0_SIGNAL_OUT(out_INFO_ROB_EMPTY ,"rob_empty" ,bool ,1); 289 ALLOC0_INTERFACE_END(); 290 } 291 #endif 292 284 293 if (usage_is_set(_usage,USE_SYSTEMC)) 285 294 { … … 318 327 ALLOC2(reg_EVENT_STATE ,Tcommit_event_state_t,_param->_nb_front_end,_param->_nb_context [it1]); 319 328 // ALLOC2(reg_EVENT_FLUSH ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 320 329 // ALLOC2(reg_EVENT_STOP ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 321 330 ALLOC2(reg_EVENT_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 322 331 ALLOC2(reg_EVENT_NUM_PTR ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 323 332 // ALLOC2(reg_EVENT_CAN_RESTART ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 324 333 ALLOC2(reg_EVENT_PACKET ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 325 334 ALLOC2(reg_EVENT_LAST ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 326 335 ALLOC2(reg_EVENT_LAST_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 327 336 ALLOC2(reg_EVENT_LAST_NUM_PTR ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 337 338 ALLOC2(reg_EVENT_NEXT_STOP ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 339 ALLOC2(reg_EVENT_NEXT_PACKET ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 328 340 329 341 // ALLOC2(reg_PC_PREVIOUS ,Taddress_t ,_param->_nb_front_end,_param->_nb_context [it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
r122 r123 38 38 DELETE2_SIGNAL( in_INSERT_OPERATION ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation ); 39 39 DELETE2_SIGNAL( in_INSERT_NO_EXECUTE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); 40 DELETE2_SIGNAL( in_INSERT_LAST_EVENT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); 40 41 DELETE2_SIGNAL( in_INSERT_IS_DELAY_SLOT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); 41 42 #ifdef DEBUG … … 94 95 DELETE2_SIGNAL( in_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1],1); 95 96 DELETE2_SIGNAL(out_RETIRE_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context[it1],_param->_size_event_state); 96 97 // DELETE2_SIGNAL(out_RETIRE_EVENT_FLUSH ,_param->_nb_front_end,_param->_nb_context[it1],1); 97 98 DELETE2_SIGNAL(out_RETIRE_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context[it1],1); 98 99 … … 167 168 DELETE2_SIGNAL(out_SPR_WRITE_SR_OV ,_param->_nb_front_end, _param->_nb_context[it1],1); 168 169 170 DELETE0_SIGNAL(out_INFO_ROB_EMPTY ,1); 171 169 172 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 170 173 DELETE1(internal_BANK_INSERT_VAL ,_param->_nb_bank); … … 207 210 DELETE2(reg_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context [it1]); 208 211 // DELETE2(reg_EVENT_FLUSH ,_param->_nb_front_end,_param->_nb_context [it1]); 209 212 // DELETE2(reg_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context [it1]); 210 213 DELETE2(reg_EVENT_NUM_BANK ,_param->_nb_front_end,_param->_nb_context [it1]); 211 214 DELETE2(reg_EVENT_NUM_PTR ,_param->_nb_front_end,_param->_nb_context [it1]); 212 DELETE2(reg_EVENT_CAN_RESTART ,_param->_nb_front_end,_param->_nb_context [it1]);215 // DELETE2(reg_EVENT_CAN_RESTART ,_param->_nb_front_end,_param->_nb_context [it1]); 213 216 DELETE2(reg_EVENT_PACKET ,_param->_nb_front_end,_param->_nb_context [it1]); 214 217 DELETE2(reg_EVENT_LAST ,_param->_nb_front_end,_param->_nb_context [it1]); 215 218 DELETE2(reg_EVENT_LAST_NUM_BANK ,_param->_nb_front_end,_param->_nb_context [it1]); 216 219 DELETE2(reg_EVENT_LAST_NUM_PTR ,_param->_nb_front_end,_param->_nb_context [it1]); 220 221 DELETE2(reg_EVENT_NEXT_STOP ,_param->_nb_front_end,_param->_nb_context [it1]); 222 DELETE2(reg_EVENT_NEXT_PACKET ,_param->_nb_front_end,_param->_nb_context [it1]); 217 223 218 224 // DELETE2(reg_PC_PREVIOUS ,_param->_nb_front_end,_param->_nb_context [it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
r119 r123 23 23 log_begin(Commit_unit,FUNCTION); 24 24 log_function(Commit_unit,FUNCTION,_name.c_str()); 25 26 if (PORT_READ(in_NRESET)) 27 { 25 28 26 29 #ifdef STATISTICS … … 96 99 for (uint32_t i=0; i<_param->_nb_inst_commit; i++) 97 100 PORT_WRITE(out_COMMIT_ACK [i],commit_ack [i]); 101 } 102 else 103 { 104 for (uint32_t i=0; i<_param->_nb_inst_commit; i++) 105 PORT_WRITE(out_COMMIT_ACK [i],0); 106 } 98 107 99 108 log_end(Commit_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
r122 r123 24 24 log_function(Commit_unit,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 Tcontrol_t bank_full [_param->_nb_bank]; 27 29 Tcontrol_t insert_ack [_param->_nb_rename_unit][_param->_max_nb_inst_insert]; … … 136 138 #endif 137 139 } 138 140 } 141 else 142 { 143 for (uint32_t i=0; i<_param->_nb_bank; i++) 144 internal_BANK_INSERT_VAL [i] = false; 145 for (uint32_t i=0; i<_param->_nb_rename_unit; i++) 146 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++) 147 PORT_WRITE(out_INSERT_ACK [i][j],0); 148 149 } 150 139 151 log_end(Commit_unit,FUNCTION); 140 152 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp
r122 r123 24 24 log_function(Commit_unit,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 Tcontrol_t retire_val [_param->_nb_rename_unit][_param->_max_nb_inst_retire]; 27 29 uint32_t num_inst_retire [_param->_nb_rename_unit]; … … 186 188 187 189 // if future event, don't update after this event 188 if ( reg_EVENT_STOP [front_end_id][context_id]and189 (reg_EVENT_PACKET [entry->front_end_id][entry->context_id] 190 if ((reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and 191 (reg_EVENT_PACKET [entry->front_end_id][entry->context_id] == packet)) 190 192 bypass = false; 191 193 } … … 211 213 PORT_WRITE(out_SPR_WRITE_SR_OV [i][j], spr_write_sr_ov [i][j]); 212 214 } 215 } 216 else 217 { 218 for (uint32_t i=0; i<_param->_nb_rename_unit; i++) 219 for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++) 220 PORT_WRITE(out_RETIRE_VAL [i][j],0); 221 } 213 222 214 223 log_end(Commit_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp
r122 r123 24 24 log_function(Commit_unit,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ REEXECUTE ]================================================= … … 105 107 106 108 internal_REEXECUTE_VAL [i] = val; 107 PORT_WRITE(out_REEXECUTE_VAL[i], internal_REEXECUTE_VAL [i]);108 109 } 109 110 } … … 148 149 149 150 // don't complete a branch when rob manage an present event 150 if ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NO_EVENT) and 151 if (((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NO_EVENT) or 152 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT)) and 151 153 (state == ROB_BRANCH_COMPLETE)) 152 154 { … … 154 156 155 157 // test if have a future event (stop is set) 156 log_printf(TRACE,Commit_unit,FUNCTION," * reg_EVENT_STOP : %d",reg_EVENT_STOP [front_end_id][context_id]);157 158 if (reg_EVENT_ST OP [front_end_id][context_id])158 // log_printf(TRACE,Commit_unit,FUNCTION," * reg_EVENT_STOP : %d",reg_EVENT_STOP [front_end_id][context_id]); 159 160 if (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) 159 161 { 160 162 // Have future event, can complete the branch if the event is most speculative than this branchement … … 204 206 205 207 internal_BRANCH_COMPLETE_VAL [i] = val; 206 PORT_WRITE(out_BRANCH_COMPLETE_VAL [i], internal_BRANCH_COMPLETE_VAL [i]);207 208 } 208 209 } … … 275 276 } 276 277 277 PORT_WRITE(out_UPDATE_VAL, internal_UPDATE_VAL);278 279 278 log_printf(TRACE,Commit_unit,FUNCTION," * UPDATE (end)"); 280 279 } … … 283 282 // =====[ NB_INST ]=================================================== 284 283 // =================================================================== 285 for (uint32_t i=0; i<_param->_nb_front_end; i++) 286 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 287 { 288 PORT_WRITE(out_NB_INST_COMMIT_ALL [i][j], reg_NB_INST_COMMIT_ALL [i][j]); 289 PORT_WRITE(out_NB_INST_COMMIT_MEM [i][j], reg_NB_INST_COMMIT_MEM [i][j]); 290 } 284 { 285 #ifdef DEBUG_TEST 286 bool empty = true; 287 #endif 288 for (uint32_t i=0; i<_param->_nb_front_end; i++) 289 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 290 { 291 #ifdef DEBUG_TEST 292 empty &= (reg_NB_INST_COMMIT_ALL [i][j] == 0); 293 #endif 294 PORT_WRITE(out_NB_INST_COMMIT_ALL [i][j], reg_NB_INST_COMMIT_ALL [i][j]); 295 PORT_WRITE(out_NB_INST_COMMIT_MEM [i][j], reg_NB_INST_COMMIT_MEM [i][j]); 296 } 297 #ifdef DEBUG_TEST 298 PORT_WRITE(out_INFO_ROB_EMPTY,empty); 299 #endif 300 } 301 291 302 292 303 // =================================================================== … … 296 307 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 297 308 { 298 // bool flush = reg_EVENT_FLUSH [i][j]; 299 bool flush = (((reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_EVENT) or 300 (reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_WAIT_DECOD)) and 301 not reg_EVENT_CAN_RESTART[i][j]); 309 // bool flush = (((reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_EVENT) or 310 // (reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_WAIT_DECOD)) and 311 // not reg_EVENT_CAN_RESTART[i][j]); 302 312 303 313 PORT_WRITE(out_RETIRE_EVENT_STATE [i][j], commit_event_state_to_event_state(reg_EVENT_STATE[i][j])); 304 PORT_WRITE(out_RETIRE_EVENT_FLUSH [i][j], flush); 305 PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], reg_EVENT_STOP [i][j]); 314 // PORT_WRITE(out_RETIRE_EVENT_FLUSH [i][j], flush); 315 // PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], reg_EVENT_STOP [i][j]); 316 PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], ((reg_EVENT_STATE [i][j] == COMMIT_EVENT_STATE_NOT_YET_EVENT) or 317 reg_EVENT_NEXT_STOP [i][j])); 306 318 } 307 319 } 320 else 321 { 322 for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) 323 { 324 internal_REEXECUTE_VAL [i] = 0; 325 // internal_REEXECUTE_NUM_BANK [i] = num_bank; 326 } 327 328 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 329 { 330 internal_BRANCH_COMPLETE_VAL [i] = 0; 331 // internal_BRANCH_COMPLETE_NUM_BANK [i] = num_bank; 332 } 333 334 internal_UPDATE_VAL = 0; 335 // internal_UPDATE_NUM_BANK = reg_NUM_BANK_HEAD; 336 337 338 for (uint32_t i=0; i<_param->_nb_front_end; i++) 339 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 340 { 341 PORT_WRITE(out_RETIRE_EVENT_STATE [i][j], commit_event_state_to_event_state(COMMIT_EVENT_STATE_NO_EVENT)); 342 // PORT_WRITE(out_RETIRE_EVENT_FLUSH [i][j], flush); 343 // PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], reg_EVENT_STOP [i][j]); 344 PORT_WRITE(out_RETIRE_EVENT_STOP [i][j], true); 345 } 346 } 347 348 for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) 349 PORT_WRITE(out_REEXECUTE_VAL[i], internal_REEXECUTE_VAL [i]); 350 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 351 PORT_WRITE(out_BRANCH_COMPLETE_VAL [i], internal_BRANCH_COMPLETE_VAL [i]); 352 PORT_WRITE(out_UPDATE_VAL, internal_UPDATE_VAL); 353 308 354 log_end(Commit_unit,FUNCTION); 309 355 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r122 r123 53 53 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT; 54 54 // reg_EVENT_FLUSH [i][j] = false; 55 55 // reg_EVENT_STOP [i][j] = false; 56 56 reg_EVENT_LAST [i][j] = false; 57 58 reg_EVENT_NEXT_STOP [i][j] = false; 57 59 58 60 // reg_PC_PREVIOUS [i][j] = (0x100-4)>>2; … … 86 88 // * and decod_queue is empty 87 89 // * and have an event or have a futur event 88 if (not reg_EVENT_CAN_RESTART [i][j] and89 (PORT_READ(in_NB_INST_DECOD_ALL [i][j]) == 0) and90 (reg_EVENT_STOP [i][j] or (reg_EVENT_STATE [i][j] != COMMIT_EVENT_STATE_NO_EVENT)))91 reg_EVENT_CAN_RESTART [i][j] = true;90 // if (not reg_EVENT_CAN_RESTART [i][j] and 91 // (PORT_READ(in_NB_INST_DECOD_ALL [i][j]) == 0) and 92 // (reg_EVENT_STOP [i][j] or (reg_EVENT_STATE [i][j] != COMMIT_EVENT_STATE_NO_EVENT))) 93 // reg_EVENT_CAN_RESTART [i][j] = true; 92 94 93 95 // Test event state … … 100 102 { 101 103 // A minor optimisation : test if wait_decod is previously empty. 102 if (not reg_EVENT_CAN_RESTART [i][j])103 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_DECOD;104 else104 // if (not reg_EVENT_CAN_RESTART [i][j]) 105 // reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_DECOD; 106 // else 105 107 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END; 106 108 } … … 108 110 break; 109 111 } 110 case COMMIT_EVENT_STATE_WAIT_DECOD :111 {112 // Wait flush of decod_queue.113 // Test if can restart now114 if (reg_EVENT_CAN_RESTART [i][j])115 {116 //reg_EVENT_FLUSH [i][j] = false;117 118 // A minor optimisation : test if the last element is already retire119 if (not reg_EVENT_LAST [i][j])120 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END;121 else122 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_END;123 }124 break;125 }112 // case COMMIT_EVENT_STATE_WAIT_DECOD : 113 // { 114 // // Wait flush of decod_queue. 115 // // Test if can restart now 116 // if (reg_EVENT_CAN_RESTART [i][j]) 117 // { 118 // //reg_EVENT_FLUSH [i][j] = false; 119 120 // // A minor optimisation : test if the last element is already retire 121 // if (not reg_EVENT_LAST [i][j]) 122 // reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_WAIT_END; 123 // else 124 // reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_END; 125 // } 126 // break; 127 // } 126 128 case COMMIT_EVENT_STATE_WAIT_END : 127 129 { … … 138 140 139 141 // flush of re order buffer is finish 140 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT;141 142 reg_EVENT_LAST [i][j] = false; 143 144 if (not reg_EVENT_NEXT_STOP [i][j]) 145 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT; 146 else 147 { 148 reg_EVENT_NEXT_STOP [i][j] = false; 149 reg_EVENT_PACKET [i][j] = reg_EVENT_NEXT_PACKET [i][j]; 150 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 151 // reg_EVENT_STOP [i][j] = true; 152 reg_EVENT_LAST_NUM_BANK [i][j] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 153 reg_EVENT_LAST_NUM_PTR [i][j] = reg_NUM_PTR_TAIL; 154 } 155 142 156 break; 143 157 } 144 158 //case COMMIT_EVENT_STATE_NO_EVENT : 159 //case COMMIT_EVENT_STATE_NOT_YET_EVENT : 145 160 default : break; 146 161 } … … 296 311 // * or present_event 297 312 // * and not can_restart (previous empty decod queue), because between the event_stop (branch_complete) and the state event (miss in head), many cycle is occured. 298 bool flush = ((// present event 299 ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or 300 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD)) or 301 // futur event 302 reg_EVENT_STOP [front_end_id][context_id]) 303 // can't restart 304 and not reg_EVENT_CAN_RESTART[front_end_id][context_id] 305 ); 306 307 if (flush) 308 { 309 // A new invalid instruction is push in rob -> new last instruction 310 reg_EVENT_LAST [front_end_id][context_id] = false; 311 reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = num_bank; 312 reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] = ptr; 313 } 313 // bool flush = ((// present event 314 // ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or 315 // (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) 316 // ) or 317 // futur event 318 // reg_EVENT_STOP [front_end_id][context_id]) 319 // // can't restart 320 // and not reg_EVENT_CAN_RESTART[front_end_id][context_id] 321 // ); 322 323 // if (flush) 324 // { 325 // // A new invalid instruction is push in rob -> new last instruction 326 // reg_EVENT_LAST [front_end_id][context_id] = false; 327 // reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = num_bank; 328 // reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] = ptr; 329 // } 314 330 315 331 // Update pointer … … 359 375 // find the good entry !!! 360 376 entry_t * entry = internal_BANK_COMMIT_ENTRY [i][j]; 377 378 log_printf(TRACE,Commit_unit,FUNCTION," * ptr : %d",entry->ptr); 361 379 362 380 //Toperation_t operation = PORT_READ(in_COMMIT_OPERATION [x]); … … 480 498 481 499 // Commit an instruction ... 482 // Test if have an event (miss_speculation or exception) and not manage a previous event 483 // if yes, this instruction would modify state machine. Also stop Re Order Buffer 484 485 // bool flush = reg_EVENT_FLUSH [entry->front_end_id][entry->context_id]; 486 bool flush = ((reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_EVENT) or 487 (reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or 488 (reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_WAIT_END)); 489 490 if ((have_exception or have_miss_speculation) and (not flush)) 500 // Test if have an event (miss_speculation or exception) 501 502 if (have_exception or have_miss_speculation) 491 503 { 504 // Two case : 505 // if no previous manage event -> generate an event 506 // if previous manage event -> next generate an event 507 508 // bool flush = reg_EVENT_FLUSH [front_end_id][context_id]; 509 bool flush = ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or 510 // (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or 511 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END) or 512 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_END) 513 ); 514 492 515 uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | i); 493 494 // test have a previous event detected (event_stop = 1) 495 // if yes, test if the actual event if "before (in order)" that the previous event 496 if (reg_EVENT_STOP [entry->front_end_id][entry->context_id]) 516 uint32_t _top = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD); 517 518 if (not flush) 497 519 { 498 // Compare packet_id (by construction instruction is insert in order by increase packet_id) 499 500 uint32_t _top = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD); 501 uint32_t _old = reg_EVENT_PACKET [entry->front_end_id][entry->context_id]; 502 uint32_t _new = packet; 503 if (_old < _top) _old = _old+_param->_size_queue; 504 if (_new < _top) _new = _new+_param->_size_queue; 505 if (_new < _old) reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet; 520 bool can = true; 521 // test have a previous event detected (event_stop = 1) 522 // if yes, test if the actual event if "before (in order)" that the previous event 523 if (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) 524 { 525 // Compare packet_id (by construction instruction is insert in order by increase packet_id) 526 527 uint32_t _old = reg_EVENT_PACKET [front_end_id][context_id]; 528 uint32_t _new = packet; 529 if (_old < _top) _old = _old+_param->_size_queue; 530 if (_new < _top) _new = _new+_param->_size_queue; 531 if (_new < _old) reg_EVENT_PACKET [front_end_id][context_id] = packet; 532 else can = false; 533 } 534 else 535 reg_EVENT_PACKET [front_end_id][context_id] = packet; 536 537 if (can) 538 { 539 // have an error, stop issue instruction 540 reg_EVENT_STATE [front_end_id][context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 541 // reg_EVENT_STOP [front_end_id][context_id] = true; 542 543 reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 544 reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] = reg_NUM_PTR_TAIL; 545 } 506 546 } 507 547 else 508 reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet; 509 510 // have an error, stop issue instruction 511 reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true; 512 // reg_EVENT_NUM_BANK [entry->front_end_id][entry->context_id] = i; 513 // reg_EVENT_NUM_PTR [entry->front_end_id][entry->context_id] = entry->ptr; 514 515 // reg_EVENT_CAN_RESTART [entry->front_end_id][entry->context_id] = false; 516 reg_EVENT_LAST_NUM_BANK [entry->front_end_id][entry->context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 517 reg_EVENT_LAST_NUM_PTR [entry->front_end_id][entry->context_id] = reg_NUM_PTR_TAIL; 548 { 549 bool find = true; 550 551 // already manage an event. 552 if (reg_EVENT_NEXT_STOP [front_end_id][context_id]) 553 { 554 // after last ? 555 uint32_t _old = reg_EVENT_NEXT_PACKET [front_end_id][context_id]; 556 uint32_t _new = packet; 557 if (_old < _top) _old = _old+_param->_size_queue; 558 if (_new < _top) _new = _new+_param->_size_queue; 559 if (_new > _old) reg_EVENT_NEXT_PACKET [front_end_id][context_id] = packet; 560 find = false; 561 } 562 else 563 { 564 // after last ? 565 uint32_t _old = ((reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [front_end_id][context_id]); 566 uint32_t _new = packet; 567 if (_old < _top) _old = _old+_param->_size_queue; 568 if (_new < _top) _new = _new+_param->_size_queue; 569 if (_new > _old) reg_EVENT_NEXT_PACKET [front_end_id][context_id] = packet; 570 find = false; 571 } 572 573 if (find) 574 reg_EVENT_NEXT_STOP [front_end_id][context_id] = true; // in all case : need stop 575 } 518 576 } 519 577 520 578 // Update Re Order Buffer 521 579 entry->state = state; … … 633 691 { 634 692 reg_EVENT_STATE [front_end_id][context_id] = COMMIT_EVENT_STATE_EVENT; 635 // reg_EVENT_FLUSH [front_end_id][context_id] = true; 636 reg_EVENT_STOP [front_end_id][context_id] = false; // instruction flow can continue 637 // reg_EVENT_CAN_RESTART [front_end_id][context_id] = false; 693 // reg_EVENT_STOP [front_end_id][context_id] = false; // instruction flow can continue 638 694 reg_EVENT_LAST [front_end_id][context_id] = false; 639 695 // it the head ! 640 696 reg_EVENT_PACKET [front_end_id][context_id] = packet_id; 641 697 642 // If event is an load_miss, many instruction can be inserted.643 // -> new last instruction644 if (state == ROB_END_LOAD_MISS)645 {646 reg_EVENT_CAN_RESTART [front_end_id][context_id] = false;698 // // If event is an load_miss, many instruction can be inserted. 699 // // -> new last instruction 700 // if (state == ROB_END_LOAD_MISS) 701 // { 702 // // reg_EVENT_CAN_RESTART [front_end_id][context_id] = false; 647 703 648 reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1;649 reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] = reg_NUM_PTR_TAIL;650 }704 // reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 705 // reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] = reg_NUM_PTR_TAIL; 706 // } 651 707 } 652 708 … … 654 710 // * need event 655 711 // * packet id = last packet id 656 if ((reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and 712 if (((reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT ) and 713 (reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and 657 714 (reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] == num_bank ) and 658 715 (reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] == entry->ptr )) … … 666 723 // Update pointer 667 724 reg_NUM_BANK_HEAD = (num_bank+1)%_param->_nb_bank; 668 669 // Remove entry670 delete entry;671 _rob [num_bank].pop_front();672 725 673 726 // Reset watch dog timer because have transaction on retire interface … … 708 761 } 709 762 #endif 763 764 // Remove entry 765 delete entry; 766 _rob [num_bank].pop_front(); 710 767 } 711 768 } … … 775 832 if (miss) 776 833 { 834 bool can = true; 777 835 uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | num_bank); 778 836 779 837 // test if this packet is before previous event 780 if (reg_EVENT_ST OP [entry->front_end_id][entry->context_id])838 if (reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) 781 839 { 782 840 uint32_t _top = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD); … … 786 844 if (_new < _top) _new = _new+_param->_size_queue; 787 845 if (_new < _old) reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet; 846 else can = false; 788 847 } 789 848 else 790 849 reg_EVENT_PACKET [entry->front_end_id][entry->context_id] = packet; 791 850 792 // In all case, stop instruction flow 793 reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true; 794 // reg_EVENT_NUM_BANK [entry->front_end_id][entry->context_id] = num_bank; 795 // reg_EVENT_NUM_PTR [entry->front_end_id][entry->context_id] = entry->ptr; 796 797 reg_EVENT_CAN_RESTART [entry->front_end_id][entry->context_id] = false; 798 799 reg_EVENT_LAST_NUM_BANK [entry->front_end_id][entry->context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 800 reg_EVENT_LAST_NUM_PTR [entry->front_end_id][entry->context_id] = reg_NUM_PTR_TAIL; 851 if (can) 852 { 853 // In all case, stop instruction flow 854 reg_EVENT_STATE [entry->front_end_id][entry->context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 855 // reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true; 856 857 // reg_EVENT_CAN_RESTART [entry->front_end_id][entry->context_id] = false; 858 859 reg_EVENT_LAST_NUM_BANK [entry->front_end_id][entry->context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 860 reg_EVENT_LAST_NUM_PTR [entry->front_end_id][entry->context_id] = reg_NUM_PTR_TAIL; 861 } 801 862 } 802 863 } … … 902 963 903 964 bool flush = ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or 904 965 // (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or 905 966 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END)); 906 967 bool speculative = entry->speculative and not (depth == depth_min); … … 1005 1066 1006 1067 // Test if this instruction is the last of event 1007 if ((reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and 1068 if (((reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and 1069 (reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and 1008 1070 (reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] == num_bank ) and 1009 1071 (reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] == entry->ptr )) … … 1044 1106 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_STATE : %s - %s",toString(reg_EVENT_STATE [i][j]).c_str(),toString(commit_event_state_to_event_state(reg_EVENT_STATE [i][j])).c_str()); 1045 1107 // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_FLUSH : %d",reg_EVENT_FLUSH [i][j]); 1046 1047 // 1048 1108 // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_STOP : %d",reg_EVENT_STOP [i][j]); 1109 // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT : %d (bank %d, ptr %d)",((reg_EVENT_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_NUM_BANK [i][j]), reg_EVENT_NUM_BANK [i][j],reg_EVENT_NUM_PTR [i][j]); 1110 // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_CAN_RESTART : %d",reg_EVENT_CAN_RESTART [i][j]); 1049 1111 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_PACKET : %d",reg_EVENT_PACKET[i][j]); 1050 1112 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d",reg_EVENT_LAST [i][j]); 1051 1113 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d (bank %d, ptr %d)",((reg_EVENT_LAST_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [i][j]), reg_EVENT_LAST_NUM_BANK [i][j],reg_EVENT_LAST_NUM_PTR [i][j]); 1114 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NEXT_STOP : %d",reg_EVENT_NEXT_STOP [i][j]); 1115 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NEXT_PACKET : %d",reg_EVENT_NEXT_PACKET[i][j]); 1052 1116 log_printf(TRACE,Commit_unit,FUNCTION," * NB_INST_ALL : %d",reg_NB_INST_COMMIT_ALL[i][j]); 1053 1117 log_printf(TRACE,Commit_unit,FUNCTION," * NB_INST_MEM : %d",reg_NB_INST_COMMIT_MEM[i][j]); … … 1065 1129 } 1066 1130 1067 bool all_empty = false; 1131 bool all_empty = false; 1132 uint32_t nb_write_rd = 0; 1133 uint32_t nb_write_re = 0; 1134 1068 1135 while (not all_empty) 1069 1136 { … … 1078 1145 { 1079 1146 all_empty = false; 1147 1148 nb_write_rd += ((*it)->write_rd)?1:0; 1149 nb_write_re += ((*it)->write_re)?1:0; 1080 1150 1081 1151 log_printf(TRACE,Commit_unit,FUNCTION," [%.4d][%.4d] (%.4d) %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s", … … 1130 1200 } 1131 1201 } 1202 1203 log_printf(TRACE,Commit_unit,FUNCTION," * nb_write_rd : %d",nb_write_rd); 1204 log_printf(TRACE,Commit_unit,FUNCTION," * nb_write_re : %d",nb_write_re); 1132 1205 } 1133 1206 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp
r111 r123 39 39 usage_environment(_usage); 40 40 41 #if DEBUG_Issue_queue == true42 log_printf(INFO,Issue_queue,FUNCTION,_("<%s> Parameters"),_name.c_str());41 // #if DEBUG_Issue_queue == true 42 // log_printf(INFO,Issue_queue,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 43 44 std::cout << *param << std::endl;45 #endif44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
r122 r123 24 24 log_function(Issue_queue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 26 27 // =================================================================== 27 28 // =====[ ISSUE_OUT ]================================================= 28 29 // =================================================================== 29 {30 { 30 31 Tcontrol_t val [_param->_nb_inst_issue]; 31 32 … … 175 176 } 176 177 } 178 else 179 { 180 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 181 internal_ISSUE_OUT_VAL [i] = 0; 182 } 183 184 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 185 PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); 177 186 178 187 log_end(Issue_queue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMoore.cpp
r111 r123 38 38 internal_ISSUE_IN_ACK [i][j] = false; 39 39 40 if (PORT_READ(in_NRESET)) 41 { 40 42 std::list<generic::priority::select_t> * select_in = _priority_in ->select(); // same select for all issue 41 43 std::list<generic::priority::select_t>::iterator it=select_in ->begin(); … … 62 64 nb_insert ++; 63 65 } 64 66 } 67 65 68 for (uint32_t i=0; i<_param->_nb_rename_unit; i++) 66 69 for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp
r122 r123 24 24 log_function(Issue_queue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ REEXECUTE_UNIT ]============================================ … … 217 219 { 218 220 internal_ISSUE_OUT_VAL [i] = val [i]; 221 } 222 } 223 } 224 else 225 { 226 // Reset 227 for (uint32_t i=0; i<_param->_nb_bank; i++) 228 { 229 internal_BANK_IN_ACK [i] = 0; 230 // internal_BANK_IN_NUM_RENAME_UNIT [num_bank] = num_rename_unit; 231 // internal_BANK_IN_NUM_INST [num_bank] = num_inst_rename; 232 } 233 for (uint32_t i=0; i<_param->_nb_rename_unit; i++) 234 for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++) 235 PORT_WRITE(out_ISSUE_IN_ACK [i][j],0); 236 237 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 238 { 239 internal_ISSUE_OUT_VAL [i] = 0; 240 // internal_ISSUE_OUT_FROM_REEXECUTE [i] = true; 241 // internal_ISSUE_OUT_NUM_BANK [i] = num_bank; 242 // internal_ISSUE_OUT_ENTRY [i] = entry; 243 } 244 } 245 246 // Write output 247 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 248 { 219 249 PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); 220 250 } 221 }222 251 223 252 log_end(Issue_queue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp
r111 r123 24 24 log_function(Issue_queue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ REEXECUTE_UNIT ]============================================ … … 35 37 36 38 log_printf(TRACE,Issue_queue,FUNCTION," * ACK : %d",internal_REEXECUTE_ACK [i]); 39 } 37 40 38 PORT_WRITE(out_REEXECUTE_ACK [i], internal_REEXECUTE_ACK [i]);39 41 } 42 else 43 { 44 // Reset 45 for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) 46 internal_REEXECUTE_ACK [i] = 0; 47 } 48 49 // Write Output 50 for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i) 51 PORT_WRITE(out_REEXECUTE_ACK [i], internal_REEXECUTE_ACK [i]); 40 52 41 53 (this->*function_genMoore) (); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp
r122 r123 39 39 usage_environment(_usage); 40 40 41 #if DEBUG_OOO_Engine_Glue == true42 log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());43 44 std::cout << *param << std::endl;45 #endif41 // #if DEBUG_OOO_Engine_Glue == true 42 // log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,OOO_Engine_Glue,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp
r122 r123 24 24 log_function(OOO_Engine_Glue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 uint32_t x=0; 27 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) … … 112 114 x ++; 113 115 } 116 } 117 // else 118 // { 119 // } 114 120 115 121 log_end(OOO_Engine_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp
r110 r123 24 24 log_function(OOO_Engine_Glue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 uint32_t x=0; 27 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) … … 79 81 } 80 82 } 83 } 84 else 85 { 86 uint32_t x=0; 87 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 88 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) 89 { 90 PORT_WRITE(out_INSERT_VAL [x] ,0); 91 PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],0); 92 PORT_WRITE(out_INSERT_COMMIT_UNIT_VAL [i][j],0); 93 PORT_WRITE(out_INSERT_ISSUE_QUEUE_VAL [i][j],0); 94 x ++; 95 } 96 } 81 97 82 98 log_end(OOO_Engine_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_rename.cpp
r120 r123 24 24 log_function(OOO_Engine_Glue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 for (uint32_t i=0; i<_param->_nb_front_end; ++i) 27 29 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j) … … 30 32 PORT_WRITE(out_RENAME_RENAME_UNIT_FRONT_END_ID [i][j],_param->_translate_front_end_id_to_rename_unit [PORT_READ(in_RENAME_FRONT_END_ID [i][j])]); 31 33 } 34 } 32 35 33 36 log_end(OOO_Engine_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire.cpp
r88 r123 24 24 log_function(OOO_Engine_Glue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 uint32_t x=0; 27 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) … … 61 63 x ++; 62 64 } 63 65 } 64 66 log_end(OOO_Engine_Glue,FUNCTION); 65 67 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_retire_valack.cpp
r88 r123 24 24 log_function(OOO_Engine_Glue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 uint32_t x=0; 27 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) … … 47 49 x ++; 48 50 } 49 51 } 50 52 log_end(OOO_Engine_Glue,FUNCTION); 51 53 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_spr.cpp
r88 r123 24 24 log_begin(OOO_Engine_Glue,FUNCTION); 25 25 26 // if (PORT_READ(in_NRESET)) 27 { 26 28 for (uint32_t i=0; i<_param->_nb_front_end; ++i) 27 29 for (uint32_t j=0; j<_param->_nb_context[i]; ++j) … … 38 40 delete sr; 39 41 } 42 } 40 43 41 44 log_end(OOO_Engine_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp
r88 r123 39 39 usage_environment(_usage); 40 40 41 #if DEBUG_Reexecute_unit == true42 log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());41 // #if DEBUG_Reexecute_unit == true 42 // log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 43 44 std::cout << *param << std::endl;45 #endif44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Reexecute_unit,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
r117 r123 23 23 log_function(Reexecute_unit,FUNCTION,_name.c_str()); 24 24 25 if (PORT_READ(in_NRESET)) 26 { 25 27 // Initialisation 26 28 Tcontrol_t execute_loop_ack [_param->_nb_execute_loop][_param->_max_nb_inst_execute]; … … 126 128 for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j) 127 129 PORT_WRITE(out_EXECUTE_LOOP_ACK [i][j], execute_loop_ack [i][j]); 130 } 131 else 132 { 133 #ifdef STATISTICS 134 for (uint32_t i=0; i<_param->_nb_inst_commit; ++i) 135 internal_COMMIT_VAL [i] = 0; 136 #endif 137 for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) 138 for (uint32_t j=0; j<_param->_nb_inst_execute [i]; ++j) 139 PORT_WRITE(out_EXECUTE_LOOP_ACK [i][j], 0); 140 } 128 141 129 142 log_end(Reexecute_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_reexecute.cpp
r122 r123 24 24 log_function(Reexecute_unit,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ REEXECUTE ]================================================= … … 94 96 internal_REEXECUTE_VAL [i] = val; 95 97 internal_REEXECUTE_ROB_ACK [i] = ack; 98 } 99 } 100 else 101 { 102 for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++) 103 { 104 internal_REEXECUTE_VAL [i] = 0; 105 internal_REEXECUTE_ROB_ACK [i] = 0; 106 } 107 } 96 108 109 for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++) 110 { 97 111 PORT_WRITE(out_REEXECUTE_VAL [i], internal_REEXECUTE_VAL [i]); 98 112 PORT_WRITE(out_REEXECUTE_ROB_ACK [i], internal_REEXECUTE_ROB_ACK [i]); 99 113 } 100 101 114 log_end(Reexecute_unit,FUNCTION); 102 115 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMoore.cpp
r98 r123 24 24 log_function(Reexecute_unit,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ SPR ]======================================================= … … 47 49 48 50 internal_SPR_VAL [i] = val; 51 } 52 } 53 else 54 { 55 //Reset 56 for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++) 57 internal_SPR_VAL [i] = 0; 58 } 59 60 // Write output 61 for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++) 62 { 49 63 PORT_WRITE(out_SPR_VAL [i], internal_SPR_VAL [i]); 50 64 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit.cpp
r122 r123 38 38 log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); 39 39 40 #if DEBUG_Load_Store_pointer_unit == true41 log_printf(INFO,Load_Store_pointer_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());42 43 std::cout << *param << std::endl;44 #endif40 // #if DEBUG_Load_Store_pointer_unit == true 41 // log_printf(INFO,Load_Store_pointer_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 42 43 // std::cout << *param << std::endl; 44 // #endif 45 45 46 46 log_printf(INFO,Load_Store_pointer_unit,FUNCTION,"Allocation"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_insert.cpp
r122 r123 25 25 log_function(Load_Store_pointer_unit,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET)) 28 { 27 29 // TODO : limité à nb_inst_memory le nombre d'accès par lsq !!! 28 30 … … 134 136 // Write output 135 137 internal_INSERT_ACK [i] = ack; 136 PORT_WRITE(out_INSERT_ACK [i], ack);137 138 } 139 } 140 else 141 { 142 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 143 internal_INSERT_ACK [i] = 0; 144 145 } 146 147 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 148 PORT_WRITE(out_INSERT_ACK [i], internal_INSERT_ACK [i]); 138 149 139 150 log_end(Load_Store_pointer_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp
r110 r123 24 24 log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin"); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // bool use_lsq [_param->_nb_load_store_queue]; 27 29 // for (uint32_t i=0; i<_param->_nb_load_store_queue; i++) … … 77 79 // Write output 78 80 internal_RETIRE_ACK [i] = ack; 79 PORT_WRITE(out_RETIRE_ACK [i], ack);80 81 } 82 } 83 else 84 { 85 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 86 internal_RETIRE_ACK [i] = 0; 87 } 88 89 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 90 PORT_WRITE(out_RETIRE_ACK [i], internal_RETIRE_ACK [i]); 91 81 92 82 93 log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit.cpp
r121 r123 39 39 log_printf(FUNC,Dependency_checking_unit,FUNCTION,"Begin"); 40 40 41 #if DEBUG_Dependency_checking_unit == true42 log_printf(INFO,Dependency_checking_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());43 44 std::cout << *param << std::endl;45 #endif41 // #if DEBUG_Dependency_checking_unit == true 42 // log_printf(INFO,Dependency_checking_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Dependency_checking_unit,FUNCTION,"Allocation"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Dependency_checking_unit/src/Dependency_checking_unit_genMealy.cpp
r121 r123 26 26 log_function(Dependency_checking_unit,FUNCTION,_name.c_str()); 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 // Tcontrol_t val [_param->_nb_inst_insert]; 29 31 // Tcontrol_t ack [_param->_nb_inst_insert]; … … 223 225 PORT_WRITE(out_RENAME_OUT_NUM_REG_RE_PHY_NEW [i], num_reg_re_phy_new [i]); 224 226 } 227 } 225 228 226 229 log_end(Dependency_checking_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h
r110 r123 91 91 public : SC_IN (Tspecial_address_t) ** in_PUSH_SPR_NUM_REG; 92 92 93 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 94 #ifdef DEBUG_TEST 95 public : SC_OUT(uint32_t ) * out_INFO_NB_GPR_FREE; 96 public : SC_OUT(uint32_t ) * out_INFO_NB_SPR_FREE; 97 #endif 98 93 99 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 94 100 private : generic::priority::Priority * _priority_gpr; … … 141 147 #ifdef SYSTEMC 142 148 public : void transition (void); 149 #ifdef DEBUG_TEST 150 public : void genMoore (void); 151 #endif 143 152 public : void genMealy_pop (void); 144 153 public : void genMealy_push_gpr (void); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp
r110 r123 39 39 log_printf(FUNC,Free_List_unit,FUNCTION,"Begin"); 40 40 41 #if DEBUG_Free_List_unit == true42 log_printf(INFO,Free_List_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());41 // #if DEBUG_Free_List_unit == true 42 // log_printf(INFO,Free_List_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 43 44 std::cout << *param << std::endl;45 #endif44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Free_List_unit,FUNCTION,"Allocation"); … … 85 85 # endif 86 86 87 #ifdef DEBUG_TEST 88 log_printf(INFO,Free_List_unit,FUNCTION,"Method - genMoore"); 89 90 SC_METHOD (genMoore); 91 dont_initialize (); 92 sensitive << (*(in_CLOCK)).neg(); 93 94 # ifdef SYSTEMCASS_SPECIFIC 95 // List dependency information 96 # endif 97 #endif 87 98 log_printf(INFO,Free_List_unit,FUNCTION,"Method - genMealy_pop"); 88 99 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp
r112 r123 92 92 } 93 93 94 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 95 #ifdef DEBUG_TEST 96 { 97 ALLOC0_INTERFACE_BEGIN("info",OUT, NORTH, _("Information")); 98 99 ALLOC0_SIGNAL_OUT(out_INFO_NB_GPR_FREE,"nb_gpr_free",uint32_t,_param->_size_general_register+1); 100 ALLOC0_SIGNAL_OUT(out_INFO_NB_SPR_FREE,"nb_spr_free",uint32_t,_param->_size_special_register+1); 101 102 ALLOC0_INTERFACE_END(); 103 } 104 #endif 105 94 106 if (usage_is_set(_usage,USE_SYSTEMC)) 95 107 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp
r112 r123 45 45 DELETE1_SIGNAL( in_PUSH_SPR_NUM_REG,_param->_nb_push,_param->_size_special_register); 46 46 47 #ifdef DEBUG_TEST 48 DELETE0_SIGNAL(out_INFO_NB_GPR_FREE,_param->_size_general_register+1); 49 DELETE0_SIGNAL(out_INFO_NB_SPR_FREE,_param->_size_special_register+1); 50 #endif 51 47 52 DELETE1(_gpr_list ,_param->_nb_bank); 48 53 DELETE1(_spr_list ,_param->_nb_bank); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp
r109 r123 26 26 log_function(Free_List_unit,FUNCTION,_name.c_str()); 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 std::list<generic::priority::select_t> * select_gpr = _priority_gpr->select(); 29 31 std::list<generic::priority::select_t>::iterator it_gpr=select_gpr->begin(); … … 32 34 std::list<generic::priority::select_t>::iterator it_spr=select_spr->begin(); 33 35 34 for (uint32_t i=0; i<_param->_nb_pop; i++)36 for (uint32_t i=0; i<_param->_nb_pop; i++) 35 37 { 36 38 log_printf(TRACE,Free_List_unit,FUNCTION," * POP [%d]",i); … … 104 106 105 107 internal_POP_ACK [i] = gpr_ack and spr_ack; 106 PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]);107 108 } 108 109 … … 177 178 // PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); 178 179 // } 179 180 } 181 else 182 { 183 for (uint32_t i=0; i<_param->_nb_pop; i++) 184 internal_POP_ACK [i] = 0; 185 } 186 187 for (uint32_t i=0; i<_param->_nb_pop; i++) 188 PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); 189 180 190 181 191 log_end(Free_List_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_gpr.cpp
r108 r123 26 26 log_function(Free_List_unit,FUNCTION,_name.c_str()); 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 // bank conflit 29 31 bool bank_use [_param->_nb_bank]; … … 59 61 60 62 internal_PUSH_GPR_ACK [i] = gpr_ack; 61 PORT_WRITE(out_PUSH_GPR_ACK [i], internal_PUSH_GPR_ACK [i]);62 63 } 64 } 65 else 66 { 67 for (uint32_t i=0; i<_param->_nb_push; i++) 68 internal_PUSH_GPR_ACK [i] = 0; 69 } 70 71 for (uint32_t i=0; i<_param->_nb_push; i++) 72 PORT_WRITE(out_PUSH_GPR_ACK [i], internal_PUSH_GPR_ACK [i]); 63 73 64 74 log_end(Free_List_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_push_spr.cpp
r108 r123 26 26 log_function(Free_List_unit,FUNCTION,_name.c_str()); 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 bool bank_use [_param->_nb_bank]; 29 31 for (uint32_t i=0; i<_param->_nb_bank; i++) … … 51 53 52 54 internal_PUSH_SPR_ACK [i] = spr_ack; 53 PORT_WRITE(out_PUSH_SPR_ACK [i], internal_PUSH_SPR_ACK [i]);54 55 } 55 56 } 57 else 58 { 59 for (uint32_t i=0; i<_param->_nb_push; i++) 60 internal_PUSH_SPR_ACK [i] = 0; 61 } 62 63 for (uint32_t i=0; i<_param->_nb_push; i++) 64 PORT_WRITE(out_PUSH_SPR_ACK [i], internal_PUSH_SPR_ACK [i]); 65 56 66 log_end(Free_List_unit,FUNCTION); 57 67 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit.cpp
r122 r123 39 39 log_printf(FUNC,Register_Address_Translation_unit,FUNCTION,"Begin"); 40 40 41 #if DEBUG_Register_Address_Translation_unit == true42 log_printf(INFO,Register_Address_Translation_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());43 44 std::cout << *param << std::endl;45 #endif41 // #if DEBUG_Register_Address_Translation_unit == true 42 // log_printf(INFO,Register_Address_Translation_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Register_Address_Translation_unit,FUNCTION,"Allocation"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_genMealy_rename.cpp
r122 r123 29 29 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 30 30 if (PORT_READ(in_RENAME_VAL [i])) // not in sensitive list : it's to have valide value to array access 31 {31 { 32 32 log_printf(TRACE,Register_Address_Translation_unit,FUNCTION," * RENAME [%d]",i); 33 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp
r122 r123 40 40 { 41 41 rat_gpr_not_speculative [i][j][k] = gpr++; 42 // rat_gpr_speculative [i][j][k] = gpr++;43 42 rat_gpr_speculative_valid [i][j][k] = false; 44 // rat_gpr_update_table [i][j][k] = false; 43 rat_gpr_speculative [i][j][k] = 0 ; // not necessary 44 rat_gpr_update_table [i][j][k] = false; // not necessary 45 45 } 46 46 for (uint32_t k=0; k<_param->_nb_special_register_logic; k++) 47 47 { 48 48 rat_spr_not_speculative [i][j][k] = spr++; 49 // rat_spr_speculative [i][j][k] = spr++;50 49 rat_spr_speculative_valid [i][j][k] = false; 51 // rat_spr_update_table [i][j][k] = false; 50 rat_spr_speculative [i][j][k] = 0 ; // not necessary 51 rat_spr_update_table [i][j][k] = false; // not necessary 52 52 } 53 53 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp
r110 r123 39 39 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 40 40 41 #if DEBUG_Register_translation_unit_Glue == true42 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());43 44 std::cout << *param << std::endl;45 #endif41 // #if DEBUG_Register_translation_unit_Glue == true 42 // log_printf(INFO,Register_translation_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp
r117 r123 26 26 log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str()); 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 29 31 { … … 84 86 PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); 85 87 } 88 } 89 // else 90 // { 91 // } 86 92 87 93 log_end(Register_translation_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert_valack.cpp
r110 r123 25 25 log_begin(Register_translation_unit_Glue,FUNCTION); 26 26 log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str()); 27 28 if (PORT_READ(in_NRESET)) 29 { 27 30 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 28 31 { … … 86 89 87 90 } 91 } 92 else 93 { 94 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 95 { 96 #ifdef STATISTICS 97 internal_INSERT_RENAME_ACK [i] = 0; 98 #endif 99 100 PORT_WRITE(out_INSERT_RENAME_ACK [i], 0); 101 PORT_WRITE(out_INSERT_INSERT_VAL [i], 0); 102 PORT_WRITE(out_INSERT_RAT_INSERT_VAL [i], 0); 103 PORT_WRITE(out_INSERT_FREE_LIST_VAL [i], 0); 104 PORT_WRITE(out_INSERT_STAT_LIST_VAL [i], 0); 105 } 106 } 88 107 89 108 log_end(Register_translation_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp
r110 r123 26 26 log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str()); 27 27 28 if (PORT_READ(in_NRESET)) 29 { 28 30 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 29 31 { … … 60 62 log_printf(TRACE,Register_translation_unit_Glue,FUNCTION," * stat_list_ack (r): %d",stat_list_ack ); 61 63 } 64 } 65 else 66 { 67 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 68 { 69 PORT_WRITE(out_RETIRE_ACK [i], 0); 70 PORT_WRITE(out_RETIRE_RAT_VAL [i], 0); 71 PORT_WRITE(out_RETIRE_STAT_LIST_VAL [i], 0); 72 } 73 } 62 74 63 75 log_end(Register_translation_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
r121 r123 82 82 public : SC_OUT(Tcontrol_t ) ** out_RETIRE_ACK ;//[nb_inst_retire] 83 83 public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE ;//[nb_inst_retire] 84 // 85 // 86 // 87 // 88 // 89 // 84 //public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RA ;//[nb_inst_retire] 85 //public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] 86 //public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RB ;//[nb_inst_retire] 87 //public : SC_IN (Tgeneral_address_t) ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] 88 //public : SC_IN (Tcontrol_t ) ** in_RETIRE_READ_RC ;//[nb_inst_retire] 89 //public : SC_IN (Tspecial_address_t) ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] 90 90 public : SC_IN (Tcontrol_t ) ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] 91 91 public : SC_IN (Tcontrol_t ) ** in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire] … … 106 106 public : SC_IN (Tcontrol_t) ** in_PUSH_SPR_ACK ;//[nb_reg_free] 107 107 public : SC_OUT(Tspecial_address_t) ** out_PUSH_SPR_NUM_REG ;//[nb_reg_free] 108 109 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 110 #ifdef DEBUG_TEST 111 public : SC_IN (bool ) * in_INFO_ROB_EMPTY ; 112 public : SC_IN (uint32_t ) * in_INFO_NB_GPR_FREE; 113 public : SC_IN (uint32_t ) * in_INFO_NB_SPR_FREE; 114 #endif 108 115 109 116 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h
r117 r123 66 66 else 67 67 { 68 // _is_link = 0; // already unset 68 _is_link = 0; 69 69 _is_use = 0; 70 70 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit.cpp
r112 r123 38 38 log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin"); 39 39 40 #if DEBUG_Stat_List_unit == true41 log_printf(INFO,Stat_List_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());40 // #if DEBUG_Stat_List_unit == true 41 // log_printf(INFO,Stat_List_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 42 42 43 std::cout << *param << std::endl;44 #endif43 // std::cout << *param << std::endl; 44 // #endif 45 45 46 46 log_printf(INFO,Stat_List_unit,FUNCTION,"Allocation"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
r121 r123 125 125 } 126 126 127 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 128 #ifdef DEBUG_TEST 129 { 130 ALLOC0_INTERFACE_BEGIN("info",IN, NORTH, _("Information")); 131 132 ALLOC0_SIGNAL_IN ( in_INFO_ROB_EMPTY ,"rob_empty" ,bool ,1); 133 ALLOC0_SIGNAL_IN ( in_INFO_NB_GPR_FREE,"nb_gpr_free",uint32_t,_param->_size_general_register+1); 134 ALLOC0_SIGNAL_IN ( in_INFO_NB_SPR_FREE,"nb_spr_free",uint32_t,_param->_size_special_register+1); 135 136 ALLOC0_INTERFACE_END(); 137 } 138 #endif 139 127 140 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 128 141 if (usage_is_set(_usage,USE_SYSTEMC)) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
r121 r123 71 71 DELETE1_SIGNAL(out_PUSH_SPR_NUM_REG,_param->_nb_reg_free,_param->_size_special_register); 72 72 73 #ifdef DEBUG_TEST 74 DELETE0_SIGNAL( in_INFO_ROB_EMPTY ,1); 75 DELETE0_SIGNAL( in_INFO_NB_GPR_FREE,_param->_size_general_register+1); 76 DELETE0_SIGNAL( in_INFO_NB_SPR_FREE,_param->_size_special_register+1); 77 #endif 78 73 79 DELETE2(gpr_stat_list ,_param->_nb_bank,_param->_nb_general_register_by_bank); 74 80 DELETE2(spr_stat_list ,_param->_nb_bank,_param->_nb_special_register_by_bank); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_genMoore.cpp
r118 r123 28 28 log_function(Stat_List_unit,FUNCTION,_name.c_str()); 29 29 30 if (PORT_READ(in_NRESET)) 31 { 30 32 uint32_t gpr_ptr = reg_GPR_PTR_FREE; 31 33 uint32_t spr_ptr = reg_SPR_PTR_FREE; … … 81 83 internal_PUSH_GPR_NUM_REG [i] = gpr_ptr ; 82 84 83 PORT_WRITE(out_PUSH_GPR_VAL [i], val);84 85 if (val) 85 86 PORT_WRITE(out_PUSH_GPR_NUM_REG[i], ((bank_gpr<<_param->_shift_gpr) | gpr_ptr)); … … 126 127 internal_PUSH_SPR_NUM_REG [i] = spr_ptr ; 127 128 128 PORT_WRITE(out_PUSH_SPR_VAL [i], val);129 129 if (val) 130 130 PORT_WRITE(out_PUSH_SPR_NUM_REG[i], ((bank_spr<<_param->_shift_spr) | spr_ptr)); … … 133 133 134 134 } 135 135 } 136 else 137 { 138 for (uint32_t i=0; i<_param->_nb_reg_free; i++) 139 { 140 internal_PUSH_GPR_VAL [i] = 0; 141 // internal_PUSH_GPR_NUM_BANK [i] = bank_gpr; 142 // internal_PUSH_GPR_NUM_REG [i] = gpr_ptr ; 143 internal_PUSH_SPR_VAL [i] = 0; 144 // internal_PUSH_SPR_NUM_BANK [i] = bank_spr; 145 // internal_PUSH_SPR_NUM_REG [i] = spr_ptr ; 146 } 147 } 148 149 for (uint32_t i=0; i<_param->_nb_reg_free; i++) 150 { 151 PORT_WRITE(out_PUSH_GPR_VAL [i], internal_PUSH_GPR_VAL [i]); 152 PORT_WRITE(out_PUSH_SPR_VAL [i], internal_PUSH_SPR_VAL [i]); 153 } 154 136 155 log_end(Stat_List_unit,FUNCTION); 137 156 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
r118 r123 43 43 else 44 44 { 45 #ifdef DEBUG_TEST 46 { 47 uint32_t free_list_nb_gpr_free = PORT_READ(in_INFO_NB_GPR_FREE); 48 uint32_t free_list_nb_spr_free = PORT_READ(in_INFO_NB_SPR_FREE); 49 uint32_t stat_list_nb_gpr_free = 0; 50 uint32_t stat_list_nb_spr_free = 0; 51 uint32_t stat_list_nb_gpr_can_free = 0; 52 uint32_t stat_list_nb_spr_can_free = 0; 53 uint32_t stat_list_nb_gpr_link = 0; 54 uint32_t stat_list_nb_spr_link = 0; 55 uint32_t stat_list_nb_gpr_use = 0; 56 uint32_t stat_list_nb_spr_use = 0; 57 58 for (uint32_t i=0; i<_param->_nb_bank; i++) 59 { 60 for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) 61 { 62 if (gpr_stat_list [i][j]._is_free) 63 stat_list_nb_gpr_free ++; 64 if (gpr_stat_list [i][j]._is_link) 65 stat_list_nb_gpr_link ++; 66 if (gpr_stat_list [i][j]._is_use) 67 stat_list_nb_gpr_use ++; 68 if (gpr_stat_list [i][j].can_free()) 69 stat_list_nb_gpr_can_free ++; 70 } 71 for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) 72 { 73 if (spr_stat_list [i][j]._is_free) 74 stat_list_nb_spr_free ++; 75 if (spr_stat_list [i][j]._is_link) 76 stat_list_nb_spr_link ++; 77 if (spr_stat_list [i][j]._is_use) 78 stat_list_nb_spr_use ++; 79 if (spr_stat_list [i][j].can_free()) 80 stat_list_nb_spr_can_free ++; 81 } 82 } 83 84 uint32_t nb_gpr_free = stat_list_nb_gpr_free+stat_list_nb_gpr_can_free; 85 uint32_t nb_spr_free = stat_list_nb_spr_free+stat_list_nb_spr_can_free; 86 uint32_t _nb_gpr_free = (_param->_nb_general_register - _param->_nb_gpr_use_init); 87 uint32_t _nb_spr_free = (_param->_nb_special_register - _param->_nb_spr_use_init); 88 uint32_t nb_gpr_link = stat_list_nb_gpr_link - _param->_nb_gpr_use_init; 89 uint32_t nb_spr_link = stat_list_nb_spr_link - _param->_nb_spr_use_init; 90 uint32_t nb_gpr_use = stat_list_nb_gpr_use - _param->_nb_gpr_use_init; 91 uint32_t nb_spr_use = stat_list_nb_spr_use - _param->_nb_spr_use_init; 92 93 log_printf(TRACE,Stat_List_unit,FUNCTION," * nb_gpr_free : stat_list %d - free_list %d - free %d, link %d (%d), use %d (%d)",stat_list_nb_gpr_free,free_list_nb_gpr_free,nb_gpr_free,nb_gpr_link,stat_list_nb_gpr_link,nb_gpr_use,stat_list_nb_gpr_use); 94 log_printf(TRACE,Stat_List_unit,FUNCTION," * nb_spr_free : stat_list %d - free_list %d - free %d, link %d (%d), use %d (%d)",stat_list_nb_spr_free,free_list_nb_spr_free,nb_spr_free,nb_spr_link,stat_list_nb_spr_link,nb_spr_use,stat_list_nb_spr_use); 95 96 if (free_list_nb_gpr_free != stat_list_nb_gpr_free) 97 throw ERRORMORPHEO(FUNCTION,toString(_("Number of free general register is not valid. %d in Stat_List and %d in Free_list.\n"),stat_list_nb_gpr_free,free_list_nb_gpr_free)); 98 if (free_list_nb_spr_free != stat_list_nb_spr_free) 99 throw ERRORMORPHEO(FUNCTION,toString(_("Number of free general register is not valid. %d in Stat_List and %d in Free_list.\n"),stat_list_nb_spr_free,free_list_nb_spr_free)); 100 101 if (PORT_READ(in_INFO_ROB_EMPTY) and (nb_gpr_free != _nb_gpr_free)) 102 throw ERRORMORPHEO(FUNCTION,toString(_("Rob is empty but they have %d general registers free or can_free and must be %d registers."),nb_gpr_free,_nb_gpr_free)); 103 104 if (PORT_READ(in_INFO_ROB_EMPTY) and (nb_spr_free != _nb_spr_free)) 105 throw ERRORMORPHEO(FUNCTION,toString(_("Rob is empty but they have %d special registers free or can_free and must be %d registers."),nb_spr_free,_nb_spr_free)); 106 } 107 #endif 108 45 109 // ===================================================== 46 110 // =====[ INSERT ]====================================== … … 256 320 for (uint32_t i=0; i<_param->_nb_bank; i++) 257 321 for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++) 258 log_printf(TRACE,Stat_List_unit,FUNCTION," * GPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d ",322 log_printf(TRACE,Stat_List_unit,FUNCTION," * GPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d, use %.1d", 259 323 i, 260 324 j, 261 325 (i<<_param->_shift_gpr)|j, 262 326 gpr_stat_list[i][j]._is_free, 263 gpr_stat_list[i][j]._is_link// , 327 gpr_stat_list[i][j]._is_link, 328 gpr_stat_list[i][j]._is_use// , 264 329 // gpr_stat_list[i][j]._is_valid, 265 330 // gpr_stat_list[i][j]._counter … … 267 332 for (uint32_t i=0; i<_param->_nb_bank; i++) 268 333 for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++) 269 log_printf(TRACE,Stat_List_unit,FUNCTION," * SPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d ",334 log_printf(TRACE,Stat_List_unit,FUNCTION," * SPR[%.4d][%.5d] (%.5d) - free %.1d, link %.1d, use %.1d", 270 335 i, 271 336 j, 272 337 (i<<_param->_shift_spr)|j, 273 338 spr_stat_list[i][j]._is_free, 274 spr_stat_list[i][j]._is_link// , 339 spr_stat_list[i][j]._is_link, 340 spr_stat_list[i][j]._is_use// , 275 341 // spr_stat_list[i][j]._is_valid, 276 342 // spr_stat_list[i][j]._counter -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/include/Register_translation_unit.h
r121 r123 137 137 public : SC_IN (Tevent_state_t ) *** in_RETIRE_EVENT_STATE ;//[nb_front_end][nb_context] 138 138 139 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 140 #ifdef DEBUG_TEST 141 public : SC_IN (bool ) * in_INFO_ROB_EMPTY ; 142 #endif 143 139 144 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 140 145 public : morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::dependency_checking_unit::Dependency_checking_unit * _component_dependency_checking_unit; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit.cpp
r88 r123 38 38 log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); 39 39 40 #if DEBUG_Register_translation_unit == true41 log_printf(INFO,Register_translation_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());40 // #if DEBUG_Register_translation_unit == true 41 // log_printf(INFO,Register_translation_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 42 42 43 std::cout << *param << std::endl;44 #endif43 // std::cout << *param << std::endl; 44 // #endif 45 45 46 46 log_printf(INFO,Register_translation_unit,FUNCTION,"Allocation"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp
r122 r123 149 149 ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); 150 150 } 151 152 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 153 #ifdef DEBUG_TEST 154 { 155 ALLOC0_INTERFACE_BEGIN("info",IN, NORTH, _("Information")); 156 157 ALLOC0_SIGNAL_IN ( in_INFO_ROB_EMPTY ,"rob_empty" ,bool ,1); 158 159 ALLOC0_INTERFACE_END(); 160 } 161 #endif 151 162 152 163 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 472 483 dest,"out_PUSH_SPR_"+toString(i)+"_NUM_REG"); 473 484 } 485 486 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 487 #ifdef DEBUG_TEST 488 { 489 dest = _name+"_stat_list_unit"; 490 #ifdef POSITION 491 _component->interface_map (src ,"info" 492 dest,"info"); 493 #endif 494 495 COMPONENT_MAP(_component,src ,"out_INFO_NB_GPR_FREE", 496 dest, "in_INFO_NB_GPR_FREE"); 497 COMPONENT_MAP(_component,src ,"out_INFO_NB_SPR_FREE", 498 dest, "in_INFO_NB_SPR_FREE"); 499 } 500 #endif 474 501 } 475 476 502 477 503 // =================================================================== … … 726 752 //out_PUSH_SPR_NUM_REG - free_list_unit 727 753 } 754 755 #ifdef DEBUG_TEST 756 { 757 dest = _name; 758 #ifdef POSITION 759 _component->interface_map (src ,"info" 760 dest,"info"); 761 #endif 762 763 PORT_MAP(_component,src , "in_INFO_ROB_EMPTY", 764 dest, "in_INFO_ROB_EMPTY"); 765 } 766 #endif 767 728 768 } 729 769 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_deallocation.cpp
r121 r123 94 94 DELETE2_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); 95 95 DELETE2_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); 96 97 #ifdef DEBUG_TEST 98 DELETE0_SIGNAL( in_INFO_ROB_EMPTY ,1); 99 #endif 96 100 } 97 101 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/include/Rename_select.h
r122 r123 75 75 public : SC_IN (Toperation_t ) *** in_RENAME_IN_OPERATION ;//[nb_front_end][nb_inst_decod] 76 76 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_NO_EXECUTE ;//[nb_front_end][nb_inst_decod] 77 //public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_HAVE_EVENT ;//[nb_front_end][nb_inst_decod] 78 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_LAST_EVENT ;//[nb_front_end][nb_inst_decod] 77 79 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] 78 80 #ifdef DEBUG … … 104 106 public : SC_OUT(Toperation_t ) ** out_RENAME_OUT_OPERATION ;//[nb_inst_rename] 105 107 public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_NO_EXECUTE ;//[nb_inst_rename] 108 public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_LAST_EVENT ;//[nb_inst_rename] 106 109 public : SC_OUT(Tcontrol_t ) ** out_RENAME_OUT_IS_DELAY_SLOT;//[nb_inst_rename] 107 110 #ifdef DEBUG … … 125 128 126 129 // ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 127 public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_FLUSH ;//[nb_front_end][nb_context]130 // public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_FLUSH ;//[nb_front_end][nb_context] 128 131 public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_STOP ;//[nb_front_end][nb_context] 129 132 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select.cpp
r122 r123 38 38 log_printf(FUNC,Rename_select,FUNCTION,"Begin"); 39 39 40 #if DEBUG_Core == true41 log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str());42 43 std::cout << *param << std::endl;44 #endif40 // #if DEBUG_Core == true 41 // log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str()); 42 43 // std::cout << *param << std::endl; 44 // #endif 45 45 46 46 log_printf(INFO,Rename_select,FUNCTION,"Allocation"); … … 96 96 << (*(in_RENAME_IN_OPERATION [i][j])) 97 97 << (*(in_RENAME_IN_NO_EXECUTE [i][j])) 98 // << (*(in_RENAME_IN_HAVE_EVENT [i][j])) 99 << (*(in_RENAME_IN_LAST_EVENT [i][j])) 98 100 << (*(in_RENAME_IN_IS_DELAY_SLOT [i][j])) 99 101 #ifdef DEBUG … … 125 127 for (uint32_t i=0; i<_param->_nb_front_end; i++) 126 128 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 127 sensitive << (*(in_RETIRE_EVENT_FLUSH [i][j]))129 sensitive // << (*(in_RETIRE_EVENT_FLUSH [i][j])) 128 130 << (*(in_RETIRE_EVENT_STOP [i][j])); 129 131 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_allocation.cpp
r122 r123 68 68 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 69 69 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 70 // _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAVE_EVENT ,"have_event" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 71 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 70 72 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 71 73 #ifdef DEBUG … … 103 105 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 104 106 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); 107 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ); 105 108 ALLOC1_SIGNAL_OUT(out_RENAME_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); 106 109 #ifdef DEBUG … … 130 133 ALLOC2_INTERFACE_BEGIN("retire_event", IN,NORTH, _("Retire event"), _param->_nb_front_end, _param->_nb_context[it1]); 131 134 132 _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]);135 // _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); 133 136 _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); 134 137 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_deallocation.cpp
r122 r123 37 37 DELETE2_SIGNAL( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation ); 38 38 DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 39 // DELETE2_SIGNAL( in_RENAME_IN_HAVE_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 40 DELETE2_SIGNAL( in_RENAME_IN_LAST_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 39 41 DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 40 42 #ifdef DEBUG … … 65 67 DELETE1_SIGNAL(out_RENAME_OUT_OPERATION ,_param->_nb_inst_rename,_param->_size_operation ); 66 68 DELETE1_SIGNAL(out_RENAME_OUT_NO_EXECUTE ,_param->_nb_inst_rename,1 ); 69 DELETE1_SIGNAL(out_RENAME_OUT_LAST_EVENT ,_param->_nb_inst_rename,1 ); 67 70 DELETE1_SIGNAL(out_RENAME_OUT_IS_DELAY_SLOT ,_param->_nb_inst_rename,1 ); 68 71 #ifdef DEBUG … … 85 88 DELETE1_SIGNAL(out_RENAME_OUT_EXCEPTION ,_param->_nb_inst_rename,_param->_size_exception ); 86 89 87 DELETE2_SIGNAL( in_RETIRE_EVENT_FLUSH ,_param->_nb_front_end, _param->_nb_context[it1],1);90 // DELETE2_SIGNAL( in_RETIRE_EVENT_FLUSH ,_param->_nb_front_end, _param->_nb_context[it1],1); 88 91 DELETE2_SIGNAL( in_RETIRE_EVENT_STOP ,_param->_nb_front_end, _param->_nb_context[it1],1); 89 92 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp
r122 r123 17 17 namespace rename_select { 18 18 19 // #define CONTINUE_ON_EVENT_STOP20 21 19 #undef FUNCTION 22 20 #define FUNCTION "Rename_select::genMealy" … … 28 26 Tcontrol_t val [_param->_nb_inst_rename]; 29 27 Tcontrol_t ack [_param->_nb_front_end][_param->_max_nb_inst_decod]; 30 Tcontrol_t previous_transaction [_param->_nb_front_end];31 28 32 29 for (uint32_t i=0; i<_param->_nb_inst_rename; ++i) 33 30 val [i] = false; 34 31 for (uint32_t i=0; i<_param->_nb_front_end; i++) 32 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) 33 ack [i][j] = false; 34 35 if (PORT_READ(in_NRESET)) 35 36 { 36 previous_transaction [i] = true; 37 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) 38 ack [i][j] = false; 39 } 37 Tcontrol_t previous_transaction [_param->_nb_front_end]; 38 for (uint32_t i=0; i<_param->_nb_front_end; i++) 39 previous_transaction [i] = true; 40 40 41 41 std::list<generic::priority::select_t> * select = _priority->select(); … … 71 71 72 72 // Test if ROB is Flushed 73 #ifndef CONTINUE_ON_EVENT_STOP74 73 if (not stop) 75 #endif76 74 { 77 75 // Find !!! … … 79 77 ack [x][y] = PORT_READ(in_RENAME_OUT_ACK [i]); 80 78 81 Tcontrol_t have_event = (PORT_READ(in_RETIRE_EVENT_FLUSH [x][context_id]) 82 #ifdef CONTINUE_ON_EVENT_STOP 83 or stop 84 #endif 85 );86 Tcontrol_t can_register_access = not have_event;87 Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]) or have_event);88 Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA[x][y]) and can_register_access);89 Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB[x][y]) and can_register_access);90 Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC[x][y]) and can_register_access);91 Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD[x][y]) and can_register_access);92 Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and can_register_access);93 //Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y]));94 //Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y]));95 //Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y]));96 //Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]));97 //Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]));79 // Tcontrol_t have_event = (PORT_READ(in_RETIRE_EVENT_FLUSH [x][context_id]) // or 80 // ); 81 // log_printf(TRACE,Rename_select,FUNCTION," * have_event : %d",have_event); 82 83 // Tcontrol_t can_register_access = not have_event; 84 // Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]) or have_event); 85 // Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y]) and can_register_access); 86 // Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y]) and can_register_access); 87 // Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y]) and can_register_access); 88 // Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]) and can_register_access); 89 // Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]) and can_register_access); 90 Tcontrol_t no_execute = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y])); 91 Tcontrol_t read_ra = (PORT_READ(in_RENAME_IN_READ_RA [x][y])); 92 Tcontrol_t read_rb = (PORT_READ(in_RENAME_IN_READ_RB [x][y])); 93 Tcontrol_t read_rc = (PORT_READ(in_RENAME_IN_READ_RC [x][y])); 94 Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y])); 95 Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y])); 98 96 99 log_printf(TRACE,Rename_select,FUNCTION," * have_event : %d",have_event); 100 log_printf(TRACE,Rename_select,FUNCTION," * no_execute (before) : %d",PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y])); 101 log_printf(TRACE,Rename_select,FUNCTION," * no_execute (after) : %d",no_execute); 97 log_printf(TRACE,Rename_select,FUNCTION," * no_execute : %d",no_execute); 102 98 103 99 if (_param->_have_port_front_end_id) … … 110 106 PORT_WRITE(out_RENAME_OUT_OPERATION [i],PORT_READ(in_RENAME_IN_OPERATION [x][y])); 111 107 PORT_WRITE(out_RENAME_OUT_NO_EXECUTE [i],no_execute); 108 PORT_WRITE(out_RENAME_OUT_LAST_EVENT [i],PORT_READ(in_RENAME_IN_LAST_EVENT [x][y])); 112 109 PORT_WRITE(out_RENAME_OUT_IS_DELAY_SLOT[i],PORT_READ(in_RENAME_IN_IS_DELAY_SLOT [x][y])); 113 110 #ifdef DEBUG … … 140 137 } 141 138 139 } 140 // else 141 // { 142 // } 143 142 144 for (uint32_t i=0; i<_param->_nb_inst_rename; ++i) 143 145 PORT_WRITE(out_RENAME_OUT_VAL [i], val [i]); … … 146 148 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; j++) 147 149 PORT_WRITE(out_RENAME_IN_ACK [i][j], ack [i][j]); 150 148 151 149 152 log_end(Rename_select,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue.cpp
r122 r123 40 40 usage_environment(_usage); 41 41 42 #if DEBUG_Rename_unit_Glue == true43 log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());44 45 std::cout << *param << std::endl;46 #endif42 // #if DEBUG_Rename_unit_Glue == true 43 // log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str()); 44 45 // std::cout << *param << std::endl; 46 // #endif 47 47 48 48 log_printf(INFO,Rename_unit_Glue,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert.cpp
r88 r123 25 25 log_function(Rename_unit_Glue,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET)) 28 { 27 29 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 28 30 { … … 104 106 PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_OPERATION [i],OPERATION ); 105 107 } 108 } 106 109 107 110 log_end(Rename_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp
r115 r123 25 25 log_function(Rename_unit_Glue,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET)) 28 { 27 29 // // Transaction must be in-order - made in rename_select 28 30 // Tcontrol_t previous_transaction = true; … … 75 77 // previous_transaction = RENAME_SELECT_VAL and RENAME_SELECT_ACK; 76 78 } 79 } 80 else 81 { 82 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 83 { 84 // PORT_WRITE(out_INSERT_VAL [i], 0); 85 PORT_WRITE(out_INSERT_RENAME_SELECT_ACK [i], 0); 86 PORT_WRITE(out_INSERT_REGISTER_TRANSLATION_VAL [i], 0); 87 PORT_WRITE(out_INSERT_LOAD_STORE_QUEUE_POINTER_VAL [i], 0); 88 } 89 } 77 90 78 91 log_end(Rename_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_retire_event_valack.cpp
r122 r123 25 25 log_function(Rename_unit_Glue,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET)) 28 { 27 29 for (uint32_t i=0; i<_param->_nb_front_end; i++) 28 30 for (uint32_t j=0; j<_param->_nb_context[i]; j++) … … 59 61 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * load_store_queue_pointer_ack (r) : %d",LOAD_STORE_QUEUE_POINTER_ACK); 60 62 } 61 63 } 64 else 65 { 66 for (uint32_t i=0; i<_param->_nb_front_end; i++) 67 for (uint32_t j=0; j<_param->_nb_context[i]; j++) 68 { 69 PORT_WRITE(out_RETIRE_EVENT_ACK [i][j], 0); 70 PORT_WRITE(out_RETIRE_EVENT_LOAD_STORE_QUEUE_POINTER_VAL [i][j], 0); 71 PORT_WRITE(out_RETIRE_EVENT_REGISTER_TRANSLATION_VAL [i][j], 0); 72 } 73 } 74 62 75 log_end(Rename_unit_Glue,FUNCTION); 63 76 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_retire_valack.cpp
r110 r123 25 25 log_function(Rename_unit_Glue,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET)) 28 { 27 29 // Transaction must be in-order - made in commit_unit 28 30 // Tcontrol_t previous_transaction = true; … … 58 60 log_printf(TRACE,Rename_unit_Glue,FUNCTION," * load_store_queue_pointer_ack (r) : %d",LOAD_STORE_QUEUE_POINTER_ACK); 59 61 } 60 62 } 63 else 64 { 65 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 66 { 67 PORT_WRITE(out_RETIRE_ACK [i], 0); 68 PORT_WRITE(out_RETIRE_LOAD_STORE_QUEUE_POINTER_VAL [i], 0); 69 PORT_WRITE(out_RETIRE_REGISTER_TRANSLATION_VAL [i], 0); 70 } 71 } 61 72 log_end(Rename_unit_Glue,FUNCTION); 62 73 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Rename_unit.h
r122 r123 77 77 public : SC_IN (Toperation_t ) *** in_RENAME_IN_OPERATION ;//[nb_front_end][nb_inst_decod] 78 78 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_NO_EXECUTE ;//[nb_front_end][nb_inst_decod] 79 //public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_HAVE_EVENT ;//[nb_front_end][nb_inst_decod] 80 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_LAST_EVENT ;//[nb_front_end][nb_inst_decod] 79 81 public : SC_IN (Tcontrol_t ) *** in_RENAME_IN_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] 80 82 #ifdef DEBUG … … 106 108 public : SC_OUT(Toperation_t ) ** out_INSERT_OPERATION ;//[nb_inst_insert] 107 109 public : SC_OUT(Tcontrol_t ) ** out_INSERT_NO_EXECUTE ;//[nb_inst_insert] 110 public : SC_OUT(Tcontrol_t ) ** out_INSERT_LAST_EVENT ;//[nb_inst_insert] 108 111 public : SC_OUT(Tcontrol_t ) ** out_INSERT_IS_DELAY_SLOT ;//[nb_inst_insert] 109 112 #ifdef DEBUG … … 173 176 public : SC_OUT(Tcontrol_t ) *** out_RETIRE_EVENT_ACK ;//[nb_front_end][nb_context] 174 177 public : SC_IN (Tevent_state_t ) *** in_RETIRE_EVENT_STATE ;//[nb_front_end][nb_context] 175 178 //public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_FLUSH ;//[nb_front_end][nb_context] 176 179 public : SC_IN (Tcontrol_t ) *** in_RETIRE_EVENT_STOP ;//[nb_front_end][nb_context] 177 180 178 181 // ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 179 182 public : SC_IN (Tspr_t ) *** in_SPR_READ_SR ;//[nb_front_end][nb_context] 183 184 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 185 #ifdef DEBUG_TEST 186 public : SC_IN (bool ) * in_INFO_ROB_EMPTY ; 187 #endif 180 188 181 189 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit.cpp
r88 r123 39 39 usage_environment(_usage); 40 40 41 #if DEBUG_Rename_unit == true42 log_printf(INFO,Rename_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());41 // #if DEBUG_Rename_unit == true 42 // log_printf(INFO,Rename_unit,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 43 44 std::cout << *param << std::endl;45 #endif44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Rename_unit,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_allocation.cpp
r122 r123 68 68 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 69 69 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 70 // _ALLOC2_SIGNAL_IN ( in_RENAME_IN_HAVE_EVENT ,"have_event" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 71 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 70 72 _ALLOC2_SIGNAL_IN ( in_RENAME_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_inst_decod[it1]); 71 73 #ifdef DEBUG … … 103 105 ALLOC1_SIGNAL_OUT(out_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 104 106 ALLOC1_SIGNAL_OUT(out_INSERT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); 107 ALLOC1_SIGNAL_OUT(out_INSERT_LAST_EVENT ,"last_event" ,Tcontrol_t ,1 ); 105 108 ALLOC1_SIGNAL_OUT(out_INSERT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1 ); 106 109 #ifdef DEBUG … … 182 185 _ALLOC2_VALACK_OUT(out_RETIRE_EVENT_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]); 183 186 _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STATE ,"state" ,Tevent_state_t ,_param->_size_event_state, _param->_nb_front_end, _param->_nb_context[it1]); 184 _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]);187 // _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_FLUSH ,"flush" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); 185 188 _ALLOC2_SIGNAL_IN ( in_RETIRE_EVENT_STOP ,"stop" ,Tcontrol_t ,1 , _param->_nb_front_end, _param->_nb_context[it1]); 186 189 … … 196 199 ALLOC2_INTERFACE_END(_param->_nb_front_end, _param->_nb_context[it1]); 197 200 } 201 202 // ~~~~~[ interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 203 #ifdef DEBUG_TEST 204 { 205 ALLOC0_INTERFACE_BEGIN("info",IN, NORTH, _("Information")); 206 207 ALLOC0_SIGNAL_IN ( in_INFO_ROB_EMPTY ,"rob_empty" ,bool ,1); 208 209 ALLOC0_INTERFACE_END(); 210 } 211 #endif 198 212 199 213 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 325 339 PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NO_EXECUTE" , 326 340 dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_NO_EXECUTE" ); 341 // PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_HAVE_EVENT" , 342 // dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_HAVE_EVENT" ); 343 PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_LAST_EVENT" , 344 dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_LAST_EVENT" ); 327 345 PORT_MAP(_component,src , "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT", 328 346 dest, "in_RENAME_IN_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT"); … … 387 405 PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_EXCEPTION_USE", 388 406 dest,"out_INSERT_" +toString(i)+"_EXCEPTION_USE"); 407 PORT_MAP(_component,src ,"out_RENAME_OUT_"+toString(i)+"_LAST_EVENT", 408 dest,"out_INSERT_" +toString(i)+"_LAST_EVENT"); 389 409 390 410 dest = _name+"_register_translation_unit"; … … 456 476 dest,"retire_event_"+toString(i)+"_"+toString(j)); 457 477 #endif 458 PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_FLUSH",459 dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_FLUSH");478 // PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_FLUSH", 479 // dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_FLUSH"); 460 480 PORT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STOP", 461 481 dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STOP"); … … 663 683 dest, "in_RETIRE_EVENT_"+toString(i)+"_"+toString(j)+"_STATE"); 664 684 } 685 686 687 #ifdef DEBUG_TEST 688 { 689 dest = _name; 690 #ifdef POSITION 691 _component->interface_map (src ,"info" 692 dest,"info"); 693 #endif 694 695 PORT_MAP(_component,src , "in_INFO_ROB_EMPTY", 696 dest, "in_INFO_ROB_EMPTY"); 697 } 698 #endif 665 699 } 666 700 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Rename_unit_deallocation.cpp
r122 r123 36 36 DELETE2_SIGNAL( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1],_param->_size_operation ); 37 37 DELETE2_SIGNAL( in_RENAME_IN_NO_EXECUTE ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 38 // DELETE2_SIGNAL( in_RENAME_IN_HAVE_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 39 DELETE2_SIGNAL( in_RENAME_IN_LAST_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 38 40 DELETE2_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1],1 ); 39 41 #ifdef DEBUG … … 64 66 DELETE1_SIGNAL(out_INSERT_OPERATION ,_param->_nb_inst_insert,_param->_size_operation ); 65 67 DELETE1_SIGNAL(out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert,1 ); 68 DELETE1_SIGNAL(out_INSERT_LAST_EVENT ,_param->_nb_inst_insert,1 ); 66 69 DELETE1_SIGNAL(out_INSERT_IS_DELAY_SLOT ,_param->_nb_inst_insert,1 ); 67 70 #ifdef DEBUG … … 129 132 DELETE2_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1],1); 130 133 DELETE2_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_event_state); 131 DELETE2_SIGNAL( in_RETIRE_EVENT_FLUSH ,_param->_nb_front_end, _param->_nb_context[it1],1);134 // DELETE2_SIGNAL( in_RETIRE_EVENT_FLUSH ,_param->_nb_front_end, _param->_nb_context[it1],1); 132 135 DELETE2_SIGNAL( in_RETIRE_EVENT_STOP ,_param->_nb_front_end, _param->_nb_context[it1],1); 133 136 134 137 DELETE2_SIGNAL(in_SPR_READ_SR ,_param->_nb_front_end, _param->_nb_context[it1],_param->_size_spr); 138 139 #ifdef DEBUG_TEST 140 DELETE0_SIGNAL( in_INFO_ROB_EMPTY ,1); 141 #endif 135 142 } 136 143 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit.cpp
r88 r123 39 39 usage_environment(_usage); 40 40 41 #if DEBUG_Core == true42 log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str());41 // #if DEBUG_Core == true 42 // log_printf(INFO,Core,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 43 44 std::cout << *param << std::endl;45 #endif44 // std::cout << *param << std::endl; 45 // #endif 46 46 47 47 log_printf(INFO,Special_Register_unit,FUNCTION,_("<%s> : Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMealy_spr_access.cpp
r98 r123 24 24 log_function(Special_Register_unit,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ SPR_ACCESS ]================================================ … … 72 74 PORT_WRITE(out_SPR_ACCESS_INVALID [i], not valid); 73 75 } 76 } 77 // else 78 // { 79 80 // } 74 81 75 82 log_end(Special_Register_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_genMoore.cpp
r98 r123 24 24 log_function(Special_Register_unit,FUNCTION,_name.c_str()); 25 25 26 // if (PORT_READ(in_NRESET)) 27 { 26 28 // =================================================================== 27 29 // =====[ SPR_READ ]================================================== … … 34 36 // PORT_WRITE(out_SPR_READ_SR [i][j],sr->read()); 35 37 // } 38 } 36 39 37 40 log_end(Special_Register_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h
r122 r123 76 76 public : SC_IN (Toperation_t ) *** in_RENAME_OPERATION ;//[nb_front_end][nb_inst_decod] 77 77 public : SC_IN (Tcontrol_t ) *** in_RENAME_NO_EXECUTE ;//[nb_front_end][nb_inst_decod] 78 //public : SC_IN (Tcontrol_t ) *** in_RENAME_HAVE_EVENT ;//[nb_front_end][nb_inst_decod] 79 public : SC_IN (Tcontrol_t ) *** in_RENAME_LAST_EVENT ;//[nb_front_end][nb_inst_decod] 78 80 public : SC_IN (Tcontrol_t ) *** in_RENAME_IS_DELAY_SLOT ;//[nb_front_end][nb_inst_decod] 79 81 #ifdef DEBUG -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine.cpp
r88 r123 38 38 usage_environment(_usage); 39 39 40 #if DEBUG_OOO_Engine == true41 log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> Parameters"),_name.c_str());40 // #if DEBUG_OOO_Engine == true 41 // log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> Parameters"),_name.c_str()); 42 42 43 std::cout << *param << std::endl;44 #endif43 // std::cout << *param << std::endl; 44 // #endif 45 45 46 46 log_printf(INFO,OOO_Engine,FUNCTION,_("<%s> Allocation"),_name.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
r122 r123 65 65 _ALLOC2_SIGNAL_IN ( in_RENAME_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 66 66 _ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 67 // _ALLOC2_SIGNAL_IN ( in_RENAME_HAVE_EVENT ,"HAVE_EVENT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 68 _ALLOC2_SIGNAL_IN ( in_RENAME_LAST_EVENT ,"LAST_EVENT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 67 69 _ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 68 70 #ifdef DEBUG … … 441 443 PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NO_EXECUTE" , 442 444 dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NO_EXECUTE" ); 445 // PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_HAVE_EVENT" , 446 // dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_HAVE_EVENT" ); 447 PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_LAST_EVENT" , 448 dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_LAST_EVENT" ); 443 449 PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT", 444 450 dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT"); … … 511 517 COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_IS_DELAY_SLOT" , 512 518 dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" ); 519 // COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_HAVE_EVENT" , 520 // dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_HAVE_EVENT" ); 521 COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_LAST_EVENT" , 522 dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_LAST_EVENT" ); 513 523 #ifdef DEBUG 514 524 COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_ADDRESS" , … … 682 692 COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE", 683 693 dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE"); 684 COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_FLUSH",685 dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_FLUSH");694 // COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_FLUSH", 695 // dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_FLUSH"); 686 696 COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STOP", 687 697 dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STOP"); … … 715 725 } 716 726 } 727 728 // ~~~~~[ Interface : "info" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 729 #ifdef DEBUG_TEST 730 { 731 dest = _name+"_commit_unit"; 732 733 #ifdef POSITION 734 _component->interface_map (src ,"info", 735 dest,"info"); 736 #endif 737 COMPONENT_MAP(_component,src , "in_INFO_ROB_EMPTY", 738 dest,"out_INFO_ROB_EMPTY"); 739 } 740 #endif 717 741 } 718 742 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
r122 r123 35 35 DELETE2_SIGNAL( in_RENAME_OPERATION ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_operation ); 36 36 DELETE2_SIGNAL( in_RENAME_NO_EXECUTE ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); 37 // DELETE2_SIGNAL( in_RENAME_HAVE_EVENT ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); 38 DELETE2_SIGNAL( in_RENAME_LAST_EVENT ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); 37 39 DELETE2_SIGNAL( in_RENAME_IS_DELAY_SLOT ,_param->_nb_front_end,_param->_nb_inst_decod[it1],1 ); 38 40 #ifdef DEBUG
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