- Timestamp:
- Jun 17, 2009, 2:11:25 PM (16 years ago)
- Location:
- trunk/IPs/systemC
- Files:
-
- 14 added
- 71 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/Environment/Common/include/Debug.h
r122 r124 3 3 4 4 #define DEBUG_true true 5 #define DEBUG_ENVIRONMENT false5 #define DEBUG_ENVIRONMENT true 6 6 #define DEBUG_CACHE false 7 7 #define DEBUG_DATA false -
trunk/IPs/systemC/Environment/include/Respons.h
r81 r124 9 9 class Respons 10 10 { 11 public : uint32_t port ; 11 12 public : T1 trdid ; // number of thread 12 13 public : T2 pktid ; // number of packet … … 26 27 // }; 27 28 28 public : Respons (T1 trdid , 29 public : Respons (uint32_t port , 30 T1 trdid , 29 31 T2 pktid , 30 32 uint32_t nb_word , … … 34 36 ) 35 37 { 38 this->port = port; 36 39 this->trdid = trdid; 37 40 this->pktid = pktid; … … 57 60 public : friend std::ostream& operator<< (std::ostream& output, Respons x) 58 61 { 59 output << x.trdid << " " 62 output << x.port << " " 63 << x.trdid << " " 60 64 << x.pktid << " " 61 65 << x.error << " "; -
trunk/IPs/systemC/Environment/src/Environment_genMoore.cpp
r88 r124 30 30 //----------------------------------------------------------------------------- 31 31 { 32 // init 32 33 for (uint32_t j = 0; j < param->icache_dedicated_nb_port [i]; j ++) 34 icache_rsp_val [i][j] = 0; 35 36 for (uint32_t j = 0; j+1 < component_buffer_irsp [i]->nb_slot_use(); j ++) 33 37 { 34 38 // Test the number of element in the respons's buffer 35 if (j >= component_buffer_irsp [i]->nb_slot_use()) 36 { 37 icache_rsp_val [i][j] = 0; // No respons 38 } 39 else 40 { 41 queue::slot_t<irsp_t*> slot = component_buffer_irsp [i]->read(j); 39 40 queue::slot_t<irsp_t*> slot = component_buffer_irsp [i]->read(j); 41 42 uint32_t port = slot._data->port; 43 44 bool val = ((slot._delay == 0) and (icache_rsp_val [i][port] == 0)); 45 46 _cout(ENVIRONMENT, "buffer_irsp [%d][%d] - delay %d - port %d\n",i,j,slot._delay,port); 47 48 49 if (val) 50 { 51 _cout(ENVIRONMENT, "ICACHE_RSP [%d][%d] - respons valid\n",i,port); 52 53 icache_rsp_val [i][port] = 1; 54 55 ICACHE_RSP_CONTEXT_ID [i][port]->write(slot._data->trdid); // TODO : test if exist 56 ICACHE_RSP_PACKET_ID [i][port]->write(slot._data->pktid); // TODO : test if exist 57 ICACHE_RSP_ERROR [i][port]->write(slot._data->error); 42 58 43 bool val = (slot._delay == 0); 44 45 icache_rsp_val [i][j] = (val); // respons if have a result 46 47 if (val) 48 { 49 ICACHE_RSP_CONTEXT_ID [i][j]->write(slot._data->trdid); // TODO : test if exist 50 ICACHE_RSP_PACKET_ID [i][j]->write(slot._data->pktid); // TODO : test if exist 51 ICACHE_RSP_ERROR [i][j]->write(slot._data->error); 52 53 for (uint32_t k = 0; k < param->iaccess_nb_instruction[i]; k ++) 54 { 55 Ticache_instruction_t data = 0; 56 57 atoi (slot._data->data[k], data, param->iaccess_size_instruction[i]/8); 58 59 ICACHE_RSP_INSTRUCTION [i][j][k]->write(data); 60 } 61 } 62 } 63 64 ICACHE_RSP_VAL [i][j]->write (icache_rsp_val [i][j]); 65 } 59 for (uint32_t k = 0; k < param->iaccess_nb_instruction[i]; k ++) 60 { 61 Ticache_instruction_t data = 0; 62 63 atoi (slot._data->data[k], data, param->iaccess_size_instruction[i]/8); 64 65 ICACHE_RSP_INSTRUCTION [i][port][k]->write(data); 66 } 67 } 68 } 69 70 for (uint32_t j = 0; j < param->icache_dedicated_nb_port [i]; j ++) 71 ICACHE_RSP_VAL [i][j]->write (icache_rsp_val [i][j]); 66 72 } 67 73 … … 103 109 if (val) 104 110 { 111 _cout(ENVIRONMENT, "DCACHE_RSP [%d][%d] - respons valid\n",i,j); 112 105 113 DCACHE_RSP_CONTEXT_ID [i][j]->write(slot._data->trdid); // TODO : test if exist 106 114 DCACHE_RSP_PACKET_ID [i][j]->write(slot._data->pktid); // TODO : test if exist -
trunk/IPs/systemC/Environment/src/Environment_transition.cpp
r123 r124 44 44 if (ICACHE_REQ_VAL [i][j]->read() and icache_req_ack [i][j]) 45 45 { 46 _cout(ENVIRONMENT, "ICACHE_REQ [%d] : Transaction accepted\n",i);46 _cout(ENVIRONMENT, "ICACHE_REQ [%d][%d] : Transaction accepted\n",i,j); 47 47 48 48 Ticache_context_t context = ICACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence … … 83 83 { 84 84 uint32_t addr = address+k*(size); 85 _cout(ENVIRONMENT," * addr : %.8x \n",addr);85 _cout(ENVIRONMENT," * addr : %.8x - ",addr); 86 86 87 87 bus_error |= !component_data->read(addr,size,read_iram[k]); … … 93 93 } 94 94 95 _cout(ENVIRONMENT," * inst :");95 //_cout(ENVIRONMENT," * inst : "); 96 96 for (int32_t cpt=(param->iaccess_size_instruction[i]/8)-1; cpt>=0; --cpt) 97 97 __cout(ENVIRONMENT, "%.2x",0xff&static_cast<uint32_t>(read_iram[k][cpt])); … … 144 144 _cout(ENVIRONMENT, " * push in buffer_irsp[%d]\n",i); 145 145 146 irsp_t * rsp = new irsp_t(context, 146 irsp_t * rsp = new irsp_t(j, 147 context, 147 148 packet, 148 149 param->iaccess_nb_instruction[i], … … 163 164 if (DCACHE_REQ_VAL [i][j]->read() and dcache_req_ack [i][j]) 164 165 { 165 _cout(ENVIRONMENT, "DCACHE_REQ [%d] : Transaction accepted\n",i);166 _cout(ENVIRONMENT, "DCACHE_REQ [%d][%d] : Transaction accepted\n",i,j); 166 167 167 168 Tdcache_context_t context = DCACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence … … 339 340 340 341 uint32_t num_ramlock = (address - entity.segment->getBase()); // Char access 342 uint32_t num_lock = num_ramlock % (param->daccess_size_data [i]/8); 341 343 uint32_t num_component_ramlock = entity.segment->getIndex(); 342 344 343 _cout(ENVIRONMENT," * num_ramlock : %d\n",num_ramlock ); 344 _cout(ENVIRONMENT," * num_component_ramlock : %d\n",num_component_ramlock); 345 // _cout(ENVIRONMENT," * num_ramlock : %d\n",num_ramlock ); 346 // _cout(ENVIRONMENT," * num_lock : %d\n",num_lock ); 347 // _cout(ENVIRONMENT," * num_component_ramlock : %d\n",num_component_ramlock); 348 _cout(true," * num_ramlock : %d\n",num_ramlock ); 349 _cout(true," * num_lock : %d\n",num_lock ); 350 _cout(true," * num_component_ramlock : %d\n",num_component_ramlock); 345 351 346 352 // No test : because out of range … … 352 358 353 359 memset (read_dram[0],0,size); 354 360 355 361 if (must_read == true) 356 read_dram [0][ 0] = static_cast<char>(component_ramlock [num_component_ramlock]->read (num_ramlock));362 read_dram [0][num_lock] = static_cast<char>(component_ramlock [num_component_ramlock]->read (num_ramlock)); 357 363 if (must_write == true) 358 read_dram [0][0] = static_cast<char>(component_ramlock [num_component_ramlock]->write(num_ramlock)); 364 read_dram [0][num_lock] = static_cast<char>(component_ramlock [num_component_ramlock]->write(num_ramlock)); 365 366 _cout(true," * lock : %d\n",(int)read_dram [0][num_lock]); 367 // _cout(ENVIRONMENT," * lock : %d\n",(int)read_dram [0][num_lock]); 359 368 360 369 break; … … 506 515 507 516 // Simplification : the size of a line is a multiple of size_iword (no test) 508 drsp_t * rsp = new drsp_t(context, 517 drsp_t * rsp = new drsp_t(j, 518 context, 509 519 packet, 510 520 1, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration.cpp
r120 r124 47 47 48 48 log_init(fromString<bool>(_simulator->getParam("debug_log_file_generate")), 49 fromString<bool>(_simulator->getParam("debug_log_file_with_pid")), 49 fromString<bool> (_simulator->getParam("simulation_file_with_date")), 50 fromString<bool> (_simulator->getParam("simulation_file_with_pid")), 50 51 MORPHEO_LOG); 51 52 … … 91 92 //-------------------------------------------------- 92 93 simulation_init (fromString<double>(_simulator->getParam("simulation_nb_cycle")), 93 fromString<double>(_simulator->getParam("simulation_nb_instruction"))); 94 fromString<double>(_simulator->getParam("debug_nb_cycle")), 95 fromString<double>(_simulator->getParam("simulation_nb_instruction")), 96 fromString<bool> (_simulator->getParam("simulation_file_with_date")), 97 fromString<bool> (_simulator->getParam("simulation_file_with_pid")) 98 ); 94 99 95 100 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp
r123 r124 20 20 { 21 21 log_begin(Icache_Access,FUNCTION); 22 log_function(Icache_Access,FUNCTION,_name.c_str()); 22 23 23 24 Tcontrol_t icache_req_val [_param->_nb_icache_port]; … … 33 34 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) 34 35 { 36 // log_printf(TRACE,Icache_Access,FUNCTION," * ICACHE_REQ [%d]",i); 37 35 38 #ifdef STATISTICS 36 39 _internal_ICACHE_REQ_NB_ACCESS [i] = 0; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_rsp.cpp
r123 r124 19 19 void Icache_Access::genMealy_rsp (void) 20 20 { 21 log_begin(Icache_Access,FUNCTION); 21 log_begin(Icache_Access,FUNCTION); 22 log_function(Icache_Access,FUNCTION,_name.c_str()); 22 23 23 24 Tcontrol_t context_rsp_val [_param->_nb_front_end][_param->_max_nb_context]; … … 30 31 for (uint32_t i=0; i<_param->_nb_icache_port; ++i) 31 32 { 33 log_printf(TRACE,Icache_Access,FUNCTION," * ICACHE_RSP [%d]",i); 34 32 35 Tcontrol_t val = PORT_READ(in_ICACHE_RSP_VAL [i]); 33 36 Tcontrol_t ack; 34 37 35 38 Tcontext_t thread_id = (_param->_have_port_icache_thread_id)?PORT_READ(in_ICACHE_RSP_THREAD_ID [i]):0; 39 40 log_printf(TRACE,Icache_Access,FUNCTION," * val : %d",val); 41 log_printf(TRACE,Icache_Access,FUNCTION," * thread_id : %d",thread_id); 36 42 37 43 #ifdef DEBUG_TEST … … 44 50 Tcontext_t front_end_id = _param->_translate_thread_to_context [thread_id]; 45 51 Tcontext_t context_id = _param->_translate_thread_to_front_end[thread_id]; 52 53 log_printf(TRACE,Icache_Access,FUNCTION," * front_end_id : %d",front_end_id); 54 log_printf(TRACE,Icache_Access,FUNCTION," * context_id : %d",context_id ); 46 55 47 56 // log_printf(TRACE,Icache_Access,FUNCTION,"thread_id : %d",thread_id); … … 84 93 for (uint32_t i=0; i<_param->_nb_front_end; ++i) 85 94 for (uint32_t j=0; j<_param->_nb_context[i]; ++j) 86 PORT_WRITE(out_CONTEXT_RSP_VAL [i][j], context_rsp_val [i][j]); 95 { 96 log_printf(TRACE,Icache_Access,FUNCTION," * CONTEXT_RSP_VAL [%d][%d] : %d",i,j,context_rsp_val [i][j]); 97 98 PORT_WRITE(out_CONTEXT_RSP_VAL [i][j], context_rsp_val [i][j]); 99 } 87 100 88 101 log_end(Icache_Access,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
r122 r124 14 14 #endif 15 15 16 #include <iostream>17 16 #include "Common/include/ToString.h" 18 17 #include "Common/include/Debug.h" … … 31 30 #endif 32 31 #include "Behavioural/include/Usage.h" 32 33 #include <iostream> 34 #include <fstream> 33 35 34 36 namespace morpheo { … … 194 196 private : Tcontrol_t internal_DCACHE_REQ_VAL ; 195 197 private : Tselect_queue_t internal_DCACHE_REQ_SELECT_QUEUE; 196 #endif 198 199 #if defined(DEBUG) and defined(DEBUG_Load_store_unit) and (DEBUG_Load_store_unit == true) 200 private : std::ofstream * memory_log_file; 201 #endif 202 203 #endif 204 197 205 198 206 // -----[ methods ]--------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h
r104 r124 43 43 public : uint32_t _nb_general_register ; 44 44 public : uint32_t _nb_special_register ; 45 public : uint32_t _nb_thread ; 46 public : bool * _num_thread_valid ; //[nb_thread] 45 47 46 48 //public : uint32_t _size_address_store_queue ; … … 66 68 public : Tdcache_address_t _mask_address_msb ; 67 69 public : Tdcache_address_t _mask_check_hit_byte ; 68 70 69 71 //-----[ methods ]----------------------------------------------------------- 70 72 public : Parameters (uint32_t size_store_queue , … … 84 86 uint32_t nb_general_register , 85 87 uint32_t nb_special_register , 88 uint32_t nb_thread , 89 bool * num_thread_valid , //[nb_thread] 86 90 bool is_toplevel=false); 87 91 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
r122 r124 9 9 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h" 10 10 #include "Behavioural/include/Allocation.h" 11 #include "Common/include/Filename.h" 11 12 12 13 namespace morpheo { … … 177 178 #endif 178 179 180 #if defined(DEBUG) and defined(DEBUG_Load_store_unit) and (DEBUG_Load_store_unit == true) 181 directory_init (); 182 183 memory_log_file = new std::ofstream [_param->_nb_thread]; 184 for (uint32_t i=0; i<_param->_nb_thread; ++i) 185 if (_param->_num_thread_valid [i]) 186 { 187 188 std::string filename = morpheo::filename(MORPHEO_LOG, 189 "Memory_access-thread_"+toString(i), 190 "", 191 "log", 192 _simulation_file_with_date, 193 _simulation_file_with_pid , 194 true); 195 196 memory_log_file [i].open(filename.c_str() ,std::ios::out | std::ios::trunc); 197 } 198 #endif 199 179 200 log_printf(FUNC,Load_store_unit,FUNCTION,"End"); 180 201 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
r122 r124 121 121 delete _component; 122 122 123 #if defined(DEBUG) and defined(DEBUG_Load_store_unit) and (DEBUG_Load_store_unit == true) 124 for (uint32_t i=0; i<_param->_nb_thread; ++i) 125 if (_param->_num_thread_valid [i]) 126 { 127 memory_log_file [i].close(); 128 } 129 #endif 123 130 124 131 log_printf(FUNC,Load_store_unit,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r122 r124 8 8 9 9 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h" 10 #include "Behavioural/include/Identification.h" 10 11 11 12 namespace morpheo { … … 950 951 _store_queue [reg_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_COMMIT; 951 952 953 #if defined(DEBUG) and defined(DEBUG_Load_store_unit) and (DEBUG_Load_store_unit == true) 954 { 955 // log file 956 Tcontext_t num_thread = get_num_thread(_store_queue [reg_STORE_QUEUE_PTR_READ]._context_id , _param->_size_context_id , 957 _store_queue [reg_STORE_QUEUE_PTR_READ]._front_end_id , _param->_size_front_end_id , 958 _store_queue [reg_STORE_QUEUE_PTR_READ]._ooo_engine_id, _param->_size_ooo_engine_id); 959 960 memory_log_file [num_thread] 961 << "[" << simulation_cycle() << "] " 962 << std::hex 963 << "@ 0x" << std::setfill('0') << std::setw(_param->_size_general_data/4) << _store_queue [reg_STORE_QUEUE_PTR_READ]._address << " -[ Write ]-> 0x" << std::setfill('0') << std::setw(_param->_size_general_data/4) << _store_queue [reg_STORE_QUEUE_PTR_READ]._wdata << " " 964 << std::dec 965 << "{" << toString(_store_queue [reg_STORE_QUEUE_PTR_READ]._operation) << "}"; 966 967 memory_log_file [num_thread] << std::endl; 968 } 969 #endif 970 971 952 972 break; 953 973 } … … 1125 1145 _load_queue [packet_id]._rdata = data; 1126 1146 1147 #if defined(DEBUG) and defined(DEBUG_Load_store_unit) and (DEBUG_Load_store_unit == true) 1148 { 1149 // log file 1150 Tcontext_t num_thread = get_num_thread(_load_queue [packet_id]._context_id , _param->_size_context_id , 1151 _load_queue [packet_id]._front_end_id , _param->_size_front_end_id , 1152 _load_queue [packet_id]._ooo_engine_id, _param->_size_ooo_engine_id); 1153 1154 memory_log_file [num_thread] 1155 << "[" << simulation_cycle() << "] " 1156 << std::hex 1157 << "@ 0x" << std::setfill('0') << std::setw(_param->_size_general_data/4) << _load_queue [packet_id]._address << " -[ Read ]-> 0x" << std::setfill('0') << std::setw(_param->_size_general_data/4) << _load_queue [packet_id]._rdata << " " 1158 << std::dec 1159 << "{" << toString(_load_queue [packet_id]._operation) << "}"; 1160 1161 memory_log_file [num_thread] << std::endl; 1162 } 1163 #endif 1164 1127 1165 if (error != DCACHE_ERROR_NONE) 1128 1166 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp
r117 r124 36 36 uint32_t nb_general_register , 37 37 uint32_t nb_special_register , 38 uint32_t nb_thread , 39 bool * num_thread_valid , //[nb_thread] 38 40 bool is_toplevel) 39 41 { … … 54 56 _nb_general_register = nb_general_register ; 55 57 _nb_special_register = nb_special_register ; 58 _nb_thread = nb_thread ; 59 _num_thread_valid = num_thread_valid ; 56 60 57 61 _size_speculative_access_queue_ptr = log2(size_speculative_access_queue); … … 149 153 { 150 154 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); 155 151 156 log_printf(FUNC,Load_store_unit,FUNCTION,"End"); 152 157 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters.cpp
r101 r124 115 115 _nb_spr_port_read_by_bank , 116 116 _nb_spr_port_write_by_bank, 117 crossbar ); 117 crossbar , 118 "0" // SPR à la différence du GPR doit être initialisé à 0. (F, CY et OV = 0) 119 ); 118 120 119 121 __param_spr_status [i] = new morpheo::behavioural::generic::registerfile::registerfile_monolithic ::Parameters -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp
r122 r124 444 444 size_special_data , 445 445 _max_nb_special_register , 446 _max_nb_general_register ); 446 _max_nb_general_register , 447 _nb_thread , 448 _num_thread_valid ); 447 449 } 448 450 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
r123 r124 20 20 #define MANAGE_EVENT MANAGE_EVENT_NO_WAIT 21 21 22 #define PRIORITY_MISS_LOAD 3 23 #define PRIORITY_MISS_BRANCH 2 24 #define PRIORITY_EXCEPTION 1 25 #define PRIORITY_NONE 0 26 22 27 #define get_priority(x) \ 23 28 (((state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or \ … … 25 30 (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR ) or \ 26 31 (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND ) or \ 27 (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE))? 3: \32 (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE))?PRIORITY_MISS_LOAD: \ 28 33 (((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or \ 29 34 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND ) or \ 30 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE ))? 2: \31 ((state == EVENT_TYPE_EXCEPTION)? 1: \35 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE ))?PRIORITY_MISS_BRANCH: \ 36 ((state == EVENT_TYPE_EXCEPTION)?PRIORITY_EXCEPTION: \ 32 37 0))) 33 38 … … 299 304 // priority : miss_load > miss_branch > excep > spr/sync 300 305 uint8_t priority0 = get_priority(state); 301 uint8_t priority1 = 2; // miss306 uint8_t priority1 = PRIORITY_MISS_BRANCH; // miss 302 307 303 308 // is_valid = can modify local information … … 306 311 bool is_valid = ((state == CONTEXT_STATE_OK) or 307 312 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE) or 308 313 // (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE) or 309 314 (depth1< depth0) or 310 315 ((depth1==depth0) and (priority1>=priority0))); // >= because another branch can be a miss prediction with same depth 316 317 bool is_invalid = priority0 == PRIORITY_MISS_LOAD; 311 318 312 319 #ifdef DEBUG_TEST … … 327 334 log_printf(TRACE,Context_State,FUNCTION," * is_valid : %d",is_valid ); 328 335 329 if (is_valid )336 if (is_valid and not is_invalid) 330 337 { 331 338 // reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; … … 333 340 if (state == CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAIT_UPDATE) 334 341 { 342 // #if (MANAGE_EVENT == MANAGE_EVENT_NO_WAIT) 343 // reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR; 344 // #else 335 345 reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND; 346 // #endif 336 347 } 337 348 else … … 346 357 reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; 347 358 else 348 reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; 359 { 360 // #if (MANAGE_EVENT == MANAGE_EVENT_NO_WAIT) 361 // reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; 362 // #else 363 reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; 364 // #endif 365 } 349 366 350 367 reg_EVENT_ADDRESS [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC [i])+1; // address delay slot … … 386 403 // priority : miss_load > miss_branch > excep > spr/sync 387 404 uint8_t priority0 = get_priority(state); 388 uint8_t priority1 = 2; // miss405 uint8_t priority1 = PRIORITY_MISS_BRANCH; // miss 389 406 390 407 // is_valid = can modify local information … … 440 457 // miss_load > miss_branch > excep > spr/sync 441 458 uint8_t priority0 = get_priority(state); 442 uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)? 1:0;459 uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)?PRIORITY_EXCEPTION:PRIORITY_NONE; 443 460 444 461 // is_valid = can modify local information … … 623 640 case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND : 624 641 { 642 // #if (MANAGE_EVENT == MANAGE_EVENT_NO_WAIT) 643 // state_next = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR; 644 // #else 625 645 state_next = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND; 646 // #endif 626 647 break; 627 648 } 628 649 default : 629 650 { 651 // #if (MANAGE_EVENT == MANAGE_EVENT_NO_WAIT) 652 // state_next = CONTEXT_STATE_KO_MISS_LOAD_ADDR; 653 // #else 630 654 state_next = CONTEXT_STATE_KO_MISS_LOAD_WAITEND; 655 // #endif 631 656 break; 632 657 } … … 688 713 throw ERRORMORPHEO(FUNCTION,toString(_("Context[%d], Have an interruption, Not yet supported (Comming Soon).\n"),i)); 689 714 } 715 716 717 #if (MANAGE_EVENT == MANAGE_EVENT_NO_WAIT) 718 for (uint32_t i=0; i<_param->_nb_context; i++) 719 switch (reg_STATE [i]) 720 { 721 case CONTEXT_STATE_KO_MISS_BRANCH_WAITEND : reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR ; break; 722 case CONTEXT_STATE_KO_MISS_LOAD_WAITEND : reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_ADDR ; break; 723 case CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_WAITEND : reg_STATE [i] = CONTEXT_STATE_KO_MISS_LOAD_AND_BRANCH_ADDR; break; 724 default : break; 725 } 726 #endif 690 727 } 691 728 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp
r123 r124 47 47 Tcontrol_t have_decod_branch [_param->_nb_context]; 48 48 49 Tcontext_t CONTEXT_EVENT_CONTEXT_ID = 0; 50 Tdepth_t CONTEXT_EVENT_DEPTH = 0; 51 Tevent_type_t CONTEXT_EVENT_TYPE = 0; 52 Tcontrol_t CONTEXT_EVENT_IS_DELAY_SLOT = 0; 53 Tgeneral_data_t CONTEXT_EVENT_ADDRESS = 0; 54 Tgeneral_data_t CONTEXT_EVENT_ADDRESS_EPCR = 0; 55 49 56 for (uint32_t i=0; i<_param->_nb_context; i++) 50 57 { … … 67 74 log_printf(TRACE,Decod,FUNCTION," * DECOD [%d]",i); 68 75 76 bool ifetch_val = false; 69 77 while ((it != select->end()) and // have a no scanned "slot_in" ? 70 (decod_val [i] == false) and // have not a previous selected entry? 78 // (decod_val [i] == false) and // have not a previous selected entry? 79 (ifetch_val == false) and // not find ifetch instruction valid 71 80 (context_event_val == false)) // Have not a context_event (spr_access, exception, ...) 72 81 { … … 86 95 log_printf(TRACE,Decod,FUNCTION," * decod_ack : %d",PORT_READ(in_DECOD_ACK [i])); 87 96 97 ifetch_val = true; 88 98 decod_val [i] = true; // fetch_val and decod_enable 89 99 ifetch_ack [x][y] = PORT_READ(in_DECOD_ACK [i]); // fetch_val and decod_enable and decod_ack … … 189 199 ifetch_ack [x][y] &= not have_decod_branch [x] and PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable and decod_ack 190 200 191 if (_param->_have_port_context_id)192 PORT_WRITE(out_PREDICT_CONTEXT_ID [i],x);193 PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0));194 PORT_WRITE(out_PREDICT_BRANCH_STATE [i],PORT_READ(in_IFETCH_BRANCH_STATE [x]));195 if (_param->_have_port_depth)196 PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x]));197 PORT_WRITE(out_PREDICT_BRANCH_CONDITION [i],_decod_instruction->_branch_condition );198 // PORT_WRITE(out_PREDICT_BRANCH_STACK_WRITE [i],_decod_instruction->_branch_stack_write);199 PORT_WRITE(out_PREDICT_BRANCH_DIRECTION [i],_decod_instruction->_branch_direction );200 PORT_WRITE(out_PREDICT_ADDRESS_SRC [i],_decod_instruction->_address );201 PORT_WRITE(out_PREDICT_ADDRESS_DEST [i],_decod_instruction->_address_next );202 203 201 // can continue is set if direction is "not take" (also, continue is sequential order) 204 202 … … 209 207 log_printf(TRACE,Decod,FUNCTION," * predict_can_continue : %d",PORT_READ(in_PREDICT_CAN_CONTINUE [i])); 210 208 } 209 210 if (_param->_have_port_context_id) 211 PORT_WRITE(out_PREDICT_CONTEXT_ID [i],x); 212 PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0)); 213 PORT_WRITE(out_PREDICT_BRANCH_STATE [i],PORT_READ(in_IFETCH_BRANCH_STATE [x])); 214 if (_param->_have_port_depth) 215 PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x])); 216 PORT_WRITE(out_PREDICT_BRANCH_CONDITION [i],_decod_instruction->_branch_condition ); 217 // PORT_WRITE(out_PREDICT_BRANCH_STACK_WRITE [i],_decod_instruction->_branch_stack_write); 218 PORT_WRITE(out_PREDICT_BRANCH_DIRECTION [i],_decod_instruction->_branch_direction ); 219 PORT_WRITE(out_PREDICT_ADDRESS_SRC [i],_decod_instruction->_address ); 220 PORT_WRITE(out_PREDICT_ADDRESS_DEST [i],_decod_instruction->_address_next ); 211 221 212 222 Tevent_type_t event_type = _decod_instruction->_event_type; … … 223 233 ifetch_ack [x][y] &= PORT_READ(in_CONTEXT_EVENT_ACK);// context_event_ack and fetch_val and decod_enable and decod_ack 224 234 225 if (_param->_have_port_context_id) 226 PORT_WRITE(out_CONTEXT_EVENT_CONTEXT_ID , x); 227 if (_param->_have_port_depth) 228 PORT_WRITE(out_CONTEXT_EVENT_DEPTH , depth); 229 PORT_WRITE(out_CONTEXT_EVENT_TYPE , _decod_instruction->_event_type ); 230 PORT_WRITE(out_CONTEXT_EVENT_IS_DELAY_SLOT, _decod_instruction->_is_delay_slot ); 231 PORT_WRITE(out_CONTEXT_EVENT_ADDRESS , _decod_instruction->_address ); 232 PORT_WRITE(out_CONTEXT_EVENT_ADDRESS_EPCR , _decod_instruction->_address_next ); 235 CONTEXT_EVENT_CONTEXT_ID = x; 236 CONTEXT_EVENT_DEPTH = depth; 237 CONTEXT_EVENT_TYPE = _decod_instruction->_event_type; 238 CONTEXT_EVENT_IS_DELAY_SLOT = _decod_instruction->_is_delay_slot; 239 CONTEXT_EVENT_ADDRESS = _decod_instruction->_address; 240 CONTEXT_EVENT_ADDRESS_EPCR = _decod_instruction->_address_next ; 241 233 242 } 234 243 … … 263 272 } 264 273 } 274 265 275 //----------------------------------- 266 276 // Write output … … 272 282 273 283 PORT_WRITE(out_CONTEXT_EVENT_VAL, context_event_val); 284 if (_param->_have_port_context_id) 285 PORT_WRITE(out_CONTEXT_EVENT_CONTEXT_ID , CONTEXT_EVENT_CONTEXT_ID ); 286 if (_param->_have_port_depth) 287 PORT_WRITE(out_CONTEXT_EVENT_DEPTH , CONTEXT_EVENT_DEPTH ); 288 PORT_WRITE(out_CONTEXT_EVENT_TYPE , CONTEXT_EVENT_TYPE ); 289 PORT_WRITE(out_CONTEXT_EVENT_IS_DELAY_SLOT, CONTEXT_EVENT_IS_DELAY_SLOT); 290 PORT_WRITE(out_CONTEXT_EVENT_ADDRESS , CONTEXT_EVENT_ADDRESS ); 291 PORT_WRITE(out_CONTEXT_EVENT_ADDRESS_EPCR , CONTEXT_EVENT_ADDRESS_EPCR ); 274 292 275 293 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_genMealy_decod_out.cpp
r123 r124 53 53 log_printf(TRACE,Decod_queue,FUNCTION,_(" * Queue is not empty, slot [%d] is valid."),i); 54 54 55 Tcontext_t context = reg_QUEUE[num_bank].front()->_context_id[0];55 Tcontext_t context = reg_QUEUE[num_bank].front()->_context_id [0]; 56 56 57 57 log_printf(TRACE,Decod_queue,FUNCTION," * context : %d",context); … … 100 100 101 101 internal_DECOD_OUT_VAL [i] = 1; // in all case, val is set (entry is not empty, and instruction is valid) 102 102 103 103 if (is_valid) 104 104 { 105 105 val [i] = 1; 106 106 internal_DECOD_OUT_ACK [i] = PORT_READ(in_DECOD_OUT_ACK [i]); 107 108 107 } 109 108 else … … 124 123 } 125 124 } 125 126 log_printf(TRACE,Decod_queue,FUNCTION," * decod_out_ack: %d (%d)",internal_DECOD_OUT_ACK [i],PORT_READ(in_DECOD_OUT_ACK [i])); 126 127 } 127 128 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp
r123 r124 117 117 //-------------------------------------------------------------------- 118 118 { 119 bool can_continue = true; // in_order 120 119 121 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 120 if ( internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i])122 if (can_continue and (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i])) 121 123 { 122 124 log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i); … … 139 141 reg_NB_INST_EVENT [context] --; 140 142 } 143 else 144 can_continue = false; 141 145 } 142 146 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp
r115 r124 72 72 73 73 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _size_history : %d",_size_history ); 74 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_mask : 0x% x",_bht_history_mask );75 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_shift : % d",_bht_history_shift );76 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_mask : 0x% x",_pht_history_mask );77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_shift : % d",_pht_history_shift );74 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_mask : 0x%llx",_bht_history_mask ); 75 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_history_shift : %lld",_bht_history_shift ); 76 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_mask : 0x%llx",_pht_history_mask ); 77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_history_shift : %lld",_pht_history_shift ); 78 78 79 79 _bht_init_take = static_cast<Thistory_t>(-1)&_bht_history_mask; … … 82 82 _pht_init_ntake = _pht_init_take-1; // size = 4 : 0111/2 83 83 84 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_init_take : 0x% x",_bht_init_take );85 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_init_ntake : 0x% x",_bht_init_ntake);86 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_init_take : 0x% x",_pht_init_take );87 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_init_ntake : 0x% x",_pht_init_ntake);84 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_init_take : 0x%llx",_bht_init_take ); 85 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _bht_init_ntake : 0x%llx",_bht_init_ntake); 86 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_init_take : 0x%llx",_pht_init_take ); 87 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * _pht_init_ntake : 0x%llx",_pht_init_ntake); 88 88 89 89 if (_have_bht) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp
r123 r124 42 42 Taddress_t address = PORT_READ(in_PREDICT_ADDRESS [i]); 43 43 Thistory_t history = 0; 44 Tcontrol_t direction ;44 Tcontrol_t direction = 0; 45 45 46 46 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * address : 0x%.8x",address); … … 58 58 pht_bht_history = bht_history; 59 59 60 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x% x",bht_history);61 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : % d",bht_num_reg);60 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x%llx",bht_history); 61 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %lld",bht_num_reg); 62 62 63 63 history = (bht_history << _param->_bht_history_shift )&_param->_bht_history_mask ; … … 73 73 Thistory_t pht_num_reg = (pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_shift)); 74 74 75 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x% x",pht_bht_history);76 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : % d",pht_num_reg);77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : % d",pht_num_bank);75 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history : 0x%llx",pht_bht_history); 76 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %lld",pht_num_reg); 77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %lld",pht_num_bank); 78 78 79 79 Thistory_t pht_history = reg_PHT [pht_num_bank][pht_num_reg]; 80 80 81 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history : 0x% x",pht_history);81 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history : 0x%llx",pht_history); 82 82 83 83 history |= (pht_history << _param->_pht_history_shift )&_param->_pht_history_mask; … … 92 92 93 93 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * direction : %d",direction); 94 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * history : 0x% x",history);94 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * history : 0x%llx",history); 95 95 96 96 PORT_WRITE(out_PREDICT_DIRECTION [i],direction); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp
r119 r124 52 52 { 53 53 Thistory_t bht_num_reg = internal_PREDICT_BHT_NUM_REG [i]; 54 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : % d",bht_num_reg);54 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %lld",bht_num_reg); 55 55 56 56 // #ifdef DEBUG_TEST … … 59 59 60 60 Thistory_t bht_history = reg_BHT[bht_num_reg]; 61 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): % x",bht_history);61 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %llx",bht_history); 62 62 63 63 64 64 bht_history = ((bht_history<<1) | direction)&_param->_bht_history_mask ; 65 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): % x",bht_history);65 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): %llx",bht_history); 66 66 reg_BHT [bht_num_reg] = bht_history; 67 67 } … … 71 71 Thistory_t pht_num_reg = internal_PREDICT_PHT_NUM_REG [i]; 72 72 Thistory_t pht_num_bank= internal_PREDICT_PHT_NUM_BANK [i]; 73 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : % d",pht_num_reg);74 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : % d",pht_num_bank);73 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %lld",pht_num_reg); 74 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %lld",pht_num_bank); 75 75 76 76 Thistory_t pht_history = reg_PHT [pht_num_bank][pht_num_reg]; 77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (old): % x",pht_history);77 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (old): %llx",pht_history); 78 78 79 79 // PHT : saturation counter 80 80 pht_history = (direction==1)?((pht_history<_param->_pht_counter_max)?(pht_history+1):(pht_history)):((pht_history>0)?(pht_history-1):(pht_history)); 81 81 82 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): % x",pht_history);82 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): %llx",pht_history); 83 83 84 84 reg_PHT [pht_num_bank][pht_num_reg] = pht_history; … … 95 95 { 96 96 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * UPDATE [%d]",i); 97 if (_param->_update_on_prediction) 97 98 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * miss : %d",PORT_READ(in_UPDATE_MISS [i])); 98 99 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * update_on_predict: %d",_param->_update_on_prediction); … … 125 126 Thistory_t bht_num_reg = address & _param->_bht_address_mask; 126 127 127 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): % x",bht_history);128 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : % x",bht_num_reg);128 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %llx",bht_history); 129 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %llx",bht_num_reg); 129 130 130 131 // BHT : shift register … … 139 140 140 141 pht_bht_history = bht_history; 141 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): % x",bht_history);142 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): %llx",bht_history); 142 143 143 144 // #ifdef DEBUG_TEST … … 156 157 Thistory_t pht_num_reg = pht_bht_history xor ((address&_param->_pht_address_share_mask)<<_param->_pht_address_share_shift); 157 158 158 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): % x",pht_bht_history);159 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (old): % x",pht_history);160 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : % x",pht_num_reg);161 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : % x",pht_num_bank);159 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %llx",pht_bht_history); 160 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (old): %llx",pht_history); 161 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_reg : %llx",pht_num_reg); 162 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_num_bank : %llx",pht_num_bank); 162 163 163 164 // PHT : saturation counter … … 171 172 } 172 173 173 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): % x",pht_history);174 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * pht_history (new): %llx",pht_history); 174 175 175 176 reg_PHT [pht_num_bank][pht_num_reg] = pht_history; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp
r123 r124 141 141 } 142 142 143 # ifdef SYSTEMCASS_SPECIFIC144 // List dependency information145 for (uint32_t i=0; i<_param->_nb_inst_decod; i++)146 {147 if (_param->_have_port_context_id)148 (*(out_DECOD_ACK [i])) (*(in_DECOD_CONTEXT_ID [i]));149 }150 # endif143 // # ifdef SYSTEMCASS_SPECIFIC 144 // // List dependency information 145 // for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 146 // { 147 // if (_param->_have_port_context_id) 148 // (*(out_DECOD_ACK [i])) (*(in_DECOD_CONTEXT_ID [i])); 149 // } 150 // # endif 151 151 152 152 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_branch_complete"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
r122 r124 258 258 "", 259 259 "log", 260 false,261 log_with_pid,260 _simulation_file_with_date, 261 _simulation_file_with_pid, 262 262 true); 263 263 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
r123 r124 120 120 branchement_log_file [num_thread] 121 121 << std::hex 122 << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src<< " "123 << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest<< " "122 << "0x" << std::setfill('0') << std::setw(_param->_size_general_data/4) << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src << " " 123 << "0x" << std::setfill('0') << std::setw(_param->_size_general_data/4) << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest << " " 124 124 << std::dec 125 125 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " - " … … 127 127 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._miss_prediction << " " 128 128 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._ifetch_prediction << " " 129 << "(" << (uint32_t)reg_UPDATE_PREDICTION_TABLE [i][bottom]._condition<< ")"129 << "(" << toString(reg_UPDATE_PREDICTION_TABLE [i][bottom]._condition) << ")" 130 130 << std::endl; 131 131 } … … 671 671 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top_state : %s",toString(top_state).c_str()); 672 672 673 bool previous_ufpt_event = (reg_UFPT_EVENT_STATE [ i] == UFPT_EVENT_STATE_KO_FLUSH);673 bool previous_ufpt_event = (reg_UFPT_EVENT_STATE [context] == UFPT_EVENT_STATE_KO_FLUSH); 674 674 675 675 … … 1166 1166 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); 1167 1167 for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) 1168 log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", 1168 { 1169 log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d, %.8lld %.8x (%.8x) %.4d - %s", 1169 1170 j, 1170 1171 reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition, … … 1181 1182 toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str() 1182 1183 ); 1184 } 1183 1185 1184 1186 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump UPT [%d] (Update_Prediction_Table)",i); … … 1189 1191 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); 1190 1192 for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) 1191 log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d %.1d, %.8 d %.8x (%.8x) %.4d - %s",1193 log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d %.1d, %.8lld %.8x (%.8x) %.4d - %s", 1192 1194 j, 1193 1195 reg_UPDATE_PREDICTION_TABLE [i][j]._condition, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
r123 r124 63 63 public : counter_t ** _stat_nb_inst_type ;//[nb_type] 64 64 public : counter_t ** _stat_bank_nb_inst ;//[nb_bank] 65 66 public : counter_t ** _stat_nb_cycle_state_no_event ;//[nb_thread] 67 public : counter_t ** _stat_nb_cycle_state_not_yet_event ;//[nb_thread] 68 public : counter_t ** _stat_nb_cycle_state_event ;//[nb_thread] 69 public : counter_t ** _stat_nb_cycle_state_wait_end ;//[nb_thread] 65 70 #endif 66 71 … … 254 259 //private : bool ** reg_EVENT_CAN_RESTART ;//[nb_front_end][nb_context] 255 260 private : uint32_t ** reg_EVENT_PACKET ;//[nb_front_end][nb_context] 261 private : uint32_t ** reg_EVENT_NB_INST ;//[nb_front_end][nb_context] 256 262 private : bool ** reg_EVENT_LAST ;//[nb_front_end][nb_context] 257 263 private : uint32_t ** reg_EVENT_LAST_NUM_BANK ;//[nb_front_end][nb_context] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Types.h
r123 r124 67 67 // COMMIT_EVENT_STATE_WAIT_DECOD , 68 68 COMMIT_EVENT_STATE_WAIT_END , 69 COMMIT_EVENT_STATE_END69 // COMMIT_EVENT_STATE_END 70 70 } Tcommit_event_state_t; 71 71 72 #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT))) 72 #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:EVENT_STATE_NO_EVENT)) 73 74 // #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT))) 73 75 // #define commit_event_state_to_event_state(x) ((x==COMMIT_EVENT_STATE_EVENT)?EVENT_STATE_EVENT:((x==COMMIT_EVENT_STATE_WAIT_DECOD)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_WAIT_END)?EVENT_STATE_WAITEND:((x==COMMIT_EVENT_STATE_END)?EVENT_STATE_END:EVENT_STATE_NO_EVENT)))) 74 76 … … 116 118 public : Tspecial_data_t flags ; 117 119 public : Tcontrol_t no_sequence ; 118 120 //public : Tcontrol_t speculative ; 119 121 //public : Tgeneral_data_t data_commit ; // branch's destination 120 122 #ifdef DEBUG -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r123 r124 332 332 // ALLOC2(reg_EVENT_CAN_RESTART ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 333 333 ALLOC2(reg_EVENT_PACKET ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 334 ALLOC2(reg_EVENT_NB_INST ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); 334 335 ALLOC2(reg_EVENT_LAST ,bool ,_param->_nb_front_end,_param->_nb_context [it1]); 335 336 ALLOC2(reg_EVENT_LAST_NUM_BANK ,uint32_t ,_param->_nb_front_end,_param->_nb_context [it1]); … … 371 372 "", 372 373 "log", 373 false,374 log_with_pid,374 _simulation_file_with_date, 375 _simulation_file_with_pid , 375 376 true); 376 377 log_printf(TRACE,Commit_unit,FUNCTION,"KANE : %s",filename.c_str());378 377 379 378 instruction_log_file [i].open(filename.c_str() ,std::ios::out | std::ios::trunc); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
r123 r124 213 213 DELETE2(reg_EVENT_NUM_BANK ,_param->_nb_front_end,_param->_nb_context [it1]); 214 214 DELETE2(reg_EVENT_NUM_PTR ,_param->_nb_front_end,_param->_nb_context [it1]); 215 // 215 // DELETE2(reg_EVENT_CAN_RESTART ,_param->_nb_front_end,_param->_nb_context [it1]); 216 216 DELETE2(reg_EVENT_PACKET ,_param->_nb_front_end,_param->_nb_context [it1]); 217 DELETE2(reg_EVENT_NB_INST ,_param->_nb_front_end,_param->_nb_context [it1]); 217 218 DELETE2(reg_EVENT_LAST ,_param->_nb_front_end,_param->_nb_context [it1]); 218 219 DELETE2(reg_EVENT_LAST_NUM_BANK ,_param->_nb_front_end,_param->_nb_context [it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
r123 r124 95 95 { 96 96 log_printf(TRACE,Commit_unit,FUNCTION," * have instruction"); 97 log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",num_bank); 97 98 log_printf(TRACE,Commit_unit,FUNCTION," * bank_full : %d",bank_full [num_bank]); 98 99 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMoore.cpp
r123 r124 32 32 uint32_t nb_scan_bank = 0; // last scan bank 33 33 bool can_continue = true; 34 35 uint32_t event_nb_inst [_param->_nb_front_end][_param->_max_nb_context]; 36 for (uint32_t i=0; i<_param->_nb_front_end; i++) 37 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 38 event_nb_inst [i][j] = 0; 34 39 35 40 // for each reexecute_port … … 59 64 // Read state 60 65 entry_t * entry = _rob [num_bank].front(); 66 uint32_t num_packet = ((entry->ptr << _param->_shift_num_slot) | num_bank); 67 Tcontext_t front_end_id = entry->front_end_id; 68 Tcontext_t context_id = entry->context_id ; 69 61 70 rob_state_t state = entry->state; 62 71 … … 73 82 ); 74 83 75 can_continue &= ((state == ROB_STORE_OK ) or 76 (state == ROB_STORE_OK_WAIT_END ) or 77 (state == ROB_END_OK_SPECULATIVE) or 78 (state == ROB_END_OK ) or 79 (state == ROB_END ) 84 can_continue &= (((state == ROB_STORE_OK ) or 85 (state == ROB_STORE_OK_WAIT_END ) or 86 (state == ROB_END_OK_SPECULATIVE) or 87 (state == ROB_END_OK ) or 88 (state == ROB_END )) and 89 not ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and 90 (reg_EVENT_PACKET[front_end_id][context_id] == num_packet)) and 91 not ((reg_EVENT_NB_INST [front_end_id][context_id] > 0) and 92 ((++event_nb_inst [front_end_id][context_id]) >= reg_EVENT_NB_INST [front_end_id][context_id])) 80 93 ); 81 94 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp
r111 r124 27 27 param_statistics); 28 28 29 _stat_nb_inst_insert = new counter_t * [_param->_nb_rename_unit]; 30 _stat_nb_inst_retire = new counter_t * [_param->_nb_rename_unit]; 31 _stat_nb_inst_retire_ok = new counter_t * [_param->_nb_thread]; 32 _stat_nb_inst_retire_ko = new counter_t * [_param->_nb_thread]; 33 _stat_nb_inst_type = new counter_t * [_param->_nb_type]; 34 _stat_bank_nb_inst = new counter_t * [_param->_nb_bank]; 29 _stat_nb_cycle_state_no_event = new counter_t * [_param->_nb_thread]; 30 _stat_nb_cycle_state_not_yet_event = new counter_t * [_param->_nb_thread]; 31 _stat_nb_cycle_state_event = new counter_t * [_param->_nb_thread]; 32 _stat_nb_cycle_state_wait_end = new counter_t * [_param->_nb_thread]; 33 34 { 35 for (uint32_t i=0; i<_param->_nb_thread; i++) 36 if (_param->_have_thread [i]) 37 { 38 _stat_nb_cycle_state_no_event [i] = _stat->create_variable("nb_cycle_state_no_event_" +toString(i)); 39 _stat_nb_cycle_state_not_yet_event [i] = _stat->create_variable("nb_cycle_state_not_yet_event_"+toString(i)); 40 _stat_nb_cycle_state_event [i] = _stat->create_variable("nb_cycle_state_event_" +toString(i)); 41 _stat_nb_cycle_state_wait_end [i] = _stat->create_variable("nb_cycle_state_wait_end_" +toString(i)); 42 43 _stat->create_expr_percent("percent_state_no_event_" +toString(i),"nb_cycle_state_no_event_" +toString(i),"cycle",toString(_("Percent of cycle in state no_event (context %d)"),i)); 44 _stat->create_expr_percent("percent_state_not_yet_event_" +toString(i),"nb_cycle_state_not_yet_event_" +toString(i),"cycle",toString(_("Percent of cycle in state not_yet_event (context %d)"),i)); 45 _stat->create_expr_percent("percent_state_event_" +toString(i),"nb_cycle_state_event_" +toString(i),"cycle",toString(_("Percent of cycle in state event (context %d)"),i)); 46 _stat->create_expr_percent("percent_state_wait_end_" +toString(i),"nb_cycle_state_wait_end_" +toString(i),"cycle",toString(_("Percent of cycle in state wait_end (context %d)"),i)); 47 } 48 } 49 50 _stat_nb_inst_insert = new counter_t * [_param->_nb_rename_unit]; 51 _stat_nb_inst_retire = new counter_t * [_param->_nb_rename_unit]; 52 _stat_nb_inst_retire_ok = new counter_t * [_param->_nb_thread]; 53 _stat_nb_inst_retire_ko = new counter_t * [_param->_nb_thread]; 54 _stat_nb_inst_type = new counter_t * [_param->_nb_type]; 55 _stat_bank_nb_inst = new counter_t * [_param->_nb_bank]; 35 56 36 57 { … … 124 145 } 125 146 126 127 147 _stat_nb_inst_commit = _stat->create_variable("nb_inst_commit"); 128 148 _stat->create_expr_average_by_cycle("average_use_interface_commit","nb_inst_commit", "", _("Average instruction by cycle on commit interface")); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp
r110 r124 33 33 delete [] _stat_nb_inst_type; 34 34 delete [] _stat_bank_nb_inst; 35 36 delete [] _stat_nb_cycle_state_no_event ; 37 delete [] _stat_nb_cycle_state_not_yet_event ; 38 delete [] _stat_nb_cycle_state_event ; 39 delete [] _stat_nb_cycle_state_wait_end ; 40 35 41 36 42 log_end(Commit_unit,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r123 r124 54 54 // reg_EVENT_FLUSH [i][j] = false; 55 55 // reg_EVENT_STOP [i][j] = false; 56 reg_EVENT_NB_INST [i][j] = 0; 56 57 reg_EVENT_LAST [i][j] = false; 57 58 … … 126 127 // break; 127 128 // } 129 130 // case COMMIT_EVENT_STATE_WAIT_END : 131 // { 132 // // Wait the flush of Re Order Buffer. 133 // // Test if the last element is retire 134 // if (reg_EVENT_LAST [i][j]) 135 // reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_END ; 136 137 // break; 138 // } 139 // case COMMIT_EVENT_STATE_END : 140 // { 141 // // Just one cycle 142 143 // // flush of re order buffer is finish 144 // reg_EVENT_LAST [i][j] = false; 145 146 // if (not reg_EVENT_NEXT_STOP [i][j]) 147 // reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT; 148 // else 149 // { 150 // reg_EVENT_NEXT_STOP [i][j] = false; 151 // reg_EVENT_PACKET [i][j] = reg_EVENT_NEXT_PACKET [i][j]; 152 // reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 153 // // reg_EVENT_STOP [i][j] = true; 154 // reg_EVENT_LAST_NUM_BANK [i][j] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 155 // reg_EVENT_LAST_NUM_PTR [i][j] = reg_NUM_PTR_TAIL; 156 // } 157 158 // break; 159 // } 160 161 128 162 case COMMIT_EVENT_STATE_WAIT_END : 129 163 { … … 131 165 // Test if the last element is retire 132 166 if (reg_EVENT_LAST [i][j]) 133 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_END ; 134 167 { 168 // flush of re order buffer is finish 169 reg_EVENT_LAST [i][j] = false; 170 171 if (not reg_EVENT_NEXT_STOP [i][j]) 172 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT; 173 else 174 { 175 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 176 177 reg_EVENT_NEXT_STOP [i][j] = false; 178 reg_EVENT_PACKET [i][j] = reg_EVENT_NEXT_PACKET [i][j]; 179 reg_EVENT_NB_INST [i][j] = reg_NB_INST_COMMIT_ALL [i][j]; 180 //reg_EVENT_STOP [i][j] = true; 181 reg_EVENT_LAST_NUM_BANK [i][j] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 182 reg_EVENT_LAST_NUM_PTR [i][j] = reg_NUM_PTR_TAIL; 183 } 184 } 135 185 break; 136 186 } 137 case COMMIT_EVENT_STATE_END : 138 { 139 // Just one cycle 140 141 // flush of re order buffer is finish 142 reg_EVENT_LAST [i][j] = false; 143 144 if (not reg_EVENT_NEXT_STOP [i][j]) 145 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NO_EVENT; 146 else 147 { 148 reg_EVENT_NEXT_STOP [i][j] = false; 149 reg_EVENT_PACKET [i][j] = reg_EVENT_NEXT_PACKET [i][j]; 150 reg_EVENT_STATE [i][j] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 151 // reg_EVENT_STOP [i][j] = true; 152 reg_EVENT_LAST_NUM_BANK [i][j] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; 153 reg_EVENT_LAST_NUM_PTR [i][j] = reg_NUM_PTR_TAIL; 154 } 155 156 break; 157 } 187 158 188 //case COMMIT_EVENT_STATE_NO_EVENT : 159 189 //case COMMIT_EVENT_STATE_NOT_YET_EVENT : … … 166 196 // =================================================================== 167 197 { 198 // for (uint32_t i=0; i<_param->_nb_rename_unit; i++) 199 // for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++) 200 // log_printf(TRACE,Commit_unit,FUNCTION," * INSERT_VAL [%d][%d] : %d",i,j,PORT_READ(in_INSERT_VAL [i][j])); 201 168 202 // variable to count instruction insert 169 203 uint32_t nb_insert = 0; 170 204 171 205 for (uint32_t i=0; i<_param->_nb_bank; i++) 172 206 { … … 241 275 entry->num_reg_re_phy_new = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [x][y]); 242 276 entry->no_sequence = type == TYPE_BRANCH; 243 277 // entry->speculative = true; 244 278 #ifdef DEBUG 245 279 entry->address = PORT_READ(in_INSERT_ADDRESS [x][y]); … … 371 405 #endif 372 406 373 log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",i);407 log_printf(TRACE,Commit_unit,FUNCTION," * num_bank : %d",i); 374 408 375 409 // find the good entry !!! 376 410 entry_t * entry = internal_BANK_COMMIT_ENTRY [i][j]; 377 411 378 log_printf(TRACE,Commit_unit,FUNCTION," * ptr : %d",entry->ptr);412 log_printf(TRACE,Commit_unit,FUNCTION," * ptr : %d",entry->ptr); 379 413 380 414 //Toperation_t operation = PORT_READ(in_COMMIT_OPERATION [x]); … … 437 471 } 438 472 } 473 474 log_printf(TRACE,Commit_unit,FUNCTION," * have_exception : %d",have_exception ); 475 log_printf(TRACE,Commit_unit,FUNCTION," * have_miss_speculation : %d",have_miss_speculation); 476 439 477 440 478 // Next state depends of previous state … … 509 547 bool flush = ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_EVENT) or 510 548 // (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or 511 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END) or512 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_END)549 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END)// or 550 // (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_END) 513 551 ); 514 552 515 553 uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | i); 516 554 uint32_t _top = ((_rob[ reg_NUM_BANK_HEAD].front()->ptr << _param->_shift_num_slot) | reg_NUM_BANK_HEAD); 555 556 log_printf(TRACE,Commit_unit,FUNCTION," * flush : %d",flush); 557 log_printf(TRACE,Commit_unit,FUNCTION," * packet : %d",packet); 517 558 518 559 if (not flush) … … 539 580 // have an error, stop issue instruction 540 581 reg_EVENT_STATE [front_end_id][context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 541 // reg_EVENT_STOP [front_end_id][context_id] = true; 582 583 reg_EVENT_NB_INST [front_end_id][context_id] = reg_NB_INST_COMMIT_ALL [front_end_id][context_id]; 584 585 //reg_EVENT_STOP [front_end_id][context_id] = true; 542 586 543 587 reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] = ((reg_NUM_BANK_TAIL==0)?_param->_nb_bank:reg_NUM_BANK_TAIL)-1; … … 549 593 bool find = true; 550 594 595 log_printf(TRACE,Commit_unit,FUNCTION," * reg_EVENT_NEXT_STOP : %d",reg_EVENT_NEXT_STOP [front_end_id][context_id]); 596 log_printf(TRACE,Commit_unit,FUNCTION," * reg_EVENT_NEXT_PACKET : %d",reg_EVENT_NEXT_PACKET[front_end_id][context_id]); 597 551 598 // already manage an event. 552 599 if (reg_EVENT_NEXT_STOP [front_end_id][context_id]) … … 555 602 uint32_t _old = reg_EVENT_NEXT_PACKET [front_end_id][context_id]; 556 603 uint32_t _new = packet; 604 605 log_printf(TRACE,Commit_unit,FUNCTION," * _top : %d",_top ); 606 log_printf(TRACE,Commit_unit,FUNCTION," * _old (before) : %d",_old ); 607 log_printf(TRACE,Commit_unit,FUNCTION," * _new (before) : %d",_new ); 608 557 609 if (_old < _top) _old = _old+_param->_size_queue; 558 610 if (_new < _top) _new = _new+_param->_size_queue; 559 611 if (_new > _old) reg_EVENT_NEXT_PACKET [front_end_id][context_id] = packet; 560 find = false; 612 else find = false; 613 614 log_printf(TRACE,Commit_unit,FUNCTION," * _old (after) : %d",_old ); 615 log_printf(TRACE,Commit_unit,FUNCTION," * _new (after) : %d",_new ); 561 616 } 562 617 else … … 565 620 uint32_t _old = ((reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [front_end_id][context_id]); 566 621 uint32_t _new = packet; 622 623 log_printf(TRACE,Commit_unit,FUNCTION," * _top : %d",_top ); 624 log_printf(TRACE,Commit_unit,FUNCTION," * _old (before) : %d",_old ); 625 log_printf(TRACE,Commit_unit,FUNCTION," * _new (before) : %d",_new ); 626 567 627 if (_old < _top) _old = _old+_param->_size_queue; 568 628 if (_new < _top) _new = _new+_param->_size_queue; 569 629 if (_new > _old) reg_EVENT_NEXT_PACKET [front_end_id][context_id] = packet; 570 find = false; 630 else find = false; 631 632 log_printf(TRACE,Commit_unit,FUNCTION," * _old (after) : %d",_old ); 633 log_printf(TRACE,Commit_unit,FUNCTION," * _new (after) : %d",_new ); 571 634 } 635 636 log_printf(TRACE,Commit_unit,FUNCTION," * find : %d",find); 572 637 573 638 if (find) … … 710 775 // * need event 711 776 // * packet id = last packet id 712 if (((reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT ) and 713 (reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and 714 (reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] == num_bank ) and 715 (reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] == entry->ptr )) 716 reg_EVENT_LAST [front_end_id][context_id] = true; 717 777 // for (uint32_t x=0; x<_param->_nb_front_end; x++) 778 // for (uint32_t y=0; y<_param->_nb_context [x]; y++) 779 // if (((reg_EVENT_STATE [x][y] != COMMIT_EVENT_STATE_NO_EVENT ) and 780 // (reg_EVENT_STATE [x][y] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and 781 // (reg_EVENT_LAST_NUM_BANK [x][y] == num_bank ) and 782 // (reg_EVENT_LAST_NUM_PTR [x][y] == entry->ptr )) 783 // reg_EVENT_LAST [x][y] = true; 784 785 786 if (reg_EVENT_NB_INST [front_end_id][context_id] > 0) 787 { 788 reg_EVENT_NB_INST [front_end_id][context_id] --; 789 if (reg_EVENT_NB_INST [front_end_id][context_id] == 0) 790 reg_EVENT_LAST [front_end_id][context_id] = true; 791 } 792 718 793 // Update nb_inst 719 794 reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --; … … 853 928 // In all case, stop instruction flow 854 929 reg_EVENT_STATE [entry->front_end_id][entry->context_id] = COMMIT_EVENT_STATE_NOT_YET_EVENT; 930 reg_EVENT_NB_INST [entry->front_end_id][entry->context_id] = reg_NB_INST_COMMIT_ALL [entry->front_end_id][entry->context_id]; 931 855 932 // reg_EVENT_STOP [entry->front_end_id][entry->context_id] = true; 856 933 … … 918 995 919 996 { 920 bool EVENT_LAST [_param->_nb_front_end][_param->_max_nb_context]; 997 bool can_continue [_param->_nb_front_end][_param->_max_nb_context]; 998 uint32_t event_nb_inst [_param->_nb_front_end][_param->_max_nb_context]; 999 bool is_speculative [_param->_nb_front_end][_param->_max_nb_context]; 921 1000 for (uint32_t i=0; i<_param->_nb_front_end; i++) 922 1001 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 923 EVENT_LAST [i][j] = reg_EVENT_LAST [i][j]; 1002 { 1003 event_nb_inst [i][j] = 0; 1004 is_speculative[i][j] = false; 1005 can_continue [i][j] = (((reg_EVENT_NB_INST [i][j] == 0) or 1006 ( event_nb_inst [i][j] < reg_EVENT_NB_INST [i][j])) and 1007 not reg_EVENT_LAST [i][j]); 1008 } 924 1009 925 1010 // Read all instruction of all top bank … … 933 1018 // Scan all instruction in windows and test if instruction is speculative 934 1019 entry_t * entry = _rob [num_bank].front(); 935 1020 1021 uint32_t num_packet = ((entry->ptr << _param->_shift_num_slot) | num_bank); 936 1022 Tcontext_t front_end_id = entry->front_end_id; 937 1023 Tcontext_t context_id = entry->context_id ; 1024 1025 log_printf(TRACE,Commit_unit,FUNCTION," * HEAD [%d] - %d",num_bank,num_packet); 1026 log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id); 1027 log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id); 1028 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d",reg_EVENT_LAST [front_end_id][context_id]); 1029 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NB_INST : %d",reg_EVENT_NB_INST [front_end_id][context_id]); 1030 log_printf(TRACE,Commit_unit,FUNCTION," * event_nb_inst : %d", event_nb_inst [front_end_id][context_id]); 938 1031 939 1032 // scan while last event instruction is not retire 940 if ( EVENT_LAST [front_end_id][context_id] == false)1033 if (can_continue [front_end_id][context_id]) 941 1034 { 942 1035 // Read information … … 965 1058 // (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_DECOD) or 966 1059 (reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_WAIT_END)); 967 bool speculative = entry->speculative and not (depth == depth_min); 968 Tcontrol_t is_valid = ((not speculative or 969 (speculative and (depth_full or // all is valid 970 ((depth_min <= depth_max)? // test if depth is overflow 971 ((depth >= depth_min) and (depth <=depth_max)): 972 ((depth >= depth_min) or (depth <=depth_max)))))) 973 and not flush); // no event 974 1060 bool speculative = is_speculative [front_end_id][context_id]; 1061 1062 // bool speculative = entry->speculative and not (depth == depth_min); 1063 // Tcontrol_t is_valid = ((not speculative or 1064 // (speculative and (depth_full or // all is valid 1065 // ((depth_min <= depth_max)? // test if depth is overflow 1066 // ((depth >= depth_min) and (depth <=depth_max)): 1067 // ((depth >= depth_min) or (depth <=depth_max)))))) 1068 // and not flush); // no event 1069 1070 Tcontrol_t is_valid = not flush; 1071 1072 975 1073 //Tcontrol_t is_valid = ((depth == depth_min) and not flush); 976 1074 977 log_printf(TRACE,Commit_unit,FUNCTION," * HEAD [%d] - %d",num_bank,((entry->ptr << _param->_shift_num_slot) | num_bank));978 1075 979 1076 log_printf(TRACE,Commit_unit,FUNCTION," * is_valid : %d ((depth == depth_min) and not flush)",is_valid); … … 984 1081 log_printf(TRACE,Commit_unit,FUNCTION," * speculative : %d",speculative); 985 1082 log_printf(TRACE,Commit_unit,FUNCTION," * flush : %d",flush); 1083 log_printf(TRACE,Commit_unit,FUNCTION," * state (before) : %s",toString(state).c_str()); 1084 1085 // //------------------------------------------------------ 1086 // // Event ? 1087 // //------------------------------------------------------ 1088 1089 // if ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and 1090 // (reg_EVENT_PACKET [front_end_id][context_id] == num_packet)) 1091 // { 1092 // switch (state) 1093 // { 1094 // case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_BRANCH_MISS ; break;} 1095 // case ROB_END_LOAD_MISS_SPECULATIVE : {state = ROB_END_LOAD_MISS_UPDATE ; break;} 1096 // case ROB_END_BRANCH_MISS : 1097 // case ROB_END_LOAD_MISS : 1098 // case ROB_END : 1099 // {break;} 1100 // default : 1101 // { 1102 // throw ERRORMORPHEO(FUNCTION,toString(_("Head [%d] : invalid state (%s)"),num_packet,toString(state).c_str())); 1103 // break; 1104 // } 1105 // } 1106 // } 986 1107 987 1108 //------------------------------------------------------ … … 997 1118 case ROB_END_BRANCH_MISS : 998 1119 case ROB_END_BRANCH_MISS_SPECULATIVE : {state = ROB_END_MISS ; break;} 1120 case ROB_END_LOAD_MISS : 999 1121 case ROB_END_LOAD_MISS_UPDATE : 1000 case ROB_END_LOAD_MISS :1001 1122 case ROB_END_LOAD_MISS_SPECULATIVE : {state = ROB_END_MISS ; break;} 1002 1123 case ROB_STORE_OK : {state = ROB_STORE_KO ; break;} … … 1029 1150 } 1030 1151 } 1152 1153 //------------------------------------------------------ 1154 // test if instruction is branch not finish 1155 //------------------------------------------------------ 1156 switch (state) 1157 { 1158 case ROB_BRANCH_WAIT_END : 1159 case ROB_BRANCH_COMPLETE : 1160 { 1161 is_speculative [front_end_id][context_id] = true; 1162 break; 1163 } 1164 default : break; 1165 } 1031 1166 1032 1167 //------------------------------------------------------ 1033 1168 // test if instruction is not speculative 1034 1169 //------------------------------------------------------ 1035 entry->speculative = speculative;1170 // entry->speculative = speculative; 1036 1171 // if (entry->depth == depth_min) 1037 1172 // test if instruction is speculative (depth != depth_min) … … 1064 1199 // Write new state 1065 1200 entry->state = state; 1066 1067 // Test if this instruction is the last of event 1068 if (((reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NO_EVENT) and 1069 (reg_EVENT_STATE [front_end_id][context_id] != COMMIT_EVENT_STATE_NOT_YET_EVENT)) and 1070 (reg_EVENT_LAST_NUM_BANK [front_end_id][context_id] == num_bank ) and 1071 (reg_EVENT_LAST_NUM_PTR [front_end_id][context_id] == entry->ptr )) 1072 { 1073 log_printf(TRACE,Commit_unit,FUNCTION," * Stop Scan !!!"); 1201 1202 log_printf(TRACE,Commit_unit,FUNCTION," * state (after ) : %s",toString(state).c_str()); 1203 1204 // log_printf(TRACE,Commit_unit,FUNCTION," * Stop Scan !!!"); 1074 1205 1075 EVENT_LAST [front_end_id][context_id] = true; 1076 } 1206 event_nb_inst [front_end_id][context_id] ++; 1207 1208 // stop if : 1209 // * begin event 1210 // * end event 1211 if (((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and 1212 (reg_EVENT_PACKET[front_end_id][context_id] == num_packet)) or 1213 ((reg_EVENT_NB_INST [front_end_id][context_id] > 0) and 1214 ( event_nb_inst [front_end_id][context_id] >= reg_EVENT_NB_INST [front_end_id][context_id]))) 1215 can_continue [front_end_id][context_id] = false; 1077 1216 } 1078 1217 } … … 1083 1222 1084 1223 #ifdef STATISTICS 1085 for (uint32_t i=0; i<_param->_nb_bank; i++) 1086 if (usage_is_set(_usage,USE_STATISTICS)) 1087 *(_stat_bank_nb_inst [i]) += _rob[i].size(); 1224 if (usage_is_set(_usage,USE_STATISTICS)) 1225 { 1226 for (uint32_t i=0; i<_param->_nb_bank; i++) 1227 *(_stat_bank_nb_inst [i]) += _rob[i].size(); 1228 1229 for (uint32_t i=0; i<_param->_nb_front_end; i++) 1230 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 1231 { 1232 uint32_t num_thread = _param->_translate_num_context_to_num_thread [i][j]; 1233 1234 switch (reg_EVENT_STATE [i][j]) 1235 { 1236 case COMMIT_EVENT_STATE_NO_EVENT : (*_stat_nb_cycle_state_no_event [num_thread])++; break; 1237 case COMMIT_EVENT_STATE_NOT_YET_EVENT : (*_stat_nb_cycle_state_not_yet_event [num_thread])++; break; 1238 case COMMIT_EVENT_STATE_EVENT : (*_stat_nb_cycle_state_event [num_thread])++; break; 1239 case COMMIT_EVENT_STATE_WAIT_END : (*_stat_nb_cycle_state_wait_end [num_thread])++; break; 1240 } 1241 } 1242 } 1088 1243 #endif 1089 1244 } … … 1109 1264 // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT : %d (bank %d, ptr %d)",((reg_EVENT_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_NUM_BANK [i][j]), reg_EVENT_NUM_BANK [i][j],reg_EVENT_NUM_PTR [i][j]); 1110 1265 // log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_CAN_RESTART : %d",reg_EVENT_CAN_RESTART [i][j]); 1111 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_PACKET : %d",reg_EVENT_PACKET[i][j]); 1112 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d",reg_EVENT_LAST [i][j]); 1113 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d (bank %d, ptr %d)",((reg_EVENT_LAST_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [i][j]), reg_EVENT_LAST_NUM_BANK [i][j],reg_EVENT_LAST_NUM_PTR [i][j]); 1114 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NEXT_STOP : %d",reg_EVENT_NEXT_STOP [i][j]); 1115 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NEXT_PACKET : %d",reg_EVENT_NEXT_PACKET[i][j]); 1116 log_printf(TRACE,Commit_unit,FUNCTION," * NB_INST_ALL : %d",reg_NB_INST_COMMIT_ALL[i][j]); 1117 log_printf(TRACE,Commit_unit,FUNCTION," * NB_INST_MEM : %d",reg_NB_INST_COMMIT_MEM[i][j]); 1118 log_printf(TRACE,Commit_unit,FUNCTION," * PC_CURRENT : %.8x (%.8x) - %d %d",reg_PC_CURRENT [i][j],reg_PC_CURRENT [i][j]<<2, reg_PC_CURRENT_IS_DS [i][j], reg_PC_CURRENT_IS_DS_TAKE [i][j]); 1119 log_printf(TRACE,Commit_unit,FUNCTION," * PC_NEXT : %.8x (%.8x)",reg_PC_NEXT [i][j],reg_PC_NEXT [i][j]<<2); 1266 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_LAST : %d - packet %d - ptr %d (bank %d, ptr %d)",reg_EVENT_LAST [i][j],reg_EVENT_PACKET[i][j],((reg_EVENT_LAST_NUM_PTR [i][j] << _param->_shift_num_slot) | reg_EVENT_LAST_NUM_BANK [i][j]), reg_EVENT_LAST_NUM_BANK [i][j],reg_EVENT_LAST_NUM_PTR [i][j]); 1267 log_printf(TRACE,Commit_unit,FUNCTION," * EVENT_NEXT : stop : %d - packet : %d",reg_EVENT_NEXT_STOP [i][j],reg_EVENT_NEXT_PACKET[i][j]); 1268 log_printf(TRACE,Commit_unit,FUNCTION," * NB_INST_ALL : all : %d - mem : %d - event : %d",reg_NB_INST_COMMIT_ALL[i][j], reg_NB_INST_COMMIT_MEM[i][j],reg_EVENT_NB_INST[i][j]); 1269 log_printf(TRACE,Commit_unit,FUNCTION," * PC : %.8x (%.8x) - %d %d - %.8x (%.8x)",reg_PC_CURRENT [i][j],reg_PC_CURRENT [i][j]<<2, reg_PC_CURRENT_IS_DS [i][j], reg_PC_CURRENT_IS_DS_TAKE [i][j],reg_PC_NEXT [i][j],reg_PC_NEXT [i][j]<<2); 1120 1270 } 1121 1271 … … 1149 1299 nb_write_re += ((*it)->write_re)?1:0; 1150 1300 1151 log_printf(TRACE,Commit_unit,FUNCTION," [%.4d][%.4d] (%.4d)%.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s",1301 log_printf(TRACE,Commit_unit,FUNCTION," [%.4d][%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s", 1152 1302 num_bank , 1153 1303 (*it)->ptr , 1154 (((*it)->ptr << _param->_shift_num_slot) | num_bank),1155 1304 (*it)->front_end_id , 1156 1305 (*it)->context_id , … … 1165 1314 (*it)->load_queue_ptr_write , 1166 1315 toString((*it)->state).c_str() ); 1167 log_printf(TRACE,Commit_unit,FUNCTION," %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ", 1316 log_printf(TRACE,Commit_unit,FUNCTION," (%.4d) %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ", 1317 (((*it)->ptr << _param->_shift_num_slot) | num_bank), 1168 1318 (*it)->read_ra , 1169 1319 (*it)->num_reg_ra_log , … … 1184 1334 (*it)->num_reg_re_phy_new ); 1185 1335 1186 log_printf(TRACE,Commit_unit,FUNCTION," %.2d %.2d %.1d %.1d %.1d- %.8x (%.8x) %.8x (%.8x)",1336 log_printf(TRACE,Commit_unit,FUNCTION," %.2d %.2d %.1d %.1d - %.8x (%.8x) %.8x (%.8x)", 1187 1337 (*it)->exception_use , 1188 1338 (*it)->exception , 1189 1339 (*it)->flags , 1190 1340 (*it)->no_sequence , 1191 (*it)->speculative ,1341 // (*it)->speculative , 1192 1342 (*it)->address , 1193 1343 (*it)->address<<2 , … … 1245 1395 } 1246 1396 } 1397 { 1398 uint32_t NB_INST [_param->_nb_front_end][_param->_max_nb_context]; 1399 for (uint32_t i=0; i<_param->_nb_front_end; i++) 1400 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 1401 NB_INST [i][j] = 0; //reg_EVENT_NB_INST [i][j]; 1402 1403 for (uint32_t i=0; i<_param->_nb_bank; ++i) 1404 for (std::list<entry_t*>::iterator it=_rob[i].begin(); 1405 it!=_rob [i].end(); 1406 ++it) 1407 NB_INST [(*it)->front_end_id][(*it)->context_id] ++; 1408 1409 for (uint32_t i=0; i<_param->_nb_front_end; i++) 1410 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 1411 if (NB_INST [i][j] != reg_NB_INST_COMMIT_ALL [i][j]) 1412 throw ERRORMORPHEO(FUNCTION,toString(_("Context [%d][%d] have not the good nb_inst (%d in rob, %d in register).\n"),i,j,NB_INST[i][j], reg_NB_INST_COMMIT_ALL [i][j])); 1413 } 1247 1414 #endif 1248 1415 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Parameters_msg_error.cpp
r82 r124 43 43 test.error(_("the number of physical special register must be a power of 2.\n")); 44 44 45 // if (not is_multiple(_nb_general_register,_nb_bank)) 46 // test.error(_("nb_general_register must be a multiple of nb_bank.\n")); 47 // if (not is_multiple(_nb_special_register,_nb_bank)) 48 // test.error(_("nb_special_register must be a multiple of nb_bank.\n")); 49 45 50 if (not is_power2(_nb_bank)) 46 51 test.error(_("the number of bank must be a power of 2.\n")); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h
r88 r124 32 32 public : const uint32_t _nb_port_write_by_bank; // Local write port 33 33 public : const Tcrossbar_t _crossbar ; 34 public : const bool _have_init_value; 35 public : const std::string _init_value; 34 36 35 37 public : const uint32_t _size_address ; … … 60 62 uint32_t nb_port_read_by_bank , 61 63 uint32_t nb_port_write_by_bank, 62 Tcrossbar_t crossbar ); 64 Tcrossbar_t crossbar , 65 std::string init_value="" ); 63 66 // public : Parameters (Parameters & param) ; 64 67 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp
r88 r124 23 23 uint32_t nb_port_read_by_bank , 24 24 uint32_t nb_port_write_by_bank, 25 Tcrossbar_t crossbar ): 25 Tcrossbar_t crossbar , 26 std::string init_value 27 ): 26 28 _nb_port_read (nb_port_read ), 27 29 _nb_port_write (nb_port_write ), … … 32 34 _nb_port_write_by_bank (nb_port_write_by_bank), 33 35 _crossbar (crossbar ), 36 _have_init_value (init_value != "" ), 37 _init_value (init_value ), 34 38 _size_address (static_cast<uint32_t>(ceil(log2(_nb_word)))), 35 39 _size_address_by_bank (_size_address - static_cast<uint32_t>(ceil(log2(_nb_bank)))), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_transition.cpp
r111 r124 25 25 // call function pointer 26 26 // (this->*function_transition) (); 27 28 for (uint32_t i=0; i<_param->_nb_port_write; i++) 27 if (_param->_have_init_value and (PORT_READ(in_NRESET) == 0)) 29 28 { 30 if (internal_WRITE_VAL [i] == 1) 31 { 32 Tdata_t data = PORT_READ(in_WRITE_DATA [i]); 33 34 // Write in registerFile 35 reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]] = data; 36 } 29 for (uint32_t i=0; i<_param->_nb_bank; ++i) 30 for (uint32_t j=0; j<_param->_nb_word; ++j) 31 reg_DATA[i][j] = fromString<Tdata_t>(_param->_init_value); 32 } 33 else 34 { 35 for (uint32_t i=0; i<_param->_nb_port_write; i++) 36 { 37 if (internal_WRITE_VAL [i] == 1) 38 { 39 Tdata_t data = PORT_READ(in_WRITE_DATA [i]); 40 41 // Write in registerFile 42 reg_DATA[internal_WRITE_BANK[i]][internal_WRITE_NUM_REG[i]] = data; 43 } 44 } 37 45 } 38 46 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Simulation.h
r112 r124 19 19 namespace behavioural { 20 20 21 extern double _simulation_nb_cycle; 22 extern double _simulation_nb_instruction; 23 extern std::vector<double> _simulation_nb_instruction_commited; 24 extern Model _model; 21 extern bool _simulation_stop_exception; 22 extern double _simulation_nb_cycle; 23 extern double _simulation_nb_instruction; 24 extern std::vector<double> _simulation_nb_instruction_commited; 25 extern bool _simulation_file_with_date; 26 extern bool _simulation_file_with_pid ; 27 28 extern Model _model; 25 29 26 30 bool simulation_test_end (void); 27 31 void simulation_init (double nb_cycle, 28 double nb_instruction); 32 double denug_nb_cycle, 33 double nb_instruction, 34 bool file_with_date, 35 bool file_with_pid); 29 36 }; // end namespace behavioural 30 37 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h
r88 r124 111 111 112 112 private : void test_and_save (bool force_save=false); 113 private : void reset (bool save); 113 114 114 115 private : void eval_exprs (bool only_each_cycle=true); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h
r123 r124 44 44 45 45 // ~~~~~ prediction_unit 46 typedef uint 32_t Thistory_t;46 typedef uint64_t Thistory_t; 47 47 typedef Tptr_t Tprediction_ptr_t; 48 48 typedef uint8_t Tbranch_state_t; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r123 r124 10 10 #define MORPHEO_MAJOR_VERSION "0" 11 11 #define MORPHEO_MINOR_VERSION "2" 12 #define MORPHEO_REVISION "12 3"12 #define MORPHEO_REVISION "124" 13 13 #define MORPHEO_CODENAME "Castor" 14 14 15 #define MORPHEO_DATE_DAY " 08"15 #define MORPHEO_DATE_DAY "17" 16 16 #define MORPHEO_DATE_MONTH "06" 17 17 #define MORPHEO_DATE_YEAR "2009" -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_generate_file.cpp
r88 r124 25 25 XML xml = toXML(); 26 26 27 xml.filename_extension (" .pos");27 xml.filename_extension ("pos"); 28 28 29 29 xml.generate_file(MORPHEO_POSITION,"ISO-8859-1"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Simulation.cpp
r112 r124 14 14 15 15 static bool simulation_initialized; 16 bool _simulation_stop_exception; 16 17 double _simulation_nb_cycle; 17 18 double _simulation_nb_instruction; 18 19 std::vector<double> _simulation_nb_instruction_commited; 20 bool _simulation_file_with_date; 21 bool _simulation_file_with_pid ; 22 19 23 Model _model; 20 24 21 25 void simulation_init (double nb_cycle, 22 double nb_instruction) 26 double debug_nb_cycle, 27 double nb_instruction, 28 bool file_with_date, 29 bool file_with_pid ) 23 30 { 24 31 if (not simulation_initialized) 25 32 { 26 _simulation_nb_cycle = nb_cycle; 33 if (debug_nb_cycle == 0) 34 { 35 _simulation_nb_cycle = nb_cycle; 36 _simulation_stop_exception = false; 37 } 38 else 39 { 40 _simulation_nb_cycle = (debug_nb_cycle<nb_cycle)?debug_nb_cycle:nb_cycle; 41 _simulation_stop_exception = (debug_nb_cycle<nb_cycle); 42 } 43 27 44 _simulation_nb_instruction = nb_instruction; 28 45 // _simulation_nb_instruction_commited = new std::vector<double>; 46 _simulation_file_with_date = file_with_date; 47 _simulation_file_with_pid = file_with_pid ; 29 48 30 49 simulation_initialized = true; … … 34 53 msg_printf(WARNING,_("Multi instance of Morpheo : stop condition, take the highest.")); 35 54 36 if (_simulation_nb_cycle < nb_cycle) 37 _simulation_nb_cycle = nb_cycle; 55 if (//(_simulation_nb_cycle == 0) or 56 (_simulation_nb_cycle < debug_nb_cycle)) 57 { 58 _simulation_nb_cycle = debug_nb_cycle; 59 _simulation_stop_exception = true; 60 } 38 61 39 if (_simulation_nb_instruction < nb_instruction) 62 if (//(_simulation_nb_cycle == 0) or 63 (_simulation_nb_cycle < nb_cycle)) 64 { 65 _simulation_nb_cycle = nb_cycle; 66 _simulation_stop_exception = false; 67 } 68 69 if (//(_simulation_nb_instruction == 0) or 70 (_simulation_nb_instruction < nb_instruction)) 40 71 _simulation_nb_instruction = nb_instruction; 72 73 _simulation_file_with_date |= file_with_date; 74 _simulation_file_with_pid |= file_with_pid ; 41 75 } 42 76 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Simulation_test_end.cpp
r117 r124 9 9 #include "Behavioural/include/Simulation.h" 10 10 #include "Common/include/Systemc.h" 11 #include "Common/include/ErrorMorpheo.h" 11 12 12 13 namespace morpheo { … … 47 48 end_inst = true; 48 49 49 return end_cycle and end_inst; 50 if (end_cycle and _simulation_stop_exception) 51 { 52 throw ErrorMorpheo(_("Maximal cycles Reached")); 53 return false; 54 } 55 else 56 return end_cycle and end_inst; 50 57 } 51 58 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat.cpp
r81 r124 19 19 20 20 _cycle = create_variable("cycle"); 21 // _cycle = create_counter("cycle","",""); 21 22 *_cycle = 0; // for the first period 22 23 … … 39 40 40 41 _cycle = create_variable("cycle"); 42 // _cycle = create_counter("cycle","",""); 41 43 *_cycle = 0; // for the first period 42 44 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_end_cycle.cpp
r113 r124 17 17 test_and_save(false); 18 18 } 19 else 20 if ((_cycle_sum+1) == _nb_cycle_before_begin) 21 { 22 // Init counter 23 reset (false); 24 } 19 25 } 20 26 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_generate_file.cpp
r113 r124 30 30 xml->balise_close(); 31 31 32 xml->filename_extension (" .stat");32 xml->filename_extension ("stat"); 33 33 xml->generate_file(MORPHEO_STATISTICS); 34 34 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_test_and_save.cpp
r81 r124 9 9 { 10 10 eval_exprs(false); // evalue les expression non periodique au cycle 11 12 for (std::map<std::string, var_t>::iterator i=_list_operand->begin(); 13 i!= _list_operand->end(); 14 ++i) 15 { 16 // save and reset ! 17 i->second.save_counter.push_back(*(i->second.counter)); 18 *(i->second.counter) = 0; 19 } 11 12 reset (true); 20 13 } 21 14 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML.cpp
r88 r124 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 _filename_extension=" .xml";19 _filename_extension="xml"; 20 20 log_printf(FUNC,Behavioural,FUNCTION,"End"); 21 21 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_generate_file.cpp
r88 r124 8 8 #include "Behavioural/include/XML.h" 9 9 #include "Common/include/ErrorMorpheo.h" 10 #include "Common/include/Filename.h" 10 11 #include <fstream> 11 12 … … 21 22 header (encoding); 22 23 23 std::string filename = dirname + "/" + _name + _filename_extension; 24 std::string filename = morpheo::filename(dirname, 25 _name, 26 "", 27 _filename_extension, 28 _simulation_file_with_date, 29 _simulation_file_with_pid , 30 true); 24 31 25 32 msg_printf(INFORMATION,_("Generate file \"%s\"."),filename.c_str()); -
trunk/IPs/systemC/processor/Morpheo/Common/include/Message.h
r120 r124 43 43 #endif 44 44 45 extern bool log_with_pid;46 45 extern FILE * log_stream; 47 46 48 47 FILE * log (FILE * stream); 49 48 void log_init (bool have_file, 49 bool with_date, 50 50 bool with_pid , 51 51 std::string directory, -
trunk/IPs/systemC/processor/Morpheo/Common/src/Message.cpp
r120 r124 15 15 16 16 static bool log_initialized; 17 bool log_with_pid;18 17 FILE * log_stream; 19 18 … … 29 28 #define FUNCTION "log_init" 30 29 void log_init (bool have_file, 30 bool with_date, 31 31 bool with_pid , 32 32 std::string directory, … … 36 36 { 37 37 log_initialized = true; 38 log_with_pid = with_pid;39 38 40 39 if (have_file) … … 45 44 "", 46 45 "log", 47 (file==""),46 with_date, 48 47 with_pid, 49 48 true); -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_2.cfg
r123 r124 4 4 5 5 <thread id="0"> 6 <parameter name="size_ifetch_queue" value=" 8" />6 <parameter name="size_ifetch_queue" value="4" /> 7 7 <parameter name="nb_inst_fetch" value="1" /> 8 8 <parameter name="ras_size_queue" value="8" /> 9 <parameter name="upt_size_queue" value=" 8" />9 <parameter name="upt_size_queue" value="4" /> 10 10 <parameter name="ufpt_size_queue" value="2" /> 11 11 … … 37 37 38 38 <read_bloc id="0"> 39 <parameter name="size_read_queue" value=" 4" />39 <parameter name="size_read_queue" value="2" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 4" />41 <parameter name="nb_inst_retire_reservation_station" value="2" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0"> 45 45 <parameter name="size_write_queue" value="4" /> 46 <parameter name="size_execute_queue" value=" 4" />46 <parameter name="size_execute_queue" value="2" /> 47 47 <parameter name="nb_bypass_write" value="0" /> 48 48 <parameter name="write_queue_scheme" value="1" /> … … 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 8" />53 <parameter name="size_load_queue" value=" 8" />54 <parameter name="size_speculative_access_queue" value=" 4" />52 <parameter name="size_store_queue" value="4" /> 53 <parameter name="size_load_queue" value="4" /> 54 <parameter name="size_speculative_access_queue" value="2" /> 55 55 <parameter name="nb_port_check" value="1" /> 56 56 <parameter name="speculative_load" value="2" /> … … 114 114 <parameter name="commit_priority" value="1" /> 115 115 <parameter name="commit_load_balancing" value="1" /> 116 <parameter name="size_issue_queue" value=" 8" />117 <parameter name="nb_issue_queue_bank" value=" 2" />116 <parameter name="size_issue_queue" value="4" /> 117 <parameter name="nb_issue_queue_bank" value="1" /> 118 118 <parameter name="issue_queue_scheme" value="0" /> 119 119 <parameter name="issue_priority" value="1" /> … … 130 130 <parameter name="nb_gpr_port_read_by_bank" value="2" /> 131 131 <parameter name="nb_gpr_port_write_by_bank" value="1" /> 132 <parameter name="nb_spr_bank" value=" 2" />132 <parameter name="nb_spr_bank" value="1" /> 133 133 <parameter name="nb_spr_port_read_by_bank" value="1" /> 134 134 <parameter name="nb_spr_port_write_by_bank" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_3.cfg
r123 r124 7 7 <parameter name="nb_inst_fetch" value="1" /> 8 8 <parameter name="ras_size_queue" value="8" /> 9 <parameter name="upt_size_queue" value=" 8" />9 <parameter name="upt_size_queue" value="4" /> 10 10 <parameter name="ufpt_size_queue" value="2" /> 11 11 … … 37 37 38 38 <read_bloc id="0,1"> 39 <parameter name="size_read_queue" value=" 4" />39 <parameter name="size_read_queue" value="2" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 4" />41 <parameter name="nb_inst_retire_reservation_station" value="2" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0,1"> 45 45 <parameter name="size_write_queue" value="4" /> 46 <parameter name="size_execute_queue" value=" 4" />47 <parameter name="nb_bypass_write" value=" 0" />46 <parameter name="size_execute_queue" value="2" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 48 <parameter name="write_queue_scheme" value="1" /> 49 49 </write_bloc> 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 8" />52 <parameter name="size_store_queue" value="4" /> 53 53 <parameter name="size_load_queue" value="8" /> 54 <parameter name="size_speculative_access_queue" value=" 4" />54 <parameter name="size_speculative_access_queue" value="2" /> 55 55 <parameter name="nb_port_check" value="1" /> 56 56 <parameter name="speculative_load" value="2" /> … … 84 84 <parameter name="btb_size_counter" value="2" /> 85 85 <parameter name="btb_victim_scheme" value="3" /> 86 <parameter name="dir_predictor_scheme" value=" 2" />86 <parameter name="dir_predictor_scheme" value="4" /> 87 87 88 88 <predictor id="0"> 89 89 <parameter name="dir_have_bht" value="0" /> 90 <parameter name="dir_have_pht" value="0" /> 90 <parameter name="dir_have_pht" value="1" /> 91 <parameter name="dir_pht_size_counter" value="2" /> 92 <parameter name="dir_pht_nb_counter" value="256"/> 93 <parameter name="dir_pht_size_address_share" value="0" /> 91 94 </predictor> 92 95 … … 182 185 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> 183 186 <link name="link_write_bloc_and_load_store_unit" src="1.0" dest="0" /> 184 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest=" 1" />187 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="0" /> 185 188 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 186 189 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_4.cfg
r123 r124 32 32 <parameter name="nb_general_register" value="64"/> 33 33 <parameter name="nb_special_register" value="16" /> 34 <parameter name="nb_reg_free" value=" 1" />35 <parameter name="nb_rename_unit_bank" value=" 1" />34 <parameter name="nb_reg_free" value="2" /> 35 <parameter name="nb_rename_unit_bank" value="2" /> 36 36 </rename_bloc> 37 37 38 38 <read_bloc id="0,1,2"> 39 <parameter name="size_read_queue" value=" 4" />39 <parameter name="size_read_queue" value="2" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 4" />41 <parameter name="nb_inst_retire_reservation_station" value="2" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0,1,2"> 45 45 <parameter name="size_write_queue" value="4" /> 46 <parameter name="size_execute_queue" value=" 4" />47 <parameter name="nb_bypass_write" value=" 0" />46 <parameter name="size_execute_queue" value="2" /> 47 <parameter name="nb_bypass_write" value="1" /> 48 48 <parameter name="write_queue_scheme" value="1" /> 49 49 </write_bloc> 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 8" />52 <parameter name="size_store_queue" value="4" /> 53 53 <parameter name="size_load_queue" value="8" /> 54 <parameter name="size_speculative_access_queue" value=" 4" />54 <parameter name="size_speculative_access_queue" value="2" /> 55 55 <parameter name="nb_port_check" value="1" /> 56 56 <parameter name="speculative_load" value="2" /> … … 98 98 <parameter name="btb_size_counter" value="2" /> 99 99 <parameter name="btb_victim_scheme" value="3" /> 100 <parameter name="dir_predictor_scheme" value="2" /> 100 <parameter name="dir_predictor_scheme" value="4" /> 101 102 103 <predictor id="0"> 104 <parameter name="dir_have_bht" value="0" /> 105 <parameter name="dir_have_pht" value="1" /> 106 <parameter name="dir_pht_size_counter" value="2" /> 107 <parameter name="dir_pht_nb_counter" value="256"/> 108 <parameter name="dir_pht_size_address_share" value="0" /> 109 </predictor> 110 111 <predictor id="1"> 112 <parameter name="dir_have_bht" value="0" /> 113 <parameter name="dir_have_pht" value="0" /> 114 </predictor> 115 116 <predictor id="2"> 117 <parameter name="dir_have_bht" value="0" /> 118 <parameter name="dir_have_pht" value="0" /> 119 </predictor> 120 101 121 </front_end> 102 122 … … 126 146 <parameter name="nb_read_unit" value="3" /> 127 147 <parameter name="nb_write_unit" value="3" /> 128 <parameter name="nb_gpr_bank" value=" 2" />148 <parameter name="nb_gpr_bank" value="4" /> 129 149 <parameter name="nb_gpr_port_read_by_bank" value="2" /> 130 150 <parameter name="nb_gpr_port_write_by_bank" value="1" /> 131 <parameter name="nb_spr_bank" value=" 2" />151 <parameter name="nb_spr_bank" value="4" /> 132 152 <parameter name="nb_spr_port_read_by_bank" value="1" /> 133 153 <parameter name="nb_spr_port_write_by_bank" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_1.cfg
r123 r124 32 32 <parameter name="nb_general_register" value="64"/> 33 33 <parameter name="nb_special_register" value="16"/> 34 <parameter name="nb_reg_free" value=" 1" />34 <parameter name="nb_reg_free" value="2" /> 35 35 <parameter name="nb_rename_unit_bank" value="2" /> 36 36 </rename_bloc> … … 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 4" />41 <parameter name="nb_inst_retire_reservation_station" value="2" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0,1"> 45 45 <parameter name="size_write_queue" value="4" /> 46 <parameter name="size_execute_queue" value=" 4" />46 <parameter name="size_execute_queue" value="2" /> 47 47 <parameter name="nb_bypass_write" value="1" /> 48 48 <parameter name="write_queue_scheme" value="1" /> … … 84 84 <parameter name="btb_size_counter" value="2" /> 85 85 <parameter name="btb_victim_scheme" value="3" /> 86 <parameter name="dir_predictor_scheme" value="2" /> 86 <parameter name="dir_predictor_scheme" value="4" /> 87 88 <predictor id="0"> 89 <parameter name="dir_have_bht" value="0" /> 90 <parameter name="dir_have_pht" value="1" /> 91 <parameter name="dir_pht_size_counter" value="2" /> 92 <parameter name="dir_pht_nb_counter" value="512"/> 93 <parameter name="dir_pht_size_address_share" value="0" /> 94 </predictor> 95 96 <predictor id="1"> 97 <parameter name="dir_have_bht" value="0" /> 98 <parameter name="dir_have_pht" value="0" /> 99 </predictor> 100 101 <predictor id="2"> 102 <parameter name="dir_have_bht" value="0" /> 103 <parameter name="dir_have_pht" value="0" /> 104 </predictor> 105 87 106 </front_end> 88 107 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_2.cfg
r123 r124 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> 41 <parameter name="nb_inst_retire_reservation_station" value=" 4" />41 <parameter name="nb_inst_retire_reservation_station" value="2" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0,1,2"> 45 45 <parameter name="size_write_queue" value="4" /> 46 <parameter name="size_execute_queue" value=" 4" />46 <parameter name="size_execute_queue" value="2" /> 47 47 <parameter name="nb_bypass_write" value="1" /> 48 48 <parameter name="write_queue_scheme" value="1" /> … … 98 98 <parameter name="btb_size_counter" value="2" /> 99 99 <parameter name="btb_victim_scheme" value="3" /> 100 <parameter name="dir_predictor_scheme" value="2" /> 100 <parameter name="dir_predictor_scheme" value="4" /> 101 102 <predictor id="0"> 103 <parameter name="dir_have_bht" value="0" /> 104 <parameter name="dir_have_pht" value="1" /> 105 <parameter name="dir_pht_size_counter" value="2" /> 106 <parameter name="dir_pht_nb_counter" value="512"/> 107 <parameter name="dir_pht_size_address_share" value="0" /> 108 </predictor> 109 110 <predictor id="1"> 111 <parameter name="dir_have_bht" value="0" /> 112 <parameter name="dir_have_pht" value="0" /> 113 </predictor> 114 115 <predictor id="2"> 116 <parameter name="dir_have_bht" value="0" /> 117 <parameter name="dir_have_pht" value="0" /> 118 </predictor> 101 119 </front_end> 102 120 -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_3.cfg
r123 r124 4 4 5 5 <thread id="0"> 6 <parameter name="size_ifetch_queue" value=" 8" />6 <parameter name="size_ifetch_queue" value="16" /> 7 7 <parameter name="nb_inst_fetch" value="2" /> 8 8 <parameter name="ras_size_queue" value="8" /> … … 33 33 <parameter name="nb_special_register" value="32"/> 34 34 <parameter name="nb_reg_free" value="2" /> 35 <parameter name="nb_rename_unit_bank" value=" 2" />35 <parameter name="nb_rename_unit_bank" value="4" /> 36 36 </rename_bloc> 37 37 … … 53 53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 <parameter name="nb_port_check" value=" 1" />55 <parameter name="nb_port_check" value="4" /> 56 56 <parameter name="speculative_load" value="2" /> 57 57 <parameter name="nb_bypass_memory" value="0" /> … … 98 98 <parameter name="btb_size_counter" value="2" /> 99 99 <parameter name="btb_victim_scheme" value="3" /> 100 <parameter name="dir_predictor_scheme" value=" 2" />100 <parameter name="dir_predictor_scheme" value="4" /> 101 101 102 102 <predictor id="0"> 103 <parameter name="dir_have_bht" value="0" /> 104 <parameter name="dir_bht_size_shifter" value="1" /> 105 <parameter name="dir_bht_nb_shifter" value="64" /> 106 <parameter name="dir_have_pht" value="1" /> 103 <parameter name="dir_have_bht" value="0" /> 104 <parameter name="dir_have_pht" value="1" /> 107 105 <parameter name="dir_pht_size_counter" value="2" /> 108 <parameter name="dir_pht_nb_counter" value=" 16"/>106 <parameter name="dir_pht_nb_counter" value="512"/> 109 107 <parameter name="dir_pht_size_address_share" value="0" /> 110 108 </predictor> 109 111 110 <predictor id="1"> 112 <parameter name="dir_have_bht" value="1" /> 113 <parameter name="dir_bht_size_shifter" value="4" /> 114 <parameter name="dir_bht_nb_shifter" value="1" /> 115 <parameter name="dir_have_pht" value="1" /> 116 <parameter name="dir_pht_size_counter" value="2" /> 117 <parameter name="dir_pht_nb_counter" value="64" /> 118 <parameter name="dir_pht_size_address_share" value="0" /> 111 <parameter name="dir_have_bht" value="0" /> 112 <parameter name="dir_have_pht" value="0" /> 119 113 </predictor> 114 120 115 <predictor id="2"> 121 116 <parameter name="dir_have_bht" value="0" /> 122 <parameter name="dir_have_pht" value="1" /> 123 <parameter name="dir_pht_size_counter" value="2" /> 124 <parameter name="dir_pht_nb_counter" value="128" /> 125 <parameter name="dir_pht_size_address_share" value="0" /> 126 </predictor> 117 <parameter name="dir_have_pht" value="0" /> 118 </predictor> 127 119 128 120 </front_end> … … 153 145 <parameter name="nb_read_unit" value="3" /> 154 146 <parameter name="nb_write_unit" value="3" /> 155 <parameter name="nb_gpr_bank" value=" 2" />147 <parameter name="nb_gpr_bank" value="4" /> 156 148 <parameter name="nb_gpr_port_read_by_bank" value="2" /> 157 149 <parameter name="nb_gpr_port_write_by_bank" value="2" /> 158 <parameter name="nb_spr_bank" value=" 2" />150 <parameter name="nb_spr_bank" value="4" /> 159 151 <parameter name="nb_spr_port_read_by_bank" value="2" /> 160 152 <parameter name="nb_spr_port_write_by_bank" value="2" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_4.cfg
r123 r124 4 4 5 5 <thread id="0"> 6 <parameter name="size_ifetch_queue" value=" 8" />6 <parameter name="size_ifetch_queue" value="16" /> 7 7 <parameter name="nb_inst_fetch" value="2" /> 8 8 <parameter name="ras_size_queue" value="8" /> … … 33 33 <parameter name="nb_special_register" value="64" /> 34 34 <parameter name="nb_reg_free" value="2" /> 35 <parameter name="nb_rename_unit_bank" value=" 2" />35 <parameter name="nb_rename_unit_bank" value="4" /> 36 36 </rename_bloc> 37 37 … … 53 53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 <parameter name="nb_port_check" value=" 1" />55 <parameter name="nb_port_check" value="4" /> 56 56 <parameter name="speculative_load" value="2" /> 57 57 <parameter name="nb_bypass_memory" value="0" /> … … 98 98 <parameter name="btb_size_counter" value="2" /> 99 99 <parameter name="btb_victim_scheme" value="3" /> 100 <parameter name="dir_predictor_scheme" value="2" /> 100 <parameter name="dir_predictor_scheme" value="4" /> 101 102 <predictor id="0"> 103 <parameter name="dir_have_bht" value="0" /> 104 <parameter name="dir_have_pht" value="1" /> 105 <parameter name="dir_pht_size_counter" value="2" /> 106 <parameter name="dir_pht_nb_counter" value="512"/> 107 <parameter name="dir_pht_size_address_share" value="0" /> 108 </predictor> 109 110 <predictor id="1"> 111 <parameter name="dir_have_bht" value="0" /> 112 <parameter name="dir_have_pht" value="0" /> 113 </predictor> 114 115 <predictor id="2"> 116 <parameter name="dir_have_bht" value="0" /> 117 <parameter name="dir_have_pht" value="0" /> 118 </predictor> 119 101 120 </front_end> 102 121 … … 106 125 <parameter name="nb_inst_reexecute" value="1" /> 107 126 <parameter name="nb_inst_commit" value="2" /> 108 <parameter name="nb_inst_branch_complete" value=" 1" />127 <parameter name="nb_inst_branch_complete" value="2" /> 109 128 <parameter name="nb_rename_unit_select" value="1" /> 110 129 <parameter name="nb_execute_loop_select" value="1" /> 111 130 <parameter name="size_re_order_buffer" value="64"/> 112 <parameter name="nb_re_order_buffer_bank" value=" 16"/>131 <parameter name="nb_re_order_buffer_bank" value="8"/> 113 132 <parameter name="commit_priority" value="1" /> 114 133 <parameter name="commit_load_balancing" value="1" /> … … 126 145 <parameter name="nb_read_unit" value="4" /> 127 146 <parameter name="nb_write_unit" value="4" /> 128 <parameter name="nb_gpr_bank" value=" 2" />147 <parameter name="nb_gpr_bank" value="4" /> 129 148 <parameter name="nb_gpr_port_read_by_bank" value="2" /> 130 149 <parameter name="nb_gpr_port_write_by_bank" value="2" /> 131 <parameter name="nb_spr_bank" value=" 2" />150 <parameter name="nb_spr_bank" value="4" /> 132 151 <parameter name="nb_spr_port_read_by_bank" value="2" /> 133 152 <parameter name="nb_spr_port_write_by_bank" value="2" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_1.cfg
r123 r124 8 8 <parameter name="ras_size_queue" value="8" /> 9 9 <parameter name="upt_size_queue" value="16" /> 10 <parameter name="ufpt_size_queue" value=" 4" />10 <parameter name="ufpt_size_queue" value="6" /> 11 11 12 12 <group id="0"> … … 89 89 <parameter name="btb_size_counter" value="2" /> 90 90 <parameter name="btb_victim_scheme" value="3" /> 91 <parameter name="dir_predictor_scheme" value=" 2" />91 <parameter name="dir_predictor_scheme" value="4" /> 92 92 93 93 <predictor id="0"> 94 <parameter name="dir_have_bht" value=" 0" />95 <parameter name="dir_bht_size_shifter" value="1 "/>96 <parameter name="dir_bht_nb_shifter" value=" 64" />94 <parameter name="dir_have_bht" value="1" /> 95 <parameter name="dir_bht_size_shifter" value="10" /> 96 <parameter name="dir_bht_nb_shifter" value="1024" /> 97 97 <parameter name="dir_have_pht" value="1" /> 98 98 <parameter name="dir_pht_size_counter" value="2" /> 99 <parameter name="dir_pht_nb_counter" value="1 6" />99 <parameter name="dir_pht_nb_counter" value="1024" /> 100 100 <parameter name="dir_pht_size_address_share" value="0" /> 101 101 </predictor> 102 102 <predictor id="1"> 103 103 <parameter name="dir_have_bht" value="1" /> 104 <parameter name="dir_bht_size_shifter" value=" 4" />104 <parameter name="dir_bht_size_shifter" value="10" /> 105 105 <parameter name="dir_bht_nb_shifter" value="1" /> 106 106 <parameter name="dir_have_pht" value="1" /> 107 107 <parameter name="dir_pht_size_counter" value="2" /> 108 <parameter name="dir_pht_nb_counter" value=" 64" />108 <parameter name="dir_pht_nb_counter" value="1024" /> 109 109 <parameter name="dir_pht_size_address_share" value="0" /> 110 110 </predictor> … … 113 113 <parameter name="dir_have_pht" value="1" /> 114 114 <parameter name="dir_pht_size_counter" value="2" /> 115 <parameter name="dir_pht_nb_counter" value="1 28" />115 <parameter name="dir_pht_nb_counter" value="1024" /> 116 116 <parameter name="dir_pht_size_address_share" value="0" /> 117 117 </predictor> 118 118 119 </front_end> 119 120 … … 126 127 <parameter name="nb_rename_unit_select" value="1" /> 127 128 <parameter name="nb_execute_loop_select" value="1" /> 128 <parameter name="size_re_order_buffer" value=" 64"/>129 <parameter name="size_re_order_buffer" value="128"/> 129 130 <parameter name="nb_re_order_buffer_bank" value="16" /> 130 131 <parameter name="commit_priority" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_2.cfg
r123 r124 6 6 <parameter name="size_ifetch_queue" value="32" /> 7 7 <parameter name="nb_inst_fetch" value="8" /> 8 <parameter name="ras_size_queue" value=" 8" />8 <parameter name="ras_size_queue" value="16" /> 9 9 <parameter name="upt_size_queue" value="16" /> 10 <parameter name="ufpt_size_queue" value=" 4" />10 <parameter name="ufpt_size_queue" value="6" /> 11 11 12 12 <group id="0"> … … 51 51 <load_store_unit id="0"> 52 52 <parameter name="size_store_queue" value="16" /> 53 <parameter name="size_load_queue" value=" 32" />53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="4" /> … … 89 89 <parameter name="btb_size_counter" value="2" /> 90 90 <parameter name="btb_victim_scheme" value="3" /> 91 <parameter name="dir_predictor_scheme" value=" 2" />92 91 <parameter name="dir_predictor_scheme" value="4" /> 92 93 93 <predictor id="0"> 94 94 <parameter name="dir_have_bht" value="1" /> 95 <parameter name="dir_bht_size_shifter" value=" 4"/>96 <parameter name="dir_bht_nb_shifter" value=" 64" />95 <parameter name="dir_bht_size_shifter" value="10" /> 96 <parameter name="dir_bht_nb_shifter" value="1024" /> 97 97 <parameter name="dir_have_pht" value="1" /> 98 98 <parameter name="dir_pht_size_counter" value="2" /> 99 <parameter name="dir_pht_nb_counter" value=" 64" />99 <parameter name="dir_pht_nb_counter" value="1024" /> 100 100 <parameter name="dir_pht_size_address_share" value="0" /> 101 101 </predictor> 102 102 <predictor id="1"> 103 103 <parameter name="dir_have_bht" value="1" /> 104 <parameter name="dir_bht_size_shifter" value=" 4" />104 <parameter name="dir_bht_size_shifter" value="10" /> 105 105 <parameter name="dir_bht_nb_shifter" value="1" /> 106 106 <parameter name="dir_have_pht" value="1" /> 107 107 <parameter name="dir_pht_size_counter" value="2" /> 108 <parameter name="dir_pht_nb_counter" value="1 28" />108 <parameter name="dir_pht_nb_counter" value="1024" /> 109 109 <parameter name="dir_pht_size_address_share" value="0" /> 110 110 </predictor> … … 113 113 <parameter name="dir_have_pht" value="1" /> 114 114 <parameter name="dir_pht_size_counter" value="2" /> 115 <parameter name="dir_pht_nb_counter" value="1 28" />115 <parameter name="dir_pht_nb_counter" value="1024" /> 116 116 <parameter name="dir_pht_size_address_share" value="0" /> 117 117 </predictor> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg
r123 r124 6 6 <parameter name="size_ifetch_queue" value="64" /> 7 7 <parameter name="nb_inst_fetch" value="8" /> 8 <parameter name="ras_size_queue" value=" 8" />8 <parameter name="ras_size_queue" value="16" /> 9 9 <parameter name="upt_size_queue" value="16" /> 10 <parameter name="ufpt_size_queue" value=" 4" />10 <parameter name="ufpt_size_queue" value="8" /> 11 11 12 12 <group id="0"> … … 30 30 <parameter name="rename_select_load_balancing" value="1" /> 31 31 <parameter name="rename_select_nb_front_end_select" value="1" /> 32 <parameter name="nb_general_register" value=" 256"/>32 <parameter name="nb_general_register" value="512"/> 33 33 <parameter name="nb_special_register" value="128"/> 34 <parameter name="nb_reg_free" value=" 8"/>35 <parameter name="nb_rename_unit_bank" value=" 8"/>34 <parameter name="nb_reg_free" value="16" /> 35 <parameter name="nb_rename_unit_bank" value="16" /> 36 36 </rename_bloc> 37 37 38 38 <read_bloc id="0,1,2,3,4,5,6,7"> 39 39 <parameter name="size_read_queue" value="4" /> 40 <parameter name="size_reservation_station" value=" 4" />40 <parameter name="size_reservation_station" value="8" /> 41 41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0,1,2,3,4,5,6,7" > 45 <parameter name="size_write_queue" value=" 4" />45 <parameter name="size_write_queue" value="8" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="1" /> … … 92 92 <parameter name="nb_inst_branch_update" value="1" /> 93 93 <parameter name="btb_size_queue" value="1024" /> 94 <parameter name="btb_associativity" value=" 8" />94 <parameter name="btb_associativity" value="16" /> 95 95 <parameter name="btb_size_counter" value="2" /> 96 96 <parameter name="btb_victim_scheme" value="3" /> 97 <parameter name="dir_predictor_scheme" value=" 2" />98 97 <parameter name="dir_predictor_scheme" value="4" /> 98 99 99 <predictor id="0"> 100 <parameter name="dir_have_bht" value=" 0" />101 <parameter name="dir_bht_size_shifter" value="1 "/>102 <parameter name="dir_bht_nb_shifter" value=" 64" />100 <parameter name="dir_have_bht" value="1" /> 101 <parameter name="dir_bht_size_shifter" value="10" /> 102 <parameter name="dir_bht_nb_shifter" value="1024" /> 103 103 <parameter name="dir_have_pht" value="1" /> 104 <parameter name="dir_pht_size_counter" value=" 2" />105 <parameter name="dir_pht_nb_counter" value=" 16" />104 <parameter name="dir_pht_size_counter" value="3" /> 105 <parameter name="dir_pht_nb_counter" value="4096" /> 106 106 <parameter name="dir_pht_size_address_share" value="0" /> 107 107 </predictor> 108 108 <predictor id="1"> 109 109 <parameter name="dir_have_bht" value="1" /> 110 <parameter name="dir_bht_size_shifter" value=" 4" />110 <parameter name="dir_bht_size_shifter" value="12" /> 111 111 <parameter name="dir_bht_nb_shifter" value="1" /> 112 112 <parameter name="dir_have_pht" value="1" /> 113 113 <parameter name="dir_pht_size_counter" value="2" /> 114 <parameter name="dir_pht_nb_counter" value=" 64" />114 <parameter name="dir_pht_nb_counter" value="4096" /> 115 115 <parameter name="dir_pht_size_address_share" value="0" /> 116 116 </predictor> 117 117 <predictor id="2"> 118 <parameter name="dir_have_bht" value="0" /> 118 <parameter name="dir_have_bht" value="1" /> 119 <parameter name="dir_bht_size_shifter" value="12" /> 120 <parameter name="dir_bht_nb_shifter" value="1" /> 119 121 <parameter name="dir_have_pht" value="1" /> 120 122 <parameter name="dir_pht_size_counter" value="2" /> 121 <parameter name="dir_pht_nb_counter" value=" 128" />123 <parameter name="dir_pht_nb_counter" value="4096" /> 122 124 <parameter name="dir_pht_size_address_share" value="0" /> 123 125 </predictor> … … 154 156 <parameter name="nb_gpr_port_write_by_bank" value="8" /> 155 157 <parameter name="nb_spr_bank" value="1" /> 156 <parameter name="nb_spr_port_read_by_bank" value=" 8" />157 <parameter name="nb_spr_port_write_by_bank" value=" 8" />158 <parameter name="nb_spr_port_read_by_bank" value="7" /> 159 <parameter name="nb_spr_port_write_by_bank" value="7" /> 158 160 <parameter name="execution_unit_to_write_unit_priority" value="1" /> 159 161 <parameter name="read_unit_to_execution_unit_priority" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_2.cfg
r123 r124 6 6 <parameter name="size_ifetch_queue" value="64" /> 7 7 <parameter name="nb_inst_fetch" value="8" /> 8 <parameter name="ras_size_queue" value=" 8" />8 <parameter name="ras_size_queue" value="16" /> 9 9 <parameter name="upt_size_queue" value="16" /> 10 <parameter name="ufpt_size_queue" value=" 4" />10 <parameter name="ufpt_size_queue" value="8" /> 11 11 12 12 <group id="0"> … … 30 30 <parameter name="rename_select_load_balancing" value="1" /> 31 31 <parameter name="rename_select_nb_front_end_select" value="1" /> 32 <parameter name="nb_general_register" value=" 256"/>32 <parameter name="nb_general_register" value="512"/> 33 33 <parameter name="nb_special_register" value="128"/> 34 <parameter name="nb_reg_free" value=" 8"/>35 <parameter name="nb_rename_unit_bank" value=" 8"/>34 <parameter name="nb_reg_free" value="16" /> 35 <parameter name="nb_rename_unit_bank" value="16" /> 36 36 </rename_bloc> 37 37 38 38 <read_bloc id="0,1,2,3,4,5,6,7,8,9,10"> 39 39 <parameter name="size_read_queue" value="4" /> 40 <parameter name="size_reservation_station" value=" 4" />40 <parameter name="size_reservation_station" value="8" /> 41 41 <parameter name="nb_inst_retire_reservation_station" value="4" /> 42 42 </read_bloc> 43 43 44 44 <write_bloc id="0,1,2,3,4,5,6,7,8,9,10" > 45 <parameter name="size_write_queue" value=" 4" />45 <parameter name="size_write_queue" value="8" /> 46 46 <parameter name="size_execute_queue" value="4" /> 47 47 <parameter name="nb_bypass_write" value="1" /> … … 92 92 <parameter name="nb_inst_branch_update" value="1" /> 93 93 <parameter name="btb_size_queue" value="1024" /> 94 <parameter name="btb_associativity" value=" 8" />94 <parameter name="btb_associativity" value="16" /> 95 95 <parameter name="btb_size_counter" value="2" /> 96 96 <parameter name="btb_victim_scheme" value="3" /> 97 <parameter name="dir_predictor_scheme" value=" 2" />97 <parameter name="dir_predictor_scheme" value="4" /> 98 98 99 99 <predictor id="0"> 100 <parameter name="dir_have_bht" value=" 0" />101 <parameter name="dir_bht_size_shifter" value="1 "/>102 <parameter name="dir_bht_nb_shifter" value=" 64" />100 <parameter name="dir_have_bht" value="1" /> 101 <parameter name="dir_bht_size_shifter" value="10" /> 102 <parameter name="dir_bht_nb_shifter" value="1024" /> 103 103 <parameter name="dir_have_pht" value="1" /> 104 <parameter name="dir_pht_size_counter" value=" 2" />105 <parameter name="dir_pht_nb_counter" value=" 16" />104 <parameter name="dir_pht_size_counter" value="3" /> 105 <parameter name="dir_pht_nb_counter" value="4096" /> 106 106 <parameter name="dir_pht_size_address_share" value="0" /> 107 107 </predictor> 108 108 <predictor id="1"> 109 109 <parameter name="dir_have_bht" value="1" /> 110 <parameter name="dir_bht_size_shifter" value=" 4" />110 <parameter name="dir_bht_size_shifter" value="12" /> 111 111 <parameter name="dir_bht_nb_shifter" value="1" /> 112 112 <parameter name="dir_have_pht" value="1" /> 113 113 <parameter name="dir_pht_size_counter" value="2" /> 114 <parameter name="dir_pht_nb_counter" value=" 64" />114 <parameter name="dir_pht_nb_counter" value="4096" /> 115 115 <parameter name="dir_pht_size_address_share" value="0" /> 116 116 </predictor> 117 117 <predictor id="2"> 118 <parameter name="dir_have_bht" value="0" /> 118 <parameter name="dir_have_bht" value="1" /> 119 <parameter name="dir_bht_size_shifter" value="12" /> 120 <parameter name="dir_bht_nb_shifter" value="1" /> 119 121 <parameter name="dir_have_pht" value="1" /> 120 122 <parameter name="dir_pht_size_counter" value="2" /> 121 <parameter name="dir_pht_nb_counter" value=" 128" />123 <parameter name="dir_pht_nb_counter" value="4096" /> 122 124 <parameter name="dir_pht_size_address_share" value="0" /> 123 125 </predictor> 126 124 127 </front_end> 125 128 … … 151 154 <parameter name="nb_execute_unit" value="11" /> 152 155 <parameter name="nb_gpr_bank" value="1" /> 153 <parameter name="nb_gpr_port_read_by_bank" value=" 16" />154 <parameter name="nb_gpr_port_write_by_bank" value=" 8" />156 <parameter name="nb_gpr_port_read_by_bank" value="22" /> 157 <parameter name="nb_gpr_port_write_by_bank" value="11" /> 155 158 <parameter name="nb_spr_bank" value="1" /> 156 <parameter name="nb_spr_port_read_by_bank" value=" 8" />157 <parameter name="nb_spr_port_write_by_bank" value=" 8" />159 <parameter name="nb_spr_port_read_by_bank" value="10" /> 160 <parameter name="nb_spr_port_write_by_bank" value="10" /> 158 161 <parameter name="execution_unit_to_write_unit_priority" value="1" /> 159 162 <parameter name="read_unit_to_execution_unit_priority" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen
r123 r124 19 19 <parameter name="implement_group" default="0" level="..." description="..." /> 20 20 <parameter name="ras_size_queue" min="2" max="32" step="* 2" default="2" level="..." description="..." /> 21 <parameter name="upt_size_queue" min="1" max="32" step=" * 2" default="2" level="..." description="..." />22 <parameter name="ufpt_size_queue" min="1" max="16" step=" * 2" default="2" level="..." description="..." />21 <parameter name="upt_size_queue" min="1" max="32" step="+ 1" default="2" level="..." description="..." /> 22 <parameter name="ufpt_size_queue" min="1" max="16" step="+ 1" default="2" level="..." description="..." /> 23 23 24 24 <parameter name="nb_decod_bloc" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> … … 77 77 <parameter name="dir_predictor_scheme" min="0" max="8" step="+ 1" default="1" level="..." description="0 : Never take, 1 : Always Take, 2 : Static, 3 : Last Take, 4 : Counter, 5 : Local predictor, 6 : Global predictor, 7 : Meta predictor, 8 : Custom predictor" /> 78 78 <parameter name="dir_have_bht" default="1" level="..." description="..." /> 79 <parameter name="dir_bht_size_shifter" min="1" max="1 0" step="+ 1" default="1" level="..." description="..." />80 <parameter name="dir_bht_nb_shifter" min="1" max=" 1024" step="* 2" default="1" level="..." description="..." />79 <parameter name="dir_bht_size_shifter" min="1" max="12" step="+ 1" default="1" level="..." description="..." /> 80 <parameter name="dir_bht_nb_shifter" min="1" max="4096" step="* 2" default="1" level="..." description="..." /> 81 81 <parameter name="dir_have_pht" default="1" level="..." description="..." /> 82 82 <parameter name="dir_pht_size_counter" min="1" max="4" step="+ 1" default="1" level="..." description="..." /> 83 <parameter name="dir_pht_nb_counter" min="1" max=" 1024" step="* 2" default="1" level="..." description="..." />84 <parameter name="dir_pht_size_address_share" min="0" max="1 0" step="+ 1" default="1" level="..." description="..." />83 <parameter name="dir_pht_nb_counter" min="1" max="4096" step="* 2" default="1" level="..." description="..." /> 84 <parameter name="dir_pht_size_address_share" min="0" max="12" step="+ 1" default="1" level="..." description="..." /> 85 85 86 86 <parameter name="nb_ooo_engine" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> … … 92 92 <parameter name="nb_rename_unit_select" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 93 93 <parameter name="nb_execute_loop_select" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 94 <parameter name="size_re_order_buffer" min="1" max="256" step=" * 2" default="1" level="..." description="..." />94 <parameter name="size_re_order_buffer" min="1" max="256" step="+ 1" default="1" level="..." description="..." /> 95 95 <parameter name="nb_re_order_buffer_bank" min="1" max="64" step="* 2" default="1" level="..." description="..." /> 96 96 <parameter name="commit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim
r123 r124 17 17 <parameter name="directory_log" value="/tmp/" /> 18 18 19 <parameter name="statistics_cycle_start" value=" 5"/>19 <parameter name="statistics_cycle_start" value="100000" /> 20 20 <parameter name="statistics_period" value="0" /> 21 21 22 <parameter name="simulation_nb_cycle" value="1000000 0" />22 <parameter name="simulation_nb_cycle" value="1000000" /> 23 23 <parameter name="simulation_nb_instruction" value="0" /> 24 25 <parameter name="debug_level" value="0" /> 24 <parameter name="simulation_file_with_pid" value="0" /> 25 <parameter name="simulation_file_with_date" value="1" /> 26 27 <parameter name="debug_level" value="3" /> 26 28 <parameter name="debug_cycle_start" value="0" /> 27 <parameter name="debug_cycle_stop" value="2000000" /> 29 <parameter name="debug_cycle_stop" value="10000000"/> 30 <parameter name="debug_nb_cycle" value="10000000"/> 28 31 29 32 <parameter name="debug_log_file_generate" value="0" /> 30 <parameter name="debug_log_file_with_pid" value="0" />31 33 <parameter name="debug_idle_cycle" value="1000" /> 32 34 <parameter name="debug_idle_time" value="3" /> -
trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg
r123 r124 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_x1_w4_ 1">4 5 <thread id="0 ">3 <core name="Instance_x1_w4_2"> 4 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="32" /> 7 7 <parameter name="nb_inst_fetch" value="8" /> 8 <parameter name="ras_size_queue" value=" 8" />8 <parameter name="ras_size_queue" value="16" /> 9 9 <parameter name="upt_size_queue" value="16" /> 10 <parameter name="ufpt_size_queue" value=" 4" />10 <parameter name="ufpt_size_queue" value="6" /> 11 11 12 12 <group id="0"> … … 36 36 </rename_bloc> 37 37 38 <read_bloc id="0,1,2,3 ">38 <read_bloc id="0,1,2,3,4,5"> 39 39 <parameter name="size_read_queue" value="4" /> 40 40 <parameter name="size_reservation_station" value="4" /> … … 42 42 </read_bloc> 43 43 44 <write_bloc id="0,1,2,3 ">44 <write_bloc id="0,1,2,3,4,5"> 45 45 <parameter name="size_write_queue" value="4" /> 46 46 <parameter name="size_execute_queue" value="4" /> … … 60 60 </load_store_unit> 61 61 62 <functionnal_unit id="0,1" > 62 <functionnal_unit id="0"> 63 <parameter name="nb_inst_functionnal_unit" value="1" /> 64 65 <timing type="8" latence="1" delay="1" /> 66 <timing type="10" latence="1" delay="1" /> 67 </functionnal_unit> 68 69 <functionnal_unit id="1,2,3,4" > 63 70 <parameter name="nb_inst_functionnal_unit" value="1" /> 64 71 … … 72 79 </functionnal_unit> 73 80 74 <functionnal_unit id="2">75 <parameter name="nb_inst_functionnal_unit" value="1" />76 77 <timing type="8" latence="1" delay="1" />78 <timing type="10" latence="1" delay="1" />79 </functionnal_unit>80 81 81 <front_end id="0"> 82 <parameter name="nb_context" value=" 1" />82 <parameter name="nb_context" value="4" /> 83 83 <parameter name="nb_decod_unit" value="1" /> 84 84 <parameter name="nb_inst_branch_predict" value="1" /> … … 89 89 <parameter name="btb_size_counter" value="2" /> 90 90 <parameter name="btb_victim_scheme" value="3" /> 91 <parameter name="dir_predictor_scheme" value=" 2" />92 91 <parameter name="dir_predictor_scheme" value="4" /> 92 93 93 <predictor id="0"> 94 <parameter name="dir_have_bht" value=" 0" />95 <parameter name="dir_bht_size_shifter" value="1 "/>96 <parameter name="dir_bht_nb_shifter" value=" 64" />94 <parameter name="dir_have_bht" value="1" /> 95 <parameter name="dir_bht_size_shifter" value="10" /> 96 <parameter name="dir_bht_nb_shifter" value="1024" /> 97 97 <parameter name="dir_have_pht" value="1" /> 98 98 <parameter name="dir_pht_size_counter" value="2" /> 99 <parameter name="dir_pht_nb_counter" value="1 6" />99 <parameter name="dir_pht_nb_counter" value="1024" /> 100 100 <parameter name="dir_pht_size_address_share" value="0" /> 101 101 </predictor> 102 102 <predictor id="1"> 103 103 <parameter name="dir_have_bht" value="1" /> 104 <parameter name="dir_bht_size_shifter" value=" 4" />104 <parameter name="dir_bht_size_shifter" value="10" /> 105 105 <parameter name="dir_bht_nb_shifter" value="1" /> 106 106 <parameter name="dir_have_pht" value="1" /> 107 107 <parameter name="dir_pht_size_counter" value="2" /> 108 <parameter name="dir_pht_nb_counter" value=" 64" />108 <parameter name="dir_pht_nb_counter" value="1024" /> 109 109 <parameter name="dir_pht_size_address_share" value="0" /> 110 110 </predictor> … … 113 113 <parameter name="dir_have_pht" value="1" /> 114 114 <parameter name="dir_pht_size_counter" value="2" /> 115 <parameter name="dir_pht_nb_counter" value="1 28" />115 <parameter name="dir_pht_nb_counter" value="1024" /> 116 116 <parameter name="dir_pht_size_address_share" value="0" /> 117 117 </predictor> … … 126 126 <parameter name="nb_rename_unit_select" value="1" /> 127 127 <parameter name="nb_execute_loop_select" value="1" /> 128 <parameter name="size_re_order_buffer" value=" 64"/>128 <parameter name="size_re_order_buffer" value="128"/> 129 129 <parameter name="nb_re_order_buffer_bank" value="16" /> 130 130 <parameter name="commit_priority" value="1" /> … … 141 141 142 142 <execute_loop id="0"> 143 <parameter name="nb_read_unit" value=" 4" />144 <parameter name="nb_write_unit" value=" 4" />145 <parameter name="nb_execute_unit" value=" 4" />143 <parameter name="nb_read_unit" value="6" /> 144 <parameter name="nb_write_unit" value="6" /> 145 <parameter name="nb_execute_unit" value="6" /> 146 146 <parameter name="nb_gpr_bank" value="1" /> 147 <parameter name="nb_gpr_port_read_by_bank" value=" 8" />148 <parameter name="nb_gpr_port_write_by_bank" value=" 4" />147 <parameter name="nb_gpr_port_read_by_bank" value="12" /> 148 <parameter name="nb_gpr_port_write_by_bank" value="6" /> 149 149 <parameter name="nb_spr_bank" value="1" /> 150 <parameter name="nb_spr_port_read_by_bank" value=" 4" />151 <parameter name="nb_spr_port_write_by_bank" value=" 4" />150 <parameter name="nb_spr_port_read_by_bank" value="5" /> 151 <parameter name="nb_spr_port_write_by_bank" value="5" /> 152 152 <parameter name="execution_unit_to_write_unit_priority" value="1" /> 153 153 <parameter name="read_unit_to_execution_unit_priority" value="1" /> … … 168 168 169 169 <link name="link_context_with_thread" src="0" dest="0.0" /> 170 <link name="link_context_with_thread" src="1" dest="0.1" /> 171 <link name="link_context_with_thread" src="2" dest="0.2" /> 172 <link name="link_context_with_thread" src="3" dest="0.3" /> 173 170 174 <link name="link_decod_unit_with_decod_bloc" src="0" dest="0.0" /> 171 175 <link name="link_rename_unit_with_rename_bloc" src="0" dest="0.0" /> 176 172 177 <link name="link_read_unit_with_read_bloc" src="0" dest="0.0" /> 173 178 <link name="link_read_unit_with_read_bloc" src="1" dest="0.1" /> 174 179 <link name="link_read_unit_with_read_bloc" src="2" dest="0.2" /> 175 180 <link name="link_read_unit_with_read_bloc" src="3" dest="0.3" /> 181 <link name="link_read_unit_with_read_bloc" src="4" dest="0.4" /> 182 <link name="link_read_unit_with_read_bloc" src="5" dest="0.5" /> 183 176 184 <link name="link_write_unit_with_write_bloc" src="0" dest="0.0" /> 177 185 <link name="link_write_unit_with_write_bloc" src="1" dest="0.1" /> 178 186 <link name="link_write_unit_with_write_bloc" src="2" dest="0.2" /> 179 187 <link name="link_write_unit_with_write_bloc" src="3" dest="0.3" /> 188 <link name="link_write_unit_with_write_bloc" src="4" dest="0.4" /> 189 <link name="link_write_unit_with_write_bloc" src="5" dest="0.5" /> 190 180 191 <link name="link_decod_bloc_with_thread" src="0" dest="0" /> 192 <link name="link_decod_bloc_with_thread" src="1" dest="0" /> 193 <link name="link_decod_bloc_with_thread" src="2" dest="0" /> 194 <link name="link_decod_bloc_with_thread" src="3" dest="0" /> 195 181 196 <link name="link_rename_bloc_with_front_end" src="0" dest="0" /> 197 182 198 <link name="link_load_store_unit_with_thread" src="0" dest="0" /> 199 <link name="link_load_store_unit_with_thread" src="1" dest="0" /> 200 <link name="link_load_store_unit_with_thread" src="2" dest="0" /> 201 <link name="link_load_store_unit_with_thread" src="3" dest="0" /> 183 202 184 203 <link name="link_execute_unit_with_load_store_unit" src="0" dest="0.0"/> … … 186 205 <link name="link_execute_unit_with_functionnal_unit" src="1" dest="0.2"/> 187 206 <link name="link_execute_unit_with_functionnal_unit" src="2" dest="0.3"/> 207 <link name="link_execute_unit_with_functionnal_unit" src="3" dest="0.4"/> 208 <link name="link_execute_unit_with_functionnal_unit" src="4" dest="0.5"/> 188 209 189 210 <link name="link_icache_port_with_thread" src="0" dest="0" /> 211 <link name="link_icache_port_with_thread" src="1" dest="0" /> 212 <link name="link_icache_port_with_thread" src="2" dest="0" /> 213 <link name="link_icache_port_with_thread" src="3" dest="0" /> 214 190 215 <link name="link_dcache_port_with_load_store_unit" src="0.0" dest="0" /> 191 216 192 217 <link name="table_dispatch" src="0.0.0" dest="1" /> 193 <link name="table_dispatch" src="0.1.0" dest=" 0" />194 <link name="table_dispatch" src="0.2.0" dest=" 0" />195 <link name="table_dispatch" src="0.3.0" dest=" 0" />196 197 <link name="table_dispatch" src="0.0.1" dest=" 0" />218 <link name="table_dispatch" src="0.1.0" dest="1" /> 219 <link name="table_dispatch" src="0.2.0" dest="1" /> 220 <link name="table_dispatch" src="0.3.0" dest="1" /> 221 222 <link name="table_dispatch" src="0.0.1" dest="1" /> 198 223 <link name="table_dispatch" src="0.1.1" dest="1" /> 199 <link name="table_dispatch" src="0.2.1" dest=" 0" />200 <link name="table_dispatch" src="0.3.1" dest=" 0" />201 202 <link name="table_dispatch" src="0.0.2" dest=" 0" />203 <link name="table_dispatch" src="0.1.2" dest=" 0" />224 <link name="table_dispatch" src="0.2.1" dest="1" /> 225 <link name="table_dispatch" src="0.3.1" dest="1" /> 226 227 <link name="table_dispatch" src="0.0.2" dest="1" /> 228 <link name="table_dispatch" src="0.1.2" dest="1" /> 204 229 <link name="table_dispatch" src="0.2.2" dest="1" /> 205 <link name="table_dispatch" src="0.3.2" dest=" 0" />206 207 <link name="table_dispatch" src="0.0.3" dest=" 0" />208 <link name="table_dispatch" src="0.1.3" dest=" 0" />209 <link name="table_dispatch" src="0.2.3" dest=" 0" />230 <link name="table_dispatch" src="0.3.2" dest="1" /> 231 232 <link name="table_dispatch" src="0.0.3" dest="1" /> 233 <link name="table_dispatch" src="0.1.3" dest="1" /> 234 <link name="table_dispatch" src="0.2.3" dest="1" /> 210 235 <link name="table_dispatch" src="0.3.3" dest="1" /> 236 237 <link name="table_dispatch" src="0.0.4" dest="1" /> 238 <link name="table_dispatch" src="0.1.4" dest="1" /> 239 <link name="table_dispatch" src="0.2.4" dest="1" /> 240 <link name="table_dispatch" src="0.3.4" dest="1" /> 241 242 <link name="table_dispatch" src="0.0.5" dest="1" /> 243 <link name="table_dispatch" src="0.1.5" dest="1" /> 244 <link name="table_dispatch" src="0.2.5" dest="1" /> 245 <link name="table_dispatch" src="0.3.5" dest="1" /> 211 246 212 247 <link name="link_read_bloc_and_load_store_unit" src="0.0" dest="1" /> … … 214 249 <link name="link_read_bloc_and_load_store_unit" src="2.0" dest="0" /> 215 250 <link name="link_read_bloc_and_load_store_unit" src="3.0" dest="0" /> 251 <link name="link_read_bloc_and_load_store_unit" src="4.0" dest="0" /> 252 <link name="link_read_bloc_and_load_store_unit" src="5.0" dest="0" /> 253 216 254 <link name="link_read_bloc_and_functionnal_unit" src="0.0" dest="0" /> 217 255 <link name="link_read_bloc_and_functionnal_unit" src="1.0" dest="1" /> 218 <link name="link_read_bloc_and_functionnal_unit" src="2.0" dest=" 1" />256 <link name="link_read_bloc_and_functionnal_unit" src="2.0" dest="0" /> 219 257 <link name="link_read_bloc_and_functionnal_unit" src="3.0" dest="0" /> 258 <link name="link_read_bloc_and_functionnal_unit" src="4.0" dest="0" /> 259 <link name="link_read_bloc_and_functionnal_unit" src="5.0" dest="0" /> 220 260 <link name="link_read_bloc_and_functionnal_unit" src="0.1" dest="0" /> 221 <link name="link_read_bloc_and_functionnal_unit" src="1.1" dest=" 1" />261 <link name="link_read_bloc_and_functionnal_unit" src="1.1" dest="0" /> 222 262 <link name="link_read_bloc_and_functionnal_unit" src="2.1" dest="1" /> 223 <link name="link_read_bloc_and_functionnal_unit" src="3.1" dest="0" /> 263 <link name="link_read_bloc_and_functionnal_unit" src="3.1" dest="1" /> 264 <link name="link_read_bloc_and_functionnal_unit" src="4.1" dest="1" /> 265 <link name="link_read_bloc_and_functionnal_unit" src="5.1" dest="1" /> 224 266 <link name="link_read_bloc_and_functionnal_unit" src="0.2" dest="0" /> 225 267 <link name="link_read_bloc_and_functionnal_unit" src="1.2" dest="0" /> 226 <link name="link_read_bloc_and_functionnal_unit" src="2.2" dest=" 0" />268 <link name="link_read_bloc_and_functionnal_unit" src="2.2" dest="1" /> 227 269 <link name="link_read_bloc_and_functionnal_unit" src="3.2" dest="1" /> 270 <link name="link_read_bloc_and_functionnal_unit" src="4.2" dest="1" /> 271 <link name="link_read_bloc_and_functionnal_unit" src="5.2" dest="1" /> 272 <link name="link_read_bloc_and_functionnal_unit" src="0.3" dest="0" /> 273 <link name="link_read_bloc_and_functionnal_unit" src="1.3" dest="0" /> 274 <link name="link_read_bloc_and_functionnal_unit" src="2.3" dest="1" /> 275 <link name="link_read_bloc_and_functionnal_unit" src="3.3" dest="1" /> 276 <link name="link_read_bloc_and_functionnal_unit" src="4.3" dest="1" /> 277 <link name="link_read_bloc_and_functionnal_unit" src="5.3" dest="1" /> 278 <link name="link_read_bloc_and_functionnal_unit" src="0.4" dest="0" /> 279 <link name="link_read_bloc_and_functionnal_unit" src="1.4" dest="0" /> 280 <link name="link_read_bloc_and_functionnal_unit" src="2.4" dest="1" /> 281 <link name="link_read_bloc_and_functionnal_unit" src="3.4" dest="1" /> 282 <link name="link_read_bloc_and_functionnal_unit" src="4.4" dest="1" /> 283 <link name="link_read_bloc_and_functionnal_unit" src="5.4" dest="1" /> 228 284 229 285 <link name="link_write_bloc_and_load_store_unit" src="0.0" dest="1" /> … … 231 287 <link name="link_write_bloc_and_load_store_unit" src="2.0" dest="0" /> 232 288 <link name="link_write_bloc_and_load_store_unit" src="3.0" dest="0" /> 289 <link name="link_write_bloc_and_load_store_unit" src="4.0" dest="0" /> 290 <link name="link_write_bloc_and_load_store_unit" src="5.0" dest="0" /> 233 291 234 292 <link name="link_write_bloc_and_functionnal_unit" src="0.0" dest="0" /> 235 293 <link name="link_write_bloc_and_functionnal_unit" src="1.0" dest="1" /> 236 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest=" 1" />294 <link name="link_write_bloc_and_functionnal_unit" src="2.0" dest="0" /> 237 295 <link name="link_write_bloc_and_functionnal_unit" src="3.0" dest="0" /> 296 <link name="link_write_bloc_and_functionnal_unit" src="4.0" dest="0" /> 297 <link name="link_write_bloc_and_functionnal_unit" src="5.0" dest="0" /> 238 298 239 299 <link name="link_write_bloc_and_functionnal_unit" src="0.1" dest="0" /> 240 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest=" 1" />300 <link name="link_write_bloc_and_functionnal_unit" src="1.1" dest="0" /> 241 301 <link name="link_write_bloc_and_functionnal_unit" src="2.1" dest="1" /> 242 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="0" /> 302 <link name="link_write_bloc_and_functionnal_unit" src="3.1" dest="1" /> 303 <link name="link_write_bloc_and_functionnal_unit" src="4.1" dest="1" /> 304 <link name="link_write_bloc_and_functionnal_unit" src="5.1" dest="1" /> 243 305 244 306 <link name="link_write_bloc_and_functionnal_unit" src="0.2" dest="0" /> 245 307 <link name="link_write_bloc_and_functionnal_unit" src="1.2" dest="0" /> 246 <link name="link_write_bloc_and_functionnal_unit" src="2.2" dest=" 0" />308 <link name="link_write_bloc_and_functionnal_unit" src="2.2" dest="1" /> 247 309 <link name="link_write_bloc_and_functionnal_unit" src="3.2" dest="1" /> 310 <link name="link_write_bloc_and_functionnal_unit" src="4.2" dest="1" /> 311 <link name="link_write_bloc_and_functionnal_unit" src="5.2" dest="1" /> 312 313 <link name="link_write_bloc_and_functionnal_unit" src="0.3" dest="0" /> 314 <link name="link_write_bloc_and_functionnal_unit" src="1.3" dest="0" /> 315 <link name="link_write_bloc_and_functionnal_unit" src="2.3" dest="1" /> 316 <link name="link_write_bloc_and_functionnal_unit" src="3.3" dest="1" /> 317 <link name="link_write_bloc_and_functionnal_unit" src="4.3" dest="1" /> 318 <link name="link_write_bloc_and_functionnal_unit" src="5.3" dest="1" /> 319 320 <link name="link_write_bloc_and_functionnal_unit" src="0.4" dest="0" /> 321 <link name="link_write_bloc_and_functionnal_unit" src="1.4" dest="0" /> 322 <link name="link_write_bloc_and_functionnal_unit" src="2.4" dest="1" /> 323 <link name="link_write_bloc_and_functionnal_unit" src="3.4" dest="1" /> 324 <link name="link_write_bloc_and_functionnal_unit" src="4.4" dest="1" /> 325 <link name="link_write_bloc_and_functionnal_unit" src="5.4" dest="1" /> 248 326 249 327 <link name="link_thread_and_functionnal_unit" src="0.0" dest="1" /> 250 328 <link name="link_thread_and_functionnal_unit" src="0.1" dest="1" /> 251 329 <link name="link_thread_and_functionnal_unit" src="0.2" dest="1" /> 330 <link name="link_thread_and_functionnal_unit" src="0.3" dest="1" /> 331 <link name="link_thread_and_functionnal_unit" src="0.4" dest="1" /> 332 333 <link name="link_thread_and_functionnal_unit" src="1.0" dest="1" /> 334 <link name="link_thread_and_functionnal_unit" src="1.1" dest="1" /> 335 <link name="link_thread_and_functionnal_unit" src="1.2" dest="1" /> 336 <link name="link_thread_and_functionnal_unit" src="1.3" dest="1" /> 337 <link name="link_thread_and_functionnal_unit" src="1.4" dest="1" /> 338 339 <link name="link_thread_and_functionnal_unit" src="2.0" dest="1" /> 340 <link name="link_thread_and_functionnal_unit" src="2.1" dest="1" /> 341 <link name="link_thread_and_functionnal_unit" src="2.2" dest="1" /> 342 <link name="link_thread_and_functionnal_unit" src="2.3" dest="1" /> 343 <link name="link_thread_and_functionnal_unit" src="2.4" dest="1" /> 344 345 <link name="link_thread_and_functionnal_unit" src="3.0" dest="1" /> 346 <link name="link_thread_and_functionnal_unit" src="3.1" dest="1" /> 347 <link name="link_thread_and_functionnal_unit" src="3.2" dest="1" /> 348 <link name="link_thread_and_functionnal_unit" src="3.3" dest="1" /> 349 <link name="link_thread_and_functionnal_unit" src="3.4" dest="1" /> 252 350 253 351 </core> -
trunk/IPs/systemC/processor/Morpheo/Files/debug.sim
r123 r124 8 8 <parameter name="use_vhdl_testbench_assert" value="0" /> 9 9 <parameter name="use_position" value="0" /> 10 <parameter name="use_statistics" value=" 0" />10 <parameter name="use_statistics" value="1" /> 11 11 <parameter name="use_information" value="0" /> 12 12 <parameter name="use_header" value="0" /> … … 17 17 <parameter name="directory_log" value="/tmp/" /> 18 18 19 <parameter name="statistics_cycle_start" value=" 5"/>19 <parameter name="statistics_cycle_start" value="100" /> 20 20 <parameter name="statistics_period" value="0" /> 21 21 22 <parameter name="simulation_nb_cycle" value=" 500000" />22 <parameter name="simulation_nb_cycle" value="1000000" /> 23 23 <parameter name="simulation_nb_instruction" value="0" /> 24 <parameter name="simulation_file_with_pid" value="0" /> 25 <parameter name="simulation_file_with_date" value="0" /> 24 26 25 <parameter name="debug_level" value="0" /> 26 <parameter name="debug_cycle_start" value="0" /> 27 <parameter name="debug_cycle_stop" value="20000" /> 27 <parameter name="debug_level" value="3" /> 28 <parameter name="debug_cycle_start" value="0" /> 29 <parameter name="debug_cycle_stop" value="50" /> 30 <parameter name="debug_nb_cycle" value="200000" /> 28 31 29 32 <parameter name="debug_log_file_generate" value="0" /> 30 <parameter name="debug_log_file_with_pid" value="0" /> 31 <parameter name="debug_idle_cycle" value="100" /> 33 <parameter name="debug_idle_cycle" value="200" /> 32 34 <parameter name="debug_idle_time" value="5" /> 33 35 … … 63 65 <component name="Execute_loop" model="systemc" debug="0" /> 64 66 <component name="Commit_unit" model="systemc" debug="1" /> 65 <component name="Issue_queue" model="systemc" debug=" 0" />67 <component name="Issue_queue" model="systemc" debug="1" /> 66 68 <component name="OOO_Engine_Glue" model="systemc" debug="0" /> 67 <component name="Reexecute_unit" model="systemc" debug=" 0" />69 <component name="Reexecute_unit" model="systemc" debug="1" /> 68 70 <component name="Load_Store_pointer_unit" model="systemc" debug="0" /> 69 71 <component name="Dependency_checking_unit" model="systemc" debug="0" /> … … 79 81 <component name="OOO_Engine" model="systemc" debug="0" /> 80 82 <component name="Context_State" model="systemc" debug="1" /> 81 <component name="Decod" model="systemc" debug=" 0" />83 <component name="Decod" model="systemc" debug="1" /> 82 84 <component name="Decod_queue" model="systemc" debug="1" /> 83 85 <component name="Decod_unit" model="systemc" debug="0" /> 84 86 <component name="Front_end_Glue" model="systemc" debug="0" /> 85 <component name="Address_management" model="systemc" debug=" 1" />87 <component name="Address_management" model="systemc" debug="0" /> 86 88 <component name="Ifetch_queue" model="systemc" debug="1" /> 87 89 <component name="Ifetch_unit_Glue" model="systemc" debug="0" /> … … 90 92 <component name="Branch_Target_Buffer_Register" model="systemc" debug="0" /> 91 93 <component name="Branch_Target_Buffer" model="systemc" debug="0" /> 92 <component name="Direction_Glue" model="systemc" debug=" 1" />94 <component name="Direction_Glue" model="systemc" debug="0" /> 93 95 <component name="Direction" model="systemc" debug="0" /> 94 <component name="Two_Level_Branch_Predictor" model="systemc" debug=" 1" />95 <component name="Meta_Predictor_Glue" model="systemc" debug=" 1" />96 <component name="Two_Level_Branch_Predictor" model="systemc" debug="0" /> 97 <component name="Meta_Predictor_Glue" model="systemc" debug="0" /> 96 98 <component name="Meta_Predictor" model="systemc" debug="0" /> 97 <component name="Prediction_unit_Glue" model="systemc" debug=" 1" />98 <component name="Return_Address_Stack" model="systemc" debug=" 1" />99 <component name="Prediction_unit_Glue" model="systemc" debug="0" /> 100 <component name="Return_Address_Stack" model="systemc" debug="0" /> 99 101 <component name="Update_Prediction_Table" model="systemc" debug="1" /> 100 102 <component name="Prediction_unit" model="systemc" debug="0" /> 101 103 <component name="Front_end" model="systemc" debug="0" /> 102 <component name="Icache_Access" model="systemc" debug=" 0" />104 <component name="Icache_Access" model="systemc" debug="1" /> 103 105 <component name="Dcache_Access" model="systemc" debug="0" /> 104 106 <component name="Core_Glue" model="systemc" debug="0" /> -
trunk/IPs/systemC/processor/Morpheo/Script/distexe.sh
r112 r124 4 4 # $Id$ 5 5 #----------------------------------------------------------- 6 7 VERSION="1.0" 6 8 7 9 # Need : test, echo, cd, dirname, basename, ssh … … 39 41 } 40 42 43 #-----[ my_date ]------------------------------------------- 44 function my_date () 45 { 46 date +"%F %T"; 47 } 48 41 49 #-----[ distexe_test_usage ]-------------------------------- 42 50 function distexe_test_usage () … … 67 75 fi; 68 76 fi; 77 } 69 78 79 #-----[ header ]-------------------------------------------- 80 function header () 81 { 82 echo "distexe ${VERSION}"; 70 83 } 71 84 … … 80 93 cd -; 81 94 82 # Abso ulte path of work directory83 local DIR_EXE;95 # Absolute path of work directory 96 local PATH_EXE; 84 97 if test ${#} -eq 2; then 85 cd ${2} ;86 DIR_EXE=${PWD};87 cd - ;98 cd ${2} &> /dev/null; 99 PATH_EXE=${PWD}; 100 cd - &> /dev/null; 88 101 else 89 DIR_EXE=${PWD};102 PATH_EXE=${PWD}; 90 103 fi; 104 105 header; 106 echo " * {"$(my_date)"} <${HOSTNAME}> file : ${FILE_CMD}"; 107 echo " * {"$(my_date)"} <${HOSTNAME}> path : ${PATH_EXE}"; 91 108 92 109 local hosts="${DISTEXE_HOSTS}"; … … 96 113 local -i nb_process=$(echo ${line} | cut -d/ -f2); 97 114 98 echo " *station : ${host} (${nb_process}) ... ";115 echo " * {"$(my_date)"} <${HOSTNAME}> station : ${host} (${nb_process}) ... "; 99 116 100 117 # lunch service 101 local cmd="export MORPHEO_SCRIPT=${MORPHEO_SCRIPT};${MORPHEO_SCRIPT}/execute_n.sh ${ DIR_EXE} ${FILE_CMD} ${nb_process};";118 local cmd="export MORPHEO_SCRIPT=${MORPHEO_SCRIPT};${MORPHEO_SCRIPT}/execute_n.sh ${PATH_EXE} ${FILE_CMD} ${nb_process};"; 102 119 ssh ${host} ${cmd} & 103 120 done; 121 122 echo " * {"$(my_date)"} <${HOSTNAME}> all hosts working"; 123 104 124 } 105 125 -
trunk/IPs/systemC/processor/Morpheo/Script/execute.sh
r112 r124 28 28 function execute_usage () 29 29 { 30 echo "Usage : ${0} work_dir file_cmd file_cpt file_cpu";30 echo "Usage : ${0} path_work file_cmd file_cpt file_cpu id"; 31 31 echo "Arguments : "; 32 echo " * work_dir: directory to execute command";32 echo " * path_work : directory to execute command"; 33 33 echo " * file_cmd : list of command"; 34 34 echo " * file_cpt : file with the index of next command to execute"; 35 35 echo " * file_cpu : tmp file to stock the current index"; 36 echo " * id : identification"; 36 37 exit; 37 38 } … … 40 41 function execute_test_usage () 41 42 { 42 if test ${#} -ne 4; then43 if test ${#} -ne 5; then 43 44 execute_usage; 44 45 fi; … … 58 59 local -i CPT_OLD; 59 60 local -i CPT; 60 local WORK_DIR=${1};61 local PATH_WORK=${1}; 61 62 local FILE_CMD=${2}; 62 63 local FILE_CPT=${3}; 63 64 local FILE_CPU=${4}; 64 local LOCK_CPT="${WORK_DIR}/.lock-cpt"; 65 local LOCK_CPU="${WORK_DIR}/.lock-cpu"; 66 local FILE_CMD="distexe.command"; 67 local FILE_OUT="distexe.output"; 65 local ID=${5}; 66 local LOCK_CPT="${PATH_WORK}/.lock-cpt"; 67 local LOCK_CPU="${PATH_WORK}/.lock-cpu"; 68 local OUTPUT_FILE_INFO="distexe.info"; 69 local OUTPUT_FILE_CMD="distexe.command"; 70 local OUTPUT_FILE_OUT="distexe.output"; 68 71 72 # echo " * {"$(my_date)"} <${ID}> pid is $$"; 69 73 70 74 # Init CPT if this thread is the first 71 75 lock ${LOCK_CPT}; 72 76 if test ! -s ${FILE_CPT}; then 77 echo " * {"$(my_date)"} <${ID}> create counter file ${FILE_CPT}"; 73 78 echo "0" > ${FILE_CPT}; 74 79 fi; … … 83 88 done < ${FILE_CMD}; 84 89 85 echo " * <${HOSTNAME}-$$> {"$(my_date)"}is ready";90 echo " * {"$(my_date)"} <${ID}> is ready"; 86 91 87 92 # infinite loop … … 99 104 unlock ${LOCK_CPT}; 100 105 101 106 # test if this number is valid 102 107 if test ${CPT} -ge ${#COMMAND[*]}; then 103 108 CPT=${#COMMAND[*]}; … … 110 115 # while test ${CPT}_SYNC -lt ${CPT}; do 111 116 # if test -z "${COMMAND[${CPT}_SYNC]}"; then 112 # echo " * <${HOSTNAME}-$$> {"$(my_date)"}synchronisation [${CPT}_SYNC]";117 # echo " * {"$(my_date)"} <${ID}> synchronisation [${CPT}_SYNC]"; 113 118 # fi; 114 119 # CPT_SYNC=$((${CPT}_SYNC+1)); … … 122 127 # Test if command is empty ! 123 128 if test ! -z "${COMMAND[${CPT}]}"; then 124 local CURREN_DIR=${PWD};125 cd ${ WORK_DIR}&> /dev/null;129 local PATH_CURRENT=${PWD}; 130 cd ${PATH_WORK} &> /dev/null; 126 131 mkdir "Task_${CPT}" &> /dev/null; 127 132 cd "Task_${CPT}" &> /dev/null; 128 echo " * <${HOSTNAME}-$$> {"$(my_date)"} execute command [${CPT}] : ${COMMAND[${CPT}]}"; 129 echo "${COMMAND[${CPT}]}" > ${FILE_CMD}; 130 # chmod +x ${FILE_CMD}; 131 eval "${COMMAND[${CPT}]}" &> ${FILE_OUT}; 132 cd ${CURREN_DIR} &> /dev/null; 133 # echo " * {"$(my_date)"} <${ID}> execute command [${CPT}] : ${COMMAND[${CPT}]}"; 134 echo " * {"$(my_date)"} <${ID}> execute command [${CPT}]"; 135 echo "id : ${ID}" > ${OUTPUT_FILE_INFO}; 136 echo "host : ${HOSTNAME}" >> ${OUTPUT_FILE_INFO}; 137 echo "pid : $$" >> ${OUTPUT_FILE_INFO}; 138 echo "date : "$(my_date) >> ${OUTPUT_FILE_INFO}; 139 echo "#!/bin/bash" > ${OUTPUT_FILE_CMD}; 140 echo 'source ${HOME}/.bashrc;' >> ${OUTPUT_FILE_CMD}; 141 echo "${COMMAND[${CPT}]}" >> ${OUTPUT_FILE_CMD}; 142 chmod +x ${OUTPUT_FILE_CMD}; 143 ./${OUTPUT_FILE_CMD} &> ${OUTPUT_FILE_OUT}; 144 cd ${PATH_CURRENT} &> /dev/null; 133 145 fi; 134 146 done; 135 147 136 echo " * <${HOSTNAME}-$$> {"$(my_date)"}is done";148 echo " * {"$(my_date)"} <${ID}> is done"; 137 149 138 150 lock ${LOCK_CPU}; … … 143 155 144 156 if test ${CPT} -eq 0; then 145 echo " * <${HOSTNAME}-$$> {"$(my_date)"} All task is executed";157 echo " * {"$(my_date)"} <${ID}> All task is executed on this host"; 146 158 rm ${FILE_CPU}; 147 159 fi; -
trunk/IPs/systemC/processor/Morpheo/Script/execute_n.sh
r112 r124 5 5 #----------------------------------------------------------- 6 6 7 #-----[ global variable ]----------------------------------- 7 #-----[ my_date ]------------------------------------------- 8 function my_date () 9 { 10 date +"%F %T"; 11 } 8 12 9 13 #-----[ nb_cpu ]-------------------------------------------- … … 23 27 function execute_n_usage () 24 28 { 25 echo "Usage : ${0} word_dirfile [ nb_process ]";29 echo "Usage : ${0} path_word file [ nb_process ]"; 26 30 echo "Arguments : "; 27 echo " * work_dir: directory to execute command";31 echo " * path_work : directory to execute command"; 28 32 echo " * file : list of command"; 29 33 echo " * nb_process : number of process (default (and maximum) is the number of processor)"; … … 51 55 if test -z "${MORPHEO_SCRIPT}"; then 52 56 echo "Environment variable MORPHEO_SCRIPT is not set"; 53 distexe_usage;57 execute_n_usage; 54 58 fi; 55 59 … … 70 74 local -i NB_PROCESS=$(nb_cpu); 71 75 local -i CPT; 72 local WORK_DIR=${1};76 local PATH_WORK=${1}; 73 77 local FILE_CMD=${2}; 74 78 local FILE_CPT; … … 78 82 execute_n_test_usage ${*}; 79 83 80 if test ${#} -eq 2; then84 if test ${#} -eq 3; then 81 85 if test ${3} -lt ${NB_PROCESS}; then 82 86 NB_PROCESS=${3}; 83 fi; 87 fi; 84 88 fi; 85 89 86 FILE_CPT="${ WORK_DIR}/control-"$(basename ${FILE_CMD});87 FILE_CPU="${ WORK_DIR}/${ID}";90 FILE_CPT="${PATH_WORK}/control-"$(basename ${FILE_CMD}); 91 FILE_CPU="${PATH_WORK}/${ID}"; 88 92 89 echo " * <${HOSTNAME}> ${NB_PROCESS} process";93 echo " * {"$(my_date)"} <${HOSTNAME}> ${NB_PROCESS} process"; 90 94 91 95 local -i IT_NB_PROCESS=1; … … 96 100 # create the same number of thread that processor 97 101 while test ${IT_NB_PROCESS} -le ${NB_PROCESS}; do 98 ${MORPHEO_SCRIPT}/execute.sh ${ WORK_DIR} ${FILE_CMD} ${FILE_CPT} ${FILE_CPU}&102 ${MORPHEO_SCRIPT}/execute.sh ${PATH_WORK} ${FILE_CMD} ${FILE_CPT} ${FILE_CPU} "${HOSTNAME}-${IT_NB_PROCESS}" & 99 103 IT_NB_PROCESS=$((${IT_NB_PROCESS}+1)); 100 104 … … 103 107 fi; 104 108 done 109 110 echo " * {"$(my_date)"} <${HOSTNAME}> all process working"; 105 111 } 106 112
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