- Timestamp:
- Jun 26, 2009, 10:43:23 AM (15 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/Environment/src/Environment_transition.cpp
r124 r128 3 3 #define CYCLE_MAX 0 4 4 #include "../../processor/Morpheo/Common/include/Test.h" 5 #include "../../processor/Morpheo/Common/include/Systemc.h" 5 6 6 7 using namespace morpheo; … … 10 11 void Environment::transition (void) 11 12 { 13 _cout(ENVIRONMENT, " [%d] <Environment::transition>\n",static_cast<uint32_t>(simulation_cycle())); 14 12 15 if (NRESET->read() == 0) 13 16 { … … 21 24 for (uint32_t i = 0; i < param->nb_entity; i++) 22 25 for (int32_t j=param->icache_dedicated_nb_port [i]-1; j>=0; j--) 23 if (icache_rsp_val [i][j] and ICACHE_RSP_ACK [i][j]->read()) 24 { 25 delete component_buffer_irsp [i]->read(j)._data; 26 component_buffer_irsp [i]->pop(j); 27 } 26 { 27 _cout(ENVIRONMENT, " * ICACHE_RSP [%d][%d]\n",i,j); 28 29 if (icache_rsp_val [i][j] and ICACHE_RSP_ACK [i][j]->read()) 30 { 31 _cout(ENVIRONMENT, " * ICACHE_RSP [%d][%d] : Transaction accepted\n",i,j); 32 33 uint32_t num = icache_rsp_num [i][j]; 34 35 delete component_buffer_irsp [i]->read(num)._data; 36 component_buffer_irsp [i]->pop(num); 37 } 38 } 28 39 //============================================================================= 29 40 //===== [ DCACHE - RESPONS ]=================================================== … … 31 42 for (uint32_t i = 0; i < param->nb_entity; i++) 32 43 for (int32_t j=param->dcache_dedicated_nb_port [i]-1; j>=0; j--) 33 if (dcache_rsp_val [i][j] and DCACHE_RSP_ACK [i][j]->read()) 34 { 35 delete component_buffer_drsp [i]->read(j)._data; 36 component_buffer_drsp [i]->pop(j); 37 } 44 { 45 _cout(ENVIRONMENT, " * DCACHE_RSP [%d][%d]\n",i,j); 46 if (dcache_rsp_val [i][j] and DCACHE_RSP_ACK [i][j]->read()) 47 { 48 _cout(ENVIRONMENT, " * DCACHE_RSP [%d][%d] : Transaction accepted\n",i,j); 49 50 uint32_t num = dcache_rsp_num [i][j]; 51 52 delete component_buffer_drsp [i]->read(num)._data; 53 component_buffer_drsp [i]->pop(num); 54 } 55 } 38 56 39 57 //============================================================================= … … 44 62 if (ICACHE_REQ_VAL [i][j]->read() and icache_req_ack [i][j]) 45 63 { 46 _cout(ENVIRONMENT, " ICACHE_REQ [%d][%d] : Transaction accepted\n",i,j);64 _cout(ENVIRONMENT, " * ICACHE_REQ [%d][%d] : Transaction accepted\n",i,j); 47 65 48 66 Ticache_context_t context = ICACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence … … 52 70 uint32_t size = (param->iaccess_size_address [i]+2)/8; 53 71 54 _cout(ENVIRONMENT," * information\n");55 _cout(ENVIRONMENT," * context : %d\n" ,static_cast<uint32_t>(context));56 _cout(ENVIRONMENT," * packet : %d\n" ,static_cast<uint32_t>(packet ));57 _cout(ENVIRONMENT," * address : %.x\n",static_cast<uint32_t>(address));58 _cout(ENVIRONMENT," * type : %d\n" ,static_cast<uint32_t>(type ));59 _cout(ENVIRONMENT," * size : %d\n" ,static_cast<uint32_t>(size ));72 _cout(ENVIRONMENT," * information\n"); 73 _cout(ENVIRONMENT," * context : %d\n" ,static_cast<uint32_t>(context)); 74 _cout(ENVIRONMENT," * packet : %d\n" ,static_cast<uint32_t>(packet )); 75 _cout(ENVIRONMENT," * address : %.x\n",static_cast<uint32_t>(address)); 76 _cout(ENVIRONMENT," * type : %d\n" ,static_cast<uint32_t>(type )); 77 _cout(ENVIRONMENT," * size : %d\n" ,static_cast<uint32_t>(size )); 60 78 61 79 // search the entity … … 72 90 (entity.segment->getType() == data::TYPE_TARGET_MEMORY)) 73 91 { 74 _cout(ENVIRONMENT," * OK !\n");92 _cout(ENVIRONMENT," * OK !\n"); 75 93 bus_error = false; 76 94 uncached = entity.segment->getUncached(); … … 78 96 if (must_read == true) // Test if must read the ram 79 97 { 80 _cout(ENVIRONMENT," * must read\n");98 _cout(ENVIRONMENT," * must read\n"); 81 99 // Read all instruction 82 100 for (unsigned int k=0; k<param->iaccess_nb_instruction[i]; k++) 83 101 { 84 102 uint32_t addr = address+k*(size); 85 _cout(ENVIRONMENT," * addr : %.8x - ",addr);103 _cout(ENVIRONMENT," * addr : %.8x - ",addr); 86 104 87 105 bus_error |= !component_data->read(addr,size,read_iram[k]); … … 102 120 else 103 121 { 104 _cout(ENVIRONMENT, " * KO !\n");105 _cout(ENVIRONMENT, " * present : %d\n",entity.present);122 _cout(ENVIRONMENT, " * KO !\n"); 123 _cout(ENVIRONMENT, " * present : %d\n",entity.present); 106 124 if (entity.present) 107 _cout(ENVIRONMENT, " * type : %d must be data::TYPE_TARGET_MEMORY (%d)\n",entity.segment->getType(), data::TYPE_TARGET_MEMORY);125 _cout(ENVIRONMENT, " * type : %d must be data::TYPE_TARGET_MEMORY (%d)\n",entity.segment->getType(), data::TYPE_TARGET_MEMORY); 108 126 109 127 // entity is not present, or is present but is not a memory : have a bus error … … 121 139 cache_type.direction); 122 140 123 _cout(ENVIRONMENT, " * latence : %d\n",latence);141 _cout(ENVIRONMENT, " * latence : %d\n",latence); 124 142 125 143 // If is a respons -> compute the latence and push in the write_buffer 126 144 if (must_ack or (must_ack_on_error and bus_error)) 127 145 { 128 _cout(ENVIRONMENT, " * must ack\n");146 _cout(ENVIRONMENT, " * must ack\n"); 129 147 130 148 if (bus_error == true) 131 149 { 132 _cout(ENVIRONMENT," * Icache : have a bus error\n");133 _cout(ENVIRONMENT," * entity : %d\n",i);134 _cout(ENVIRONMENT," * port : %d\n",j);135 _cout(ENVIRONMENT," * req_addr : %x\n",address);136 _cout(ENVIRONMENT," * req_trdid : %d\n",context);137 _cout(ENVIRONMENT," * req_pktid : %d\n",packet );150 _cout(ENVIRONMENT," * Icache : have a bus error\n"); 151 _cout(ENVIRONMENT," * entity : %d\n",i); 152 _cout(ENVIRONMENT," * port : %d\n",j); 153 _cout(ENVIRONMENT," * req_addr : %x\n",address); 154 _cout(ENVIRONMENT," * req_trdid : %d\n",context); 155 _cout(ENVIRONMENT," * req_pktid : %d\n",packet ); 138 156 139 157 // Write in instruction [0] the bad address (only 32bit ....) … … 142 160 143 161 // Simplification : the size of a line is a multiple of size_iword (no test) 144 _cout(ENVIRONMENT, " * push in buffer_irsp[%d]\n",i);162 _cout(ENVIRONMENT, " * push in buffer_irsp[%d]\n",i); 145 163 146 164 irsp_t * rsp = new irsp_t(j, … … 154 172 } 155 173 156 _cout(ENVIRONMENT, " * End request\n");174 _cout(ENVIRONMENT, " * End request\n"); 157 175 } 158 176 … … 164 182 if (DCACHE_REQ_VAL [i][j]->read() and dcache_req_ack [i][j]) 165 183 { 166 _cout(ENVIRONMENT, " DCACHE_REQ [%d][%d] : Transaction accepted\n",i,j);184 _cout(ENVIRONMENT, " * DCACHE_REQ [%d][%d] : Transaction accepted\n",i,j); 167 185 168 186 Tdcache_context_t context = DCACHE_REQ_CONTEXT_ID [i][j]->read();// TODO : test presence … … 173 191 uint32_t size = param->daccess_size_data [i]/8; 174 192 175 _cout(ENVIRONMENT," * information\n");176 _cout(ENVIRONMENT," * context : %d\n" ,static_cast<uint32_t>(context));177 _cout(ENVIRONMENT," * packet : %d\n" ,static_cast<uint32_t>(packet ));178 _cout(ENVIRONMENT," * address : %.x\n",static_cast<uint32_t>(address));179 _cout(ENVIRONMENT," * type : %d\n" ,static_cast<uint32_t>(type ));180 _cout(ENVIRONMENT," * size : %d\n" ,static_cast<uint32_t>(size ));193 _cout(ENVIRONMENT," * information\n"); 194 _cout(ENVIRONMENT," * context : %d\n" ,static_cast<uint32_t>(context)); 195 _cout(ENVIRONMENT," * packet : %d\n" ,static_cast<uint32_t>(packet )); 196 _cout(ENVIRONMENT," * address : %.x\n",static_cast<uint32_t>(address)); 197 _cout(ENVIRONMENT," * type : %d\n" ,static_cast<uint32_t>(type )); 198 _cout(ENVIRONMENT," * size : %d\n" ,static_cast<uint32_t>(size )); 181 199 182 200 bool uncached = false; … … 231 249 uint32_t num_tty = (address - entity.segment->getBase())>>4; 232 250 uint32_t num_print = ((address>>2) & 0x3); 233 _cout(true," * TYPE_TARGET_TTY : num_tty : %d, num_print : %d\n",num_tty, num_print);251 _cout(true," * TYPE_TARGET_TTY : num_tty : %d, num_print : %d\n",num_tty, num_print); 234 252 235 253 switch (num_print) … … 294 312 case data::TYPE_TARGET_MEMORY : 295 313 { 296 _cout(ENVIRONMENT," * TYPE_TARGET_MEMORY\n");297 _cout(ENVIRONMENT," * access : %x\n",address);314 _cout(ENVIRONMENT," * TYPE_TARGET_MEMORY\n"); 315 _cout(ENVIRONMENT," * access : %x\n",address); 298 316 299 317 if (must_read == true) 300 318 { 301 319 // Read 302 _cout(ENVIRONMENT," * Read (%d bytes)\n",size);320 _cout(ENVIRONMENT," * Read (%d bytes)\n",size); 303 321 bus_error |= !component_data->read(address,nb_bytes,read_dram[0]); // always read a complete word 304 322 … … 315 333 { 316 334 // Write 317 _cout(ENVIRONMENT," * Write (%d bytes)\n",size);318 _cout(ENVIRONMENT," * Wdata : %x\n",wdata);335 _cout(ENVIRONMENT," * Write (%d bytes)\n",size); 336 _cout(ENVIRONMENT," * Wdata : %x\n",wdata); 319 337 itoa<Tdcache_data_t>(wdata,write_dram,nb_bytes); 320 338 … … 330 348 case data::TYPE_TARGET_RAMLOCK : 331 349 { 332 _cout(ENVIRONMENT," * TYPE_TARGET_RAMLOCK\n");350 _cout(ENVIRONMENT," * TYPE_TARGET_RAMLOCK\n"); 333 351 334 352 // Access is on a byte, else error … … 343 361 uint32_t num_component_ramlock = entity.segment->getIndex(); 344 362 345 // _cout(ENVIRONMENT,"* num_ramlock : %d\n",num_ramlock );346 // _cout(ENVIRONMENT,"* num_lock : %d\n",num_lock );347 // _cout(ENVIRONMENT,"* num_component_ramlock : %d\n",num_component_ramlock);348 _cout(true,"* num_ramlock : %d\n",num_ramlock );349 _cout(true,"* num_lock : %d\n",num_lock );350 _cout(true,"* num_component_ramlock : %d\n",num_component_ramlock);363 _cout(ENVIRONMENT," * num_ramlock : %d\n",num_ramlock ); 364 _cout(ENVIRONMENT," * num_lock : %d\n",num_lock ); 365 _cout(ENVIRONMENT," * num_component_ramlock : %d\n",num_component_ramlock); 366 // _cout(true," * num_ramlock : %d\n",num_ramlock ); 367 // _cout(true," * num_lock : %d\n",num_lock ); 368 // _cout(true," * num_component_ramlock : %d\n",num_component_ramlock); 351 369 352 370 // No test : because out of range … … 364 382 read_dram [0][num_lock] = static_cast<char>(component_ramlock [num_component_ramlock]->write(num_ramlock)); 365 383 366 _cout(true,"* lock : %d\n",(int)read_dram [0][num_lock]);367 // _cout(ENVIRONMENT,"* lock : %d\n",(int)read_dram [0][num_lock]);384 // _cout(true," * lock : %d\n",(int)read_dram [0][num_lock]); 385 _cout(ENVIRONMENT," * lock : %d\n",(int)read_dram [0][num_lock]); 368 386 369 387 break; … … 375 393 case data::TYPE_TARGET_SIM2OS : 376 394 { 377 _cout(ENVIRONMENT," * TYPE_TARGET_SIM2OS\n");395 _cout(ENVIRONMENT," * TYPE_TARGET_SIM2OS\n"); 378 396 379 397 // Mapping : … … 385 403 uint32_t num_reg = (address - entity.segment->getBase())>>2; 386 404 387 _cout(ENVIRONMENT," * num_reg : %d\n",num_reg);405 _cout(ENVIRONMENT," * num_reg : %d\n",num_reg); 388 406 389 407 switch (num_reg) … … 398 416 else 399 417 { 400 _cout(ENVIRONMENT," * service : %x\n",wdata);418 _cout(ENVIRONMENT," * service : %x\n",wdata); 401 419 component_sim2os->execute(sim2os::int2service(static_cast<uint32_t>(wdata))); 402 420 } … … 414 432 // Decomposition en groupe octect 415 433 Tdcache_data_t result = static_cast<Tdcache_data_t>(reinterpret_cast<uint64_t>(component_sim2os->result)); 416 _cout(ENVIRONMENT," * result : %x\n",result);434 _cout(ENVIRONMENT," * result : %x\n",result); 417 435 418 436 itoa<Tdcache_data_t>(result,read_dram[0],size); … … 431 449 // Decomposition en groupe octect 432 450 Tdcache_data_t error = (Tdcache_data_t)component_sim2os->error; 433 _cout(ENVIRONMENT," * error : %x\n",error);451 _cout(ENVIRONMENT," * error : %x\n",error); 434 452 435 453 itoa<Tdcache_data_t>(error,read_dram[0],size); … … 447 465 else 448 466 { 449 _cout(ENVIRONMENT," * argument[%d] : %x\n",num_reg-1,wdata);467 _cout(ENVIRONMENT," * argument[%d] : %x\n",num_reg-1,wdata); 450 468 component_sim2os->parameter(num_reg-2,(void *)wdata); 451 469 } … … 498 516 if (bus_error == true) 499 517 { 500 _cout(ENVIRONMENT," * Dcache : have a bus error\n");501 _cout(ENVIRONMENT," * entity : %d\n",i);502 _cout(ENVIRONMENT," * port : %d\n",j);503 _cout(ENVIRONMENT," * req_addr : 0x%x\n",address);504 _cout(ENVIRONMENT," * req_trdid : %d\n",context);505 _cout(ENVIRONMENT," * req_pktid : %d\n",packet );518 _cout(ENVIRONMENT," * Dcache : have a bus error\n"); 519 _cout(ENVIRONMENT," * entity : %d\n",i); 520 _cout(ENVIRONMENT," * port : %d\n",j); 521 _cout(ENVIRONMENT," * req_addr : 0x%x\n",address); 522 _cout(ENVIRONMENT," * req_trdid : %d\n",context); 523 _cout(ENVIRONMENT," * req_pktid : %d\n",packet ); 506 524 507 525 // Write in data [0] the bad address (32bit or 64bits ) … … 509 527 } 510 528 511 _cout(ENVIRONMENT," * Rdata : ");529 _cout(ENVIRONMENT," * Rdata : "); 512 530 for (uint32_t x=0; x<nb_bytes; x++) 513 531 __cout(ENVIRONMENT,"%.2x",0xff&static_cast<uint32_t>(read_dram[0][x]));
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