- Timestamp:
- Jun 26, 2009, 10:43:23 AM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine
- Files:
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- 29 edited
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Commit_unit/SelfTest/src/main.cpp (modified) (1 diff)
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Commit_unit/SelfTest/src/test.cpp (modified) (16 diffs)
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Commit_unit/src/Commit_unit_deallocation.cpp (modified) (1 diff)
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Commit_unit/src/Commit_unit_genMealy_retire.cpp (modified) (4 diffs)
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Commit_unit/src/Commit_unit_transition.cpp (modified) (3 diffs)
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Issue_queue/SelfTest/src/test.cpp (modified) (12 diffs)
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Issue_queue/src/Issue_queue_allocation.cpp (modified) (1 diff)
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Issue_queue/src/Issue_queue_deallocation.cpp (modified) (1 diff)
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Issue_queue/src/Issue_queue_function_in_order_transition.cpp (modified) (1 diff)
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Issue_queue/src/Issue_queue_function_out_of_order_transition.cpp (modified) (1 diff)
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OOO_Engine_Glue/SelfTest/src/main.cpp (modified) (1 diff)
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OOO_Engine_Glue/SelfTest/src/test.cpp (modified) (10 diffs)
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OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp (modified) (2 diffs)
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OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp (modified) (1 diff)
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OOO_Engine_Glue/src/Parameters.cpp (modified) (3 diffs)
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Reexecute_unit/SelfTest/src/main.cpp (modified) (1 diff)
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Reexecute_unit/SelfTest/src/test.cpp (modified) (5 diffs)
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Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_statistics_deallocation.cpp (modified) (1 diff)
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Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp (modified) (1 diff)
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Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp (modified) (8 diffs)
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Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp (modified) (1 diff)
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Rename_unit/Register_translation_unit/src/Parameters.cpp (modified) (1 diff)
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Rename_unit/SelfTest/src/main.cpp (modified) (1 diff)
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Rename_unit/SelfTest/src/test.cpp (modified) (11 diffs)
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SelfTest/src/test.cpp (modified) (1 diff)
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Special_Register_unit/SelfTest/src/test.cpp (modified) (1 diff)
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Special_Register_unit/include/SPR.h (modified) (1 diff)
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src/OOO_Engine_deallocation.cpp (modified) (1 diff)
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src/Parameters.cpp (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp
r110 r128 142 142 143 143 test (name,param); 144 145 delete param; 144 146 } 145 147 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp
r121 r128 29 29 #endif 30 30 31 simulation_init(0,0 );31 simulation_init(0,0,0,false,false); 32 32 33 33 debug_idle_cycle = CYCLE_MAX; … … 62 62 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 63 63 64 sc_signal<Tcontrol_t > *** in_INSERT_VAL ; 65 sc_signal<Tcontrol_t > *** out_INSERT_ACK ; 66 sc_signal<Tcontext_t > *** in_INSERT_FRONT_END_ID ; 67 sc_signal<Tcontext_t > *** in_INSERT_CONTEXT_ID ; 68 sc_signal<Tpacket_t > *** out_INSERT_PACKET_ID ; 69 //sc_signal<Tcontext_t > *** in_INSERT_RENAME_UNIT_ID ; 70 sc_signal<Tdepth_t > *** in_INSERT_DEPTH ; 71 sc_signal<Ttype_t > *** in_INSERT_TYPE ; 72 sc_signal<Toperation_t > *** in_INSERT_OPERATION ; 73 sc_signal<Tcontrol_t > *** in_INSERT_NO_EXECUTE ; 74 sc_signal<Tcontrol_t > *** in_INSERT_LAST_EVENT ; 75 sc_signal<Tcontrol_t > *** in_INSERT_IS_DELAY_SLOT ; 76 sc_signal<Taddress_t > *** in_INSERT_ADDRESS ; 77 sc_signal<Taddress_t > *** in_INSERT_ADDRESS_NEXT ; 78 sc_signal<Texception_t > *** in_INSERT_EXCEPTION ; 79 sc_signal<Texception_t > *** in_INSERT_EXCEPTION_USE ; 80 sc_signal<Tlsq_ptr_t > *** in_INSERT_STORE_QUEUE_PTR_WRITE ; 81 sc_signal<Tlsq_ptr_t > *** in_INSERT_LOAD_QUEUE_PTR_WRITE ; 82 sc_signal<Tcontrol_t > *** in_INSERT_READ_RA ; 83 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RA_LOG ; 84 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RA_PHY ; 85 sc_signal<Tcontrol_t > *** in_INSERT_READ_RB ; 86 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RB_LOG ; 87 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RB_PHY ; 88 sc_signal<Tcontrol_t > *** in_INSERT_READ_RC ; 89 sc_signal<Tspecial_address_t> *** in_INSERT_NUM_REG_RC_LOG ; 90 sc_signal<Tspecial_address_t> *** in_INSERT_NUM_REG_RC_PHY ; 91 sc_signal<Tcontrol_t > *** in_INSERT_WRITE_RD ; 92 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RD_LOG ; 93 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RD_PHY_OLD ; 94 sc_signal<Tgeneral_address_t> *** in_INSERT_NUM_REG_RD_PHY_NEW ; 95 sc_signal<Tcontrol_t > *** in_INSERT_WRITE_RE ; 96 sc_signal<Tspecial_address_t> *** in_INSERT_NUM_REG_RE_LOG ; 97 sc_signal<Tspecial_address_t> *** in_INSERT_NUM_REG_RE_PHY_OLD ; 98 sc_signal<Tspecial_address_t> *** in_INSERT_NUM_REG_RE_PHY_NEW ; 99 100 sc_signal<Tcontrol_t > *** out_RETIRE_VAL ; 101 sc_signal<Tcontrol_t > *** in_RETIRE_ACK ; 102 sc_signal<Tcontext_t > *** out_RETIRE_FRONT_END_ID ; 103 sc_signal<Tcontext_t > *** out_RETIRE_CONTEXT_ID ; 104 //sc_signal<Tcontext_t > *** out_RETIRE_RENAME_UNIT_ID ; 105 sc_signal<Tcontrol_t > *** out_RETIRE_USE_STORE_QUEUE ; 106 sc_signal<Tcontrol_t > *** out_RETIRE_USE_LOAD_QUEUE ; 107 sc_signal<Tlsq_ptr_t > *** out_RETIRE_STORE_QUEUE_PTR_WRITE ; 108 sc_signal<Tlsq_ptr_t > *** out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 109 sc_signal<Tcontrol_t > *** out_RETIRE_READ_RA ; 110 sc_signal<Tgeneral_address_t> *** out_RETIRE_NUM_REG_RA_PHY ; 111 sc_signal<Tcontrol_t > *** out_RETIRE_READ_RB ; 112 sc_signal<Tgeneral_address_t> *** out_RETIRE_NUM_REG_RB_PHY ; 113 sc_signal<Tcontrol_t > *** out_RETIRE_READ_RC ; 114 sc_signal<Tspecial_address_t> *** out_RETIRE_NUM_REG_RC_PHY ; 115 sc_signal<Tcontrol_t > *** out_RETIRE_WRITE_RD ; 116 sc_signal<Tgeneral_address_t> *** out_RETIRE_NUM_REG_RD_LOG ; 117 sc_signal<Tgeneral_address_t> *** out_RETIRE_NUM_REG_RD_PHY_OLD ; 118 sc_signal<Tgeneral_address_t> *** out_RETIRE_NUM_REG_RD_PHY_NEW ; 119 sc_signal<Tcontrol_t > *** out_RETIRE_WRITE_RE ; 120 sc_signal<Tspecial_address_t> *** out_RETIRE_NUM_REG_RE_LOG ; 121 sc_signal<Tspecial_address_t> *** out_RETIRE_NUM_REG_RE_PHY_OLD ; 122 sc_signal<Tspecial_address_t> *** out_RETIRE_NUM_REG_RE_PHY_NEW ; 123 124 sc_signal<Tcontrol_t > *** out_RETIRE_EVENT_VAL ; 125 sc_signal<Tcontrol_t > *** in_RETIRE_EVENT_ACK ; 126 sc_signal<Tevent_state_t > *** out_RETIRE_EVENT_STATE ; 127 sc_signal<Tcontrol_t > *** out_RETIRE_EVENT_STOP ; 128 129 sc_signal<Tcontrol_t > ** in_COMMIT_VAL ; 130 sc_signal<Tcontrol_t > ** out_COMMIT_ACK ; 131 sc_signal<Tcontrol_t > ** in_COMMIT_WEN ; 132 sc_signal<Tpacket_t > ** in_COMMIT_PACKET_ID ; 133 //sc_signal<Toperation_t > ** in_COMMIT_OPERATION ; 134 //sc_signal<Ttype_t > ** in_COMMIT_TYPE ; 135 sc_signal<Tspecial_data_t > ** in_COMMIT_FLAGS ; 136 sc_signal<Texception_t > ** in_COMMIT_EXCEPTION ; 137 sc_signal<Tcontrol_t > ** in_COMMIT_NO_SEQUENCE ; 138 sc_signal<Taddress_t > ** in_COMMIT_ADDRESS ; 139 sc_signal<Tgeneral_address_t> ** out_COMMIT_NUM_REG_RD ; 140 141 sc_signal<Tcontrol_t > ** out_REEXECUTE_VAL ; 142 sc_signal<Tcontrol_t > ** in_REEXECUTE_ACK ; 143 sc_signal<Tcontext_t > ** out_REEXECUTE_CONTEXT_ID ; 144 sc_signal<Tcontext_t > ** out_REEXECUTE_FRONT_END_ID ; 145 sc_signal<Tpacket_t > ** out_REEXECUTE_PACKET_ID ; 146 sc_signal<Toperation_t > ** out_REEXECUTE_OPERATION ; 147 sc_signal<Ttype_t > ** out_REEXECUTE_TYPE ; 148 sc_signal<Tlsq_ptr_t > ** out_REEXECUTE_STORE_QUEUE_PTR_WRITE; 149 150 sc_signal<Tcontrol_t > ** out_BRANCH_COMPLETE_VAL ; 151 sc_signal<Tcontrol_t > ** in_BRANCH_COMPLETE_ACK ; 152 sc_signal<Tcontext_t > ** out_BRANCH_COMPLETE_CONTEXT_ID ; 153 sc_signal<Tcontext_t > ** out_BRANCH_COMPLETE_FRONT_END_ID ; 154 sc_signal<Tdepth_t > ** out_BRANCH_COMPLETE_DEPTH ; 155 sc_signal<Taddress_t > ** out_BRANCH_COMPLETE_ADDRESS ; 156 sc_signal<Tcontrol_t > ** out_BRANCH_COMPLETE_NO_SEQUENCE ; 157 sc_signal<Tcontrol_t > ** in_BRANCH_COMPLETE_MISS_PREDICTION; 158 159 sc_signal<Tcontrol_t > * out_UPDATE_VAL ; 160 sc_signal<Tcontrol_t > * in_UPDATE_ACK ; 161 sc_signal<Tcontext_t > * out_UPDATE_CONTEXT_ID ; 162 sc_signal<Tcontext_t > * out_UPDATE_FRONT_END_ID ; 163 sc_signal<Tdepth_t > * out_UPDATE_DEPTH ; 164 sc_signal<Tevent_type_t > * out_UPDATE_TYPE ; 165 sc_signal<Tcontrol_t > * out_UPDATE_IS_DELAY_SLOT ; 166 sc_signal<Taddress_t > * out_UPDATE_ADDRESS ; 167 sc_signal<Tcontrol_t > * out_UPDATE_ADDRESS_EPCR_VAL ; 168 sc_signal<Taddress_t > * out_UPDATE_ADDRESS_EPCR ; 169 sc_signal<Tcontrol_t > * out_UPDATE_ADDRESS_EEAR_VAL ; 170 sc_signal<Tgeneral_data_t > * out_UPDATE_ADDRESS_EEAR ; 171 172 sc_signal<Tcontrol_t > *** in_EVENT_VAL ; 173 sc_signal<Tcontrol_t > *** out_EVENT_ACK ; 174 sc_signal<Taddress_t > *** in_EVENT_ADDRESS ; 175 sc_signal<Taddress_t > *** in_EVENT_ADDRESS_NEXT ; 176 sc_signal<Tcontrol_t > *** in_EVENT_ADDRESS_NEXT_VAL ; 177 sc_signal<Tcontrol_t > *** in_EVENT_IS_DS_TAKE ; 178 179 sc_signal<Tcounter_t > *** out_NB_INST_COMMIT_ALL ; 180 sc_signal<Tcounter_t > *** out_NB_INST_COMMIT_MEM ; 181 sc_signal<Tcounter_t > *** in_NB_INST_DECOD_ALL ; 182 sc_signal<Tdepth_t > *** in_DEPTH_MIN ; 183 sc_signal<Tdepth_t > *** in_DEPTH_MAX ; 184 sc_signal<Tcontrol_t > *** in_DEPTH_FULL ; 185 186 sc_signal<Tcontrol_t > *** in_SPR_READ_SR_OVE ; 187 188 sc_signal<Tcontrol_t > *** out_SPR_WRITE_VAL ; 189 sc_signal<Tcontrol_t > *** in_SPR_WRITE_ACK ; 190 sc_signal<Tcontrol_t > *** out_SPR_WRITE_SR_F_VAL ; 191 sc_signal<Tcontrol_t > *** out_SPR_WRITE_SR_F ; 192 sc_signal<Tcontrol_t > *** out_SPR_WRITE_SR_CY_VAL ; 193 sc_signal<Tcontrol_t > *** out_SPR_WRITE_SR_CY ; 194 sc_signal<Tcontrol_t > *** out_SPR_WRITE_SR_OV_VAL ; 195 sc_signal<Tcontrol_t > *** out_SPR_WRITE_SR_OV ; 196 197 sc_signal<bool > * out_INFO_ROB_EMPTY ; 198 64 199 ALLOC2_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 65 200 ALLOC2_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 72 207 ALLOC2_SC_SIGNAL( in_INSERT_OPERATION ," in_INSERT_OPERATION ",Toperation_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 73 208 ALLOC2_SC_SIGNAL( in_INSERT_NO_EXECUTE ," in_INSERT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 209 ALLOC2_SC_SIGNAL( in_INSERT_LAST_EVENT ," in_INSERT_LAST_EVENT ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 74 210 ALLOC2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT ," in_INSERT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 75 #ifdef DEBUG76 211 ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS ," in_INSERT_ADDRESS ",Taddress_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 77 #endif78 212 ALLOC2_SC_SIGNAL( in_INSERT_ADDRESS_NEXT ," in_INSERT_ADDRESS_NEXT ",Taddress_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 79 213 ALLOC2_SC_SIGNAL( in_INSERT_EXCEPTION ," in_INSERT_EXCEPTION ",Texception_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 125 259 ALLOC2_SC_SIGNAL( in_RETIRE_EVENT_ACK ," in_RETIRE_EVENT_ACK ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_context[it1]); 126 260 ALLOC2_SC_SIGNAL(out_RETIRE_EVENT_STATE ,"out_RETIRE_EVENT_STATE ",Tevent_state_t ,_param->_nb_front_end,_param->_nb_context[it1]); 261 ALLOC2_SC_SIGNAL(out_RETIRE_EVENT_STOP ,"out_RETIRE_EVENT_STOP ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_context[it1]); 127 262 128 263 ALLOC1_SC_SIGNAL( in_COMMIT_VAL ," in_COMMIT_VAL ",Tcontrol_t ,_param->_nb_inst_commit); … … 137 272 ALLOC1_SC_SIGNAL( in_COMMIT_ADDRESS ," in_COMMIT_ADDRESS ",Taddress_t ,_param->_nb_inst_commit); 138 273 ALLOC1_SC_SIGNAL(out_COMMIT_NUM_REG_RD ,"out_COMMIT_NUM_REG_RD ",Tgeneral_address_t,_param->_nb_inst_commit); 274 139 275 ALLOC1_SC_SIGNAL(out_REEXECUTE_VAL ,"out_REEXECUTE_VAL ",Tcontrol_t ,_param->_nb_inst_reexecute); 140 276 ALLOC1_SC_SIGNAL( in_REEXECUTE_ACK ," in_REEXECUTE_ACK ",Tcontrol_t ,_param->_nb_inst_reexecute); … … 191 327 ALLOC2_SC_SIGNAL(out_SPR_WRITE_SR_OV ,"out_SPR_WRITE_SR_OV ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_context[it1]); 192 328 329 ALLOC0_SC_SIGNAL(out_INFO_ROB_EMPTY ,"out_INFO_ROB_EMPTY ",bool ); 330 193 331 /******************************************************** 194 332 * Instanciation … … 215 353 INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_IS_DELAY_SLOT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 216 354 INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_NO_EXECUTE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 355 INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_LAST_EVENT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 217 356 #ifdef DEBUG 218 357 INSTANCE2_SC_SIGNAL(_Commit_unit, in_INSERT_ADDRESS ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 272 411 INSTANCE2_SC_SIGNAL(_Commit_unit, in_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1]); 273 412 INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context[it1]); 413 INSTANCE2_SC_SIGNAL(_Commit_unit,out_RETIRE_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context[it1]); 274 414 INSTANCE1_SC_SIGNAL(_Commit_unit, in_COMMIT_VAL ,_param->_nb_inst_commit); 275 415 INSTANCE1_SC_SIGNAL(_Commit_unit,out_COMMIT_ACK ,_param->_nb_inst_commit); … … 351 491 INSTANCE2_SC_SIGNAL(_Commit_unit,out_SPR_WRITE_SR_OV ,_param->_nb_front_end,_param->_nb_context[it1]); 352 492 493 #ifdef DEBUG_TEST 494 INSTANCE0_SC_SIGNAL(_Commit_unit,out_INFO_ROB_EMPTY ); 495 #endif 496 353 497 msg(_("<%s> : Start Simulation ............\n"),name.c_str()); 354 498 … … 378 522 in_NRESET->write(1); 379 523 524 #ifdef SELFTEST 380 525 LABEL("Loop of Test"); 381 526 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) … … 435 580 in_INSERT_IS_DELAY_SLOT [i][j]->write(0); 436 581 in_INSERT_NO_EXECUTE [i][j]->write(0); 582 in_INSERT_LAST_EVENT [i][j]->write(0); 437 583 in_INSERT_ADDRESS_NEXT [i][j]->write(addr); 438 584 in_INSERT_EXCEPTION [i][j]->write(0); … … 608 754 609 755 } 756 #else 757 SC_START(10); 758 #endif 610 759 611 760 /******************************************************** … … 631 780 DELETE2_SC_SIGNAL( in_INSERT_OPERATION ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 632 781 DELETE2_SC_SIGNAL( in_INSERT_NO_EXECUTE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 782 DELETE2_SC_SIGNAL( in_INSERT_LAST_EVENT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 633 783 DELETE2_SC_SIGNAL( in_INSERT_IS_DELAY_SLOT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 634 #ifdef DEBUG635 784 DELETE2_SC_SIGNAL( in_INSERT_ADDRESS ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 636 #endif637 785 DELETE2_SC_SIGNAL( in_INSERT_ADDRESS_NEXT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 638 786 DELETE2_SC_SIGNAL( in_INSERT_EXCEPTION ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 666 814 DELETE2_SC_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 667 815 DELETE2_SC_SIGNAL(out_RETIRE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 668 // 669 // 670 // 671 // 672 // 673 // 816 //DELETE2_SC_SIGNAL(out_RETIRE_READ_RA ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 817 //DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RA_PHY ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 818 //DELETE2_SC_SIGNAL(out_RETIRE_READ_RB ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 819 //DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RB_PHY ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 820 //DELETE2_SC_SIGNAL(out_RETIRE_READ_RC ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 821 //DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RC_PHY ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 674 822 DELETE2_SC_SIGNAL(out_RETIRE_WRITE_RD ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); 675 823 DELETE2_SC_SIGNAL(out_RETIRE_NUM_REG_RD_LOG ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]); … … 683 831 DELETE2_SC_SIGNAL( in_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1]); 684 832 DELETE2_SC_SIGNAL(out_RETIRE_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context[it1]); 833 DELETE2_SC_SIGNAL(out_RETIRE_EVENT_STOP ,_param->_nb_front_end,_param->_nb_context[it1]); 685 834 DELETE1_SC_SIGNAL( in_COMMIT_VAL ,_param->_nb_inst_commit); 686 835 DELETE1_SC_SIGNAL(out_COMMIT_ACK ,_param->_nb_inst_commit); … … 747 896 DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_OV_VAL ,_param->_nb_front_end,_param->_nb_context[it1]); 748 897 DELETE2_SC_SIGNAL(out_SPR_WRITE_SR_OV ,_param->_nb_front_end,_param->_nb_context[it1]); 898 899 DELETE0_SC_SIGNAL(out_INFO_ROB_EMPTY ); 749 900 } 750 901 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
r125 r128 239 239 240 240 #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) 241 for (uint32_t i=0; i<_param->_nb_thread; ++i) 242 if (_param->_have_thread [i]) 243 { 244 instruction_log_file [i].close(); 245 } 241 { 242 for (uint32_t i=0; i<_param->_nb_thread; ++i) 243 if (_param->_have_thread [i]) 244 { 245 instruction_log_file [i].close(); 246 } 247 delete [] instruction_log_file; 248 } 246 249 #endif 247 250 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp
r123 r128 52 52 for (uint32_t j=0; j<_param->_nb_context[i]; ++j) 53 53 { 54 spr_write_val [i][j] = 0;54 spr_write_val [i][j] = 0; 55 55 spr_write_sr_f_val [i][j] = 0; 56 56 spr_write_sr_cy_val [i][j] = 0; … … 63 63 for (uint32_t i=0; i<_param->_nb_bank; i++) 64 64 { 65 uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank; 65 uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank; 66 67 log_printf(TRACE,Commit_unit,FUNCTION," * BANK [%d]",num_bank); 66 68 67 69 // Test if have instruction … … 72 74 uint32_t x = entry->rename_unit_id; 73 75 uint32_t y = num_inst_retire [x]; 74 bool bypass= false; 75 // test if : 76 // * can retire (all previous instruction is retired) 77 // * all structure is ok (not busy) 78 if (can_retire [x] and // in-order 79 (y < _param->_nb_inst_retire [x]) and 80 PORT_READ(in_RETIRE_ACK [x][y])) // not busy 81 { 82 rob_state_t state = entry->state; 83 Tcontext_t front_end_id = entry->front_end_id; 84 Tcontext_t context_id = entry->context_id; 76 77 log_printf(TRACE,Commit_unit,FUNCTION," * num_rename_unit : %d",x); 78 log_printf(TRACE,Commit_unit,FUNCTION," * num_inst_retire : %d",y); 79 80 if (y < _param->_nb_inst_retire [x]) 81 { 82 #ifdef DEBUG_TEST 83 if (x >= _param->_nb_rename_unit) 84 throw ERRORMORPHEO(FUNCTION,toString(_("Invalid rename_unit number (%d, max is %d).\n"),x,_param->_nb_rename_unit)); 85 #endif 86 bool bypass= false; 87 88 log_printf(TRACE,Commit_unit,FUNCTION," * can_retire : %d",can_retire [x]); 89 log_printf(TRACE,Commit_unit,FUNCTION," * RETIRE_ACK : %d",PORT_READ(in_RETIRE_ACK [x][y])); 90 91 // test if : 92 // * can retire (all previous instruction is retired) 93 // * all structure is ok (not busy) 94 if (can_retire [x] and // in-order 95 PORT_READ(in_RETIRE_ACK [x][y])) // not busy 96 { 97 log_printf(TRACE,Commit_unit,FUNCTION," * valid !!!"); 98 99 rob_state_t state = entry->state; 100 Tcontext_t front_end_id = entry->front_end_id; 101 Tcontext_t context_id = entry->context_id; 102 103 log_printf(TRACE,Commit_unit,FUNCTION," * state : %s",toString(state).c_str()); 104 log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id); 105 log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id ); 106 107 if ((state == ROB_END_OK ) or 108 (state == ROB_END_KO ) or 109 (state == ROB_END_BRANCH_MISS) or 110 (state == ROB_END_LOAD_MISS ) or 111 (state == ROB_END_MISS )// or 112 // (state == ROB_END_EXCEPTION) 113 ) 114 { 115 Tcontrol_t write_re = entry->write_re; 116 Tspecial_address_t num_reg_re_log = entry->num_reg_re_log; 117 118 // if state is ok, when write flags in the SR regsiters 119 bool spr_write_ack = true; 120 121 // Write in SR the good flag 122 if ((state == ROB_END_OK ) and write_re) 123 // ROB_END_BRANCH_MISS is a valid branch instruction but don't modify RE 124 { 125 log_printf(TRACE,Commit_unit,FUNCTION," * need write SR flags"); 126 log_printf(TRACE,Commit_unit,FUNCTION," * SPR_WRITE_ACK : %d",PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id])); 127 128 spr_write_ack = PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id]); 129 130 // retire_ack is set !!! 131 spr_write_val [front_end_id][context_id] = 1; 132 133 Tspecial_data_t flags = entry->flags; 134 135 switch (num_reg_re_log) 136 { 137 case SPR_LOGIC_SR_F : 138 { 139 spr_write_sr_f_val [front_end_id][context_id] = 1; 140 spr_write_sr_f [front_end_id][context_id] = (flags & FLAG_F )!=0; 141 142 break; 143 } 144 case SPR_LOGIC_SR_CY_OV : 145 { 146 spr_write_sr_cy_val [front_end_id][context_id] = 1; 147 spr_write_sr_ov_val [front_end_id][context_id] = 1; 148 spr_write_sr_cy [front_end_id][context_id] = (flags & FLAG_CY)!=0; 149 spr_write_sr_ov [front_end_id][context_id] = (flags & FLAG_OV)!=0; 150 151 break; 152 } 153 default : 154 { 155 #ifdef DEBUG_TEST 156 throw ERRORMORPHEO(FUNCTION,_("Invalid num_reg_re_log.\n")); 157 #endif 158 } 159 } 160 } 161 162 // find an instruction can be retire, and in order 163 164 if (spr_write_ack) 165 { 166 retire_val [x][y] = 1; 167 num_inst_retire [x] ++; 168 internal_BANK_RETIRE_VAL [num_bank] = true; 169 } 170 171 internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x; 172 internal_BANK_RETIRE_NUM_INST [num_bank] = y; 173 174 if (_param->_have_port_front_end_id) 175 PORT_WRITE(out_RETIRE_FRONT_END_ID [x][y], front_end_id ); 176 if (_param->_have_port_context_id) 177 PORT_WRITE(out_RETIRE_CONTEXT_ID [x][y], context_id ); 178 // PORT_WRITE(out_RETIRE_RENAME_UNIT_ID [x][y], entry->rename_unit_id ); 179 PORT_WRITE(out_RETIRE_USE_STORE_QUEUE [x][y], entry->use_store_queue ); 180 PORT_WRITE(out_RETIRE_USE_LOAD_QUEUE [x][y], entry->use_load_queue ); 181 PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [x][y], entry->store_queue_ptr_write); 182 if (_param->_have_port_load_queue_ptr) 183 PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE [x][y], entry->load_queue_ptr_write ); 184 // PORT_WRITE(out_RETIRE_READ_RA [x][y], entry->read_ra ); 185 // PORT_WRITE(out_RETIRE_NUM_REG_RA_PHY [x][y], entry->num_reg_ra_phy ); 186 // PORT_WRITE(out_RETIRE_READ_RB [x][y], entry->read_rb ); 187 // PORT_WRITE(out_RETIRE_NUM_REG_RB_PHY [x][y], entry->num_reg_rb_phy ); 188 // PORT_WRITE(out_RETIRE_READ_RC [x][y], entry->read_rc ); 189 // PORT_WRITE(out_RETIRE_NUM_REG_RC_PHY [x][y], entry->num_reg_rc_phy ); 190 PORT_WRITE(out_RETIRE_WRITE_RD [x][y], entry->write_rd ); 191 PORT_WRITE(out_RETIRE_NUM_REG_RD_LOG [x][y], entry->num_reg_rd_log ); 192 PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_OLD [x][y], entry->num_reg_rd_phy_old ); 193 PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_NEW [x][y], entry->num_reg_rd_phy_new ); 194 PORT_WRITE(out_RETIRE_WRITE_RE [x][y], write_re ); 195 PORT_WRITE(out_RETIRE_NUM_REG_RE_LOG [x][y], num_reg_re_log ); 196 PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD [x][y], entry->num_reg_re_phy_old ); 197 PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW [x][y], entry->num_reg_re_phy_new ); 198 199 // Event -> rob must be manage this event 200 if ((state == ROB_END_BRANCH_MISS) or 201 (state == ROB_END_LOAD_MISS)) 202 can_retire [x] = false; 203 } 204 205 log_printf(TRACE,Commit_unit,FUNCTION," * bypass (before) : %d",bypass); 206 207 bypass = ((state == ROB_END ) or 208 (state == ROB_STORE_OK ) or 209 (state == ROB_STORE_KO ) or 210 (state == ROB_STORE_OK_WAIT_END) or 211 (state == ROB_STORE_KO_WAIT_END)); 212 213 log_printf(TRACE,Commit_unit,FUNCTION," * bypass (after) : %d",bypass); 214 215 uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | num_bank); 216 217 log_printf(TRACE,Commit_unit,FUNCTION," * packet : %d",packet); 218 219 // if future event, don't update after this event 220 if ((reg_EVENT_STATE [front_end_id][context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and 221 (reg_EVENT_PACKET [front_end_id][context_id] == packet)) 222 { 223 log_printf(TRACE,Commit_unit,FUNCTION," * is the event instruction, stop bypass !!!"); 224 bypass = false; 225 } 226 } 85 227 86 if ((state == ROB_END_OK ) or 87 (state == ROB_END_KO ) or 88 (state == ROB_END_BRANCH_MISS) or 89 (state == ROB_END_LOAD_MISS ) or 90 (state == ROB_END_MISS )// or 91 // (state == ROB_END_EXCEPTION) 92 ) 93 { 94 Tcontrol_t write_re = entry->write_re; 95 Tspecial_address_t num_reg_re_log = entry->num_reg_re_log; 96 97 // if state is ok, when write flags in the SR regsiters 98 bool spr_write_ack = true; 99 100 // Write in SR the good flag 101 if ((state == ROB_END_OK ) and write_re) 102 // ROB_END_BRANCH_MISS is a valid branch instruction but don't modify RE 103 { 104 spr_write_ack = PORT_READ(in_SPR_WRITE_ACK [front_end_id][context_id]); 105 106 // retire_ack is set !!! 107 spr_write_val [front_end_id][context_id] = 1; 108 109 Tspecial_data_t flags = entry->flags; 110 111 switch (num_reg_re_log) 112 { 113 case SPR_LOGIC_SR_F : 114 { 115 spr_write_sr_f_val [front_end_id][context_id] = 1; 116 spr_write_sr_f [front_end_id][context_id] = (flags & FLAG_F )!=0; 117 118 break; 119 } 120 case SPR_LOGIC_SR_CY_OV : 121 { 122 spr_write_sr_cy_val [front_end_id][context_id] = 1; 123 spr_write_sr_ov_val [front_end_id][context_id] = 1; 124 spr_write_sr_cy [front_end_id][context_id] = (flags & FLAG_CY)!=0; 125 spr_write_sr_ov [front_end_id][context_id] = (flags & FLAG_OV)!=0; 126 127 break; 128 } 129 default : 130 { 131 #ifdef DEBUG_TEST 132 throw ERRORMORPHEO(FUNCTION,_("Invalid num_reg_re_log.\n")); 133 #endif 134 } 135 } 136 } 137 138 // find an instruction can be retire, and in order 139 140 if (spr_write_ack) 141 { 142 retire_val [x][y] = 1; 143 num_inst_retire [x] ++; 144 internal_BANK_RETIRE_VAL [num_bank] = true; 145 } 146 147 internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank] = x; 148 internal_BANK_RETIRE_NUM_INST [num_bank] = y; 149 150 if (_param->_have_port_front_end_id) 151 PORT_WRITE(out_RETIRE_FRONT_END_ID [x][y], front_end_id ); 152 if (_param->_have_port_context_id) 153 PORT_WRITE(out_RETIRE_CONTEXT_ID [x][y], context_id ); 154 // PORT_WRITE(out_RETIRE_RENAME_UNIT_ID [x][y], entry->rename_unit_id ); 155 PORT_WRITE(out_RETIRE_USE_STORE_QUEUE [x][y], entry->use_store_queue ); 156 PORT_WRITE(out_RETIRE_USE_LOAD_QUEUE [x][y], entry->use_load_queue ); 157 PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [x][y], entry->store_queue_ptr_write); 158 if (_param->_have_port_load_queue_ptr) 159 PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE [x][y], entry->load_queue_ptr_write ); 160 // PORT_WRITE(out_RETIRE_READ_RA [x][y], entry->read_ra ); 161 // PORT_WRITE(out_RETIRE_NUM_REG_RA_PHY [x][y], entry->num_reg_ra_phy ); 162 // PORT_WRITE(out_RETIRE_READ_RB [x][y], entry->read_rb ); 163 // PORT_WRITE(out_RETIRE_NUM_REG_RB_PHY [x][y], entry->num_reg_rb_phy ); 164 // PORT_WRITE(out_RETIRE_READ_RC [x][y], entry->read_rc ); 165 // PORT_WRITE(out_RETIRE_NUM_REG_RC_PHY [x][y], entry->num_reg_rc_phy ); 166 PORT_WRITE(out_RETIRE_WRITE_RD [x][y], entry->write_rd ); 167 PORT_WRITE(out_RETIRE_NUM_REG_RD_LOG [x][y], entry->num_reg_rd_log ); 168 PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_OLD [x][y], entry->num_reg_rd_phy_old ); 169 PORT_WRITE(out_RETIRE_NUM_REG_RD_PHY_NEW [x][y], entry->num_reg_rd_phy_new ); 170 PORT_WRITE(out_RETIRE_WRITE_RE [x][y], write_re ); 171 PORT_WRITE(out_RETIRE_NUM_REG_RE_LOG [x][y], num_reg_re_log ); 172 PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD [x][y], entry->num_reg_re_phy_old ); 173 PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW [x][y], entry->num_reg_re_phy_new ); 174 175 // Event -> rob must be manage this event 176 if ((state == ROB_END_BRANCH_MISS) or 177 (state == ROB_END_LOAD_MISS)) 178 can_retire [x] = false; 179 } 180 181 bypass = ((state == ROB_END ) or 182 (state == ROB_STORE_OK ) or 183 (state == ROB_STORE_KO ) or 184 (state == ROB_STORE_OK_WAIT_END) or 185 (state == ROB_STORE_KO_WAIT_END)); 186 187 uint32_t packet = ((entry->ptr << _param->_shift_num_slot) | num_bank); 188 189 // if future event, don't update after this event 190 if ((reg_EVENT_STATE [entry->front_end_id][entry->context_id] == COMMIT_EVENT_STATE_NOT_YET_EVENT) and 191 (reg_EVENT_PACKET [entry->front_end_id][entry->context_id] == packet)) 192 bypass = false; 193 } 194 195 // Retire "in-order" 196 can_retire [x] &= (retire_val [x][y] or bypass); 228 // Retire "in-order" 229 can_retire [x] &= (retire_val [x][y] or bypass); 230 } 197 231 } 198 232 } … … 219 253 for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++) 220 254 PORT_WRITE(out_RETIRE_VAL [i][j],0); 255 256 for (uint32_t i=0; i<_param->_nb_front_end; ++i) 257 for (uint32_t j=0; j<_param->_nb_context[i]; ++j) 258 PORT_WRITE(out_SPR_WRITE_VAL [i][j], 0); 221 259 } 222 260 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r124 r128 54 54 // reg_EVENT_FLUSH [i][j] = false; 55 55 // reg_EVENT_STOP [i][j] = false; 56 reg_EVENT_NUM_BANK [i][j] = 0; // not necessary 57 reg_EVENT_NUM_PTR [i][j] = 0; // not necessary 58 //reg_EVENT_CAN_RESTART [i][j] = 0; // not necessary 59 reg_EVENT_PACKET [i][j] = 0; // not necessary 56 60 reg_EVENT_NB_INST [i][j] = 0; 57 61 reg_EVENT_LAST [i][j] = false; 62 reg_EVENT_LAST_NUM_BANK [i][j] = 0; // not necessary 63 reg_EVENT_LAST_NUM_PTR [i][j] = 0; // not necessary 58 64 59 65 reg_EVENT_NEXT_STOP [i][j] = false; 66 reg_EVENT_NEXT_PACKET [i][j] = 0; // not necessary 60 67 61 68 // reg_PC_PREVIOUS [i][j] = (0x100-4)>>2; … … 274 281 entry->num_reg_re_phy_old = PORT_READ(in_INSERT_NUM_REG_RE_PHY_OLD [x][y]); 275 282 entry->num_reg_re_phy_new = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [x][y]); 283 284 entry->flags = 0; // not necessary 276 285 entry->no_sequence = type == TYPE_BRANCH; 277 286 // entry->speculative = true; 278 287 #ifdef DEBUG 279 288 entry->address = PORT_READ(in_INSERT_ADDRESS [x][y]); 289 #else 290 entry->address = 0; // not necessary 280 291 #endif 281 292 entry->address_next = PORT_READ(in_INSERT_ADDRESS_NEXT [x][y]); … … 1339 1350 (*it)->flags , 1340 1351 (*it)->no_sequence , 1341 // 1352 // (*it)->speculative , 1342 1353 (*it)->address , 1343 1354 (*it)->address<<2 , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp
r117 r128 57 57 sc_signal<Ttype_t > *** in_ISSUE_IN_TYPE ; 58 58 sc_signal<Tlsq_ptr_t > *** in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ; 59 sc_signal<Tlsq_ptr_t > *** in_ISSUE_IN_STORE_QUEUE_PTR_READ ; 60 sc_signal<Tcontrol_t > *** in_ISSUE_IN_STORE_QUEUE_EMPTY ; 59 61 sc_signal<Tlsq_ptr_t > *** in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ; 60 62 sc_signal<Tcontrol_t > *** in_ISSUE_IN_HAS_IMMEDIAT ; … … 78 80 sc_signal<Ttype_t > ** in_REEXECUTE_TYPE ; 79 81 sc_signal<Tlsq_ptr_t > ** in_REEXECUTE_STORE_QUEUE_PTR_WRITE; 82 sc_signal<Tlsq_ptr_t > ** in_REEXECUTE_STORE_QUEUE_PTR_READ ; 83 sc_signal<Tcontrol_t > ** in_REEXECUTE_STORE_QUEUE_EMPTY ; 80 84 sc_signal<Tlsq_ptr_t > ** in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ; 81 85 sc_signal<Tcontrol_t > ** in_REEXECUTE_HAS_IMMEDIAT ; … … 99 103 sc_signal<Ttype_t > ** out_ISSUE_OUT_TYPE ; 100 104 sc_signal<Tlsq_ptr_t > ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE; 105 sc_signal<Tlsq_ptr_t > ** out_ISSUE_OUT_STORE_QUEUE_PTR_READ ; 106 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_STORE_QUEUE_EMPTY ; 101 107 sc_signal<Tlsq_ptr_t > ** out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ; 102 108 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_HAS_IMMEDIAT ; … … 121 127 ALLOC2_SC_SIGNAL( in_ISSUE_IN_TYPE ," in_ISSUE_IN_TYPE ",Ttype_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); 122 128 ALLOC2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ," in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); 129 ALLOC2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_READ ," in_ISSUE_IN_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); 130 ALLOC2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_EMPTY ," in_ISSUE_IN_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); 123 131 ALLOC2_SC_SIGNAL( in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ," in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); 124 132 ALLOC2_SC_SIGNAL( in_ISSUE_IN_HAS_IMMEDIAT ," in_ISSUE_IN_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); … … 142 150 ALLOC1_SC_SIGNAL( in_REEXECUTE_TYPE ," in_REEXECUTE_TYPE ",Ttype_t ,_param->_nb_inst_reexecute); 143 151 ALLOC1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_WRITE," in_REEXECUTE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_inst_reexecute); 152 ALLOC1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_READ ," in_REEXECUTE_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_inst_reexecute); 153 ALLOC1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_EMPTY ," in_REEXECUTE_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_inst_reexecute); 144 154 ALLOC1_SC_SIGNAL( in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ," in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_reexecute); 145 155 ALLOC1_SC_SIGNAL( in_REEXECUTE_HAS_IMMEDIAT ," in_REEXECUTE_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_reexecute); … … 163 173 ALLOC1_SC_SIGNAL(out_ISSUE_OUT_TYPE ,"out_ISSUE_OUT_TYPE ",Ttype_t ,_param->_nb_inst_issue); 164 174 ALLOC1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,"out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_inst_issue); 175 ALLOC1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,"out_ISSUE_OUT_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_inst_issue); 176 ALLOC1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_EMPTY ,"out_ISSUE_OUT_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_inst_issue); 165 177 ALLOC1_SC_SIGNAL(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,"out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_issue); 166 178 ALLOC1_SC_SIGNAL(out_ISSUE_OUT_HAS_IMMEDIAT ,"out_ISSUE_OUT_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_issue); … … 197 209 INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_TYPE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 198 210 INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 211 INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 212 INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 199 213 if (_param->_have_port_load_queue_ptr) 200 214 INSTANCE2_SC_SIGNAL(_Issue_queue, in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); … … 223 237 INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_TYPE ,_param->_nb_inst_reexecute); 224 238 INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute); 239 INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_reexecute); 240 INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_STORE_QUEUE_EMPTY ,_param->_nb_inst_reexecute); 225 241 if (_param->_have_port_load_queue_ptr) 226 242 INSTANCE1_SC_SIGNAL(_Issue_queue, in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute); … … 249 265 INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_TYPE ,_param->_nb_inst_issue); 250 266 INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue); 267 INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_issue); 268 INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_STORE_QUEUE_EMPTY ,_param->_nb_inst_issue); 251 269 if (_param->_have_port_load_queue_ptr) 252 270 INSTANCE1_SC_SIGNAL(_Issue_queue,out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_issue); … … 423 441 DELETE2_SC_SIGNAL( in_ISSUE_IN_TYPE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 424 442 DELETE2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 443 DELETE2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 444 DELETE2_SC_SIGNAL( in_ISSUE_IN_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 425 445 DELETE2_SC_SIGNAL( in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); 426 446 DELETE2_SC_SIGNAL( in_ISSUE_IN_HAS_IMMEDIAT ,_param->_nb_rename_unit, _param->_nb_inst_rename[it1]); … … 445 465 DELETE1_SC_SIGNAL( in_REEXECUTE_TYPE ,_param->_nb_inst_reexecute); 446 466 DELETE1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_reexecute); 467 DELETE1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_reexecute); 468 DELETE1_SC_SIGNAL( in_REEXECUTE_STORE_QUEUE_EMPTY ,_param->_nb_inst_reexecute); 447 469 DELETE1_SC_SIGNAL( in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute); 448 470 DELETE1_SC_SIGNAL( in_REEXECUTE_HAS_IMMEDIAT ,_param->_nb_inst_reexecute); … … 467 489 DELETE1_SC_SIGNAL(out_ISSUE_OUT_TYPE ,_param->_nb_inst_issue); 468 490 DELETE1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue); 491 DELETE1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_issue); 492 DELETE1_SC_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_EMPTY ,_param->_nb_inst_issue); 469 493 DELETE1_SC_SIGNAL(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_issue); 470 494 DELETE1_SC_SIGNAL(out_ISSUE_OUT_HAS_IMMEDIAT ,_param->_nb_inst_issue); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp
r122 r128 156 156 157 157 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 158 ALLOC1(internal_BANK_IN_ACK ,Tcontrol_t,_param->_nb_bank);159 ALLOC1(internal_BANK_IN_NUM_RENAME_UNIT ,uint32_t ,_param->_nb_bank);160 ALLOC1(internal_BANK_IN_NUM_INST ,uint32_t ,_param->_nb_bank);161 162 158 ALLOC1(internal_ISSUE_OUT_VAL ,Tcontrol_t,_param->_nb_inst_issue); 163 159 ALLOC1(internal_ISSUE_OUT_FROM_REEXECUTE,Tcontrol_t,_param->_nb_inst_issue); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp
r122 r128 101 101 102 102 // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 103 while (not _reexecute_queue.empty()) 104 { 105 delete _reexecute_queue.front(); 106 _reexecute_queue.pop_front(); 107 } 108 103 109 DELETE1(_issue_queue ,_param->_nb_bank); 104 110 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_transition.cpp
r122 r128 105 105 log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From issue_queue [%d]",i,num_bank); 106 106 107 delete entry; 108 107 109 _issue_queue [num_bank].remove(entry); 108 110 109 111 reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank; 110 111 delete entry;112 112 } 113 113 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_transition.cpp
r122 r128 101 101 log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - From issue_queue [%d]",i,num_bank); 102 102 103 delete entry; 104 103 105 _issue_queue [num_bank].remove(entry); 104 delete entry;105 106 } 106 107 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/main.cpp
r88 r128 108 108 109 109 test (name,param); 110 111 delete param; 110 112 } 111 113 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/test.cpp
r121 r128 48 48 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 49 49 50 sc_signal<Tcontext_t > *** in_RENAME_FRONT_END_ID ; 51 sc_signal<Tcontext_t > *** out_RENAME_RENAME_UNIT_FRONT_END_ID ; 52 53 sc_signal<Tcontrol_t > ** out_INSERT_VAL ; 54 sc_signal<Tcontrol_t > ** in_INSERT_ACK ; 55 sc_signal<Tcontrol_t > ** out_INSERT_RD_USE ; 56 sc_signal<Tgeneral_address_t > ** out_INSERT_RD_NUM_REG ; 57 sc_signal<Tcontrol_t > ** out_INSERT_RE_USE ; 58 sc_signal<Tspecial_address_t > ** out_INSERT_RE_NUM_REG ; 59 60 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_VAL ; 61 sc_signal<Tcontrol_t > *** out_INSERT_RENAME_UNIT_ACK ; 62 sc_signal<Tcontext_t > *** in_INSERT_RENAME_UNIT_FRONT_END_ID ; 63 sc_signal<Tcontext_t > *** in_INSERT_RENAME_UNIT_CONTEXT_ID ; 64 sc_signal<Ttype_t > *** in_INSERT_RENAME_UNIT_TYPE ; 65 sc_signal<Toperation_t > *** in_INSERT_RENAME_UNIT_OPERATION ; 66 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_NO_EXECUTE ; 67 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_HAS_IMMEDIAT ; 68 sc_signal<Tgeneral_data_t > *** in_INSERT_RENAME_UNIT_IMMEDIAT ; 69 sc_signal<Tlsq_ptr_t > *** in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE; 70 sc_signal<Tlsq_ptr_t > *** in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_READ ; 71 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_STORE_QUEUE_EMPTY ; 72 sc_signal<Tlsq_ptr_t > *** in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ; 73 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_READ_RA ; 74 sc_signal<Tgeneral_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY ; 75 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_READ_RB ; 76 sc_signal<Tgeneral_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY ; 77 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_READ_RC ; 78 sc_signal<Tspecial_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY ; 79 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_WRITE_RD ; 80 sc_signal<Tgeneral_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD ; 81 sc_signal<Tgeneral_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW ; 82 sc_signal<Tcontrol_t > *** in_INSERT_RENAME_UNIT_WRITE_RE ; 83 sc_signal<Tspecial_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD ; 84 sc_signal<Tspecial_address_t > *** in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW ; 85 86 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_VAL ; 87 sc_signal<Tcontrol_t > *** in_INSERT_COMMIT_UNIT_ACK ; 88 sc_signal<Tcontext_t > *** out_INSERT_COMMIT_UNIT_FRONT_END_ID ; 89 sc_signal<Tcontext_t > *** out_INSERT_COMMIT_UNIT_CONTEXT_ID ; 90 //sc_signal<Tcontext_t > *** out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID ; 91 sc_signal<Ttype_t > *** out_INSERT_COMMIT_UNIT_TYPE ; 92 sc_signal<Toperation_t > *** out_INSERT_COMMIT_UNIT_OPERATION ; 93 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_NO_EXECUTE ; 94 sc_signal<Tlsq_ptr_t > *** out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE; 95 // sc_signal<Tlsq_ptr_t > *** out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_READ ; 96 // sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_STORE_QUEUE_EMPTY ; 97 sc_signal<Tlsq_ptr_t > *** out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ; 98 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_READ_RA ; 99 sc_signal<Tgeneral_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY ; 100 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_READ_RB ; 101 sc_signal<Tgeneral_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY ; 102 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_READ_RC ; 103 sc_signal<Tspecial_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY ; 104 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_WRITE_RD ; 105 sc_signal<Tgeneral_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD ; 106 sc_signal<Tgeneral_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW ; 107 sc_signal<Tcontrol_t > *** out_INSERT_COMMIT_UNIT_WRITE_RE ; 108 sc_signal<Tspecial_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD ; 109 sc_signal<Tspecial_address_t > *** out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW ; 110 111 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_VAL ; 112 sc_signal<Tcontrol_t > *** in_INSERT_ISSUE_QUEUE_ACK ; 113 sc_signal<Tcontext_t > *** out_INSERT_ISSUE_QUEUE_CONTEXT_ID ; 114 sc_signal<Tcontext_t > *** out_INSERT_ISSUE_QUEUE_FRONT_END_ID ; 115 sc_signal<Toperation_t > *** out_INSERT_ISSUE_QUEUE_OPERATION ; 116 sc_signal<Ttype_t > *** out_INSERT_ISSUE_QUEUE_TYPE ; 117 sc_signal<Tlsq_ptr_t > *** out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE; 118 sc_signal<Tlsq_ptr_t > *** out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_READ ; 119 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_STORE_QUEUE_EMPTY ; 120 sc_signal<Tlsq_ptr_t > *** out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ; 121 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT ; 122 sc_signal<Tgeneral_data_t > *** out_INSERT_ISSUE_QUEUE_IMMEDIAT ; 123 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_READ_RA ; 124 sc_signal<Tgeneral_address_t > *** out_INSERT_ISSUE_QUEUE_NUM_REG_RA ; 125 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_READ_RB ; 126 sc_signal<Tgeneral_address_t > *** out_INSERT_ISSUE_QUEUE_NUM_REG_RB ; 127 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_READ_RC ; 128 sc_signal<Tspecial_address_t > *** out_INSERT_ISSUE_QUEUE_NUM_REG_RC ; 129 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_WRITE_RD ; 130 sc_signal<Tgeneral_address_t > *** out_INSERT_ISSUE_QUEUE_NUM_REG_RD ; 131 sc_signal<Tcontrol_t > *** out_INSERT_ISSUE_QUEUE_WRITE_RE ; 132 sc_signal<Tspecial_address_t > *** out_INSERT_ISSUE_QUEUE_NUM_REG_RE ; 133 134 //sc_signal<Tcontrol_t > ** out_RETIRE_VAL ; 135 //sc_signal<Tcontrol_t > ** in_RETIRE_ACK ; 136 //sc_signal<Tcontrol_t > ** out_RETIRE_RD_OLD_USE ; 137 //sc_signal<Tgeneral_address_t > ** out_RETIRE_RD_OLD_NUM_REG ; 138 //sc_signal<Tcontrol_t > ** out_RETIRE_RD_NEW_USE ; 139 //sc_signal<Tgeneral_address_t > ** out_RETIRE_RD_NEW_NUM_REG ; 140 //sc_signal<Tcontrol_t > ** out_RETIRE_RE_OLD_USE ; 141 //sc_signal<Tspecial_address_t > ** out_RETIRE_RE_OLD_NUM_REG ; 142 //sc_signal<Tcontrol_t > ** out_RETIRE_RE_NEW_USE ; 143 //sc_signal<Tspecial_address_t > ** out_RETIRE_RE_NEW_NUM_REG ; 144 145 //sc_signal<Tcontrol_t > *** out_RETIRE_RENAME_UNIT_VAL ; 146 //sc_signal<Tcontrol_t > *** in_RETIRE_RENAME_UNIT_ACK ; 147 //sc_signal<Tcontext_t > *** out_RETIRE_RENAME_UNIT_FRONT_END_ID ; 148 //sc_signal<Tcontrol_t > *** out_RETIRE_RENAME_UNIT_WRITE_RD ; 149 //sc_signal<Tgeneral_address_t > *** out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD ; 150 //sc_signal<Tgeneral_address_t > *** out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW ; 151 //sc_signal<Tcontrol_t > *** out_RETIRE_RENAME_UNIT_WRITE_RE ; 152 //sc_signal<Tspecial_address_t > *** out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD ; 153 //sc_signal<Tspecial_address_t > *** out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW ; 154 //sc_signal<Tevent_state_t > *** out_RETIRE_RENAME_UNIT_EVENT_STATE ; 155 156 //sc_signal<Tcontrol_t > *** in_RETIRE_COMMIT_UNIT_VAL ; 157 //sc_signal<Tcontrol_t > *** out_RETIRE_COMMIT_UNIT_ACK ; 158 //sc_signal<Tcontext_t > *** in_RETIRE_COMMIT_UNIT_FRONT_END_ID ; 159 //sc_signal<Tcontrol_t > *** in_RETIRE_COMMIT_UNIT_WRITE_RD ; 160 //sc_signal<Tgeneral_address_t > *** in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD ; 161 //sc_signal<Tgeneral_address_t > *** in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW ; 162 //sc_signal<Tcontrol_t > *** in_RETIRE_COMMIT_UNIT_WRITE_RE ; 163 //sc_signal<Tspecial_address_t > *** in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD ; 164 //sc_signal<Tspecial_address_t > *** in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW ; 165 //sc_signal<Tevent_state_t > *** in_RETIRE_COMMIT_UNIT_EVENT_STATE ; 166 167 sc_signal<Tcontrol_t > *** out_SPR_SR_IEE ; 168 sc_signal<Tcontrol_t > *** out_SPR_SR_EPH ; 169 sc_signal<Tspr_t > *** out_SPR_RENAME_UNIT_SR ; 170 sc_signal<Tcontrol_t > *** out_SPR_COMMIT_UNIT_SR_OVE ; 171 sc_signal<Tspr_t > *** in_SPR_SPECIAL_REGISTER_UNIT_SR ; 172 50 173 ALLOC2_SC_SIGNAL( in_RENAME_FRONT_END_ID ," in_RENAME_FRONT_END_ID ",Tcontext_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 51 174 ALLOC2_SC_SIGNAL(out_RENAME_RENAME_UNIT_FRONT_END_ID ,"out_RENAME_RENAME_UNIT_FRONT_END_ID ",Tcontext_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); … … 68 191 ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_IMMEDIAT ," in_INSERT_RENAME_UNIT_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 69 192 ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE," in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 193 ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_READ ," in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 194 ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_EMPTY ," in_INSERT_RENAME_UNIT_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 70 195 ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ," in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 71 196 ALLOC2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RA ," in_INSERT_RENAME_UNIT_READ_RA ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 91 216 ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NO_EXECUTE ,"out_INSERT_COMMIT_UNIT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 92 217 ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE,"out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 218 // ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_READ ,"out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 219 // ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_EMPTY ,"out_INSERT_COMMIT_UNIT_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 93 220 ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 94 221 ALLOC2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RA ,"out_INSERT_COMMIT_UNIT_READ_RA ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 112 239 ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_TYPE ,"out_INSERT_ISSUE_QUEUE_TYPE ",Ttype_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 113 240 ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE,"out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 241 ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_READ ,"out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 242 ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_EMPTY ,"out_INSERT_ISSUE_QUEUE_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 114 243 ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 115 244 ALLOC2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT ,"out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 199 328 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_IMMEDIAT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 200 329 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 330 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 331 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 201 332 if (_param->_have_port_load_queue_ptr) 202 333 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue, in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 225 356 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_NO_EXECUTE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 226 357 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 358 // INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 359 // INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 227 360 if (_param->_have_port_load_queue_ptr) 228 361 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 251 384 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_TYPE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 252 385 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 386 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 387 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 253 388 if (_param->_have_port_load_queue_ptr) 254 389 INSTANCE2_SC_SIGNAL(_OOO_Engine_Glue,out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 399 534 DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_IMMEDIAT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 400 535 DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 536 DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 537 DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 401 538 DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 402 539 DELETE2_SC_SIGNAL( in_INSERT_RENAME_UNIT_READ_RA ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 422 559 DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_NO_EXECUTE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 423 560 DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 561 // DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 562 // DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 424 563 DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 425 564 DELETE2_SC_SIGNAL(out_INSERT_COMMIT_UNIT_READ_RA ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); … … 443 582 DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_TYPE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 444 583 DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 584 DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 585 DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 445 586 DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); 446 587 DELETE2_SC_SIGNAL(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp
r122 r128 71 71 DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_TYPE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type ); 72 72 DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_OPERATION ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_operation ); 73 DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_NO_EXECUTE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1); 73 74 DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr ); 74 75 DELETE2_SIGNAL(out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_load_queue_ptr ); … … 95 96 DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_TYPE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_type ); 96 97 DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr ); 98 DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_READ ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_store_queue_ptr ); 99 DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_STORE_QUEUE_EMPTY ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1); 97 100 DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],_param->_size_load_queue_ptr ); 98 101 DELETE2_SIGNAL(out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp
r123 r128 54 54 Tspecial_address_t NUM_REG_RE_PHY_NEW = PORT_READ(in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW [i][j]); 55 55 56 Tgeneral_address_t general_address_msb = FRONT_END_ID<< _param->_size_general_register;57 Tspecial_address_t special_address_msb = FRONT_END_ID<< _param->_size_special_register;56 Tgeneral_address_t general_address_msb = i << _param->_size_general_register; 57 Tspecial_address_t special_address_msb = i << _param->_size_special_register; 58 58 59 59 PORT_WRITE(out_INSERT_RD_USE [x] ,WRITE_RD); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp
r109 r128 7 7 8 8 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h" 9 #include "Behavioural/include/Allocation.h" 9 10 #include "Common/include/Max.h" 10 11 #include "Common/include/BitManipulation.h" … … 61 62 } 62 63 63 _translate_front_end_id_to_rename_unit = new uint32_t [_nb_front_end];64 ALLOC1(_translate_front_end_id_to_rename_unit,uint32_t,_nb_front_end); 64 65 65 66 for (uint32_t i=0; i<_nb_front_end; i++) … … 119 120 { 120 121 log_begin(OOO_Engine_Glue,FUNCTION); 121 delete _translate_front_end_id_to_rename_unit; 122 123 DELETE1(_translate_front_end_id_to_rename_unit,_nb_front_end); 124 122 125 log_end(OOO_Engine_Glue,FUNCTION); 123 126 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/main.cpp
r88 r128 101 101 102 102 test (name,param); 103 104 delete param; 103 105 } 104 106 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp
r117 r128 137 137 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 138 138 139 sc_signal<Tcontrol_t > *** in_EXECUTE_LOOP_VAL ; 140 sc_signal<Tcontrol_t > *** out_EXECUTE_LOOP_ACK ; 141 sc_signal<Tcontext_t > *** in_EXECUTE_LOOP_CONTEXT_ID ; 142 sc_signal<Tcontext_t > *** in_EXECUTE_LOOP_FRONT_END_ID ; 143 sc_signal<Tpacket_t > *** in_EXECUTE_LOOP_PACKET_ID ; 144 //sc_signal<Toperation_t > *** in_EXECUTE_LOOP_OPERATION ; 145 //sc_signal<Ttype_t > *** in_EXECUTE_LOOP_TYPE ; 146 sc_signal<Tspecial_data_t > *** in_EXECUTE_LOOP_FLAGS ; 147 sc_signal<Texception_t > *** in_EXECUTE_LOOP_EXCEPTION ; 148 sc_signal<Tcontrol_t > *** in_EXECUTE_LOOP_NO_SEQUENCE ; 149 sc_signal<Tgeneral_data_t > *** in_EXECUTE_LOOP_ADDRESS ; 150 sc_signal<Tgeneral_data_t > *** in_EXECUTE_LOOP_DATA ; 151 152 sc_signal<Tcontrol_t > ** out_COMMIT_VAL ; 153 sc_signal<Tcontrol_t > ** in_COMMIT_ACK ; 154 sc_signal<Tcontrol_t > ** out_COMMIT_WEN ; 155 sc_signal<Tcontext_t > ** out_COMMIT_CONTEXT_ID ; 156 sc_signal<Tcontext_t > ** out_COMMIT_FRONT_END_ID ; 157 sc_signal<Tpacket_t > ** out_COMMIT_PACKET_ID ; 158 //sc_signal<Toperation_t > ** out_COMMIT_OPERATION ; 159 //sc_signal<Ttype_t > ** out_COMMIT_TYPE ; 160 sc_signal<Tspecial_data_t > ** out_COMMIT_FLAGS ; 161 sc_signal<Texception_t > ** out_COMMIT_EXCEPTION ; 162 sc_signal<Tcontrol_t > ** out_COMMIT_NO_SEQUENCE ; 163 sc_signal<Tgeneral_data_t > ** out_COMMIT_ADDRESS ; 164 sc_signal<Tgeneral_address_t > ** in_COMMIT_NUM_REG_RD ; 165 166 sc_signal<Tcontrol_t > ** out_SPR_VAL ; 167 sc_signal<Tcontrol_t > ** in_SPR_ACK ; 168 sc_signal<Tcontrol_t > ** out_SPR_WEN ; 169 sc_signal<Tcontext_t > ** out_SPR_CONTEXT_ID ; 170 sc_signal<Tcontext_t > ** out_SPR_FRONT_END_ID ; 171 sc_signal<Tspr_address_t > ** out_SPR_NUM_GROUP ; 172 sc_signal<Tspr_address_t > ** out_SPR_NUM_REG ; 173 sc_signal<Tspr_t > ** out_SPR_WDATA ; 174 sc_signal<Tspr_t > ** in_SPR_RDATA ; 175 sc_signal<Tcontrol_t > ** in_SPR_INVALID ; 176 177 sc_signal<Tcontrol_t > ** in_REEXECUTE_ROB_VAL ; 178 sc_signal<Tcontrol_t > ** out_REEXECUTE_ROB_ACK ; 179 sc_signal<Tcontext_t > ** in_REEXECUTE_ROB_CONTEXT_ID ; 180 sc_signal<Tcontext_t > ** in_REEXECUTE_ROB_FRONT_END_ID ; 181 sc_signal<Tpacket_t > ** in_REEXECUTE_ROB_PACKET_ID ; 182 sc_signal<Toperation_t > ** in_REEXECUTE_ROB_OPERATION ; 183 sc_signal<Ttype_t > ** in_REEXECUTE_ROB_TYPE ; 184 sc_signal<Tlsq_ptr_t > ** in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE ; 185 186 sc_signal<Tcontrol_t > ** out_REEXECUTE_VAL ; 187 sc_signal<Tcontrol_t > ** in_REEXECUTE_ACK ; 188 sc_signal<Tcontext_t > ** out_REEXECUTE_CONTEXT_ID ; 189 sc_signal<Tcontext_t > ** out_REEXECUTE_FRONT_END_ID ; 190 sc_signal<Tpacket_t > ** out_REEXECUTE_PACKET_ID ; 191 sc_signal<Toperation_t > ** out_REEXECUTE_OPERATION ; 192 sc_signal<Ttype_t > ** out_REEXECUTE_TYPE ; 193 sc_signal<Tlsq_ptr_t > ** out_REEXECUTE_STORE_QUEUE_PTR_WRITE ; 194 sc_signal<Tlsq_ptr_t > ** out_REEXECUTE_STORE_QUEUE_PTR_READ ; 195 sc_signal<Tcontrol_t > ** out_REEXECUTE_STORE_QUEUE_EMPTY ; 196 sc_signal<Tlsq_ptr_t > ** out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ; 197 sc_signal<Tcontrol_t > ** out_REEXECUTE_HAS_IMMEDIAT ; 198 sc_signal<Tgeneral_data_t > ** out_REEXECUTE_IMMEDIAT ; 199 sc_signal<Tcontrol_t > ** out_REEXECUTE_READ_RA ; 200 sc_signal<Tgeneral_address_t > ** out_REEXECUTE_NUM_REG_RA ; 201 sc_signal<Tcontrol_t > ** out_REEXECUTE_READ_RB ; 202 sc_signal<Tgeneral_address_t > ** out_REEXECUTE_NUM_REG_RB ; 203 sc_signal<Tcontrol_t > ** out_REEXECUTE_READ_RC ; 204 sc_signal<Tspecial_address_t > ** out_REEXECUTE_NUM_REG_RC ; 205 sc_signal<Tcontrol_t > ** out_REEXECUTE_WRITE_RD ; 206 sc_signal<Tgeneral_address_t > ** out_REEXECUTE_NUM_REG_RD ; 207 sc_signal<Tcontrol_t > ** out_REEXECUTE_WRITE_RE ; 208 sc_signal<Tspecial_address_t > ** out_REEXECUTE_NUM_REG_RE ; 209 139 210 ALLOC2_SC_SIGNAL( in_EXECUTE_LOOP_VAL ," in_EXECUTE_LOOP_VAL ",Tcontrol_t ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 140 211 ALLOC2_SC_SIGNAL(out_EXECUTE_LOOP_ACK ,"out_EXECUTE_LOOP_ACK ",Tcontrol_t ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); … … 192 263 ALLOC1_SC_SIGNAL(out_REEXECUTE_TYPE ,"out_REEXECUTE_TYPE ",Ttype_t ,_param->_nb_inst_reexecute); 193 264 ALLOC1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE ,"out_REEXECUTE_STORE_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_reexecute); 265 ALLOC1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_READ ,"out_REEXECUTE_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_inst_reexecute); 266 ALLOC1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_EMPTY ,"out_REEXECUTE_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_inst_reexecute); 194 267 ALLOC1_SC_SIGNAL(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,"out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_reexecute); 195 268 ALLOC1_SC_SIGNAL(out_REEXECUTE_HAS_IMMEDIAT ,"out_REEXECUTE_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_reexecute); … … 284 357 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_TYPE ,_param->_nb_inst_reexecute); 285 358 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_STORE_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute); 359 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_reexecute); 360 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_STORE_QUEUE_EMPTY ,_param->_nb_inst_reexecute); 286 361 if (_param->_have_port_load_queue_ptr) 287 362 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute); … … 475 550 TEST(Tcontrol_t ,out_REEXECUTE_HAS_IMMEDIAT [i]->read(), 1); 476 551 TEST(Tlsq_ptr_t ,out_REEXECUTE_STORE_QUEUE_PTR_WRITE [i]->read(), 0); 552 TEST(Tlsq_ptr_t ,out_REEXECUTE_STORE_QUEUE_PTR_READ [i]->read(), 0); 553 TEST(Tlsq_ptr_t ,out_REEXECUTE_STORE_QUEUE_EMPTY [i]->read(), 0); 477 554 TEST(Tlsq_ptr_t ,out_REEXECUTE_LOAD_QUEUE_PTR_WRITE [i]->read(), 0); 478 555 TEST(Tcontrol_t ,out_REEXECUTE_READ_RA [i]->read(), 0); … … 568 645 DELETE1_SC_SIGNAL(out_REEXECUTE_TYPE ,_param->_nb_inst_reexecute); 569 646 DELETE1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute); 647 DELETE1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_reexecute); 648 DELETE1_SC_SIGNAL(out_REEXECUTE_STORE_QUEUE_EMPTY ,_param->_nb_inst_reexecute); 570 649 DELETE1_SC_SIGNAL(out_REEXECUTE_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_reexecute); 571 650 DELETE1_SC_SIGNAL(out_REEXECUTE_HAS_IMMEDIAT ,_param->_nb_inst_reexecute); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_statistics_deallocation.cpp
r110 r128 29 29 delete _stat; 30 30 31 delete [] _stat_bank_spr_nb_elt; 31 32 delete [] _stat_bank_gpr_nb_elt; 32 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/main.cpp
r88 r128 67 67 68 68 test (name,param); 69 70 delete param; 69 71 } 70 72 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/SelfTest/src/test.cpp
r112 r128 50 50 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 51 51 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 52 53 sc_signal<Tcontrol_t > ** in_RENAME_VAL ; 54 sc_signal<Tcontrol_t > ** out_RENAME_ACK ; 55 sc_signal<Tcontext_t > ** in_RENAME_FRONT_END_ID ; 56 sc_signal<Tcontext_t > ** in_RENAME_CONTEXT_ID ; 57 sc_signal<Tgeneral_address_t> ** in_RENAME_NUM_REG_RA_LOG ; 58 sc_signal<Tgeneral_address_t> ** in_RENAME_NUM_REG_RB_LOG ; 59 sc_signal<Tspecial_address_t> ** in_RENAME_NUM_REG_RC_LOG ; 60 sc_signal<Tgeneral_address_t> ** in_RENAME_NUM_REG_RD_LOG ; 61 sc_signal<Tspecial_address_t> ** in_RENAME_NUM_REG_RE_LOG ; 62 sc_signal<Tgeneral_address_t> ** out_RENAME_NUM_REG_RA_PHY ; 63 sc_signal<Tgeneral_address_t> ** out_RENAME_NUM_REG_RB_PHY ; 64 sc_signal<Tspecial_address_t> ** out_RENAME_NUM_REG_RC_PHY ; 65 sc_signal<Tgeneral_address_t> ** out_RENAME_NUM_REG_RD_PHY_OLD; 66 sc_signal<Tspecial_address_t> ** out_RENAME_NUM_REG_RE_PHY_OLD; 67 68 sc_signal<Tcontrol_t > ** in_INSERT_VAL ; 69 sc_signal<Tcontrol_t > ** out_INSERT_ACK ; 70 //sc_signal<Tcontext_t > ** in_INSERT_FRONT_END_ID ; 71 //sc_signal<Tcontext_t > ** in_INSERT_CONTEXT_ID ; 72 sc_signal<Tcontrol_t > ** in_INSERT_WRITE_RD ; 73 sc_signal<Tcontrol_t > ** in_INSERT_WRITE_RE ; 74 sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RD_LOG ; 75 sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RE_LOG ; 76 sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RD_PHY ; 77 sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RE_PHY ; 78 79 sc_signal<Tcontrol_t > ** in_RETIRE_VAL ; 80 sc_signal<Tcontrol_t > ** out_RETIRE_ACK ; 81 sc_signal<Tcontext_t > ** in_RETIRE_FRONT_END_ID ; 82 sc_signal<Tcontext_t > ** in_RETIRE_CONTEXT_ID ; 83 sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RD ; 84 sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RE ; 85 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_LOG ; 86 sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_LOG ; 87 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_PHY_NEW; 88 sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_PHY_NEW; 89 sc_signal<Tcontrol_t > ** out_RETIRE_RESTORE_RD_PHY_OLD; 90 sc_signal<Tcontrol_t > ** out_RETIRE_RESTORE_RE_PHY_OLD; 91 sc_signal<Tcontrol_t > ** out_RETIRE_RESTORE ; 92 93 sc_signal<Tcontrol_t > *** in_RETIRE_EVENT_VAL ; 94 sc_signal<Tcontrol_t > *** out_RETIRE_EVENT_ACK ; 95 sc_signal<Tevent_state_t > *** in_RETIRE_EVENT_STATE ; 52 96 53 97 ALLOC1_SC_SIGNAL( in_RENAME_VAL ," in_RENAME_VAL ",Tcontrol_t ,_param->_nb_inst_insert); … … 85 129 ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ," in_RETIRE_NUM_REG_RD_LOG ",Tgeneral_address_t,_param->_nb_inst_retire); 86 130 ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ," in_RETIRE_NUM_REG_RE_LOG ",Tspecial_address_t,_param->_nb_inst_retire); 87 ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_ OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire);88 ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_ OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire);131 ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire); 132 ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire); 89 133 ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD,"out_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire); 90 134 ALLOC1_SC_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD,"out_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire); … … 144 188 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire); 145 189 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire); 146 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RD_PHY_ OLD,_param->_nb_inst_retire);147 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RE_PHY_ OLD,_param->_nb_inst_retire);190 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire); 191 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire); 148 192 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire); 149 193 INSTANCE1_SC_SIGNAL(_Register_Address_Translation_unit,out_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire); … … 272 316 in_RETIRE_NUM_REG_RD_LOG [i]->write(rand() % _param->_nb_general_register_logic); 273 317 in_RETIRE_NUM_REG_RE_LOG [i]->write(rand() % _param->_nb_special_register_logic); 274 in_RETIRE_NUM_REG_RD_PHY_ OLD[i]->write(rand() % _param->_nb_general_register);275 in_RETIRE_NUM_REG_RE_PHY_ OLD[i]->write(rand() % _param->_nb_special_register);318 in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rand() % _param->_nb_general_register); 319 in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(rand() % _param->_nb_special_register); 276 320 277 321 in_RETIRE_EVENT_STATE [front_end_id][context_id]->write(EVENT_STATE_NO_EVENT); … … 409 453 in_RETIRE_NUM_REG_RD_LOG [i]->write(rand() % _param->_nb_general_register_logic); 410 454 in_RETIRE_NUM_REG_RE_LOG [i]->write(rand() % _param->_nb_special_register_logic); 411 in_RETIRE_NUM_REG_RD_PHY_ OLD[i]->write(rand() % _param->_nb_general_register);412 in_RETIRE_NUM_REG_RE_PHY_ OLD[i]->write(rand() % _param->_nb_special_register);455 in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rand() % _param->_nb_general_register); 456 in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(rand() % _param->_nb_special_register); 413 457 414 458 in_RETIRE_EVENT_STATE [retire_front_end_id [i]][retire_context_id [i]]->write(EVENT_STATE_WAITEND); … … 451 495 452 496 if (rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] == false) 453 rat_gpr[front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] = in_RETIRE_NUM_REG_RD_PHY_ OLD[i]->read();497 rat_gpr[front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] = in_RETIRE_NUM_REG_RD_PHY_NEW[i]->read(); 454 498 rat_gpr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RD_LOG[i]->read()] = true; 455 499 } … … 459 503 460 504 if (rat_spr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] == false) 461 rat_spr[front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] = in_RETIRE_NUM_REG_RE_PHY_ OLD[i]->read();505 rat_spr[front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] = in_RETIRE_NUM_REG_RE_PHY_NEW[i]->read(); 462 506 rat_spr_updt [front_end_id][context_id][in_RETIRE_NUM_REG_RE_LOG[i]->read()] = true; 463 507 } … … 498 542 delete in_NRESET; 499 543 500 delete [] in_RENAME_VAL ; 501 delete [] out_RENAME_ACK ; 502 if (_param->_have_port_front_end_id) 503 delete [] in_RENAME_FRONT_END_ID ; 504 if (_param->_have_port_context_id) 505 delete [] in_RENAME_CONTEXT_ID ; 506 delete [] in_RENAME_NUM_REG_RA_LOG ; 507 delete [] in_RENAME_NUM_REG_RB_LOG ; 508 delete [] in_RENAME_NUM_REG_RC_LOG ; 509 delete [] in_RENAME_NUM_REG_RD_LOG ; 510 delete [] in_RENAME_NUM_REG_RE_LOG ; 511 delete [] out_RENAME_NUM_REG_RA_PHY ; 512 delete [] out_RENAME_NUM_REG_RB_PHY ; 513 delete [] out_RENAME_NUM_REG_RC_PHY ; 514 delete [] out_RENAME_NUM_REG_RD_PHY_OLD; 515 delete [] out_RENAME_NUM_REG_RE_PHY_OLD; 516 517 delete [] in_INSERT_VAL ; 518 delete [] out_INSERT_ACK ; 519 //if (_param->_have_port_front_end_id) 520 //delete [] in_INSERT_FRONT_END_ID ; 521 //if (_param->_have_port_context_id) 522 //delete [] in_INSERT_CONTEXT_ID ; 523 delete [] in_INSERT_WRITE_RD ; 524 delete [] in_INSERT_WRITE_RE ; 525 delete [] in_INSERT_NUM_REG_RD_LOG ; 526 delete [] in_INSERT_NUM_REG_RE_LOG ; 527 delete [] in_INSERT_NUM_REG_RD_PHY ; 528 delete [] in_INSERT_NUM_REG_RE_PHY ; 529 530 delete [] in_RETIRE_VAL ; 531 delete [] out_RETIRE_ACK ; 532 if (_param->_have_port_front_end_id) 533 delete [] in_RETIRE_FRONT_END_ID ; 534 if (_param->_have_port_context_id) 535 delete [] in_RETIRE_CONTEXT_ID ; 536 delete [] in_RETIRE_WRITE_RD ; 537 delete [] in_RETIRE_WRITE_RE ; 538 delete [] in_RETIRE_NUM_REG_RD_LOG ; 539 delete [] in_RETIRE_NUM_REG_RE_LOG ; 540 delete [] in_RETIRE_NUM_REG_RD_PHY_OLD; 541 delete [] in_RETIRE_NUM_REG_RE_PHY_OLD; 542 delete [] out_RETIRE_RESTORE_RD_PHY_OLD; 543 delete [] out_RETIRE_RESTORE_RE_PHY_OLD; 544 delete [] out_RETIRE_RESTORE ; 545 546 DELETE2_SC_SIGNAL( in_RETIRE_EVENT_VAL ,_param->_nb_front_end, _param->_nb_context[it1]); 547 DELETE2_SC_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end, _param->_nb_context[it1]); 548 DELETE2_SC_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end, _param->_nb_context[it1]); 544 545 DELETE1_SC_SIGNAL( in_RENAME_VAL ,_param->_nb_inst_insert); 546 DELETE1_SC_SIGNAL(out_RENAME_ACK ,_param->_nb_inst_insert); 547 DELETE1_SC_SIGNAL( in_RENAME_FRONT_END_ID ,_param->_nb_inst_insert); 548 DELETE1_SC_SIGNAL( in_RENAME_CONTEXT_ID ,_param->_nb_inst_insert); 549 DELETE1_SC_SIGNAL( in_RENAME_NUM_REG_RA_LOG ,_param->_nb_inst_insert); 550 DELETE1_SC_SIGNAL( in_RENAME_NUM_REG_RB_LOG ,_param->_nb_inst_insert); 551 DELETE1_SC_SIGNAL( in_RENAME_NUM_REG_RC_LOG ,_param->_nb_inst_insert); 552 DELETE1_SC_SIGNAL( in_RENAME_NUM_REG_RD_LOG ,_param->_nb_inst_insert); 553 DELETE1_SC_SIGNAL( in_RENAME_NUM_REG_RE_LOG ,_param->_nb_inst_insert); 554 DELETE1_SC_SIGNAL(out_RENAME_NUM_REG_RA_PHY ,_param->_nb_inst_insert); 555 DELETE1_SC_SIGNAL(out_RENAME_NUM_REG_RB_PHY ,_param->_nb_inst_insert); 556 DELETE1_SC_SIGNAL(out_RENAME_NUM_REG_RC_PHY ,_param->_nb_inst_insert); 557 DELETE1_SC_SIGNAL(out_RENAME_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert); 558 DELETE1_SC_SIGNAL(out_RENAME_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert); 559 560 DELETE1_SC_SIGNAL( in_INSERT_VAL ,_param->_nb_inst_insert); 561 DELETE1_SC_SIGNAL(out_INSERT_ACK ,_param->_nb_inst_insert); 562 //DELETE1_SC_SIGNAL( in_INSERT_FRONT_END_ID ,_param->_nb_inst_insert); 563 //DELETE1_SC_SIGNAL( in_INSERT_CONTEXT_ID ,_param->_nb_inst_insert); 564 DELETE1_SC_SIGNAL( in_INSERT_WRITE_RD ,_param->_nb_inst_insert); 565 DELETE1_SC_SIGNAL( in_INSERT_WRITE_RE ,_param->_nb_inst_insert); 566 DELETE1_SC_SIGNAL( in_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert); 567 DELETE1_SC_SIGNAL( in_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert); 568 DELETE1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY ,_param->_nb_inst_insert); 569 DELETE1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY ,_param->_nb_inst_insert); 570 571 DELETE1_SC_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire); 572 DELETE1_SC_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire); 573 DELETE1_SC_SIGNAL( in_RETIRE_FRONT_END_ID ,_param->_nb_inst_retire); 574 DELETE1_SC_SIGNAL( in_RETIRE_CONTEXT_ID ,_param->_nb_inst_retire); 575 DELETE1_SC_SIGNAL( in_RETIRE_WRITE_RD ,_param->_nb_inst_retire); 576 DELETE1_SC_SIGNAL( in_RETIRE_WRITE_RE ,_param->_nb_inst_retire); 577 DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_LOG ,_param->_nb_inst_retire); 578 DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_LOG ,_param->_nb_inst_retire); 579 DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire); 580 DELETE1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire); 581 DELETE1_SC_SIGNAL(out_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire); 582 DELETE1_SC_SIGNAL(out_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire); 583 DELETE1_SC_SIGNAL(out_RETIRE_RESTORE ,_param->_nb_inst_retire); 584 585 DELETE2_SC_SIGNAL( in_RETIRE_EVENT_VAL ,_param->_nb_front_end,_param->_nb_context[it1]); 586 DELETE2_SC_SIGNAL(out_RETIRE_EVENT_ACK ,_param->_nb_front_end,_param->_nb_context[it1]); 587 DELETE2_SC_SIGNAL( in_RETIRE_EVENT_STATE ,_param->_nb_front_end,_param->_nb_context[it1]); 549 588 #endif 550 589 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_Address_Translation_unit/src/Register_Address_Translation_unit_transition.cpp
r123 r128 36 36 rat_gpr_not_speculative [i][j][0] = 0; 37 37 rat_gpr_speculative_valid [i][j][0] = false; 38 rat_gpr_speculative [i][j][0] = 0 ; // not necessary 39 rat_gpr_update_table [i][j][0] = false; // not necessary 38 40 39 41 for (uint32_t k=1; k<_param->_nb_general_register_logic; k++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Parameters.cpp
r112 r128 127 127 log_printf(FUNC,Register_translation_unit,FUNCTION,"Begin"); 128 128 129 delete []_param_dependency_checking_unit;130 delete []_param_free_list_unit;131 delete []_param_register_address_translation_unit;132 delete []_param_stat_list_unit;133 delete []_param_register_translation_unit_glue;129 delete _param_dependency_checking_unit; 130 delete _param_free_list_unit; 131 delete _param_register_address_translation_unit; 132 delete _param_stat_list_unit; 133 delete _param_register_translation_unit_glue; 134 134 135 135 log_printf(FUNC,Register_translation_unit,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp
r112 r128 135 135 136 136 test (name,param); 137 138 delete param; 137 139 } 138 140 catch (morpheo::ErrorMorpheo & error) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/test.cpp
r121 r128 48 48 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 49 49 50 sc_signal<Tcontrol_t > *** in_RENAME_IN_VAL ; 51 sc_signal<Tcontrol_t > *** out_RENAME_IN_ACK ; 52 sc_signal<Tcontext_t > *** in_RENAME_IN_FRONT_END_ID ; 53 sc_signal<Tcontext_t > *** in_RENAME_IN_CONTEXT_ID ; 54 sc_signal<Tdepth_t > *** in_RENAME_IN_DEPTH ; 55 sc_signal<Ttype_t > *** in_RENAME_IN_TYPE ; 56 sc_signal<Toperation_t > *** in_RENAME_IN_OPERATION ; 57 sc_signal<Tcontrol_t > *** in_RENAME_IN_NO_EXECUTE ; 58 sc_signal<Tcontrol_t > *** in_RENAME_IN_LAST_EVENT ; 59 sc_signal<Tcontrol_t > *** in_RENAME_IN_IS_DELAY_SLOT ; 60 sc_signal<Tgeneral_data_t > *** in_RENAME_IN_ADDRESS ; 61 sc_signal<Tgeneral_data_t > *** in_RENAME_IN_ADDRESS_NEXT ; 62 sc_signal<Tcontrol_t > *** in_RENAME_IN_HAS_IMMEDIAT ; 63 sc_signal<Tgeneral_data_t > *** in_RENAME_IN_IMMEDIAT ; 64 sc_signal<Tcontrol_t > *** in_RENAME_IN_READ_RA ; 65 sc_signal<Tgeneral_address_t> *** in_RENAME_IN_NUM_REG_RA ; 66 sc_signal<Tcontrol_t > *** in_RENAME_IN_READ_RB ; 67 sc_signal<Tgeneral_address_t> *** in_RENAME_IN_NUM_REG_RB ; 68 sc_signal<Tcontrol_t > *** in_RENAME_IN_READ_RC ; 69 sc_signal<Tspecial_address_t> *** in_RENAME_IN_NUM_REG_RC ; 70 sc_signal<Tcontrol_t > *** in_RENAME_IN_WRITE_RD ; 71 sc_signal<Tgeneral_address_t> *** in_RENAME_IN_NUM_REG_RD ; 72 sc_signal<Tcontrol_t > *** in_RENAME_IN_WRITE_RE ; 73 sc_signal<Tspecial_address_t> *** in_RENAME_IN_NUM_REG_RE ; 74 sc_signal<Texception_t > *** in_RENAME_IN_EXCEPTION_USE ; 75 sc_signal<Texception_t > *** in_RENAME_IN_EXCEPTION ; 76 sc_signal<Tcontrol_t > ** out_INSERT_VAL ; 77 sc_signal<Tcontrol_t > ** in_INSERT_ACK ; 78 sc_signal<Tcontext_t > ** out_INSERT_FRONT_END_ID ; 79 sc_signal<Tcontext_t > ** out_INSERT_CONTEXT_ID ; 80 sc_signal<Tdepth_t > ** out_INSERT_DEPTH ; 81 sc_signal<Ttype_t > ** out_INSERT_TYPE ; 82 sc_signal<Toperation_t > ** out_INSERT_OPERATION ; 83 sc_signal<Tcontrol_t > ** out_INSERT_NO_EXECUTE ; 84 sc_signal<Tcontrol_t > ** out_INSERT_LAST_EVENT ; 85 sc_signal<Tcontrol_t > ** out_INSERT_IS_DELAY_SLOT ; 86 sc_signal<Tgeneral_data_t > ** out_INSERT_ADDRESS ; 87 sc_signal<Tgeneral_data_t > ** out_INSERT_ADDRESS_NEXT ; 88 sc_signal<Tcontrol_t > ** out_INSERT_HAS_IMMEDIAT ; 89 sc_signal<Tgeneral_data_t > ** out_INSERT_IMMEDIAT ; 90 sc_signal<Tlsq_ptr_t > ** out_INSERT_STORE_QUEUE_PTR_WRITE; 91 sc_signal<Tlsq_ptr_t > ** out_INSERT_STORE_QUEUE_PTR_READ ; 92 sc_signal<Tcontrol_t > ** out_INSERT_STORE_QUEUE_EMPTY ; 93 sc_signal<Tlsq_ptr_t > ** out_INSERT_LOAD_QUEUE_PTR_WRITE ; 94 sc_signal<Tcontrol_t > ** out_INSERT_READ_RA ; 95 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RA_LOG ; 96 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RA_PHY ; 97 sc_signal<Tcontrol_t > ** out_INSERT_READ_RB ; 98 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RB_LOG ; 99 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RB_PHY ; 100 sc_signal<Tcontrol_t > ** out_INSERT_READ_RC ; 101 sc_signal<Tspecial_address_t> ** out_INSERT_NUM_REG_RC_LOG ; 102 sc_signal<Tspecial_address_t> ** out_INSERT_NUM_REG_RC_PHY ; 103 sc_signal<Tcontrol_t > ** out_INSERT_WRITE_RD ; 104 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RD_LOG ; 105 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RD_PHY_OLD ; 106 sc_signal<Tgeneral_address_t> ** out_INSERT_NUM_REG_RD_PHY_NEW ; 107 sc_signal<Tcontrol_t > ** out_INSERT_WRITE_RE ; 108 sc_signal<Tspecial_address_t> ** out_INSERT_NUM_REG_RE_LOG ; 109 sc_signal<Tspecial_address_t> ** out_INSERT_NUM_REG_RE_PHY_OLD ; 110 sc_signal<Tspecial_address_t> ** out_INSERT_NUM_REG_RE_PHY_NEW ; 111 sc_signal<Texception_t > ** out_INSERT_EXCEPTION_USE ; 112 sc_signal<Texception_t > ** out_INSERT_EXCEPTION ; 113 sc_signal<Tcontrol_t > ** in_RETIRE_VAL ; 114 sc_signal<Tcontrol_t > ** out_RETIRE_ACK ; 115 sc_signal<Tcontext_t > ** in_RETIRE_FRONT_END_ID ; 116 sc_signal<Tcontext_t > ** in_RETIRE_CONTEXT_ID ; 117 //sc_signal<Ttype_t > ** in_RETIRE_TYPE ; 118 //sc_signal<Toperation_t > ** in_RETIRE_OPERATION ; 119 sc_signal<Tcontrol_t > ** in_RETIRE_USE_STORE_QUEUE ; 120 sc_signal<Tcontrol_t > ** in_RETIRE_USE_LOAD_QUEUE ; 121 sc_signal<Tlsq_ptr_t > ** in_RETIRE_STORE_QUEUE_PTR_WRITE; 122 sc_signal<Tlsq_ptr_t > ** in_RETIRE_LOAD_QUEUE_PTR_WRITE ; 123 sc_signal<Tcontrol_t > ** in_RETIRE_READ_RA ; 124 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RA_PHY ; 125 sc_signal<Tcontrol_t > ** in_RETIRE_READ_RB ; 126 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RB_PHY ; 127 sc_signal<Tcontrol_t > ** in_RETIRE_READ_RC ; 128 sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RC_PHY ; 129 sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RD ; 130 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_LOG ; 131 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_PHY_OLD ; 132 sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RD_PHY_NEW ; 133 sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RE ; 134 sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_LOG ; 135 sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_PHY_OLD ; 136 sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RE_PHY_NEW ; 137 sc_signal<Tcontrol_t > *** in_RETIRE_EVENT_VAL ; 138 sc_signal<Tcontrol_t > *** out_RETIRE_EVENT_ACK ; 139 sc_signal<Tevent_state_t > *** in_RETIRE_EVENT_STATE ; 140 sc_signal<Tspr_t > *** in_SPR_READ_SR ; 141 sc_signal<bool > * in_INFO_ROB_EMPTY ; 142 50 143 ALLOC2_SC_SIGNAL( in_RENAME_IN_VAL ," in_RENAME_IN_VAL ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 51 144 ALLOC2_SC_SIGNAL(out_RENAME_IN_ACK ,"out_RENAME_IN_ACK ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); … … 56 149 ALLOC2_SC_SIGNAL( in_RENAME_IN_OPERATION ," in_RENAME_IN_OPERATION ",Toperation_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 57 150 ALLOC2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE ," in_RENAME_IN_NO_EXECUTE ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 151 ALLOC2_SC_SIGNAL( in_RENAME_IN_LAST_EVENT ," in_RENAME_IN_LAST_EVENT ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 58 152 ALLOC2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ," in_RENAME_IN_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 59 #ifdef DEBUG60 153 ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS ," in_RENAME_IN_ADDRESS ",Tgeneral_data_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 61 #endif62 154 ALLOC2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT ," in_RENAME_IN_ADDRESS_NEXT ",Tgeneral_data_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); 63 155 ALLOC2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT ," in_RENAME_IN_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); … … 83 175 ALLOC1_SC_SIGNAL(out_INSERT_OPERATION ,"out_INSERT_OPERATION ",Toperation_t ,_param->_nb_inst_insert); 84 176 ALLOC1_SC_SIGNAL(out_INSERT_NO_EXECUTE ,"out_INSERT_NO_EXECUTE ",Tcontrol_t ,_param->_nb_inst_insert); 177 ALLOC1_SC_SIGNAL(out_INSERT_LAST_EVENT ,"out_INSERT_LAST_EVENT ",Tcontrol_t ,_param->_nb_inst_insert); 85 178 ALLOC1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT ,"out_INSERT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_insert); 86 #ifdef DEBUG87 179 ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS ,"out_INSERT_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_insert); 88 #endif89 180 ALLOC1_SC_SIGNAL(out_INSERT_ADDRESS_NEXT ,"out_INSERT_ADDRESS_NEXT ",Tgeneral_data_t ,_param->_nb_inst_insert); 90 181 ALLOC1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT ,"out_INSERT_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_insert); 91 182 ALLOC1_SC_SIGNAL(out_INSERT_IMMEDIAT ,"out_INSERT_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_insert); 92 183 ALLOC1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,"out_INSERT_STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_nb_inst_insert); 184 ALLOC1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_READ ,"out_INSERT_STORE_QUEUE_PTR_READ ",Tlsq_ptr_t ,_param->_nb_inst_insert); 185 ALLOC1_SC_SIGNAL(out_INSERT_STORE_QUEUE_EMPTY ,"out_INSERT_STORE_QUEUE_EMPTY ",Tcontrol_t ,_param->_nb_inst_insert); 93 186 ALLOC1_SC_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,"out_INSERT_LOAD_QUEUE_PTR_WRITE ",Tlsq_ptr_t ,_param->_nb_inst_insert); 94 187 ALLOC1_SC_SIGNAL(out_INSERT_READ_RA ,"out_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); … … 139 232 ALLOC2_SC_SIGNAL( in_RETIRE_EVENT_STATE ," in_RETIRE_EVENT_STATE ",Tevent_state_t ,_param->_nb_front_end,_param->_nb_context[it1]); 140 233 ALLOC2_SC_SIGNAL( in_SPR_READ_SR ," in_SPR_READ_SR ",Tspr_t ,_param->_nb_front_end,_param->_nb_context[it1]); 234 ALLOC0_SC_SIGNAL( in_INFO_ROB_EMPTY ," in_INFO_ROB_EMPTY ",bool ); 141 235 142 236 /******************************************************** … … 160 254 INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 161 255 INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_NO_EXECUTE ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 256 INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_LAST_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 162 257 INSTANCE2_SC_SIGNAL(_Rename_unit, in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 163 258 #ifdef DEBUG … … 191 286 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_OPERATION ,_param->_nb_inst_insert); 192 287 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert); 288 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_LAST_EVENT ,_param->_nb_inst_insert); 193 289 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IS_DELAY_SLOT ,_param->_nb_inst_insert); 194 290 #ifdef DEBUG … … 199 295 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_IMMEDIAT ,_param->_nb_inst_insert); 200 296 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert); 297 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_insert); 298 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_STORE_QUEUE_EMPTY ,_param->_nb_inst_insert); 201 299 if (_param->_have_port_load_queue_ptr) 202 300 INSTANCE1_SC_SIGNAL(_Rename_unit,out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert); … … 261 359 INSTANCE2_SC_SIGNAL(_Rename_unit,in_SPR_READ_SR ,_param->_nb_front_end, _param->_nb_context[it1]); 262 360 361 #ifdef DEBUG_TEST 362 INSTANCE0_SC_SIGNAL(_Rename_unit,in_INFO_ROB_EMPTY ); 363 #endif 263 364 264 365 msg(_("<%s> : Start Simulation ............\n"),name.c_str()); … … 314 415 DELETE2_SC_SIGNAL( in_RENAME_IN_OPERATION ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 315 416 DELETE2_SC_SIGNAL( in_RENAME_IN_NO_EXECUTE ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 417 DELETE2_SC_SIGNAL( in_RENAME_IN_LAST_EVENT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 316 418 DELETE2_SC_SIGNAL( in_RENAME_IN_IS_DELAY_SLOT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 317 #ifdef DEBUG318 419 DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 319 #endif320 420 DELETE2_SC_SIGNAL( in_RENAME_IN_ADDRESS_NEXT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); 321 421 DELETE2_SC_SIGNAL( in_RENAME_IN_HAS_IMMEDIAT ,_param->_nb_front_end, _param->_nb_inst_decod[it1]); … … 342 442 DELETE1_SC_SIGNAL(out_INSERT_OPERATION ,_param->_nb_inst_insert); 343 443 DELETE1_SC_SIGNAL(out_INSERT_NO_EXECUTE ,_param->_nb_inst_insert); 444 DELETE1_SC_SIGNAL(out_INSERT_LAST_EVENT ,_param->_nb_inst_insert); 344 445 DELETE1_SC_SIGNAL(out_INSERT_IS_DELAY_SLOT ,_param->_nb_inst_insert); 345 #ifdef DEBUG346 446 DELETE1_SC_SIGNAL(out_INSERT_ADDRESS ,_param->_nb_inst_insert); 347 #endif348 447 DELETE1_SC_SIGNAL(out_INSERT_ADDRESS_NEXT ,_param->_nb_inst_insert); 349 448 DELETE1_SC_SIGNAL(out_INSERT_HAS_IMMEDIAT ,_param->_nb_inst_insert); 350 449 DELETE1_SC_SIGNAL(out_INSERT_IMMEDIAT ,_param->_nb_inst_insert); 351 450 DELETE1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_insert); 451 DELETE1_SC_SIGNAL(out_INSERT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_insert); 452 DELETE1_SC_SIGNAL(out_INSERT_STORE_QUEUE_EMPTY ,_param->_nb_inst_insert); 352 453 DELETE1_SC_SIGNAL(out_INSERT_LOAD_QUEUE_PTR_WRITE ,_param->_nb_inst_insert); 353 454 DELETE1_SC_SIGNAL(out_INSERT_EXCEPTION_USE ,_param->_nb_inst_insert); … … 401 502 402 503 DELETE2_SC_SIGNAL(in_SPR_READ_SR ,_param->_nb_front_end, _param->_nb_context[it1]); 504 505 DELETE0_SC_SIGNAL(in_INFO_ROB_EMPTY ); 403 506 } 404 507 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
r117 r128 20 20 #endif 21 21 22 simulation_init(0,0 );22 simulation_init(0,0,0,false,false); 23 23 24 24 debug_idle_cycle = CYCLE_MAX; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/test.cpp
r88 r128 47 47 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 48 48 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 49 50 sc_signal<Tcontrol_t > ** in_SPR_ACCESS_VAL ; 51 sc_signal<Tcontrol_t > ** out_SPR_ACCESS_ACK ; 52 sc_signal<Tcontext_t > ** in_SPR_ACCESS_FRONT_END_ID; 53 sc_signal<Tcontext_t > ** in_SPR_ACCESS_CONTEXT_ID ; 54 sc_signal<Tcontrol_t > ** in_SPR_ACCESS_WEN ; 55 sc_signal<Tspr_address_t> ** in_SPR_ACCESS_NUM_GROUP ; 56 sc_signal<Tspr_address_t> ** in_SPR_ACCESS_NUM_REG ; 57 sc_signal<Tspr_t > ** in_SPR_ACCESS_WDATA ; 58 sc_signal<Tspr_t > ** out_SPR_ACCESS_RDATA ; 59 sc_signal<Tcontrol_t > ** out_SPR_ACCESS_INVALID ; 60 61 sc_signal<Tspr_t > *** out_SPR_READ_SR ; 62 63 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_VAL ; 64 sc_signal<Tcontrol_t > *** out_SPR_COMMIT_ACK ; 65 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_SR_F_VAL ; 66 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_SR_F ; 67 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_SR_CY_VAL ; 68 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_SR_CY ; 69 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_SR_OV_VAL ; 70 sc_signal<Tcontrol_t > *** in_SPR_COMMIT_SR_OV ; 71 72 sc_signal<Tcontrol_t > *** in_SPR_EVENT_VAL ; 73 sc_signal<Tcontrol_t > *** out_SPR_EVENT_ACK ; 74 sc_signal<Tspr_t > *** in_SPR_EVENT_EPCR ; 75 sc_signal<Tcontrol_t > *** in_SPR_EVENT_EEAR_WEN ; 76 sc_signal<Tspr_t > *** in_SPR_EVENT_EEAR ; 77 sc_signal<Tcontrol_t > *** in_SPR_EVENT_SR_DSX ; 78 sc_signal<Tcontrol_t > *** in_SPR_EVENT_SR_TO_ESR ; 49 79 50 80 ALLOC1_SC_SIGNAL( in_SPR_ACCESS_VAL ," in_SPR_ACCESS_VAL ",Tcontrol_t ,_param->_nb_inst_reexecute); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h
r117 r128 578 578 public : void reset (void ) 579 579 { 580 thread_id = 0; // not necessary 580 581 }; 581 582 public : Tspr_t read (void ) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
r123 r128 158 158 159 159 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 160 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 161 delete _component_rename_unit [i] ; 160 162 delete [] _component_rename_unit ; 161 163 delete _component_commit_unit ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
r120 r128 411 411 delete [] _link_front_end_with_rename_unit ; 412 412 413 for (uint32_t i=0; i<_nb_rename_unit; i++) 414 delete _param_rename_unit [i] ; 413 415 delete [] _param_rename_unit ; 414 416 delete _param_commit_unit ;
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