Changeset 15 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp
- Timestamp:
- Apr 5, 2007, 4:17:30 PM (17 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp
r3 r15 22 22 log_printf(FUNC,Pattern_History_Table,"vhdl_body","Begin"); 23 23 24 vhdl.set_body ("-- Output : always at '1'");25 for (uint32_t i=0; i<_param._nb_branch_complete; i++)26 vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");27 for (uint32_t i=0; i<_param._nb_prediction ; i++)28 vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+" <= '1';");29 vhdl.set_body ("");24 // vhdl.set_body ("-- Output : always at '1'"); 25 // for (uint32_t i=0; i<_param._nb_branch_complete; i++) 26 // vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';"); 27 // for (uint32_t i=0; i<_param._nb_prediction ; i++) 28 // vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+" <= '1';"); 29 // vhdl.set_body (""); 30 30 31 31 list<string> list_port_map; … … 41 41 42 42 list_port_map.clear(); 43 vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); 43 vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK "); 44 vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET"); 45 44 46 for (uint32_t i=0; i<_param._nb_prediction; i++) 45 47 { 46 vhdl.set_body_component_port_map (list_port_map," in_READ_ENABLE_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); 48 vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); 49 vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+" ","out_PREDICT_ACK_"+toString(i)); 47 50 vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i)); 48 51 vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+" ","out_PREDICT_HISTORY_"+toString(i)); … … 51 54 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 52 55 { 53 vhdl.set_body_component_port_map (list_port_map," in_WRITE_ENABLE_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)+""); 56 vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)+""); 57 vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+" "," out_BRANCH_COMPLETE_ACK_"+toString(i)+""); 54 58 vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+""," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)); 55 59 vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));
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