Changeset 3 for trunk/IPs/systemC/processor/Morpheo/Behavioural
- Timestamp:
- Mar 6, 2007, 3:34:04 PM (18 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural
- Files:
-
- 3 added
- 54 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_genMealy.cpp
r2 r3 21 21 for (uint32_t i=0; i<_param._nb_port; i++) 22 22 { 23 Tdata_t data = PORT_READ(in_COUNTER_DATA [i]); 23 Tcontrol_t addsub = PORT_READ(in_COUNTER_ADDSUB [i]); 24 Tdata_t data_in = PORT_READ(in_COUNTER_DATA [i]); 25 Tdata_t data_out= data_in; 26 log_printf(TRACE,Counter,"genMealy","before : %d %s = %d",data_in,((addsub==1)?"++":"--"),data_out); 24 27 25 28 // Staturate counter 26 if ( PORT_READ(in_COUNTER_ADDSUB [i])== 1)29 if (addsub == 1) 27 30 { 28 if (data < _param._data_max)29 data 31 if (data_out < _param._data_max) 32 data_out++; 30 33 } 31 34 else 32 35 { 33 if (data > 0)34 data 36 if (data_out > 0) 37 data_out--; 35 38 } 36 39 37 PORT_WRITE(out_COUNTER_DATA[i], data); 40 log_printf(TRACE,Counter,"genMealy","after : %d %s = %d",data_in,((addsub==1)?"++":"--"),data_out); 41 42 PORT_WRITE(out_COUNTER_DATA[i], data_out); 38 43 } 39 44 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Parameters_print.cpp
r2 r3 7 7 8 8 #include "Behavioural/Generic/Counter/include/Parameters.h" 9 #include <sstream>9 #include "Behavioural/include/XML.h" 10 10 using namespace std; 11 11 … … 20 20 log_printf(FUNC,Counter,"print","Begin"); 21 21 22 string tab = string(depth,'\t'); 23 ostringstream msg; 24 msg << tab << "<counter>" << endl 25 << tab << "\t<size_data value=\"" << _size_data << "\" />" << endl 26 << tab << "\t<nb_port value=\"" << _nb_port << "\" />" << endl 27 << tab << "</counter>" << endl; 22 XML xml ("counter"); 23 24 xml.balise_open("counter"); 25 xml. singleton_begin("size_data"); 26 xml. attribut("value",toString(_size_data)); 27 xml. singleton_end(); 28 xml. singleton_begin("nb_port "); 29 xml. attribut("value",toString(_nb_port)); 30 xml. singleton_end(); 31 xml.balise_close(); 28 32 29 33 log_printf(FUNC,Counter,"print","End"); 30 34 31 return msg.str();35 return xml.get_body(depth); 32 36 }; 33 37 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_genMealy_read.cpp
r2 r3 27 27 if ( PORT_READ(in_READ_ENABLE[i]) == 1) 28 28 { 29 log_printf(TRACE,Register_File,"genMealy_read","Read [%d] : Have transaction, Reg[%d] -> %x",i,PORT_READ(in_READ_ADDRESS[i]),REGISTER_READ(reg_DATA[PORT_READ(in_READ_ADDRESS[i])])); 29 Taddress_t address = PORT_READ(in_READ_ADDRESS[i]); 30 Tdata_t data = REGISTER_READ(reg_DATA[address]); 31 32 log_printf(TRACE,Register_File,"genMealy_read","[%d] -> %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 33 30 34 #ifdef STATISTICS 31 35 _stat_nb_read ++; 32 36 #endif 33 37 // Write in registerFile 34 PORT_WRITE(out_READ_DATA[i], REGISTER_READ(reg_DATA[PORT_READ(in_READ_ADDRESS[i])]));38 PORT_WRITE(out_READ_DATA[i],data); 35 39 } 36 40 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_transition.cpp
r2 r3 26 26 if ( PORT_READ(in_WRITE_ENABLE[i]) == true) 27 27 { 28 log_printf(TRACE,Register_File,"transition","Write [%d] : Have transaction, Reg[%d] <- %x",i,PORT_READ(in_WRITE_ADDRESS[i]),PORT_READ(in_WRITE_DATA [i]));29 30 28 #ifdef STATISTICS 31 29 _stat_nb_write ++; … … 35 33 Tdata_t data = PORT_READ(in_WRITE_DATA [i]); 36 34 35 log_printf(TRACE,Register_File,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 36 37 37 // Write in registerFile 38 38 REGISTER_WRITE(reg_DATA[address],data); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common
r2 r3 34 34 TR = tr 35 35 UPPERtoLOWER = $(TR) [:lower:] [:upper:] 36 36 37 #-----[ Compilation ]-------------------------------------- 37 38 … … 61 62 XX_systemcass = -rdynamic \ 62 63 -ansi \ 63 -Wno-long-long \ 64 -DCHECK_MULTIWRITING2REGISTER 65 66 # -DNONAME_RENAME 64 -Wno-long-long 67 65 68 66 XX_systemcass_deps = $(XX_systemcass) 69 67 70 68 EXEC_PARAMS_systemc = 71 EXEC_PARAMS_systemcass = 72 EXEC_PARAMS_systemcass_deps = -- p69 EXEC_PARAMS_systemcass = --nobanner 70 EXEC_PARAMS_systemcass_deps = --nobanner --p 73 71 74 72 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest
r2 r3 142 142 *.vhdl \ 143 143 *.stat \ 144 .libs \ 145 code* \ 144 generated_by_systemcass \ 146 145 core* 147 146 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis
r2 r3 64 64 65 65 $(DIR_LOG)/%.vhdl_sim.log : $(DIR_VHDL)/%.vhdl $(DIR_LOG)/%.vhdl.log 66 @$(ECHO) "VHDL's Simulation 66 @$(ECHO) "VHDL's Simulation: $*" 67 67 @$(VSIM) "$(DIR_WORK).`$(BASENAME) $* |$(UPPERtoLOWER)`" > $@ 68 68 declare -i count=`$(GREP) -ch "Test KO" $@`; \ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.defs
r2 r3 16 16 #-----[ Flags ]-------------------------------------------- 17 17 FLAGS = -DSYSTEMC \ 18 -DCONFIGURATION \ 18 19 -DSTATISTICS \ 19 20 -DVHDL \ 20 -DVHDL_TESTBENCH \21 -DDEBUG=DEBUG_ALL 21 -DVHDL_TESTBENCH 22 # -DDEBUG=DEBUG_TRACE 22 23 23 24 # Flags : … … 25 26 # VHDL - To generate a vhdl's model 26 27 # SYSTEMC - To generate a systemc's model 28 # CONFIGURATION - To generate a configuration file (it's input of viewer) 27 29 # STATISTICS (need SYSTEMC) - In the simulation, generate a statistics's file 28 30 # VHDL_TESTBENCH (need SYSTEMC) - In the simulation, generate two testbench's file (input and ouput) to validate the vhdl's model -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/VERSION
r2 r3 1 v0. 31 v0.4 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/Parameters_print.cpp
r2 r3 7 7 8 8 #include "Behavioural/@DIRECTORY/include/Parameters.h" 9 #include <sstream>9 #include "Behavioural/include/XML.h" 10 10 using namespace std; 11 11 … … 18 18 log_printf(FUNC,@COMPONENT,"print","Begin"); 19 19 20 string tab = string(depth,'\t'); 21 ostringstream msg; 22 msg << tab << "<@COMPONENT_LOWER>" << endl 23 << tab << "</@COMPONENT_LOWER>" << endl; 20 XML xml ("@COMPONENT_LOWER"); 21 22 xml.balise_open("@COMPONENT_LOWER"); 23 // xml. singleton_begin("size_data"); 24 // xml. attribut("value",toString(_size_data)); 25 // xml. singleton_end(); 26 // xml. singleton_begin("nb_port "); 27 // xml. attribut("value",toString(_nb_port)); 28 // xml. singleton_end(); 29 xml.balise_close(); 24 30 25 31 log_printf(FUNC,@COMPONENT,"print","End"); 26 32 27 return msg.str();33 return xml.get_body(depth); 28 34 }; 29 35 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp
r2 r3 46 46 *********************************************************************/ 47 47 sc_clock CLOCK ("clock", 1.0, 0.5); 48 sc_signal<Tcontrol_t> PREDICT_VAL [param._nb_prediction];49 sc_signal<Tcontrol_t> PREDICT_ACK [param._nb_prediction];50 sc_signal<Taddress_t> PREDICT_ADDRESS [param._nb_prediction];51 sc_signal<Thistory_t> PREDICT_HISTORY [param._nb_prediction];52 53 sc_signal<Tcontrol_t> BRANCH_COMPLETE_VAL [param._nb_branch_complete];54 sc_signal<Tcontrol_t> BRANCH_COMPLETE_ACK [param._nb_branch_complete];55 sc_signal<Taddress_t> BRANCH_COMPLETE_ADDRESS [param._nb_branch_complete];56 sc_signal<Thistory_t> BRANCH_COMPLETE_HISTORY [param._nb_branch_complete];57 sc_signal<Tcontrol_t> BRANCH_COMPLETE_ HIT[param._nb_branch_complete];48 sc_signal<Tcontrol_t> PREDICT_VAL [param._nb_prediction]; 49 sc_signal<Tcontrol_t> PREDICT_ACK [param._nb_prediction]; 50 sc_signal<Taddress_t> PREDICT_ADDRESS [param._nb_prediction]; 51 sc_signal<Thistory_t> PREDICT_HISTORY [param._nb_prediction]; 52 53 sc_signal<Tcontrol_t> BRANCH_COMPLETE_VAL [param._nb_branch_complete]; 54 sc_signal<Tcontrol_t> BRANCH_COMPLETE_ACK [param._nb_branch_complete]; 55 sc_signal<Taddress_t> BRANCH_COMPLETE_ADDRESS [param._nb_branch_complete]; 56 sc_signal<Thistory_t> BRANCH_COMPLETE_HISTORY [param._nb_branch_complete]; 57 sc_signal<Tcontrol_t> BRANCH_COMPLETE_DIRECTION [param._nb_branch_complete]; 58 58 59 59 /******************************************************** … … 75 75 for (uint32_t i=0; i<param._nb_branch_complete; i++) 76 76 { 77 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (BRANCH_COMPLETE_VAL[i]);78 (*(_Branch_History_Table->out_BRANCH_COMPLETE_ACK [i])) (BRANCH_COMPLETE_ACK[i]);79 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (BRANCH_COMPLETE_ADDRESS[i]);80 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (BRANCH_COMPLETE_HISTORY[i]);81 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_ HIT [i])) (BRANCH_COMPLETE_HIT[i]);77 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (BRANCH_COMPLETE_VAL [i]); 78 (*(_Branch_History_Table->out_BRANCH_COMPLETE_ACK [i])) (BRANCH_COMPLETE_ACK [i]); 79 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (BRANCH_COMPLETE_ADDRESS [i]); 80 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (BRANCH_COMPLETE_HISTORY [i]); 81 (*(_Branch_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (BRANCH_COMPLETE_DIRECTION [i]); 82 82 } 83 83 … … 108 108 Thistory_t history = 0; 109 109 Thistory_t mask = gen_mask <Thistory_t> (param._size_shifter); 110 Tcontrol_t hit= 0;110 Tcontrol_t direction = 0; 111 111 112 112 while (address<param._nb_shifter) 113 113 { 114 BRANCH_COMPLETE_VAL [0].write(1);115 BRANCH_COMPLETE_ADDRESS [0].write(address);116 BRANCH_COMPLETE_HISTORY [0].write(0);117 BRANCH_COMPLETE_ HIT[0].write(0);114 BRANCH_COMPLETE_VAL [0].write(1); 115 BRANCH_COMPLETE_ADDRESS [0].write(address); 116 BRANCH_COMPLETE_HISTORY [0].write(0); 117 BRANCH_COMPLETE_DIRECTION [0].write(0); 118 118 119 119 sc_start(1); … … 136 136 address = rand() % param._nb_shifter ; 137 137 history = rand() % (1<<param._size_shifter) ; 138 hit= rand() % 2;138 direction = rand() % 2; 139 139 140 140 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} ["+toString(num_port_branch_complete)+"]" << endl 141 141 << hex 142 << " - address : " << address << endl143 << " - history old : " << history << endl144 << " - hit : " << hit<< endl;142 << " - address : " << address << endl 143 << " - history old : " << history << endl 144 << " - direction : " << direction<< endl; 145 145 146 BRANCH_COMPLETE_VAL [num_port_branch_complete].write(1);147 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete].write(address);148 BRANCH_COMPLETE_HISTORY [num_port_branch_complete].write(history);149 BRANCH_COMPLETE_ HIT [num_port_branch_complete].write(hit);146 BRANCH_COMPLETE_VAL [num_port_branch_complete].write(1); 147 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete].write(address); 148 BRANCH_COMPLETE_HISTORY [num_port_branch_complete].write(history); 149 BRANCH_COMPLETE_DIRECTION [num_port_branch_complete].write(direction); 150 150 151 151 // Wait Ack … … 160 160 PREDICT_ADDRESS [num_port_predict ].write(address); 161 161 162 history = ((history<<1)&mask)| hit;162 history = ((history<<1)&mask)|direction; 163 163 164 164 // Wait Ack -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h
r2 r3 78 78 public : SC_IN (Taddress_t) ** in_BRANCH_COMPLETE_ADDRESS; 79 79 public : SC_IN (Thistory_t) ** in_BRANCH_COMPLETE_HISTORY; 80 public : SC_IN (Tcontrol_t) ** in_BRANCH_COMPLETE_ HIT;80 public : SC_IN (Tcontrol_t) ** in_BRANCH_COMPLETE_DIRECTION; 81 81 82 82 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 87 87 88 88 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 89 p rotected: morpheo::behavioural::generic::shifter::Shifter * component_Shifter ;90 p rotected: morpheo::behavioural::generic::registerfile::RegisterFile * component_RegisterFile;89 public : morpheo::behavioural::generic::shifter::Shifter * component_Shifter ; 90 public : morpheo::behavioural::generic::registerfile::RegisterFile * component_RegisterFile; 91 91 92 92 // -----[ methods ]--------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp
r2 r3 48 48 in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete]; 49 49 in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; 50 in_BRANCH_COMPLETE_ HIT= new SC_IN (Tcontrol_t) * [_param._nb_branch_complete];50 in_BRANCH_COMPLETE_DIRECTION= new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; 51 51 signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete]; 52 52 … … 65 65 in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str()); 66 66 67 rename = "in_BRANCH_COMPLETE_ HIT[" +toString(i)+"]";68 in_BRANCH_COMPLETE_ HIT[i] = new SC_IN (Tcontrol_t) (rename.c_str());67 rename = "in_BRANCH_COMPLETE_DIRECTION[" +toString(i)+"]"; 68 in_BRANCH_COMPLETE_DIRECTION[i] = new SC_IN (Tcontrol_t) (rename.c_str()); 69 69 70 70 rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; … … 93 93 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 94 94 { 95 (*(component_Shifter-> in_SHIFTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i]));96 (*(component_Shifter-> in_SHIFTER_CARRY_IN [i])) (*( in_BRANCH_COMPLETE_ HIT[i]));97 (*(component_Shifter->out_SHIFTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i]));95 (*(component_Shifter-> in_SHIFTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i])); 96 (*(component_Shifter-> in_SHIFTER_CARRY_IN [i])) (*( in_BRANCH_COMPLETE_DIRECTION[i])); 97 (*(component_Shifter->out_SHIFTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); 98 98 } 99 99 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp
r2 r3 40 40 delete in_BRANCH_COMPLETE_ADDRESS [i]; 41 41 delete in_BRANCH_COMPLETE_HISTORY [i]; 42 delete in_BRANCH_COMPLETE_ HIT[i];42 delete in_BRANCH_COMPLETE_DIRECTION[i]; 43 43 } 44 44 delete in_BRANCH_COMPLETE_VAL ; … … 46 46 delete in_BRANCH_COMPLETE_ADDRESS; 47 47 delete in_BRANCH_COMPLETE_HISTORY; 48 delete in_BRANCH_COMPLETE_ HIT;48 delete in_BRANCH_COMPLETE_DIRECTION; 49 49 50 50 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp
r2 r3 32 32 { 33 33 vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_DATA_"+toString(i)+" "," in_BRANCH_COMPLETE_HISTORY_"+toString(i)); 34 vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_CARRY_IN_"+toString(i)+" "," in_BRANCH_COMPLETE_ HIT_"+toString(i) );34 vhdl.set_body_component_port_map (list_port_map," in_SHIFTER_CARRY_IN_"+toString(i)+" "," in_BRANCH_COMPLETE_DIRECTION_"+toString(i) ); 35 35 vhdl.set_body_component_port_map (list_port_map,"out_SHIFTER_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i)); 36 36 } 37 37 38 38 vhdl.set_body_component ("component_Shifter",_name+"_Shifter",list_port_map); 39 40 39 41 40 list_port_map.clear(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp
r2 r3 24 24 for (uint32_t i=0; i<_param._nb_prediction; i++) 25 25 { 26 vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+" ", IN, 1);27 vhdl.set_port("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1);28 vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));29 vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_shifter);26 vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); 27 vhdl.set_port("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); 28 vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter)))); 29 vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_shifter); 30 30 } 31 31 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 32 32 { 33 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1);34 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1);35 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));36 vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_shifter);37 vhdl.set_port (" in_BRANCH_COMPLETE_ HIT_"+toString(i)+"", IN, 1);33 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); 34 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); 35 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter)))); 36 vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_shifter); 37 vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); 38 38 } 39 39 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_signal.cpp
r2 r3 17 17 namespace branch_history_table { 18 18 19 20 19 void Branch_History_Table::vhdl_signal (Vhdl & vhdl) 21 20 { … … 29 28 }; // end namespace predictor 30 29 }; // end namespace stage_1_ifetch 31 32 30 }; // end namespace behavioural 33 31 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp
r2 r3 21 21 for (uint32_t i=0; i<_param._nb_prediction; i++) 22 22 { 23 _vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1);24 _vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1);25 _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));26 _vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_shifter);23 _vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); 24 _vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); 25 _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter)))); 26 _vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_shifter); 27 27 } 28 28 29 29 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 30 30 { 31 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1);32 _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1);33 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter))));34 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_shifter);35 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ HIT_"+toString(i)+"", IN, 1);31 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); 32 _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); 33 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_shifter)))); 34 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_shifter); 35 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); 36 36 } 37 37 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp
r2 r3 40 40 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); 41 41 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i])); 42 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ HIT[i]));42 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i])); 43 43 } 44 44 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp
r2 r3 43 43 *********************************************************************/ 44 44 sc_clock CLOCK ("clock", 1.0, 0.5); 45 sc_signal<Tcontrol_t> PREDICT_VAL [param._nb_prediction];46 sc_signal<Tcontrol_t> PREDICT_ACK [param._nb_prediction];47 sc_signal<Taddress_t> PREDICT_ADDRESS [param._nb_prediction];48 sc_signal<Thistory_t> PREDICT_HISTORY [param._nb_prediction];49 50 sc_signal<Tcontrol_t> BRANCH_COMPLETE_VAL [param._nb_branch_complete];51 sc_signal<Tcontrol_t> BRANCH_COMPLETE_ACK [param._nb_branch_complete];52 sc_signal<Taddress_t> BRANCH_COMPLETE_ADDRESS [param._nb_branch_complete];53 sc_signal<Thistory_t> BRANCH_COMPLETE_HISTORY [param._nb_branch_complete];54 sc_signal<Tcontrol_t> BRANCH_COMPLETE_ HIT[param._nb_branch_complete];45 sc_signal<Tcontrol_t> PREDICT_VAL [param._nb_prediction]; 46 sc_signal<Tcontrol_t> PREDICT_ACK [param._nb_prediction]; 47 sc_signal<Taddress_t> PREDICT_ADDRESS [param._nb_prediction]; 48 sc_signal<Thistory_t> PREDICT_HISTORY [param._nb_prediction]; 49 50 sc_signal<Tcontrol_t> BRANCH_COMPLETE_VAL [param._nb_branch_complete]; 51 sc_signal<Tcontrol_t> BRANCH_COMPLETE_ACK [param._nb_branch_complete]; 52 sc_signal<Taddress_t> BRANCH_COMPLETE_ADDRESS [param._nb_branch_complete]; 53 sc_signal<Thistory_t> BRANCH_COMPLETE_HISTORY [param._nb_branch_complete]; 54 sc_signal<Tcontrol_t> BRANCH_COMPLETE_DIRECTION [param._nb_branch_complete]; 55 55 56 56 /******************************************************** … … 72 72 for (uint32_t i=0; i<param._nb_branch_complete; i++) 73 73 { 74 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (BRANCH_COMPLETE_VAL[i]);75 (*(_Pattern_History_Table->out_BRANCH_COMPLETE_ACK [i])) (BRANCH_COMPLETE_ACK[i]);76 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (BRANCH_COMPLETE_ADDRESS[i]);77 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (BRANCH_COMPLETE_HISTORY[i]);78 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_ HIT [i])) (BRANCH_COMPLETE_HIT[i]);74 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (BRANCH_COMPLETE_VAL [i]); 75 (*(_Pattern_History_Table->out_BRANCH_COMPLETE_ACK [i])) (BRANCH_COMPLETE_ACK [i]); 76 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (BRANCH_COMPLETE_ADDRESS [i]); 77 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (BRANCH_COMPLETE_HISTORY [i]); 78 (*(_Pattern_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (BRANCH_COMPLETE_DIRECTION [i]); 79 79 } 80 80 … … 105 105 Thistory_t history_max = (1<<param._size_counter)-1; 106 106 Thistory_t history = 0; 107 Tcontrol_t hit= 0;107 Tcontrol_t direction = 0; 108 108 109 109 while (address<param._nb_counter) 110 110 { 111 BRANCH_COMPLETE_VAL [0].write(1);112 BRANCH_COMPLETE_ADDRESS [0].write(address);113 BRANCH_COMPLETE_HISTORY [0].write(0);114 BRANCH_COMPLETE_ HIT[0].write(0);111 BRANCH_COMPLETE_VAL [0].write(1); 112 BRANCH_COMPLETE_ADDRESS [0].write(address); 113 BRANCH_COMPLETE_HISTORY [0].write(0); 114 BRANCH_COMPLETE_DIRECTION [0].write(0); 115 115 116 116 sc_start(1); … … 133 133 address = rand() % param._nb_counter ; 134 134 history = rand() % (1<<param._size_counter) ; 135 hit= rand() % 2;135 direction = rand() % 2; 136 136 137 137 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} ["+toString(num_port_branch_complete)+"]" << endl 138 138 << hex 139 << " - address : " << address << endl140 << " - history old : " << history << endl141 << " - hit : " << hit<< endl;139 << " - address : " << address << endl 140 << " - history old : " << history << endl 141 << " - direction : " << direction << endl; 142 142 143 BRANCH_COMPLETE_VAL [num_port_branch_complete].write(1);144 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete].write(address);145 BRANCH_COMPLETE_HISTORY [num_port_branch_complete].write(history);146 BRANCH_COMPLETE_ HIT [num_port_branch_complete].write(hit);143 BRANCH_COMPLETE_VAL [num_port_branch_complete].write(1); 144 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete].write(address); 145 BRANCH_COMPLETE_HISTORY [num_port_branch_complete].write(history); 146 BRANCH_COMPLETE_DIRECTION [num_port_branch_complete].write(direction); 147 147 148 148 // Wait Ack … … 157 157 PREDICT_ADDRESS [num_port_predict ].write(address); 158 158 159 history = ( hit==1)?((history<history_max)?history+1:history):((history>0)?history-1:history);159 history = (direction==1)?((history<history_max)?history+1:history):((history>0)?history-1:history); 160 160 161 161 // Wait Ack -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h
r2 r3 80 80 public : SC_IN (Taddress_t) ** in_BRANCH_COMPLETE_ADDRESS; 81 81 public : SC_IN (Thistory_t) ** in_BRANCH_COMPLETE_HISTORY; 82 public : SC_IN (Tcontrol_t) ** in_BRANCH_COMPLETE_ HIT;82 public : SC_IN (Tcontrol_t) ** in_BRANCH_COMPLETE_DIRECTION; 83 83 84 84 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 89 89 90 90 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 91 p rotected: morpheo::behavioural::generic::counter::Counter * component_Counter ;92 p rotected: morpheo::behavioural::generic::registerfile::RegisterFile * component_RegisterFile;91 public : morpheo::behavioural::generic::counter::Counter * component_Counter ; 92 public : morpheo::behavioural::generic::registerfile::RegisterFile * component_RegisterFile; 93 93 94 94 // -----[ methods ]--------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp
r2 r3 46 46 } 47 47 48 in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete];49 out_BRANCH_COMPLETE_ACK = new SC_OUT (Tcontrol_t) * [_param._nb_branch_complete];50 in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete];51 in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete];52 in_BRANCH_COMPLETE_ HIT= new SC_IN (Tcontrol_t) * [_param._nb_branch_complete];53 signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete];48 in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; 49 out_BRANCH_COMPLETE_ACK = new SC_OUT (Tcontrol_t) * [_param._nb_branch_complete]; 50 in_BRANCH_COMPLETE_ADDRESS = new SC_IN (Taddress_t) * [_param._nb_branch_complete]; 51 in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; 52 in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; 53 signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete]; 54 54 55 55 for (uint32_t i=0; i<_param._nb_branch_complete; i++) … … 67 67 in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str()); 68 68 69 rename = "in_BRANCH_COMPLETE_ HIT[" +toString(i)+"]";70 in_BRANCH_COMPLETE_ HIT[i] = new SC_IN (Tcontrol_t) (rename.c_str());69 rename = "in_BRANCH_COMPLETE_DIRECTION[" +toString(i)+"]"; 70 in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 71 71 72 72 rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; … … 95 95 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 96 96 { 97 (*(component_Counter-> in_COUNTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i]));98 (*(component_Counter-> in_COUNTER_ADDSUB [i])) (*( in_BRANCH_COMPLETE_ HIT[i]));99 (*(component_Counter->out_COUNTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i]));97 (*(component_Counter-> in_COUNTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i])); 98 (*(component_Counter-> in_COUNTER_ADDSUB [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); 99 (*(component_Counter->out_COUNTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); 100 100 } 101 101 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp
r2 r3 39 39 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 40 40 { 41 delete in_BRANCH_COMPLETE_VAL [i];42 delete out_BRANCH_COMPLETE_ACK [i];43 delete in_BRANCH_COMPLETE_ADDRESS [i];44 delete in_BRANCH_COMPLETE_HISTORY [i];45 delete in_BRANCH_COMPLETE_ HIT[i];41 delete in_BRANCH_COMPLETE_VAL [i]; 42 delete out_BRANCH_COMPLETE_ACK [i]; 43 delete in_BRANCH_COMPLETE_ADDRESS [i]; 44 delete in_BRANCH_COMPLETE_HISTORY [i]; 45 delete in_BRANCH_COMPLETE_DIRECTION [i]; 46 46 } 47 47 delete in_BRANCH_COMPLETE_VAL ; … … 49 49 delete in_BRANCH_COMPLETE_ADDRESS; 50 50 delete in_BRANCH_COMPLETE_HISTORY; 51 delete in_BRANCH_COMPLETE_ HIT;51 delete in_BRANCH_COMPLETE_DIRECTION; 52 52 53 53 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp
r2 r3 34 34 { 35 35 vhdl.set_body_component_port_map (list_port_map," in_COUNTER_DATA_"+toString(i)+" "," in_BRANCH_COMPLETE_HISTORY_"+toString(i)); 36 vhdl.set_body_component_port_map (list_port_map," in_COUNTER_ADDSUB_"+toString(i)+" "," in_BRANCH_COMPLETE_ HIT_"+toString(i) );36 vhdl.set_body_component_port_map (list_port_map," in_COUNTER_ADDSUB_"+toString(i)+" "," in_BRANCH_COMPLETE_DIRECTION_"+toString(i) ); 37 37 vhdl.set_body_component_port_map (list_port_map,"out_COUNTER_DATA_"+toString(i)+" ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i)); 38 38 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp
r2 r3 26 26 for (uint32_t i=0; i<_param._nb_prediction; i++) 27 27 { 28 vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+" ", IN, 1);29 vhdl.set_port("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1);30 vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));31 vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_counter);28 vhdl.set_port(" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); 29 vhdl.set_port("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); 30 vhdl.set_port(" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter)))); 31 vhdl.set_port("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_counter); 32 32 } 33 33 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 34 34 { 35 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1);36 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1);37 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));38 vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_counter);39 vhdl.set_port (" in_BRANCH_COMPLETE_ HIT_"+toString(i)+"", IN, 1);35 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); 36 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); 37 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter)))); 38 vhdl.set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_counter); 39 vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); 40 40 } 41 41 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp
r2 r3 24 24 for (uint32_t i=0; i<_param._nb_prediction; i++) 25 25 { 26 _vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1);27 _vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1);28 _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));29 _vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_counter);30 } 31 32 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 33 { 34 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1);35 _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1);36 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter))));37 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_counter);38 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ HIT_"+toString(i)+"", IN, 1);26 _vhdl_testbench->set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); 27 _vhdl_testbench->set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); 28 _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter)))); 29 _vhdl_testbench->set_port ("out_PREDICT_HISTORY_"+toString(i)+" ",OUT, _param._size_counter); 30 } 31 32 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 33 { 34 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); 35 _vhdl_testbench->set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); 36 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN, static_cast<uint32_t>(ceil(log2(_param._nb_counter)))); 37 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" ", IN, _param._size_counter); 38 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"", IN, 1); 39 39 } 40 40 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp
r2 r3 41 41 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 42 42 { 43 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i]));44 _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK [i]));45 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i]));46 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i]));47 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ HIT[i]));43 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); 44 _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK [i])); 45 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); 46 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i])); 47 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i])); 48 48 } 49 50 49 51 50 // add_test : 52 51 // - True : the cycle must be compare with the output of systemC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/Makefile
r2 r3 26 26 include $(DIR_MORPHEO)/Behavioural/Makefile.defs 27 27 include $(DIR_MORPHEO)/Behavioural/Makefile.Common 28 include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest 28 29 include $(DIR_MORPHEO)/Behavioural/Makefile.Synthesis 29 include $(DIR_MORPHEO)/Behavioural/Makefile.Selftest -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/configuration.cfg
r2 r3 1 1 Two_Level_Branch_Predictor 2 2 1 1 +1 # have_bht 3 6 6+1 # bht_size_shifter3 6 8 +1 # bht_size_shifter 4 4 64 64 *2 # bht_nb_shifter 5 11 +1 # have_pht5 0 1 +1 # have_pht 6 6 4 4 +1 # pht_size_counter 7 256 256 +2 # pht_nb_counter8 22 +1 # pht_size_address_share7 256 512 *2 # pht_nb_counter 8 0 2 +1 # pht_size_address_share 9 9 16 16 +1 # size_address 10 10 1 1 +1 # nb_prediction -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/mkf.info
r2 r3 1 2 # Two_Level_Branch_Predictor_0 3 target_dep all Two_Level_Branch_Predictor_0.ngc 4 target_dep Two_Level_Branch_Predictor_0.ngc Two_Level_Branch_Predictor_0.prj 5 target_dep Two_Level_Branch_Predictor_0.prj Two_Level_Branch_Predictor_0_Branch_History_Table_Pack.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_RegisterFile_Pack.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_RegisterFile.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_Shifter_Pack.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_Shifter.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table.vhdl Two_Level_Branch_Predictor_0_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_Counter_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_Counter.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_RegisterFile_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_RegisterFile.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table.vhdl Two_Level_Branch_Predictor_0_Two_Level_Branch_Predictor_Glue_Pack.vhdl Two_Level_Branch_Predictor_0_Two_Level_Branch_Predictor_Glue.vhdl Two_Level_Branch_Predictor_0.vhdl 6 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/test.cpp
r2 r3 7 7 */ 8 8 9 #define NB_ITERATION 19 #define NB_ITERATION 512 10 10 11 11 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/include/test.h" 12 12 #include "Include/Test.h" 13 13 #include "Include/BitManipulation.h" 14 14 void test (string name, 15 15 morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::Parameters param) … … 28 28 * Déclarations des signaux 29 29 *********************************************************************/ 30 sc_clock * CLOCK ("clock", 1.0, 0.5);30 sc_clock * CLOCK; 31 31 32 32 sc_signal<Tcontrol_t> * PREDICT_VAL [param._nb_prediction]; … … 41 41 sc_signal<Tbht_history_t> * BRANCH_COMPLETE_BHT_HISTORY [param._nb_branch_complete]; 42 42 sc_signal<Tpht_history_t> * BRANCH_COMPLETE_PHT_HISTORY [param._nb_branch_complete]; 43 sc_signal<Tcontrol_t> * BRANCH_COMPLETE_ HIT[param._nb_branch_complete];43 sc_signal<Tcontrol_t> * BRANCH_COMPLETE_DIRECTION [param._nb_branch_complete]; 44 44 45 45 // Rename signal … … 75 75 rename = "BRANCH_COMPLETE_PHT_HISTORY_"+toString(i); 76 76 BRANCH_COMPLETE_PHT_HISTORY [i] = new sc_signal<Tpht_history_t> (rename.c_str()); 77 rename = "BRANCH_COMPLETE_ HIT_"+toString(i);78 BRANCH_COMPLETE_ HIT[i] = new sc_signal<Tcontrol_t> (rename.c_str());77 rename = "BRANCH_COMPLETE_DIRECTION_" +toString(i); 78 BRANCH_COMPLETE_DIRECTION [i] = new sc_signal<Tcontrol_t> (rename.c_str()); 79 79 } 80 80 … … 86 86 87 87 (*(_Two_Level_Branch_Predictor->in_CLOCK)) (*(CLOCK)); 88 89 90 91 92 93 94 95 96 if (param._have_pht) 97 98 88 89 for (uint32_t i=0; i<param._nb_prediction; i++) 90 { 91 (*(_Two_Level_Branch_Predictor-> in_PREDICT_VAL [i])) (*(PREDICT_VAL [i])); 92 (*(_Two_Level_Branch_Predictor->out_PREDICT_ACK [i])) (*(PREDICT_ACK [i])); 93 (*(_Two_Level_Branch_Predictor-> in_PREDICT_ADDRESS [i])) (*(PREDICT_ADDRESS [i])); 94 if (param._have_bht) 95 (*(_Two_Level_Branch_Predictor->out_PREDICT_BHT_HISTORY [i])) (*(PREDICT_BHT_HISTORY [i])); 96 if (param._have_pht) 97 (*(_Two_Level_Branch_Predictor->out_PREDICT_PHT_HISTORY [i])) (*(PREDICT_PHT_HISTORY [i])); 98 } 99 99 100 100 for (uint32_t i=0; i<param._nb_branch_complete; i++) … … 105 105 if (param._have_bht) 106 106 (*(_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_BHT_HISTORY [i])) (*(BRANCH_COMPLETE_BHT_HISTORY [i])); 107 if (param._have_ bht)107 if (param._have_pht) 108 108 (*(_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_PHT_HISTORY [i])) (*(BRANCH_COMPLETE_PHT_HISTORY [i])); 109 (*(_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_ HIT [i])) (*(BRANCH_COMPLETE_HIT[i]));109 (*(_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_DIRECTION [i])) (*(BRANCH_COMPLETE_DIRECTION [i])); 110 110 } 111 111 … … 121 121 122 122 srand(seed); 123 124 const uint32_t num_port_predict = rand()%param._nb_prediction; 125 const uint32_t num_port_branch_complete = rand()%param._nb_branch_complete; 126 const Taddress_t address = rand()%param._size_address; 127 Tcontrol_t direction; 123 128 124 129 sc_start(0); … … 133 138 134 139 // Step 1 135 BRANCH_COMPLETE_VAL [0]->write(1); 136 BRANCH_COMPLETE_HIT [0]->write(0); 140 BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(1); 141 BRANCH_COMPLETE_DIRECTION [num_port_branch_complete]->write(0); 142 143 if (param._have_pht) 144 { 145 // Step 1.1 -> pattern_history_table 146 147 // Step 1.1.1 compute number of group. 148 uint32_t size_address_shift=0; 149 150 if (param._have_bht) 151 size_address_shift=param._param_two_level_branch_predictor_glue->_pht_size_address_shift; 152 153 uint32_t nb_group = (1<<size_address_shift); 154 uint32_t nb_reg_by_group = (1<<(param._pht_size_address-size_address_shift)); 155 156 _Two_Level_Branch_Predictor->vhdl_testbench_label("Init pht"); 157 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Init pht" << endl; 158 159 BRANCH_COMPLETE_PHT_HISTORY [num_port_branch_complete]->write(0); 160 161 // Step 1.1.2 for all group ... 162 for (uint32_t i=0; i<nb_group; i++) 163 { 164 if (param._have_bht) 165 BRANCH_COMPLETE_BHT_HISTORY [num_port_branch_complete]->write(i); 166 167 for (uint32_t j=0; j<nb_reg_by_group; j++) 168 { 169 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete]->write(j); 170 171 sc_start(1); 172 173 // wait ackwolegde 174 while (BRANCH_COMPLETE_ACK [num_port_branch_complete] -> read() == 0) 175 sc_start(1); 176 } 177 } 178 } 137 179 138 180 if (param._have_bht) 139 181 { 140 BRANCH_COMPLETE_BHT_HISTORY [0]->write(0); 182 // Step 1.2 -> branch_history_table 183 BRANCH_COMPLETE_BHT_HISTORY [num_port_branch_complete]->write(0); 141 184 142 185 _Two_Level_Branch_Predictor->vhdl_testbench_label("Init bht"); … … 145 188 for (uint32_t i=0; i<param._bht_nb_shifter; i++) 146 189 { 147 BRANCH_COMPLETE_ADDRESS [ 0]->write(i);190 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete]->write(i); 148 191 149 192 sc_start(1); … … 151 194 152 195 // wait ackwolegde 153 while (BRANCH_COMPLETE_ACK [ 0] -> read() == 0)196 while (BRANCH_COMPLETE_ACK [num_port_branch_complete] -> read() == 0) 154 197 sc_start(1); 155 198 } 156 199 157 if (param._have_pht) 158 { 159 BRANCH_COMPLETE_BHT_HISTORY [0]->write(0); 160 BRANCH_COMPLETE_PHT_HISTORY [0]->write(0); 161 162 _Two_Level_Branch_Predictor->vhdl_testbench_label("Init bht"); 163 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Init bht" << endl; 164 165 for (uint32_t i=0; i<param._bht_nb_shifter; i++) 166 { 167 BRANCH_COMPLETE_ADDRESS [0]->write(i); 168 169 sc_start(1); 170 } 200 // Step 2 201 BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(0); 202 PREDICT_ADDRESS [num_port_predict ]->write(address); 203 BRANCH_COMPLETE_ADDRESS [num_port_branch_complete]->write(address); 204 205 _Two_Level_Branch_Predictor->vhdl_testbench_label("Loop of Test"); 206 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl 207 << " * predict_address : " << hex << address << dec << endl; 208 209 // A lot of prediction 210 Tbht_history_t bht_history = 0; 211 Tpht_history_t pht_history [1<<param._bht_size_shifter]; 212 213 for (uint32_t i=0; i<static_cast<uint32_t>(1<<param._bht_size_shifter); i++) 214 pht_history [i] = 0; 215 216 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) 217 { 218 _Two_Level_Branch_Predictor->vhdl_testbench_label("Iteration "+toString(iteration)); 219 220 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Predict : bht_history " << bht_history << " - pht_history " << pht_history[bht_history] << endl; 221 222 // Ask a new prediction 223 PREDICT_VAL [num_port_predict ]->write(1); 224 225 sc_start(1); 171 226 172 227 // wait ackwolegde 173 while ( BRANCH_COMPLETE_ACK [0] -> read() == 0)228 while (PREDICT_ACK [num_port_predict] -> read() == 0) 174 229 sc_start(1); 175 } 176 177 178 179 // Step 2 180 _Two_Level_Branch_Predictor->vhdl_testbench_label("Loop of Test"); 181 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl; 182 183 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) 184 { 185 _Two_Level_Branch_Predictor->vhdl_testbench_label("Iteration "+toString(iteration)); 230 PREDICT_ACK [num_port_predict ]->write(0); 231 232 sc_start(0); 233 234 // Test 235 if (param._have_bht) 236 TEST(Tbht_history_t,bht_history ,PREDICT_BHT_HISTORY[num_port_predict]->read()); 237 if (param._have_pht) 238 TEST(Tpht_history_t,pht_history[bht_history],PREDICT_PHT_HISTORY[num_port_predict]->read()); 239 240 // update 241 direction = ((rand()%2)==1); 242 243 BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(1); 244 if (param._have_bht) 245 BRANCH_COMPLETE_BHT_HISTORY [num_port_branch_complete]->write(bht_history ); 246 247 248 if (param._have_pht) 249 BRANCH_COMPLETE_PHT_HISTORY [num_port_branch_complete]->write(pht_history[bht_history]); 250 BRANCH_COMPLETE_DIRECTION [num_port_branch_complete]->write(direction); 251 252 if (param._have_pht) 253 if (direction == 0) 254 { 255 if (pht_history[bht_history] > 0) 256 pht_history[bht_history] --; 257 } 258 else 259 { 260 if (pht_history[bht_history] < (static_cast<Tpht_history_t>(1<<param._pht_size_counter)-1)) 261 pht_history[bht_history] ++; 262 } 263 264 if (param._have_bht) 265 bht_history = (((bht_history) << 1) | direction) & gen_mask<Tbht_history_t>(param._bht_size_shifter); 186 266 187 267 sc_start(1); 268 269 // wait ackwolegde 270 while (BRANCH_COMPLETE_ACK [num_port_branch_complete] -> read() == 0) 271 sc_start(1); 272 273 BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(0); 188 274 } 189 275 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue.cpp
r2 r3 47 47 _vhdl_testbench = new Vhdl_Testbench (_name); 48 48 vhdl_testbench_port (); 49 _vhdl_testbench->set_clock ("in_CLOCK", true);49 _vhdl_testbench->set_clock ("in_CLOCK",false); 50 50 #endif 51 51 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_genMealy_branch_complete_pht_address.cpp
r2 r3 26 26 { 27 27 // Address 28 Taddress_t address = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]);28 Taddress_t address = PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]); 29 29 Tbht_history_t history = 0; 30 30 … … 34 34 address = address << _param._pht_size_address_shift; 35 35 } 36 37 Taddress_t pht_address = (history ^ address) & gen_mask<Taddress_t>(_param._pht_size_address); 38 39 log_printf(TRACE,Two_Level_Branch_Predictor_Glue,"genMealy_branch_complete_address","out_BRANCH_COMPLETE_PHT_ADDRESS [%d]= %.8x xor %.8x<<%d = %.8x",i,history,PORT_READ(in_BRANCH_COMPLETE_ADDRESS [i]),_param._pht_size_address_shift, pht_address); 36 40 37 PORT_WRITE (out_BRANCH_COMPLETE_PHT_ADDRESS [i], (history xor address) & gen_mask<Taddress_t>(_param._pht_size_address));41 PORT_WRITE (out_BRANCH_COMPLETE_PHT_ADDRESS [i], pht_address); 38 42 } 39 43 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_genMealy_predict_bht_address.cpp
r2 r3 26 26 { 27 27 // Address 28 Taddress_t address = PORT_READ(in_PREDICT_ADDRESS [i]); 28 Taddress_t address = PORT_READ(in_PREDICT_ADDRESS [i]); 29 Taddress_t bht_address = range<Taddress_t>(_param._size_address, address, _param._bht_size_address); 29 30 30 PORT_WRITE (out_PREDICT_BHT_ADDRESS [i], range<Taddress_t>(_param._size_address, address, _param._bht_size_address));31 PORT_WRITE (out_PREDICT_BHT_ADDRESS [i], bht_address); 31 32 } 32 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/src/Two_Level_Branch_Predictor_Glue_vhdl_port.cpp
r2 r3 21 21 { 22 22 log_printf(FUNC,Two_Level_Branch_Predictor_Glue,"vhdl_port","Begin"); 23 24 vhdl.set_port (" in_CLOCK" , IN, 1);25 23 26 24 for (uint32_t i=0; i<_param._nb_prediction; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h
r2 r3 84 84 public : SC_IN (Tbht_history_t) ** in_BRANCH_COMPLETE_BHT_HISTORY; 85 85 public : SC_IN (Tpht_history_t) ** in_BRANCH_COMPLETE_PHT_HISTORY; 86 public : SC_IN (Tcontrol_t) ** in_BRANCH_COMPLETE_ HIT;86 public : SC_IN (Tcontrol_t) ** in_BRANCH_COMPLETE_DIRECTION ; 87 87 88 88 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 93 93 private : SC_SIGNAL(Taddress_t) ** signal_PREDICT_BHT_ADDRESS ; 94 94 private : SC_SIGNAL(Taddress_t) ** signal_PREDICT_PHT_ADDRESS ; 95 private : SC_SIGNAL(Tbht_history_t) ** signal_PREDICT_BHT_HISTORY ;96 95 97 96 private : SC_SIGNAL(Tcontrol_t) ** signal_BRANCH_COMPLETE_BHT_ACK ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters.cpp
r2 r3 32 32 _pht_size_counter ((_have_pht == true)?pht_size_counter:0), 33 33 _pht_nb_counter ((_have_pht == true)?pht_nb_counter :0), 34 _pht_size_address_share ( pht_size_address_share),34 _pht_size_address_share (((_have_bht and _have_pht) == true)?pht_size_address_share:0), 35 35 _size_address (size_address ), 36 36 _nb_prediction (nb_prediction ), … … 41 41 log_printf(FUNC,Two_Level_Branch_Predictor,"Parameters","Begin"); 42 42 43 if (_have_bht) 43 44 _param_branch_history_table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::branch_history_table ::Parameters (_bht_size_shifter , 44 45 _bht_nb_shifter , 45 46 _nb_prediction , 46 47 _nb_branch_complete); 48 if (_have_pht) 47 49 _param_pattern_history_table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::pattern_history_table::Parameters (_pht_size_counter , 48 50 _pht_nb_counter , … … 82 84 log_printf(FUNC,Two_Level_Branch_Predictor,"Parameters","Begin"); 83 85 86 if (_have_bht) 84 87 _param_branch_history_table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::branch_history_table ::Parameters (_bht_size_shifter , 85 88 _bht_nb_shifter , 86 89 _nb_prediction , 87 90 _nb_branch_complete); 91 if (_have_pht) 88 92 _param_pattern_history_table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::pattern_history_table::Parameters (_pht_size_counter , 89 93 _pht_nb_counter , … … 109 113 log_printf(FUNC,Two_Level_Branch_Predictor,"~Parameters","Begin"); 110 114 115 if (_have_bht) 111 116 delete _param_branch_history_table; 117 if (_have_pht) 112 118 delete _param_pattern_history_table; 113 119 delete _param_two_level_branch_predictor_glue; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Parameters_msg_error.cpp
r2 r3 65 65 } 66 66 67 // if ( not _have_bht and (_pht_size_address_share != 0)) 68 // { 69 // msg += " - you have no Branch History Table but size_address_share is > 0\n"; 70 // msg += " * have_bht : " + toString(_have_bht ) + "\n"; 71 // msg += " * pht_size_address_share : " + toString(_pht_size_address_share) + "\n"; 72 // } 73 67 74 return msg; 68 75 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp
r2 r3 35 35 signal_PREDICT_BHT_ACK = new SC_SIGNAL(Tcontrol_t) * [_param._nb_prediction]; 36 36 signal_PREDICT_BHT_ADDRESS = new SC_SIGNAL(Taddress_t) * [_param._nb_prediction]; 37 signal_PREDICT_BHT_HISTORY = new SC_SIGNAL(Tbht_history_t) * [_param._nb_prediction];38 37 } 39 38 if (_param._have_pht) … … 45 44 for (uint32_t i=0; i<_param._nb_prediction; i++) 46 45 { 47 rename = " in_PREDICT_VAL_"+toString(i);46 rename = "in_PREDICT_VAL_" +toString(i); 48 47 in_PREDICT_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 49 48 … … 51 50 out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); 52 51 53 rename = " in_PREDICT_ADDRESS_"+toString(i);52 rename = "in_PREDICT_ADDRESS_" +toString(i); 54 53 in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); 55 54 … … 73 72 rename = "signal_PREDICT_BHT_ADDRESS_"+toString(i); 74 73 signal_PREDICT_BHT_ADDRESS [i] = new SC_SIGNAL(Taddress_t) (rename.c_str()); 75 76 rename = "signal_PREDICT_BHT_HISTORY_"+toString(i);77 signal_PREDICT_BHT_HISTORY [i] = new SC_SIGNAL(Tbht_history_t) (rename.c_str());78 74 } 79 75 … … 95 91 if (_param._have_pht) 96 92 in_BRANCH_COMPLETE_PHT_HISTORY = new SC_IN (Tpht_history_t) * [_param._nb_branch_complete]; 97 in_BRANCH_COMPLETE_ HIT= new SC_IN (Tcontrol_t) * [_param._nb_branch_complete];93 in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; 98 94 if (_param._have_bht) 99 95 { … … 109 105 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 110 106 { 111 rename = " in_BRANCH_COMPLETE_VAL_"+toString(i);107 rename = "in_BRANCH_COMPLETE_VAL_" +toString(i); 112 108 in_BRANCH_COMPLETE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 113 109 … … 115 111 out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); 116 112 117 rename = " in_BRANCH_COMPLETE_ADDRESS_"+toString(i);113 rename = "in_BRANCH_COMPLETE_ADDRESS_" +toString(i); 118 114 in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); 119 115 120 116 if (_param._have_bht) 121 117 { 122 rename = " 118 rename = "in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i); 123 119 in_BRANCH_COMPLETE_BHT_HISTORY [i] = new SC_IN (Tbht_history_t) (rename.c_str()); 124 120 } 125 if (_param._have_ bht)126 { 127 rename = " 121 if (_param._have_pht) 122 { 123 rename = "in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i); 128 124 in_BRANCH_COMPLETE_PHT_HISTORY [i] = new SC_IN (Tpht_history_t) (rename.c_str()); 129 125 } 130 rename = " in_BRANCH_COMPLETE_HIT_"+toString(i);131 in_BRANCH_COMPLETE_ HIT[i] = new SC_IN (Tcontrol_t) (rename.c_str());126 rename = "in_BRANCH_COMPLETE_DIRECTION_" +toString(i); 127 in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 132 128 if (_param._have_bht) 133 129 { … … 155 151 { 156 152 name_component = _name+"_Branch_History_Table"; 153 154 log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); 157 155 158 156 component_Branch_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::branch_history_table ::Branch_History_Table (name_component.c_str() , … … 170 168 (*(component_Branch_History_Table->out_PREDICT_ACK [i])) (*(signal_PREDICT_BHT_ACK [i])); 171 169 (*(component_Branch_History_Table-> in_PREDICT_ADDRESS [i])) (*(signal_PREDICT_BHT_ADDRESS [i])); 172 (*(component_Branch_History_Table->out_PREDICT_HISTORY [i])) (*( signal_PREDICT_BHT_HISTORY [i]));170 (*(component_Branch_History_Table->out_PREDICT_HISTORY [i])) (*( out_PREDICT_BHT_HISTORY [i])); 173 171 } 174 172 175 173 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 176 174 { 177 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i]));178 (*(component_Branch_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i]));179 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i]));180 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i]));181 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_ HIT [i])) (*( in_BRANCH_COMPLETE_HIT[i]));175 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); 176 (*(component_Branch_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i])); 177 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i])); 178 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i])); 179 (*(component_Branch_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); 182 180 } 183 181 } … … 187 185 { 188 186 name_component = _name+"_Pattern_History_Table"; 187 188 log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); 189 189 190 190 component_Pattern_History_Table = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::pattern_history_table::Pattern_History_Table (name_component.c_str() , … … 207 207 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 208 208 { 209 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i]));210 (*(component_Pattern_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i]));211 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i]));212 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_PHT_HISTORY [i]));213 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_ HIT [i])) (*( in_BRANCH_COMPLETE_HIT[i]));209 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); 210 (*(component_Pattern_History_Table->out_BRANCH_COMPLETE_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i])); 211 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i])); 212 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_HISTORY [i])) (*( in_BRANCH_COMPLETE_PHT_HISTORY [i])); 213 (*(component_Pattern_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); 214 214 } 215 215 } 216 216 217 217 // =====[ component_Two_Level_Branch_Predictor_Glue ]=========================== 218 if (_param._have_pht)219 {220 name_component = _name+"_Two_Level_Branch_Predictor_Glue";221 222 218 name_component = _name+"_Two_Level_Branch_Predictor_Glue"; 219 220 log_printf(INFO,Two_Level_Branch_Predictor,"allocation","Allocation : %s",name_component.c_str()); 221 222 component_Two_Level_Branch_Predictor_Glue = new morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::two_level_branch_predictor_glue::Two_Level_Branch_Predictor_Glue (name_component.c_str() , 223 223 #ifdef STATISTICS 224 225 #endif 226 227 228 224 _param_statistics , 225 #endif 226 *(_param._param_two_level_branch_predictor_glue)); 227 228 // Instantiation 229 229 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 230 230 (*(component_Two_Level_Branch_Predictor_Glue->in_CLOCK)) (*(in_CLOCK)); 231 231 #endif 232 233 234 235 232 for (uint32_t i=0; i<_param._nb_prediction; i++) 233 { 234 if (_param._have_bht) 235 { 236 236 (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_ACK [i])) (*(signal_PREDICT_BHT_ACK [i])); 237 237 (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_BHT_ADDRESS [i])) (*(signal_PREDICT_BHT_ADDRESS [i])); 238 239 240 238 } 239 if (_param._have_pht) 240 { 241 241 (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_PHT_ACK [i])) (*(signal_PREDICT_PHT_ACK [i])); 242 242 (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_PHT_ADDRESS [i])) (*(signal_PREDICT_PHT_ADDRESS [i])); 243 244 245 246 (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_HISTORY [i])) (*( signal_PREDICT_BHT_HISTORY [i]));247 248 249 250 251 252 253 254 255 243 } 244 if (_param._have_bht and _param._have_pht) 245 { 246 (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_BHT_HISTORY [i])) (*( out_PREDICT_BHT_HISTORY [i])); 247 } 248 (*(component_Two_Level_Branch_Predictor_Glue->out_PREDICT_ACK [i])) (*( out_PREDICT_ACK [i])); 249 (*(component_Two_Level_Branch_Predictor_Glue-> in_PREDICT_ADDRESS [i])) (*( in_PREDICT_ADDRESS [i])); 250 } 251 252 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 253 { 254 if (_param._have_bht) 255 { 256 256 (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_BHT_ACK [i])) (*(signal_BRANCH_COMPLETE_BHT_ACK [i])); 257 257 (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_BHT_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_BHT_ADDRESS [i])); 258 259 260 258 } 259 if (_param._have_pht) 260 { 261 261 (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_PHT_ACK [i])) (*(signal_BRANCH_COMPLETE_PHT_ACK [i])); 262 262 (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_PHT_ADDRESS [i])) (*(signal_BRANCH_COMPLETE_PHT_ADDRESS [i])); 263 264 265 263 } 264 if (_param._have_bht and _param._have_pht) 265 { 266 266 (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_BHT_HISTORY [i])) (*( in_BRANCH_COMPLETE_BHT_HISTORY [i])); 267 } 268 (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); 269 (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); 270 } 271 } 272 267 } 268 (*(component_Two_Level_Branch_Predictor_Glue->out_BRANCH_COMPLETE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); 269 (*(component_Two_Level_Branch_Predictor_Glue-> in_BRANCH_COMPLETE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); 270 } 271 273 272 log_printf(FUNC,Two_Level_Branch_Predictor,"allocation","End"); 274 273 }; 275 274 276 275 }; // end namespace two_level_branch_predictor 277 276 }; // end namespace meta_predictor -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp
r2 r3 35 35 delete signal_PREDICT_BHT_ACK [i]; 36 36 delete signal_PREDICT_BHT_ADDRESS [i]; 37 delete signal_PREDICT_BHT_HISTORY [i];38 37 } 39 38 if (_param._have_pht) … … 56 55 delete signal_PREDICT_BHT_ACK ; 57 56 delete signal_PREDICT_BHT_ADDRESS; 58 delete signal_PREDICT_BHT_HISTORY;59 57 } 60 58 if (_param._have_pht) … … 71 69 if (_param._have_bht) 72 70 delete in_BRANCH_COMPLETE_BHT_HISTORY [i]; 73 if (_param._have_ bht)71 if (_param._have_pht) 74 72 delete in_BRANCH_COMPLETE_PHT_HISTORY [i]; 75 delete in_BRANCH_COMPLETE_ HIT[i];73 delete in_BRANCH_COMPLETE_DIRECTION [i]; 76 74 if (_param._have_bht) 77 75 { … … 93 91 if (_param._have_pht) 94 92 delete in_BRANCH_COMPLETE_PHT_HISTORY; 95 delete in_BRANCH_COMPLETE_ HIT;93 delete in_BRANCH_COMPLETE_DIRECTION ; 96 94 if (_param._have_bht) 97 95 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_statistics.cpp
r2 r3 22 22 log_printf(FUNC,Two_Level_Branch_Predictor,"statistics","Begin"); 23 23 24 string stat_component_Branch_History_Table = (_param._have_bht==false)?"":component_Branch_History_Table ->statistics(depth+1); 25 string stat_component_Pattern_History_Table = (_param._have_pht==false)?"":component_Pattern_History_Table ->statistics(depth+1); 26 24 27 string txt = _stat->print(depth, 25 component_Branch_History_Table ->statistics(depth+1)+26 component_Pattern_History_Table ->statistics(depth+1)+28 stat_component_Branch_History_Table + 29 stat_component_Pattern_History_Table + 27 30 component_Two_Level_Branch_Predictor_Glue->statistics(depth+1) 28 31 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl.cpp
r2 r3 24 24 25 25 vhdl.set_library_work (_name + "_Pack"); 26 26 if (_param._have_bht) 27 vhdl.set_library_work (_name + "_Branch_History_Table_Pack"); 28 if (_param._have_pht) 29 vhdl.set_library_work (_name + "_Pattern_History_Table_Pack"); 30 vhdl.set_library_work (_name + "_Two_Level_Branch_Predictor_Glue_Pack"); 31 27 32 vhdl_port (vhdl); 28 33 vhdl_declaration (vhdl); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp
r2 r3 20 20 { 21 21 log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","Begin"); 22 vhdl.set_body (""); 22 23 list<string> list_port_map; 24 25 if (_param._have_bht) 26 { 27 list_port_map.clear(); 28 29 vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); 30 31 for (uint32_t i=0; i<_param._nb_prediction; i++) 32 { 33 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); 34 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" ","signal_PREDICT_BHT_ACK_"+toString(i)); 35 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" ","signal_PREDICT_BHT_ADDRESS_"+toString(i)); 36 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+" ","signal_PREDICT_BHT_HISTORY_"+toString(i)); 37 } 38 39 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 40 { 41 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)); 42 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i)); 43 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)); 44 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" "," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)); 45 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+""," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)); 46 } 47 48 vhdl.set_body_component ("component_Branch_History_Table",_name+"_Branch_History_Table",list_port_map); 49 } 50 51 if (_param._have_pht) 52 { 53 list_port_map.clear(); 54 55 vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); 56 57 for (uint32_t i=0; i<_param._nb_prediction; i++) 58 { 59 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); 60 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" ","signal_PREDICT_PHT_ACK_"+toString(i)); 61 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" ","signal_PREDICT_PHT_ADDRESS_"+toString(i)); 62 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+" "," out_PREDICT_PHT_HISTORY_"+toString(i)); 63 } 64 65 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 66 { 67 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)); 68 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i)); 69 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)); 70 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" "," in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)); 71 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+""," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)); 72 } 73 74 vhdl.set_body_component ("component_Pattern_History_Table",_name+"_Pattern_History_Table",list_port_map); 75 } 76 77 list_port_map.clear(); 78 79 for (uint32_t i=0; i<_param._nb_prediction; i++) 80 { 81 if (_param._have_bht) 82 { 83 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_BHT_ACK_"+toString(i)+" ","signal_PREDICT_BHT_ACK_"+toString(i)); 84 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_BHT_ADDRESS_"+toString(i)+" ","signal_PREDICT_BHT_ADDRESS_"+toString(i)); 85 } 86 if (_param._have_pht) 87 { 88 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PHT_ACK_"+toString(i)+" ","signal_PREDICT_PHT_ACK_"+toString(i)); 89 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_PHT_ADDRESS_"+toString(i)+" ","signal_PREDICT_PHT_ADDRESS_"+toString(i)); 90 } 91 if (_param._have_bht and _param._have_pht) 92 { 93 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_BHT_HISTORY_"+toString(i)+" ","signal_PREDICT_BHT_HISTORY_"+toString(i)); 94 } 95 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" "," out_PREDICT_ACK_"+toString(i)); 96 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i)); 97 } 98 99 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 100 { 101 if (_param._have_bht) 102 { 103 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i)); 104 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)+"","signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)); 105 } 106 if (_param._have_pht) 107 { 108 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PHT_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i)); 109 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+"","signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)); 110 } 111 if (_param._have_bht and _param._have_pht) 112 { 113 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+""," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)); 114 } 115 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" "," out_BRANCH_COMPLETE_ACK_"+toString(i)); 116 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" "," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)); 117 } 118 119 vhdl.set_body_component ("component_Two_Level_Branch_Predictor_Glue",_name+"_Two_Level_Branch_Predictor_Glue",list_port_map); 120 121 if (_param._have_bht) 122 for (uint32_t i=0; i<_param._nb_prediction; i++) 123 vhdl.set_body("out_PREDICT_BHT_HISTORY_"+toString(i)+" <= signal_PREDICT_BHT_HISTORY_"+toString(i)+";"); 124 23 125 log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","End"); 24 126 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_declaration.cpp
r2 r3 20 20 { 21 21 log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_declaration","Begin"); 22 23 for (uint32_t i=0; i<_param._nb_prediction; i++) 24 { 25 if (_param._have_bht) 26 { 27 vhdl.set_signal ("signal_PREDICT_BHT_ACK_"+toString(i), 1); 28 vhdl.set_signal ("signal_PREDICT_BHT_ADDRESS_"+toString(i), _param._bht_size_address); 29 vhdl.set_signal ("signal_PREDICT_BHT_HISTORY_"+toString(i), _param._bht_size_shifter); 30 } 31 if (_param._have_pht) 32 { 33 vhdl.set_signal ("signal_PREDICT_PHT_ACK_"+toString(i), 1); 34 vhdl.set_signal ("signal_PREDICT_PHT_ADDRESS_"+toString(i), _param._pht_size_address); 35 } 36 } 37 38 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 39 { 40 if (_param._have_bht) 41 { 42 vhdl.set_signal ("signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i), 1); 43 vhdl.set_signal ("signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i), _param._bht_size_address); 44 } 45 if (_param._have_pht) 46 { 47 vhdl.set_signal ("signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i), 1); 48 vhdl.set_signal ("signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i), _param._pht_size_address); 49 } 50 } 22 51 log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_declaration","End"); 23 52 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_port.cpp
r2 r3 16 16 namespace two_level_branch_predictor { 17 17 18 19 18 void Two_Level_Branch_Predictor::vhdl_port (Vhdl & vhdl) 20 19 { … … 25 24 for (uint32_t i=0; i<_param._nb_prediction; i++) 26 25 { 27 vhdl.set_port (" in_PREDICT_VAL_" +toString(i), IN, 1);28 vhdl.set_port ("out_PREDICT_ACK_" +toString(i),OUT, 1);29 vhdl.set_port (" in_PREDICT_ADDRESS_" +toString(i), IN,_param._size_address);26 vhdl.set_port (" in_PREDICT_VAL_"+toString(i)+" ", IN, 1); 27 vhdl.set_port ("out_PREDICT_ACK_"+toString(i)+" ",OUT, 1); 28 vhdl.set_port (" in_PREDICT_ADDRESS_"+toString(i)+" ", IN,_param._size_address); 30 29 if (_param._have_bht) 31 vhdl.set_port ("out_PREDICT_BHT_HISTORY_"+toString(i) ,OUT,static_cast<uint32_t>(ceil(log2(_param._bht_nb_shifter))));30 vhdl.set_port ("out_PREDICT_BHT_HISTORY_"+toString(i)+" ",OUT,_param._bht_size_shifter); 32 31 if (_param._have_pht) 33 vhdl.set_port ("out_PREDICT_PHT_HISTORY_"+toString(i) ,OUT,static_cast<uint32_t>(ceil(log2(_param._pht_nb_counter))));32 vhdl.set_port ("out_PREDICT_PHT_HISTORY_"+toString(i)+" ",OUT,_param._pht_size_counter); 34 33 } 35 34 36 35 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 37 36 { 38 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_" +toString(i), IN, 1);39 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_" +toString(i),OUT, 1);40 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_" +toString(i), IN,_param._size_address);37 vhdl.set_port (" in_BRANCH_COMPLETE_VAL_"+toString(i)+" ", IN, 1); 38 vhdl.set_port ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" ",OUT, 1); 39 vhdl.set_port (" in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ", IN,_param._size_address); 41 40 if (_param._have_bht) 42 vhdl.set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i) , IN,static_cast<uint32_t>(ceil(log2(_param._bht_nb_shifter))));43 if (_param._have_ bht)44 vhdl.set_port (" in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i) , IN,static_cast<uint32_t>(ceil(log2(_param._pht_nb_counter))));45 vhdl.set_port (" in_BRANCH_COMPLETE_ HIT_" +toString(i), IN, 1);41 vhdl.set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+"", IN,_param._bht_size_shifter); 42 if (_param._have_pht) 43 vhdl.set_port (" in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)+"", IN,_param._pht_size_counter); 44 vhdl.set_port (" in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+" ", IN, 1); 46 45 } 47 46 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_port.cpp
r2 r3 27 27 _vhdl_testbench->set_port (" in_PREDICT_ADDRESS_" +toString(i), IN,_param._size_address); 28 28 if (_param._have_bht) 29 _vhdl_testbench->set_port ("out_PREDICT_BHT_HISTORY_"+toString(i),OUT, static_cast<uint32_t>(ceil(log2(_param._bht_nb_shifter))));29 _vhdl_testbench->set_port ("out_PREDICT_BHT_HISTORY_"+toString(i),OUT,_param._bht_size_shifter); 30 30 if (_param._have_pht) 31 _vhdl_testbench->set_port ("out_PREDICT_PHT_HISTORY_"+toString(i),OUT, static_cast<uint32_t>(ceil(log2(_param._pht_nb_counter))));31 _vhdl_testbench->set_port ("out_PREDICT_PHT_HISTORY_"+toString(i),OUT,_param._pht_size_counter); 32 32 } 33 33 … … 38 38 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ADDRESS_" +toString(i), IN,_param._size_address); 39 39 if (_param._have_bht) 40 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i), IN, static_cast<uint32_t>(ceil(log2(_param._bht_nb_shifter))));41 if (_param._have_ bht)42 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i), IN, static_cast<uint32_t>(ceil(log2(_param._pht_nb_counter))));43 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_ HIT_"+toString(i), IN, 1);40 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i), IN,_param._bht_size_shifter); 41 if (_param._have_pht) 42 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i), IN,_param._pht_size_counter); 43 _vhdl_testbench->set_port (" in_BRANCH_COMPLETE_DIRECTION_" +toString(i), IN, 1); 44 44 } 45 45 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp
r2 r3 29 29 // (because we have no control on the ordonnancer's policy) 30 30 31 // _vhdl_testbench->add_input (PORT_READ( in_NRESET));32 31 for (uint32_t i=0; i<_param._nb_prediction; i++) 33 32 { 34 _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL [i])); 35 _vhdl_testbench->add_output(PORT_READ(out_PREDICT_ACK [i])); 36 _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); 33 _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL [i])); 34 _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue-> 35 out_PREDICT_ACK [i])); 36 _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); 37 37 if (_param._have_bht) 38 _vhdl_testbench->add_output(PORT_READ(out_PREDICT_BHT_HISTORY [i])); 38 _vhdl_testbench->add_output(PORT_READ(component_Branch_History_Table -> 39 component_RegisterFile -> 40 out_READ_DATA [i])); 39 41 if (_param._have_pht) 40 _vhdl_testbench->add_output(PORT_READ(out_PREDICT_PHT_HISTORY [i])); 42 _vhdl_testbench->add_output(PORT_READ(component_Pattern_History_Table -> 43 component_RegisterFile -> 44 out_READ_DATA [i])); 41 45 } 42 46 43 47 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 44 48 { 45 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); 46 _vhdl_testbench->add_output(PORT_READ(out_BRANCH_COMPLETE_ACK [i])); 47 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); 49 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); 50 _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue-> 51 out_BRANCH_COMPLETE_ACK [i])); 52 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); 48 53 if (_param._have_bht) 49 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY [i]));50 if (_param._have_ bht)51 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY [i]));52 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ HIT[i]));54 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY [i])); 55 if (_param._have_pht) 56 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY [i])); 57 _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION [i])); 53 58 } 54 59 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r2 r3 5 5 6 6 // Behavioural/Generic/ 7 #define DEBUG_Counter false 7 #define DEBUG_Counter false 8 8 #define DEBUG_Group false 9 #define DEBUG_Register_File false 9 #define DEBUG_Register_File false 10 10 #define DEBUG_Shifter false 11 11 // Behavioural/Generic/Select/ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/XML.h
r2 r3 23 23 class XML 24 24 { 25 typedef enum {_none ,26 _balise ,27 _singleton,28 _comment } balise_t;29 30 25 // -----[ fields ]---------------------------------------------------- 31 private : const string _ filename;26 private : const string _name ; 32 27 private : string _body ; 33 28 private : list<string> _list_balise_name; 34 29 35 30 // -----[ methods ]--------------------------------------------------- 36 public : XML (string filename); 37 public : XML (string filename, string encoding); 31 public : XML (string name); 38 32 public : ~XML (void); 39 33 … … 47 41 public : bool attribut (string name, string value); 48 42 43 public : void generate_file (void); 44 public : void generate_file (string encoding); 45 public : string get_body (void); 46 public : string get_body (uint32_t depth); 47 49 48 public : bool comment (string text); 50 49 public : bool text (string text); … … 55 54 56 55 private : void header (string encoding); 57 58 public : void generate_file (void);59 public : string get_body (void);60 56 }; 61 57 }; // end namespace behavioural -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML.cpp
r2 r3 11 11 namespace behavioural { 12 12 13 XML::XML (string filename) :14 _ filename (filename)13 XML::XML (string name) : 14 _name (name) 15 15 { 16 header ("UTF-8");17 };18 19 XML::XML (string filename,20 string encoding) :21 _filename (filename)22 {23 header(encoding);24 16 }; 25 17 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_balise_open_end.cpp
r2 r3 13 13 bool XML::balise_open_end (void) 14 14 { 15 _body += " >\n";15 _body += " >\n"; 16 16 17 17 return true; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_generate_file.cpp
r2 r3 7 7 8 8 #include "Behavioural/include/XML.h" 9 #include <fstream> 10 using namespace std; 9 11 10 12 namespace morpheo { 11 13 namespace behavioural { 12 14 15 void XML::generate_file (string encoding) 16 { 17 header (encoding); 18 19 string name = _name; 20 string filename = name + ".xml"; 21 22 cout << "Generate file \""<< filename << "\"" << endl; 23 24 ofstream file; 25 file.open(filename.c_str(),ios::out | ios::trunc); 26 27 file << get_body(); 28 29 file.close(); 30 }; 31 13 32 void XML::generate_file (void) 14 33 { 34 generate_file("UTF-8"); 15 35 }; 16 36 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_get_body.cpp
r2 r3 16 16 }; 17 17 18 string XML::get_body (uint32_t depth) 19 { 20 string body = _body; 21 string tabulation = indent(depth); 22 23 body.insert(0,tabulation); 24 for (size_t pos=body.find('\n',0); pos<body.length()-1; pos=body.find('\n',++pos)) 25 body.insert(++pos,tabulation); 26 27 return body; 28 }; 29 18 30 }; // end namespace behavioural 19 31 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp
r2 r3 13 13 void XML::header (string encoding) 14 14 { 15 _body += "<?xml version=\"1.0\" encoding=\""+encoding+"\"?>\n";15 _body = "<?xml version=\"1.0\" encoding=\""+encoding+"\" ?>\n" + _body; 16 16 }; 17 17
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