Ignore:
Timestamp:
Jul 5, 2007, 5:50:19 PM (17 years ago)
Author:
rosiere
Message:

Modification des classes d'encapsulation des interfaces :

  • gère les signaux à écrire dans le vhdl
  • les traces pour le testbench
  • la génération des vhdl structurelles

-> test sur la Pattern History Table

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp

    r15 r42  
    3232#endif
    3333  {
     34
     35#ifdef SYSTEMC
     36    allocation ();
     37#endif
     38
    3439#ifdef STATISTICS
    3540    // Allocation of statistics
    … …  
    3944#endif
    4045
    41 #ifdef VHDL_TESTBENCH
    42     // Creation of a testbench
    43     //  -> port
    44     //  -> clock's signals
    45     _vhdl_testbench = new Vhdl_Testbench (_name);
    46     vhdl_testbench_port           ();
    47     _vhdl_testbench->set_clock    ("in_CLOCK",true);
    48 #endif
    49 
    5046#ifdef VHDL
    5147    // generate the vhdl
    … …  
    5349#endif
    5450
     51
    5552#ifdef SYSTEMC
    56     allocation ();
    57 
    5853//     // Constant
    5954//     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
    … …  
    7772  Branch_History_Table::~Branch_History_Table (void)
    7873  {
    79 #ifdef VHDL_TESTBENCH
    80     // generate the test bench
    81     _vhdl_testbench->generate_file();
    82     delete _vhdl_testbench;
    83 #endif
    84 
    8574#ifdef STATISTICS
    8675
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