Changeset 42 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp
- Timestamp:
- Jul 5, 2007, 5:50:19 PM (17 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp
r15 r42 20 20 void Pattern_History_Table::allocation (void) 21 21 { 22 string rename;23 24 22 log_printf(FUNC,Pattern_History_Table,"allocation","Begin"); 25 23 26 in_CLOCK = new SC_CLOCK ("in_CLOCK"); 27 in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET"); 28 24 _component = new Component (); 25 26 Entity * entity = _component->set_entity (_name 27 ,"Pattern_History_Table" 28 #ifdef POSITION 29 ,MIXTE 30 #endif 31 ); 32 33 _interfaces = entity->set_interfaces(); 34 35 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 36 { 37 Interface * interface = _interfaces->set_interface("" 38 #ifdef POSITION 39 , IN 40 , SOUTH 41 , "Generalist interface" 42 #endif 43 ); 44 45 in_CLOCK = interface->set_signal_clk ("clock" ,1); 46 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1,RESET_VHDL_YES); 47 } 48 49 // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 50 in_PREDICT_VAL = new SC_IN (Tcontrol_t) * [_param._nb_prediction]; 30 51 out_PREDICT_ACK = new SC_OUT(Tcontrol_t) * [_param._nb_prediction]; … … 34 55 for (uint32_t i=0; i<_param._nb_prediction; i++) 35 56 { 36 rename = "in_PREDICT_VAL[" +toString(i)+"]"; 37 in_PREDICT_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 38 39 rename = "out_PREDICT_ACK[" +toString(i)+"]"; 40 out_PREDICT_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); 41 42 rename = "in_PREDICT_ADDRESS["+toString(i)+"]"; 43 in_PREDICT_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); 44 45 rename = "out_PREDICT_HISTORY["+toString(i)+"]"; 46 out_PREDICT_HISTORY [i] = new SC_OUT(Thistory_t) (rename.c_str()); 47 } 57 Interface_fifo * interface = _interfaces->set_interface("predict_"+toString(i) 58 #ifdef POSITION 59 , IN 60 , WEST 61 , "Interface Predict" 62 #endif 63 ); 64 65 in_PREDICT_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 66 out_PREDICT_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 67 in_PREDICT_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", static_cast<uint32_t>(ceil(log2(_param._nb_counter)))); 68 out_PREDICT_HISTORY [i] = interface->set_signal_out <Thistory_t> ("history", _param._size_counter); 69 } 70 71 // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 48 72 49 73 in_BRANCH_COMPLETE_VAL = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; … … 52 76 in_BRANCH_COMPLETE_HISTORY = new SC_IN (Thistory_t) * [_param._nb_branch_complete]; 53 77 in_BRANCH_COMPLETE_DIRECTION = new SC_IN (Tcontrol_t) * [_param._nb_branch_complete]; 54 signal_BRANCH_COMPLETE_HISTORY = new SC_SIGNAL (Thistory_t) * [_param._nb_branch_complete];55 78 56 79 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 57 80 { 58 rename = "in_BRANCH_COMPLETE_VAL[" +toString(i)+"]"; 59 in_BRANCH_COMPLETE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 60 61 rename = "out_BRANCH_COMPLETE_ACK[" +toString(i)+"]"; 62 out_BRANCH_COMPLETE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); 63 64 rename = "in_BRANCH_COMPLETE_ADDRESS["+toString(i)+"]"; 65 in_BRANCH_COMPLETE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); 66 67 rename = "in_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; 68 in_BRANCH_COMPLETE_HISTORY [i] = new SC_IN (Thistory_t) (rename.c_str()); 69 70 rename = "in_BRANCH_COMPLETE_DIRECTION[" +toString(i)+"]"; 71 in_BRANCH_COMPLETE_DIRECTION [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 72 73 rename = "signal_BRANCH_COMPLETE_HISTORY["+toString(i)+"]"; 74 signal_BRANCH_COMPLETE_HISTORY [i] = new SC_SIGNAL (Thistory_t) (rename.c_str()); 75 76 } 77 81 Interface_fifo * interface = _interfaces->set_interface("branch_complete_"+toString(i) 82 #ifdef POSITION 83 , IN 84 , EAST 85 , "Interface branch complete" 86 #endif 87 ); 88 89 in_BRANCH_COMPLETE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 90 out_BRANCH_COMPLETE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 91 in_BRANCH_COMPLETE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address" , static_cast<uint32_t>(ceil(log2(_param._nb_counter)))); 92 in_BRANCH_COMPLETE_HISTORY [i] = interface->set_signal_in <Thistory_t> ("history" , _param._size_counter); 93 in_BRANCH_COMPLETE_DIRECTION [i] = interface->set_signal_in <Tcontrol_t> ("direction", 1); 94 } 95 78 96 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 79 97 string name_component; 98 80 99 // =====[ component_Counter ]========================================= 81 100 82 101 name_component = _name+"_Counter"; 83 102 84 component_Counter = new morpheo::behavioural::generic::counter::Counter (name_component.c_str() ,103 component_Counter = new morpheo::behavioural::generic::counter::Counter (name_component.c_str() 85 104 #ifdef STATISTICS 86 _param_statistics , 87 #endif 88 *(_param._param_counter) ); 89 90 91 // Instantiation 105 ,_param_statistics 106 #endif 107 ,*(_param._param_counter)); 108 109 _component->set_component (component_Counter->_component 110 #ifdef POSITION 111 , 25 112 , 25 113 , 10 114 , 10 115 #endif 116 ); 117 118 // =====[ component_RegisterFile ]==================================== 119 120 name_component = _name+"_RegisterFile"; 121 122 component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(), 123 #ifdef STATISTICS 124 _param_statistics , 125 #endif 126 *(_param._param_registerfile)); 127 128 _component->set_component (component_RegisterFile->_component 129 #ifdef POSITION 130 , 75 131 , 75 132 , 10 133 , 10 134 #endif 135 ); 136 137 // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 138 139 // =====[ component_RegisterFile - Instanciation ]==================== 140 141 #ifdef POSITION 142 _component->interface_map (_name+"_RegisterFile","", 143 _name ,""); 144 #endif 145 146 _component->port_map(_name+"_RegisterFile", "in_CLOCK" , _name,"in_CLOCK" ); 147 _component->port_map(_name+"_RegisterFile", "in_NRESET", _name,"in_NRESET"); 148 149 for (uint32_t i=0; i<_param._nb_prediction; i++) 150 { 151 #ifdef POSITION 152 _component->interface_map (_name+"_RegisterFile","read_" +toString(i), 153 _name ,"predict_"+toString(i)); 154 #endif 155 156 _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_VAL" , _name, "in_PREDICT_"+toString(i)+"_VAL" ); 157 _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_ACK" , _name,"out_PREDICT_"+toString(i)+"_ACK" ); 158 _component->port_map(_name+"_RegisterFile", "in_READ_"+toString(i)+"_ADDRESS", _name, "in_PREDICT_"+toString(i)+"_ADDRESS"); 159 _component->port_map(_name+"_RegisterFile","out_READ_"+toString(i)+"_DATA" , _name,"out_PREDICT_"+toString(i)+"_HISTORY"); 160 } 161 162 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 163 { 164 #ifdef POSITION 165 _component->interface_map (_name+"_RegisterFile","write_" +toString(i), 166 _name+"_Counter" ,"counter_"+toString(i)); 167 #endif 168 169 _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_VAL" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_VAL" ); 170 _component->port_map(_name+"_RegisterFile","out_WRITE_"+toString(i)+"_ACK" , _name ,"out_BRANCH_COMPLETE_"+toString(i)+"_ACK" ); 171 _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_ADDRESS", _name , "in_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS"); 172 _component->port_map(_name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA" , _name+"_Counter","out_COUNTER_" +toString(i)+"_DATA"); 173 } 174 175 // =====[ component_Counter - Instanciation ]========================= 176 92 177 #if (defined(STATISTICS) || defined (VHDL_TESTBENCH)) 93 (*(component_Counter->in_CLOCK)) (*(in_CLOCK)); 178 179 #ifdef POSITION 180 _component->interface_map (_name+"_Counter","", 181 _name ,""); 182 #endif 183 184 _component->port_map(_name+"_Counter", "in_CLOCK" , _name,"in_CLOCK" ); 185 _component->port_map(_name+"_Counter", "in_NRESET", _name,"in_NRESET"); 186 94 187 #endif 95 188 96 189 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 97 190 { 98 (*(component_Counter-> in_COUNTER_DATA [i])) (*( in_BRANCH_COMPLETE_HISTORY [i])); 99 (*(component_Counter-> in_COUNTER_ADDSUB [i])) (*( in_BRANCH_COMPLETE_DIRECTION [i])); 100 (*(component_Counter->out_COUNTER_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); 101 } 102 103 // =====[ component_RegisterFile ]==================================== 104 105 name_component = _name+"_RegisterFile"; 106 107 component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic (name_component.c_str(), 108 #ifdef STATISTICS 109 _param_statistics , 110 #endif 111 *(_param._param_registerfile)); 112 113 // Instantiation 114 (*(component_RegisterFile->in_CLOCK)) (*(in_CLOCK)); 115 (*(component_RegisterFile->in_NRESET)) (*(in_NRESET)); 116 117 for (uint32_t i=0; i<_param._nb_prediction; i++) 118 { 119 (*(component_RegisterFile-> in_READ_VAL [i])) (*( in_PREDICT_VAL [i])); 120 (*(component_RegisterFile->out_READ_ACK [i])) (*(out_PREDICT_ACK [i])); 121 (*(component_RegisterFile-> in_READ_ADDRESS [i])) (*( in_PREDICT_ADDRESS [i])); 122 (*(component_RegisterFile->out_READ_DATA [i])) (*(out_PREDICT_HISTORY [i])); 123 } 124 125 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 126 { 127 (*(component_RegisterFile-> in_WRITE_VAL [i])) (*( in_BRANCH_COMPLETE_VAL [i])); 128 (*(component_RegisterFile->out_WRITE_ACK [i])) (*( out_BRANCH_COMPLETE_ACK [i])); 129 (*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*( in_BRANCH_COMPLETE_ADDRESS [i])); 130 (*(component_RegisterFile-> in_WRITE_DATA [i])) (*(signal_BRANCH_COMPLETE_HISTORY [i])); 131 } 191 #ifdef POSITION 192 _component->interface_map (_name+"_Counter","counter_"+toString(i), 193 _name ,"branch_complete_"+toString(i)); 194 195 #endif 196 197 _component->port_map(_name+"_Counter", "in_COUNTER_" +toString(i)+"_DATA" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_HISTORY"); 198 _component->port_map(_name+"_Counter", "in_COUNTER_" +toString(i)+"_ADDSUB" , _name , "in_BRANCH_COMPLETE_"+toString(i)+"_DIRECTION"); 199 _component->port_map(_name+"_Counter", "out_COUNTER_"+toString(i)+"_DATA" , _name+"_RegisterFile", "in_WRITE_"+toString(i)+"_DATA"); 200 } 201 202 #ifdef POSITION 203 _component->generate_file(); 204 #endif 132 205 133 206 log_printf(FUNC,Pattern_History_Table,"allocation","End");
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