Ignore:
Timestamp:
Jul 17, 2007, 4:47:56 PM (17 years ago)
Author:
rosiere
Message:

Modification des classes d'encapsulation des interfaces.
Stable sur tous les composants actuels

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/src/Meta_Predictor_vhdl_body.cpp

    r15 r44  
    1616
    1717
    18   void Meta_Predictor::vhdl_body (Vhdl & vhdl)
     18  void Meta_Predictor::vhdl_body (Vhdl * & vhdl)
    1919  {
    2020    log_printf(FUNC,Meta_Predictor,"vhdl_body","Begin");
    21     vhdl.set_body ("");
    22 
    23     list<string> list_port_map;
    24 
    25     // =====[ component_Meta_Predictor_Glue ]=============================
    26    
    27     list_port_map.clear();
    28     log_printf(INFO,Meta_Predictor,"vhdl_body","Instanciation : component_Meta_Predictor_Glue");
    29    
    30     // Instantiation
    31 
    32     // Interface Predict
    33     for (uint32_t i=0; i<_param._nb_prediction; i++)
    34       {
    35         if (_param._have_meta_predictor)
    36           {
    37         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_0_ACK_"+toString(i)+"               ", "signal_PREDICT_PREDICTOR_0_ACK_"+toString(i));
    38         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_1_ACK_"+toString(i)+"               ", "signal_PREDICT_PREDICTOR_1_ACK_"+toString(i));
    39           }                                                                                                                   
    40         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_2_ACK_"+toString(i)+"               ", "signal_PREDICT_PREDICTOR_2_ACK_"+toString(i));
    41         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+"                           ", "   out_PREDICT_ACK_"+toString(i));
    42         if (_param._have_meta_predictor)
    43           {                                                                                                                   
    44         if (_param._predictor_0_have_bht)
    45         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_0_BHT_HISTORY_"+toString(i)+"       ", "signal_PREDICT_PREDICTOR_0_BHT_HISTORY_"+toString(i));
    46         if (_param._predictor_0_have_pht)
    47         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_0_PHT_HISTORY_"+toString(i)+"       ", "signal_PREDICT_PREDICTOR_0_PHT_HISTORY_"+toString(i));
    48         if (_param._predictor_1_have_bht)
    49         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_1_BHT_HISTORY_"+toString(i)+"       ", "signal_PREDICT_PREDICTOR_1_BHT_HISTORY_"+toString(i));
    50         if (_param._predictor_1_have_pht)
    51         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_1_PHT_HISTORY_"+toString(i)+"       ", "signal_PREDICT_PREDICTOR_1_PHT_HISTORY_"+toString(i));
    52           }                                                                                                                   
    53         if (_param._predictor_2_have_bht)
    54         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_2_BHT_HISTORY_"+toString(i)+"       ", "signal_PREDICT_PREDICTOR_2_BHT_HISTORY_"+toString(i));
    55         if (_param._predictor_2_have_pht)
    56         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PREDICTOR_2_PHT_HISTORY_"+toString(i)+"       ", "signal_PREDICT_PREDICTOR_2_PHT_HISTORY_"+toString(i));
    57         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+"                       ", "   out_PREDICT_HISTORY_"+toString(i));
    58         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_DIRECTION_"+toString(i)+"                     ", "   out_PREDICT_DIRECTION_"+toString(i));
    59       }
    60 
    61     // Interface Branch_complete
    62    
    63     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
    64       {
    65         if (_param._have_meta_predictor)
    66           {
    67         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+"                    ", "    in_BRANCH_COMPLETE_VAL_"+toString(i));
    68         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_2_VAL_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_2_VAL_"+toString(i));
    69 
    70         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PREDICTOR_0_ACK_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_0_ACK_"+toString(i));
    71         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PREDICTOR_1_ACK_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_1_ACK_"+toString(i));
    72           }                                     
    73         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PREDICTOR_2_ACK_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_2_ACK_"+toString(i));
    74         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+"                    ", "   out_BRANCH_COMPLETE_ACK_"+toString(i));
    75                                                
    76         if (_param._have_meta_predictor)       
    77           {                                     
    78         if (_param._predictor_0_have_bht)
    79         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_0_BHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_0_BHT_HISTORY_"+toString(i));
    80         if (_param._predictor_0_have_pht)
    81         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_0_PHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_0_PHT_HISTORY_"+toString(i));
    82         if (_param._predictor_1_have_bht)
    83         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_1_BHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_1_BHT_HISTORY_"+toString(i));
    84         if (_param._predictor_1_have_pht)
    85         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_1_PHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_1_PHT_HISTORY_"+toString(i));
    86           }                                     
    87         if (_param._predictor_2_have_bht)
    88         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_2_BHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_2_BHT_HISTORY_"+toString(i));
    89         if (_param._predictor_2_have_pht)
    90         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_2_PHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_2_PHT_HISTORY_"+toString(i));
    91         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+"                ", "    in_BRANCH_COMPLETE_HISTORY_"+toString(i));
    92         if (_param._have_meta_predictor)       
    93           {
    94         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"              ", "    in_BRANCH_COMPLETE_DIRECTION_"+toString(i));
    95         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PREDICTOR_2_DIRECTION_"+toString(i)+"  ", "signal_BRANCH_COMPLETE_PREDICTOR_2_DIRECTION_"+toString(i));
    96           }
    97       }
    98 
    99     vhdl.set_body_component ("component_Meta_Predictor_Glue",_name+"_Meta_Predictor_Glue",list_port_map);
    100 
    101     // =====[ component_Two_Level_Branch_Predictor_2 ]====================   
    102 
    103     list_port_map.clear();
    104     log_printf(INFO,Meta_Predictor,"vhdl_body","Instanciation : component_Two_Level_Branch_Predictor_2");
    105    
    106     // Instantiation
    107     vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
    108     vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
    109    
    110     for (uint32_t i=0; i<_param._nb_prediction; i++)
    111       {
    112         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+"                ", "    in_PREDICT_VAL_"+toString(i));
    113         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+"                ", "signal_PREDICT_PREDICTOR_2_ACK_"+toString(i));
    114         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+"            ", "    in_PREDICT_ADDRESS_"+toString(i));
    115         if (_param._predictor_2_have_bht)                                                                                     
    116         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_BHT_HISTORY_"+toString(i)+"        ", "signal_PREDICT_PREDICTOR_2_BHT_HISTORY_"+toString(i));
    117         if (_param._predictor_2_have_pht)
    118         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_PHT_HISTORY_"+toString(i)+"        ", "signal_PREDICT_PREDICTOR_2_PHT_HISTORY_"+toString(i));
    119       }
    120    
    121     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
    122       {
    123         if (_param._have_meta_predictor)
    124         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_2_VAL_"+toString(i));
    125         else
    126         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+"        ", "    in_BRANCH_COMPLETE_VAL_"+toString(i));
    127         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_2_ACK_"+toString(i));
    128         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"    ", "    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
    129         if (_param._predictor_2_have_bht)                                                                                       
    130         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_2_BHT_HISTORY_"+toString(i));
    131         if (_param._predictor_2_have_pht)                                                                                       
    132         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_2_PHT_HISTORY_"+toString(i));
    133         if (_param._have_meta_predictor)
    134         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"  ", "signal_BRANCH_COMPLETE_PREDICTOR_2_DIRECTION_"+toString(i));
    135         else
    136         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"  ", "    in_BRANCH_COMPLETE_DIRECTION_"+toString(i));     
    137       }
    138 
    139     vhdl.set_body_component ("component_Two_Level_Branch_Predictor_2",_name+"_Two_Level_Branch_Predictor_2",list_port_map);
    140 
    141     if (_param._have_meta_predictor)
    142       {
    143     // =====[ component_Two_Level_Branch_Predictor_1 ]====================   
    144 
    145     list_port_map.clear();
    146     log_printf(INFO,Meta_Predictor,"vhdl_body","Instanciation : component_Two_Level_Branch_Predictor_1");
    147    
    148     // Instantiation
    149     vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
    150     vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
    151    
    152     for (uint32_t i=0; i<_param._nb_prediction; i++)
    153       {
    154         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+"                ", "    in_PREDICT_VAL_"+toString(i));
    155         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+"                ", "signal_PREDICT_PREDICTOR_1_ACK_"+toString(i));
    156         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+"            ", "    in_PREDICT_ADDRESS_"+toString(i));
    157         if (_param._predictor_1_have_bht)                                                                                     
    158         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_BHT_HISTORY_"+toString(i)+"        ", "signal_PREDICT_PREDICTOR_1_BHT_HISTORY_"+toString(i));
    159         if (_param._predictor_1_have_pht)
    160         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_PHT_HISTORY_"+toString(i)+"        ", "signal_PREDICT_PREDICTOR_1_PHT_HISTORY_"+toString(i));
    161       }
    162    
    163     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
    164       {
    165         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+"        ", "    in_BRANCH_COMPLETE_VAL_"+toString(i));
    166         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_1_ACK_"+toString(i));
    167         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"    ", "    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
    168         if (_param._predictor_1_have_bht)                                                                                       
    169         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_1_BHT_HISTORY_"+toString(i));
    170         if (_param._predictor_1_have_pht)                                                                                       
    171         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_1_PHT_HISTORY_"+toString(i));
    172         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"  ", "    in_BRANCH_COMPLETE_DIRECTION_"+toString(i));     
    173       }
    174 
    175     vhdl.set_body_component ("component_Two_Level_Branch_Predictor_1",_name+"_Two_Level_Branch_Predictor_1",list_port_map);
    176 
    177     // =====[ component_Two_Level_Branch_Predictor_0 ]====================   
    178 
    179     list_port_map.clear();
    180     log_printf(INFO,Meta_Predictor,"vhdl_body","Instanciation : component_Two_Level_Branch_Predictor_0");
    181    
    182     // Instantiation
    183     vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
    184     vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
    185    
    186     for (uint32_t i=0; i<_param._nb_prediction; i++)
    187       {
    188         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+"                ", "    in_PREDICT_VAL_"+toString(i));
    189         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+"                ", "signal_PREDICT_PREDICTOR_0_ACK_"+toString(i));
    190         vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+"            ", "    in_PREDICT_ADDRESS_"+toString(i));
    191         if (_param._predictor_0_have_bht)                                                                                     
    192         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_BHT_HISTORY_"+toString(i)+"        ", "signal_PREDICT_PREDICTOR_0_BHT_HISTORY_"+toString(i));
    193         if (_param._predictor_0_have_pht)
    194         vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_PHT_HISTORY_"+toString(i)+"        ", "signal_PREDICT_PREDICTOR_0_PHT_HISTORY_"+toString(i));
    195       }
    196    
    197     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
    198       {
    199         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+"        ", "    in_BRANCH_COMPLETE_VAL_"+toString(i));
    200         vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+"        ", "signal_BRANCH_COMPLETE_PREDICTOR_0_ACK_"+toString(i));
    201         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+"    ", "    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
    202         if (_param._predictor_0_have_bht)                                                                                       
    203         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_0_BHT_HISTORY_"+toString(i));
    204         if (_param._predictor_0_have_pht)                                                                                       
    205         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)+"", "signal_BRANCH_COMPLETE_PREDICTOR_0_PHT_HISTORY_"+toString(i));
    206         vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+"  ", "    in_BRANCH_COMPLETE_DIRECTION_"+toString(i));     
    207       }
    208 
    209     vhdl.set_body_component ("component_Two_Level_Branch_Predictor_0",_name+"_Two_Level_Branch_Predictor_0",list_port_map);
    210       }
    21121
    21222    log_printf(FUNC,Meta_Predictor,"vhdl_body","End");
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