Ignore:
Timestamp:
Dec 4, 2007, 2:31:54 PM (17 years ago)
Author:
rosiere
Message:

Modification en profondeur de Component-port_map.
Compilation ok pour Register_unit ... a tester (systemC et vhdl)

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic
Files:
3 added
33 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp

    r57 r62  
    7979      (*(registerfile-> in_READ_VAL      [i]))        (READ_VAL      [i]);
    8080      (*(registerfile->out_READ_ACK      [i]))        (READ_ACK      [i]);
     81      if (_param->_have_port_address)
    8182      (*(registerfile-> in_READ_ADDRESS  [i]))        (READ_ADDRESS  [i]);
    8283      (*(registerfile->out_READ_DATA     [i]))        (READ_DATA     [i]);
    … …  
    8687      (*(registerfile-> in_WRITE_VAL     [i]))        (WRITE_VAL     [i]);
    8788      (*(registerfile->out_WRITE_ACK     [i]))        (WRITE_ACK     [i]);
     89      if (_param->_have_port_address)
    8890      (*(registerfile-> in_WRITE_ADDRESS [i]))        (WRITE_ADDRESS [i]);
    8991      (*(registerfile-> in_WRITE_DATA    [i]))        (WRITE_DATA    [i]);
    … …  
    9496      (*(registerfile->out_READ_WRITE_ACK     [i])) (READ_WRITE_ACK      [i]);
    9597      (*(registerfile-> in_READ_WRITE_RW      [i])) (READ_WRITE_RW       [i]);
     98      if (_param->_have_port_address)
    9699      (*(registerfile-> in_READ_WRITE_ADDRESS [i])) (READ_WRITE_ADDRESS  [i]);
    97100      (*(registerfile-> in_READ_WRITE_WDATA   [i])) (READ_WRITE_WDATA    [i]);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h

    r55 r62  
    2727  public : const uint32_t _size_word    ;
    2828  public : const uint32_t _size_address ;
     29  public : const bool     _have_port_address;
    2930
    3031  public : Parameters (uint32_t nb_port_read ,

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters.cpp

    r55 r62  
    2525    _nb_word           (nb_word      ),
    2626    _size_word         (size_word    ),
    27     _size_address      (static_cast<uint32_t>(log2(_nb_word)))
     27    _size_address      (static_cast<uint32_t>(log2(_nb_word))),
     28    _have_port_address (_size_address != 0)
     29
    2830  {
    2931    test();
    … …  
    3638    _nb_word           (param._nb_word      ),
    3739    _size_word         (param._size_word    ),
    38     _size_address      (param._size_address )
     40    _size_address      (param._size_address ),
     41    _have_port_address (param._have_port_address)
    3942  {
    4043    test();

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_msg_error.cpp

    r55 r62  
    5050        msg += "    * nb_port_read_write              : " + toString(_nb_port_read_write) + "\n";
    5151      }
    52     if (_nb_word < 2)
    53       {
    54         msg += "  - nb_word must be >= 2\n";
    55         msg += "    * nb_word                         : " + toString(_nb_word)    + "\n";
    56       }
     52//     if (_nb_word < 2)
     53//       {
     54//         msg += "  - nb_word must be >= 2\n";
     55//         msg += "    * nb_word                         : " + toString(_nb_word)    + "\n";
     56//       }
    5757
    5858    return msg;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic.cpp

    r58 r62  
    5858        sensitive_neg << *(in_CLOCK);
    5959        for (uint32_t i=0; i<_param->_nb_port_read; i++)
    60           sensitive << *(in_READ_VAL     [i])
    61                     << *(in_READ_ADDRESS [i]);
     60          {
     61            sensitive << *(in_READ_VAL     [i]);
     62            if (_param->_have_port_address)
     63              sensitive << *(in_READ_ADDRESS [i]);
     64          }
    6265        for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
    63           sensitive << *(in_READ_WRITE_VAL     [i])
    64                     << *(in_READ_WRITE_RW      [i])
    65                     << *(in_READ_WRITE_ADDRESS [i]);
     66          {
     67            sensitive << *(in_READ_WRITE_VAL     [i])
     68                      << *(in_READ_WRITE_RW      [i]);
     69            if (_param->_have_port_address)
     70              sensitive << *(in_READ_WRITE_ADDRESS [i]);
     71          }
    6672       
    6773#  ifdef SYSTEMCASS_SPECIFIC
    … …  
    7076          {
    7177            (*(out_READ_DATA  [i])) (*( in_READ_VAL     [i]));
    72             (*(out_READ_DATA  [i])) (*( in_READ_ADDRESS [i]));
     78            if (_param->_have_port_address)
     79              (*(out_READ_DATA  [i])) (*( in_READ_ADDRESS [i]));
    7380          }
    7481        for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
    … …  
    7683            (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_VAL     [i]));
    7784            (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_RW      [i]));
    78             (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_ADDRESS [i]));
     85            if (_param->_have_port_address)
     86              (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_ADDRESS [i]));
    7987          }
    8088#  endif   

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp

    r57 r62  
    4444     in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param->_nb_port_read];
    4545    out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read];
     46    if (_param->_have_port_address)
    4647     in_READ_ADDRESS     = new SC_IN (Taddress_t) * [_param->_nb_port_read];
    4748    out_READ_DATA        = new SC_OUT(Tdata_t   ) * [_param->_nb_port_read];
    … …  
    5960         in_READ_VAL     [i]  = interface->set_signal_valack_in        ("val"    , VAL);
    6061        out_READ_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
     62        if (_param->_have_port_address)
    6163         in_READ_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", _param->_size_address);
    6264        out_READ_DATA    [i]  = interface->set_signal_out <Tdata_t   > ("data"   , _param->_size_word);
    … …  
    6769     in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param->_nb_port_write];
    6870    out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write];
     71    if (_param->_have_port_address)
    6972     in_WRITE_ADDRESS    = new SC_IN (Taddress_t) * [_param->_nb_port_write];
    7073     in_WRITE_DATA       = new SC_IN (Tdata_t   ) * [_param->_nb_port_write];
    … …  
    8285         in_WRITE_VAL     [i]  = interface->set_signal_valack_in        ("val"    , VAL);
    8386        out_WRITE_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
     87        if (_param->_have_port_address)
    8488         in_WRITE_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", _param->_size_address);
    8589         in_WRITE_DATA    [i]  = interface->set_signal_in  <Tdata_t   > ("data"   , _param->_size_word);
    … …  
    9195    out_READ_WRITE_ACK         = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read_write];
    9296     in_READ_WRITE_RW          = new SC_IN (Tcontrol_t) * [_param->_nb_port_read_write];
     97    if (_param->_have_port_address)
    9398     in_READ_WRITE_ADDRESS     = new SC_IN (Taddress_t) * [_param->_nb_port_read_write];
    9499     in_READ_WRITE_WDATA       = new SC_IN (Tdata_t   ) * [_param->_nb_port_read_write];
    … …  
    108113        out_READ_WRITE_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
    109114         in_READ_WRITE_RW      [i]  = interface->set_signal_valack_in        ("rw"     , VAL);
     115        if (_param->_have_port_address)
    110116         in_READ_WRITE_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", _param->_size_address);
    111117         in_READ_WRITE_WDATA   [i]  = interface->set_signal_in  <Tdata_t   > ("wdata"  , _param->_size_word);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_deallocation.cpp

    r57 r62  
    2525        delete []  in_READ_VAL    ;
    2626        delete [] out_READ_ACK    ;
     27        if (_param->_have_port_address)
    2728        delete []  in_READ_ADDRESS;
    2829        delete [] out_READ_DATA   ;
    … …  
    3132        delete []  in_WRITE_VAL    ;
    3233        delete [] out_WRITE_ACK    ;
     34        if (_param->_have_port_address)
    3335        delete []  in_WRITE_ADDRESS;
    3436        delete []  in_WRITE_DATA   ;
    … …  
    3840        delete [] out_READ_WRITE_ACK    ;
    3941        delete []  in_READ_WRITE_RW     ;
     42        if (_param->_have_port_address)
    4043        delete []  in_READ_WRITE_ADDRESS;
    4144        delete []  in_READ_WRITE_WDATA  ;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp

    r55 r62  
    2828        if ( PORT_READ(in_READ_VAL [i]) == 1)
    2929          {
    30             Taddress_t address = PORT_READ(in_READ_ADDRESS[i]);
     30            Taddress_t address;
     31            if (_param->_have_port_address)
     32              address = PORT_READ(in_READ_ADDRESS[i]);
     33            else
     34              address = 0;
    3135            Tdata_t    data    = REGISTER_READ(reg_DATA[address]);
    3236
    … …  
    5559             )
    5660          {
    57             Taddress_t address = PORT_READ(in_READ_WRITE_ADDRESS[i]);
     61            Taddress_t address;
     62            if (_param->_have_port_address)
     63              address = PORT_READ(in_READ_WRITE_ADDRESS[i]);
     64            else
     65              address = 0;
    5866           
    5967            data = REGISTER_READ(reg_DATA[address]);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp

    r55 r62  
    3030#endif   
    3131
    32             Taddress_t address = PORT_READ(in_WRITE_ADDRESS[i]);
     32            Taddress_t address;
     33            if (_param->_have_port_address)
     34              address = PORT_READ(in_WRITE_ADDRESS[i]);
     35            else
     36              address = 0;
     37
    3338            Tdata_t    data    = PORT_READ(in_WRITE_DATA   [i]);
    3439           
    … …  
    4954#endif   
    5055
    51             Taddress_t address = PORT_READ(in_READ_WRITE_ADDRESS[i]);
     56            Taddress_t address;
     57            if (_param->_have_port_address)
     58              address = PORT_READ(in_READ_WRITE_ADDRESS[i]);
     59            else
     60              address = 0;
    5261            Tdata_t    data    = PORT_READ(in_READ_WRITE_WDATA  [i]);
    5362           

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_body.cpp

    r55 r62  
    3737   
    3838    for (uint32_t i = 0; i < _param->_nb_port_read; i++)
    39         vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA (conv_integer(in_READ_"+toString(i)+"_ADDRESS)) when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param->_size_word,0)+";");
     39      {
     40        string str_address;
     41        if (_param->_have_port_address)
     42          str_address = "conv_integer(in_READ_"+toString(i)+"_ADDRESS)";
     43        else
     44          str_address = "0";
    4045
     46        vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA ("+str_address+") when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param->_size_word,0)+";");
     47      }
    4148    for (uint32_t i = 0; i < _param->_nb_port_read_write; i++)
    42       vhdl->set_body ("out_READ_WRITE_"+toString(i)+"_RDATA <= reg_DATA (conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)) when in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_READ)+"' else "+std_logic_others(_param->_size_word,0)+";");
     49      {
     50        string str_address;
     51        if (_param->_have_port_address)
     52          str_address = "conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)";
     53        else
     54          str_address = "0";
     55        vhdl->set_body ("out_READ_WRITE_"+toString(i)+"_RDATA <= reg_DATA ("+str_address+") when in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_READ)+"' else "+std_logic_others(_param->_size_word,0)+";");
     56      }
    4357
    4458    vhdl->set_body ("");
    … …  
    5468    for (uint32_t i = 0; i < _param->_nb_port_write; i++)
    5569      {
    56       vhdl->set_body ("\t\tif (in_WRITE_"+toString(i)+"_VAL = '1') then");
    57       vhdl->set_body ("\t\t\treg_DATA(conv_integer(in_WRITE_"+toString(i)+"_ADDRESS)) <= in_WRITE_"+toString(i)+"_DATA;");
    58       vhdl->set_body ("\t\tend if;");
     70        string str_address;
     71        if (_param->_have_port_address)
     72          str_address = "conv_integer(in_WRITE_"+toString(i)+"_ADDRESS)";
     73        else
     74          str_address = "0";
     75
     76        vhdl->set_body ("\t\tif (in_WRITE_"+toString(i)+"_VAL = '1') then");
     77        vhdl->set_body ("\t\t\treg_DATA("+str_address+") <= in_WRITE_"+toString(i)+"_DATA;");
     78        vhdl->set_body ("\t\tend if;");
    5979      }
    6080    for (uint32_t i = 0; i < _param->_nb_port_read_write; i++)
    6181      {
    62       vhdl->set_body ("\t\tif (in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_WRITE)+"') then");
    63       vhdl->set_body ("\t\t\treg_DATA(conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)) <= in_READ_WRITE_"+toString(i)+"_WDATA;");
    64       vhdl->set_body ("\t\tend if;");
     82        string str_address;
     83        if (_param->_have_port_address)
     84          str_address = "conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)";
     85        else
     86          str_address = "0";
     87       
     88        vhdl->set_body ("\t\tif (in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_WRITE)+"') then");
     89        vhdl->set_body ("\t\t\treg_DATA("+str_address+") <= in_READ_WRITE_"+toString(i)+"_WDATA;");
     90        vhdl->set_body ("\t\tend if;");
    6591      }
    6692

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest/src/test.cpp

    r58 r62  
    8080      (*(_RegisterFile_Multi_Banked-> in_READ_VAL      [i]))        (READ_VAL      [i]);
    8181      (*(_RegisterFile_Multi_Banked->out_READ_ACK      [i]))        (READ_ACK      [i]);
     82      if (_param->_have_port_address==true)
    8283      (*(_RegisterFile_Multi_Banked-> in_READ_ADDRESS  [i]))        (READ_ADDRESS  [i]);
    8384      (*(_RegisterFile_Multi_Banked->out_READ_DATA     [i]))        (READ_DATA     [i]);
    … …  
    8889      (*(_RegisterFile_Multi_Banked-> in_WRITE_VAL     [i]))        (WRITE_VAL     [i]);
    8990      (*(_RegisterFile_Multi_Banked->out_WRITE_ACK     [i]))        (WRITE_ACK     [i]);
     91      if (_param->_have_port_address==true)
    9092      (*(_RegisterFile_Multi_Banked-> in_WRITE_ADDRESS [i]))        (WRITE_ADDRESS [i]);
    9193      (*(_RegisterFile_Multi_Banked-> in_WRITE_DATA    [i]))        (WRITE_DATA    [i]);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h

    r57 r62  
    7171  public : const uint32_t    _nb_word_by_bank      ;
    7272
     73  public : const bool        _have_port_address     ;
     74  public : const bool        _have_bank_port_address;
     75
    7376    // A lot of table to the partial crossbar
    7477  public :       uint32_t  * _link_port_read_to_bank_read  ;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp

    r57 r62  
    4242    _num_reg_shift         (0),
    4343    _num_reg_mask          (gen_mask<Taddress_t>(_size_address_by_bank)),
    44     _nb_word_by_bank       (_nb_word / _nb_bank)
     44    _nb_word_by_bank       (_nb_word / _nb_bank),
     45    _have_port_address     (_size_address         != 0),
     46    _have_bank_port_address(_size_address_by_bank != 0)
    4547  {
    4648    log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","Begin");
    … …  
    4850    if (_crossbar == PARTIAL_CROSSBAR)
    4951      {
    50         log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","Case : _crossbar == PARTIAL_CROSSBAR");
     52        log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","Case : _crossbar == PARTIAL_CROSSBAR");
    5153
    5254        // All port_src is connected with one port_dest on each bank
    … …  
    6870
    6971
    70         log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_bank_read");
     72        log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_bank_read");
    7173        for (uint32_t i=0; i<_nb_port_read         ;i++)
    7274          {
    73           log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","   * Read  in  [%d] to out    [%d]",i,_link_port_read_to_bank_read          [i]);
    74           printf("   * Read  in  [%d] to out    [%d]\n",i,_link_port_read_to_bank_read          [i]);
     75            log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","   * Read  in  [%d] to out    [%d]",i,_link_port_read_to_bank_read          [i]);
    7576          }
    76         log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_bank_write");
     77        log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_bank_write");
    7778        for (uint32_t i=0; i<_nb_port_write        ;i++)
    7879          {
    79             log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","   * Write in  [%d] to out    [%d]",i,_link_port_write_to_bank_write          [i]);
    80             printf("   * Write in  [%d] to out    [%d]\n",i,_link_port_write_to_bank_write          [i]);
     80            log_printf(TRACE,RegisterFile_Multi_Banked,"Parameters","   * Write in  [%d] to out    [%d]",i,_link_port_write_to_bank_write          [i]);
    8181          }
    8282      }
    … …  
    102102    _num_reg_shift         (param._num_reg_shift        ),
    103103    _num_reg_mask          (param._num_reg_mask         ),
    104     _nb_word_by_bank       (param._nb_word_by_bank      )
     104    _nb_word_by_bank       (param._nb_word_by_bank      ),
     105    _have_port_address     (param._have_port_address     ),
     106    _have_bank_port_address(param._have_bank_port_address)
    105107  {
    106108    log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters (copy)","Begin");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked.cpp

    r57 r62  
    8585    sensitive_neg << *(in_CLOCK);
    8686    for (uint32_t i=0; i<_param->_nb_port_read; i++)
    87       sensitive << *( in_READ_VAL     [i])
    88                 << *( in_READ_ADDRESS [i]);
     87      {
     88        sensitive << *( in_READ_VAL     [i]);
     89        if (_param->_have_port_address == true)
     90          sensitive << *( in_READ_ADDRESS [i]);
     91      }
    8992
    9093#ifdef SYSTEMCASS_SPECIFIC
    … …  
    9396      {
    9497        (*(out_READ_ACK  [i])) (*( in_READ_VAL     [i]));
     98        if (_param->_have_port_address == true)
    9599        (*(out_READ_ACK  [i])) (*( in_READ_ADDRESS [i]));
    96100        (*(out_READ_DATA [i])) (*( in_READ_VAL     [i]));
     101        if (_param->_have_port_address == true)
    97102        (*(out_READ_DATA [i])) (*( in_READ_ADDRESS [i]));
    98103      }
    … …  
    109114    sensitive_neg << *(in_CLOCK);
    110115    for (uint32_t i=0; i<_param->_nb_port_write; i++)
    111       sensitive << *( in_WRITE_VAL     [i])
    112                 << *( in_WRITE_ADDRESS [i])
    113                 << *( in_WRITE_DATA    [i]);
     116      {
     117        sensitive << *( in_WRITE_VAL     [i])
     118                  << *( in_WRITE_DATA    [i]);
     119        if (_param->_have_port_address == true)
     120          sensitive << *( in_WRITE_ADDRESS [i]);
     121      }
    114122
    115123#ifdef SYSTEMCASS_SPECIFIC
    … …  
    118126      {
    119127        (*(out_WRITE_ACK  [i])) (*( in_WRITE_VAL     [i]));
     128        if (_param->_have_port_address == true)
    120129        (*(out_WRITE_ACK  [i])) (*( in_WRITE_ADDRESS [i]));
    121130        (*(out_WRITE_ACK  [i])) (*( in_WRITE_DATA    [i]));

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp

    r57 r62  
    5050     in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param->_nb_port_read];
    5151    out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read];
     52    if (_param->_have_port_address == true)
    5253     in_READ_ADDRESS     = new SC_IN (Taddress_t) * [_param->_nb_port_read];
    5354    out_READ_DATA        = new SC_OUT(Tdata_t   ) * [_param->_nb_port_read];
    … …  
    6566         in_READ_VAL     [i]  = interface->set_signal_valack_in        ("val"    , VAL);
    6667        out_READ_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
     68        if (_param->_have_port_address == true)
    6769         in_READ_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(log2(_param->_nb_word)));
    6870        out_READ_DATA    [i]  = interface->set_signal_out <Tdata_t   > ("data"   , _param->_size_word);
    … …  
    7375     in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param->_nb_port_write];
    7476    out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write];
     77    if (_param->_have_port_address == true)
    7578     in_WRITE_ADDRESS    = new SC_IN (Taddress_t) * [_param->_nb_port_write];
    7679     in_WRITE_DATA       = new SC_IN (Tdata_t   ) * [_param->_nb_port_write];
    … …  
    8891         in_WRITE_VAL     [i]  = interface->set_signal_valack_in        ("val"    , VAL);
    8992        out_WRITE_ACK     [i]  = interface->set_signal_valack_out       ("ack"    , ACK);
     93        if (_param->_have_port_address == true)
    9094         in_WRITE_ADDRESS [i]  = interface->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(log2(_param->_nb_word)));
    9195         in_WRITE_DATA    [i]  = interface->set_signal_in  <Tdata_t   > ("data"   , _param->_size_word);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_deallocation.cpp

    r53 r62  
    2626    delete []  in_READ_VAL    ;
    2727    delete [] out_READ_ACK    ;
     28    if (_param->_have_port_address == true)
    2829    delete []  in_READ_ADDRESS;
    2930    delete [] out_READ_DATA   ;
    … …  
    3233    delete []  in_WRITE_VAL    ;
    3334    delete [] out_WRITE_ACK    ;
     35    if (_param->_have_port_address == true)
    3436    delete []  in_WRITE_ADDRESS;
    3537    delete []  in_WRITE_DATA   ;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_read.cpp

    r57 r62  
    3737          {
    3838            // Compute the adress of the bank
    39             Taddress_t address = PORT_READ(in_READ_ADDRESS[i]);
     39            Taddress_t address;
     40            if (_param->_have_port_address == true)
     41              address = PORT_READ(in_READ_ADDRESS[i]);
     42            else
     43              address = 0;
     44
    4045            log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * address   : %d",address);
    4146            Taddress_t bank    = address_bank    (address);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_full_crossbar_genMealy_write.cpp

    r57 r62  
    3838            val                = false;
    3939            // Compute the adress of the bank
    40             Taddress_t address = PORT_READ(in_WRITE_ADDRESS[i]);
     40            Taddress_t address;
     41            if (_param->_have_port_address == true)
     42              address = PORT_READ(in_WRITE_ADDRESS[i]);
     43            else
     44              address = 0;
    4145            log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_write"," * address   : %d",address);
    4246            Taddress_t bank    = address_bank    (address);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp

    r57 r62  
    3737          {
    3838            // Compute the adress of the bank
    39             Taddress_t address = PORT_READ(in_READ_ADDRESS[i]);
     39            Taddress_t address;
     40            if (_param->_have_port_address == true)
     41              address = PORT_READ(in_READ_ADDRESS[i]);
     42            else
     43              address = 0;
    4044            log_printf(TRACE,RegisterFile_Multi_Banked,"full_crossbar_genMealy_read"," * address   : %d",address);
    4145            Taddress_t bank    = address_bank    (address);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_write.cpp

    r57 r62  
    3737            val                = false;
    3838            // Compute the adress of the bank
    39             Taddress_t address = PORT_READ(in_WRITE_ADDRESS[i]);
     39            Taddress_t address;
     40            if (_param->_have_port_address == true)
     41              address = PORT_READ(in_WRITE_ADDRESS[i]);
     42            else
     43              address = 0;
    4044            log_printf(TRACE,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_write"," * address   : %d",address);
    4145            Taddress_t bank    = address_bank    (address);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp

    r58 r62  
    5151            vhdl->set_body("\t, in_READ_"+toString(j)+"_VAL     \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_VAL");
    5252            vhdl->set_body("\t,out_READ_"+toString(j)+"_ACK     \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ACK");
     53            if (_param->_have_bank_port_address == true)
    5354            vhdl->set_body("\t, in_READ_"+toString(j)+"_ADDRESS \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ADDRESS");
    5455            vhdl->set_body("\t,out_READ_"+toString(j)+"_DATA    \t=>\tinternal_BANK_READ_"+toString(i)+"_"+toString(j)+"_DATA");
    … …  
    5859            vhdl->set_body("\t, in_WRITE_"+toString(j)+"_VAL     \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_VAL");
    5960            vhdl->set_body("\t,out_WRITE_"+toString(j)+"_ACK     \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ACK");
     61            if (_param->_have_bank_port_address == true)
    6062            vhdl->set_body("\t, in_WRITE_"+toString(j)+"_ADDRESS \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ADDRESS");
    6163            vhdl->set_body("\t, in_WRITE_"+toString(j)+"_DATA    \t=>\tinternal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_DATA");
    … …  
    154156    vhdl->set_body("-----------------------------------");
    155157    vhdl->set_body("");
     158
     159    if (_param->_have_bank_port_address == true)
    156160    for (uint32_t i=0; i<_param->_nb_bank; i++)
    157161      {
    … …  
    221225        for (uint32_t j=0; j<_param->_nb_port_read; j ++)
    222226          {
    223             string address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
    224 
    225             vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL  <= '1' when (in_READ_"+toString(j)+"_VAL ='1') "+address+"else '0';");
     227            string str_address;
     228
     229            if (_param->_have_bank_port_address == true)
     230              str_address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
     231            else
     232              str_address = "";
     233
     234            vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL  <= '1' when (in_READ_"+toString(j)+"_VAL ='1') "+str_address+"else '0';");
    226235          }
    227236        for (uint32_t j=0; j<_param->_nb_port_write; j ++)
    228237          {
    229             string address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
    230             vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+address+"else '0';");
     238            string str_address;
     239
     240            if (_param->_have_port_address == true)
     241              str_address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");
     242            else
     243              str_address = "";
     244
     245            vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+str_address+"else '0';");
    231246          }
    232247      }

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_declaration.cpp

    r58 r62  
    4141            vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_VAL" ,1);
    4242            vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ACK"    ,1);
     43            if (_param->_have_bank_port_address == true)
    4344            vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_ADDRESS",_param->_size_address_by_bank);
    4445            vhdl->set_signal ("internal_BANK_READ_"+toString(i)+"_"+toString(j)+"_DATA"   ,_param->_size_word);
    … …  
    6465            vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_VAL"    ,1);
    6566            vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ACK"    ,1);
     67            if (_param->_have_bank_port_address == true)
    6668            vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_ADDRESS",_param->_size_address_by_bank);
    6769            vhdl->set_signal ("internal_BANK_WRITE_"+toString(i)+"_"+toString(j)+"_DATA"   ,_param->_size_word);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/include/test.h

    r53 r62  
    2121using namespace morpheo::behavioural;
    2222using namespace morpheo::behavioural::generic;
    23 
    2423using namespace morpheo::behavioural::generic::registerfile;
    2524

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/main.cpp

    r53 r62  
    5050  const uint32_t    nb_port_write_by_bank = atoi(argv[8]);
    5151  const Tcrossbar_t crossbar              = fromString<Tcrossbar_t>(argv[9]);
    52   const Tinstance_t instance              = (strcmp(argv[10], "0") == 0)?instance_RegisterFile_Monolithic:instance_RegisterFile_Multi_Banked;
     52  const morpheo::behavioural::generic::registerfile::Tinstance_t instance              = (strcmp(argv[10], "0") == 0)?instance_RegisterFile_Monolithic:instance_RegisterFile_Multi_Banked;
    5353
    5454  try
    … …  
    6060          morpheo::behavioural::generic::registerfile::registerfile_monolithic  ::Parameters * param1 = new morpheo::behavioural::generic::registerfile::registerfile_monolithic  ::Parameters (nb_port_read         ,
    6161                                                                                                                                                                                                nb_port_write        ,
     62                                                                                                                                                                                                0                    ,
    6263                                                                                                                                                                                                nb_word              ,
    6364                                                                                                                                                                                                size_word            );

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/SelfTest/src/test.cpp

    r53 r62  
    3333  cout << "<" << name << "> : Simulation SystemC" << endl;
    3434
     35#ifdef STATISTICS
     36  morpheo::behavioural::Parameters_Statistics * _param_stat = new morpheo::behavioural::Parameters_Statistics(5,50);
     37#endif
     38 
    3539  RegisterFile * _RegisterFile = new RegisterFile (name.c_str(),
    36 #ifdef STATISTICS
    37                                              morpheo::behavioural::Parameters_Statistics(5,50),
     40#ifdef STATISTICS     
     41                                                   _param_stat,
    3842#endif
    39                                              *_param);
     43                                                   _param);
    4044 
    4145#ifdef SYSTEMC
    … …  
    7478      (*(_RegisterFile-> in_READ_VAL      [i]))        (READ_VAL      [i]);
    7579      (*(_RegisterFile->out_READ_ACK      [i]))        (READ_ACK      [i]);
     80      if (_param->_have_port_address == true)
    7681      (*(_RegisterFile-> in_READ_ADDRESS  [i]))        (READ_ADDRESS  [i]);
    7782      (*(_RegisterFile->out_READ_DATA     [i]))        (READ_DATA     [i]);
    … …  
    8287      (*(_RegisterFile-> in_WRITE_VAL     [i]))        (WRITE_VAL     [i]);
    8388      (*(_RegisterFile->out_WRITE_ACK     [i]))        (WRITE_ACK     [i]);
     89      if (_param->_have_port_address == true)
    8490      (*(_RegisterFile-> in_WRITE_ADDRESS [i]))        (WRITE_ADDRESS [i]);
    8591      (*(_RegisterFile-> in_WRITE_DATA    [i]))        (WRITE_DATA    [i]);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/Parameters.h

    r53 r62  
    2323                instance_RegisterFile_Multi_Banked} Tinstance_t;
    2424
    25 
    2625  class Parameters : public morpheo::behavioural::Parameters
    2726  {
    … …  
    3332  public : const uint32_t    _size_word    ;
    3433  public : const uint32_t    _size_address ;
     34  public : const bool        _have_port_address;
     35
    3536  public : morpheo::behavioural::generic::registerfile::registerfile_monolithic  ::Parameters * _param_registerfile_monolithic;
    3637  public : morpheo::behavioural::generic::registerfile::registerfile_multi_banked::Parameters * _param_registerfile_multi_banked;
    37    
    3838
    3939    //-----[ methods ]-----------------------------------------------------------

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/include/RegisterFile.h

    r53 r62  
    4545    // -----[ fields ]----------------------------------------------------
    4646    // Parameters
    47   protected : const string     _name;
     47  protected : const string       _name;
    4848
    49   protected : const Parameters _param;
    50 //#ifdef STATISTICS
    51 //  protected : const morpheo::behavioural::Parameters_Statistics _param_statistics;
    52 //#endif
     49  protected : const Parameters * _param;
     50#ifdef STATISTICS
     51  protected : morpheo::behavioural::Parameters_Statistics * _param_statistics;
     52#endif
    5353
    5454  public    : Component                      * _component;
    … …  
    9494#endif                                         
    9595#ifdef STATISTICS
    96                                               morpheo::behavioural::Parameters_Statistics param_statistics,
     96                                              morpheo::behavioural::Parameters_Statistics * param_statistics,
    9797#endif
    98                                               Parameters                                  param );
     98                                              Parameters                                  * param );
    9999                                               
    100   public  :          RegisterFile              (Parameters param );
    101100  public  :          ~RegisterFile             (void);
    102101                                               

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/Parameters.cpp

    r53 r62  
    2020    _nb_word           (param->_nb_word      ),
    2121    _size_word         (param->_size_word    ),
    22     _size_address      (param->_size_address )
     22    _size_address      (param->_size_address ),
     23    _have_port_address (param->_have_port_address)
    2324  {
    2425    log_printf(FUNC,RegisterFile,"Parameters","Begin");
    … …  
    3738    _nb_word           (param->_nb_word      ),
    3839    _size_word         (param->_size_word    ),
    39     _size_address      (param->_size_address )
     40    _size_address      (param->_size_address ),
     41    _have_port_address (param->_have_port_address)
    4042  {
    4143    log_printf(FUNC,RegisterFile,"Parameters","Begin");
    … …  
    5456    _nb_word           (param._nb_word      ),
    5557    _size_word         (param._size_word    ),
    56     _size_address      (param._size_address )
     58    _size_address      (param._size_address ),
     59    _have_port_address (param._have_port_address)
    5760  {
    5861    log_printf(FUNC,RegisterFile,"Parameters (copy)","Begin");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile.cpp

    r53 r62  
    2020#endif
    2121#ifdef STATISTICS
    22                               morpheo::behavioural::Parameters_Statistics             param_statistics,
     22                              morpheo::behavioural::Parameters_Statistics             * param_statistics,
    2323#endif
    24                               morpheo::behavioural::generic::registerfile::Parameters param ):
     24                              morpheo::behavioural::generic::registerfile::Parameters * param ):
    2525                              _name              (name)
    2626                              ,_param            (param)
    27 // #ifdef STATISTICS
    28 //                            ,_param_statistics (param_statistics)
    29 // #endif
     27#ifdef STATISTICS
     28                              ,_param_statistics (param_statistics)
     29#endif
    3030  {
    3131    log_printf(FUNC,RegisterFile,"RegisterFile","Begin");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_allocation.cpp

    r53 r62  
    2828    // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    2929
    30      in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param._nb_port_read];
    31     out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param._nb_port_read];
    32      in_READ_ADDRESS     = new SC_IN (Taddress_t) * [_param._nb_port_read];
    33     out_READ_DATA        = new SC_OUT(Tdata_t   ) * [_param._nb_port_read];
     30     in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param->_nb_port_read];
     31    out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read];
     32    if (_param->_have_port_address == true)
     33     in_READ_ADDRESS     = new SC_IN (Taddress_t) * [_param->_nb_port_read];
     34    out_READ_DATA        = new SC_OUT(Tdata_t   ) * [_param->_nb_port_read];
    3435
    35     for (uint32_t i=0; i<_param._nb_port_read; i++)
     36    for (uint32_t i=0; i<_param->_nb_port_read; i++)
    3637      {
    3738        rename =  "in_READ_"+toString(i)+"_VAL"    ;
    … …  
    3940        rename = "out_READ_"+toString(i)+"_ACK"    ;
    4041        out_READ_ACK     [i]  = new SC_OUT(Tcontrol_t) (rename.c_str());
     42        if (_param->_have_port_address == true)
     43          {
    4144        rename =  "in_READ_"+toString(i)+"_ADDRESS";
    4245         in_READ_ADDRESS [i]  = new SC_IN (Taddress_t) (rename.c_str());
     46          }
    4347        rename = "out_READ_"+toString(i)+"_DATA"   ;
    4448        out_READ_DATA    [i]  = new SC_OUT(Tdata_t   ) (rename.c_str());
    … …  
    4751    // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    4852
    49      in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param._nb_port_write];
    50     out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param._nb_port_write];
    51      in_WRITE_ADDRESS    = new SC_IN (Taddress_t) * [_param._nb_port_write];
    52      in_WRITE_DATA       = new SC_IN (Tdata_t   ) * [_param._nb_port_write];
     53     in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param->_nb_port_write];
     54    out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write];
     55    if (_param->_have_port_address == true)
     56     in_WRITE_ADDRESS    = new SC_IN (Taddress_t) * [_param->_nb_port_write];
     57     in_WRITE_DATA       = new SC_IN (Tdata_t   ) * [_param->_nb_port_write];
    5358   
    54     for (uint32_t i=0; i<_param._nb_port_write; i++)
     59    for (uint32_t i=0; i<_param->_nb_port_write; i++)
    5560      {
    5661        rename =  "in_WRITE_"+toString(i)+"_VAL"    ;
    … …  
    5863        rename = "out_WRITE_"+toString(i)+"_ACK"    ;
    5964        out_WRITE_ACK     [i]  = new SC_OUT(Tcontrol_t) (rename.c_str());
     65        if (_param->_have_port_address == true)
     66          {
    6067        rename =  "in_WRITE_"+toString(i)+"_ADDRESS";
    6168         in_WRITE_ADDRESS [i]  = new SC_IN (Taddress_t) (rename.c_str());
     69          }
    6270        rename =  "in_WRITE_"+toString(i)+"_DATA"   ;
    6371         in_WRITE_DATA    [i]  = new SC_IN (Tdata_t   ) (rename.c_str());
    … …  
    6573
    6674    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~                                                                                               
    67     if (_param._instance == instance_RegisterFile_Monolithic)
     75    if (_param->_instance == instance_RegisterFile_Monolithic)
    6876    // =====[ component_RegisterFile_Monolithic ]=========================
    6977      {
    … …  
    7280                                                                                                                                                                               ,_param_statistics
    7381#endif
    74                                                                                                                                                                                ,*(_param._param_registerfile_monolithic)
     82                                                                                                                                                                               ,_param->_param_registerfile_monolithic
    7583                                                                                                                                                                               );
    7684       
    … …  
    8391                                                                                                                                                                                ,_param_statistics
    8492#endif
    85                                                                                                                                                                                 ,*(_param._param_registerfile_multi_banked)
     93                                                                                                                                                                                ,_param->_param_registerfile_multi_banked
    8694                                                                                                                                                                                );
    8795       
    … …  
    8997    // ~~~~~[ Component - Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    9098
    91     if (_param._instance == instance_RegisterFile_Monolithic)
     99    if (_param->_instance == instance_RegisterFile_Monolithic)
    92100    // =====[ Component_RegisterFile_Monolithic - Instanciation ]=========
    93101      {
    … …  
    95103        (*(component_RegisterFile_Monolithic  ->in_NRESET)) (*(in_NRESET));
    96104       
    97         for (uint32_t i=0; i<_param._nb_port_read; i++)
     105        for (uint32_t i=0; i<_param->_nb_port_read; i++)
    98106          {
    99107            (*(component_RegisterFile_Monolithic  -> in_READ_VAL     [i])) (*( in_READ_VAL     [i]));   
    100108            (*(component_RegisterFile_Monolithic  ->out_READ_ACK     [i])) (*(out_READ_ACK     [i]));
     109            if (_param->_have_port_address == true)
    101110            (*(component_RegisterFile_Monolithic  -> in_READ_ADDRESS [i])) (*( in_READ_ADDRESS [i]));
    102111            (*(component_RegisterFile_Monolithic  ->out_READ_DATA    [i])) (*(out_READ_DATA    [i]));
    103112          }
    104113       
    105         for (uint32_t i=0; i<_param._nb_port_write; i++)
     114        for (uint32_t i=0; i<_param->_nb_port_write; i++)
    106115          {
    107116            (*(component_RegisterFile_Monolithic  -> in_WRITE_VAL     [i])) (*( in_WRITE_VAL     [i]));
    108117            (*(component_RegisterFile_Monolithic  ->out_WRITE_ACK     [i])) (*(out_WRITE_ACK     [i]));
     118            if (_param->_have_port_address == true)
    109119            (*(component_RegisterFile_Monolithic  -> in_WRITE_ADDRESS [i])) (*( in_WRITE_ADDRESS [i]));
    110120            (*(component_RegisterFile_Monolithic  -> in_WRITE_DATA    [i])) (*( in_WRITE_DATA    [i]));
    … …  
    117127        (*(component_RegisterFile_Multi_Banked->in_NRESET)) (*(in_NRESET));
    118128       
    119         for (uint32_t i=0; i<_param._nb_port_read; i++)
     129        for (uint32_t i=0; i<_param->_nb_port_read; i++)
    120130          {
    121131            (*(component_RegisterFile_Multi_Banked-> in_READ_VAL     [i])) (*( in_READ_VAL     [i]));   
    122132            (*(component_RegisterFile_Multi_Banked->out_READ_ACK     [i])) (*(out_READ_ACK     [i]));
     133            if (_param->_have_port_address == true)
    123134            (*(component_RegisterFile_Multi_Banked-> in_READ_ADDRESS [i])) (*( in_READ_ADDRESS [i]));
    124135            (*(component_RegisterFile_Multi_Banked->out_READ_DATA    [i])) (*(out_READ_DATA    [i]));
    125136          }
    126137       
    127         for (uint32_t i=0; i<_param._nb_port_write; i++)
     138        for (uint32_t i=0; i<_param->_nb_port_write; i++)
    128139          {
    129140            (*(component_RegisterFile_Multi_Banked-> in_WRITE_VAL     [i])) (*( in_WRITE_VAL     [i]));
    130141            (*(component_RegisterFile_Multi_Banked->out_WRITE_ACK     [i])) (*(out_WRITE_ACK     [i]));
     142            if (_param->_have_port_address == true)
    131143            (*(component_RegisterFile_Multi_Banked-> in_WRITE_ADDRESS [i])) (*( in_WRITE_ADDRESS [i]));
    132144            (*(component_RegisterFile_Multi_Banked-> in_WRITE_DATA    [i])) (*( in_WRITE_DATA    [i]));
    … …  
    134146      }
    135147
    136     if (_param._instance == instance_RegisterFile_Monolithic)
     148    if (_param->_instance == instance_RegisterFile_Monolithic)
    137149      _component = component_RegisterFile_Monolithic  ->_component;
    138150    else

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_deallocation.cpp

    r53 r62  
    2424    delete []  in_READ_VAL    ;
    2525    delete [] out_READ_ACK    ;
     26    if (_param->_have_port_address == true)
    2627    delete []  in_READ_ADDRESS;
    2728    delete [] out_READ_DATA   ;
    … …  
    3031    delete []  in_WRITE_VAL    ;
    3132    delete [] out_WRITE_ACK    ;
     33    if (_param->_have_port_address == true)
    3234    delete []  in_WRITE_ADDRESS;
    3335    delete []  in_WRITE_DATA   ;
    … …  
    3739//   delete _component;
    3840
    39     if (_param._instance == instance_RegisterFile_Monolithic)
     41    if (_param->_instance == instance_RegisterFile_Monolithic)
    4042      delete component_RegisterFile_Monolithic  ;
    4143    else

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_statistics.cpp

    r53 r62  
    1919    log_printf(FUNC,RegisterFile,"statistics","Begin");
    2020   
    21     if (_param->_instance == instance_RegisterFile_Monilithic)
    22       component_RegisterFile_Monolithic  ->statistics(depth);
     21    string txt;
     22
     23    if (_param->_instance == instance_RegisterFile_Monolithic)
     24      txt = component_RegisterFile_Monolithic  ->statistics(depth);
    2325    else
    24       component_RegisterFile_Multi_Banked->statistics(depth);
    25 
    26     string txt = _stat->print(depth);
     26      txt = component_RegisterFile_Multi_Banked->statistics(depth);
    2727   
    2828    log_printf(FUNC,RegisterFile,"statistics","End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/SelfTest/mkf.info

    r57 r62  
    33target_dep      all     Select_Priority_Fixed_0.ngc
    44target_dep      Select_Priority_Fixed_0.ngc     Select_Priority_Fixed_0.prj
    5 target_dep      Select_Priority_Fixed_0.prj     Select_Priority_Fixed_0_Pack.vhdl Select_Priority_Fixed_0.vhdl
     5target_dep      Select_Priority_Fixed_0.prj     Select_Priority_Fixed_0.vhdl Select_Priority_Fixed_0_Pack.vhdl
     6
     7# Select_Priority_Fixed_1
     8target_dep      all     Select_Priority_Fixed_1.ngc
     9target_dep      Select_Priority_Fixed_1.ngc     Select_Priority_Fixed_1.prj
     10target_dep      Select_Priority_Fixed_1.prj     Select_Priority_Fixed_1.vhdl Select_Priority_Fixed_10.vhdl Select_Priority_Fixed_10_Pack.vhdl Select_Priority_Fixed_11.vhdl Select_Priority_Fixed_11_Pack.vhdl Select_Priority_Fixed_1_Pack.vhdl
    611
    712# Select_Priority_Fixed_10
    813target_dep      all     Select_Priority_Fixed_10.ngc
    914target_dep      Select_Priority_Fixed_10.ngc    Select_Priority_Fixed_10.prj
    10 target_dep      Select_Priority_Fixed_10.prj    Select_Priority_Fixed_10_Pack.vhdl Select_Priority_Fixed_10.vhdl
     15target_dep      Select_Priority_Fixed_10.prj    Select_Priority_Fixed_10.vhdl Select_Priority_Fixed_10_Pack.vhdl
    1116
    1217# Select_Priority_Fixed_11
    1318target_dep      all     Select_Priority_Fixed_11.ngc
    1419target_dep      Select_Priority_Fixed_11.ngc    Select_Priority_Fixed_11.prj
    15 target_dep      Select_Priority_Fixed_11.prj    Select_Priority_Fixed_11_Pack.vhdl Select_Priority_Fixed_11.vhdl
    16 
    17 # Select_Priority_Fixed_1
    18 target_dep      all     Select_Priority_Fixed_1.ngc
    19 target_dep      Select_Priority_Fixed_1.ngc     Select_Priority_Fixed_1.prj
    20 target_dep      Select_Priority_Fixed_1.prj     Select_Priority_Fixed_10_Pack.vhdl Select_Priority_Fixed_10.vhdl Select_Priority_Fixed_11_Pack.vhdl Select_Priority_Fixed_11.vhdl Select_Priority_Fixed_1_Pack.vhdl Select_Priority_Fixed_1.vhdl
     20target_dep      Select_Priority_Fixed_11.prj    Select_Priority_Fixed_11.vhdl Select_Priority_Fixed_11_Pack.vhdl
    2121
    2222# Select_Priority_Fixed_2
    2323target_dep      all     Select_Priority_Fixed_2.ngc
    2424target_dep      Select_Priority_Fixed_2.ngc     Select_Priority_Fixed_2.prj
    25 target_dep      Select_Priority_Fixed_2.prj     Select_Priority_Fixed_2_Pack.vhdl Select_Priority_Fixed_2.vhdl
     25target_dep      Select_Priority_Fixed_2.prj     Select_Priority_Fixed_2.vhdl Select_Priority_Fixed_2_Pack.vhdl
    2626
    2727# Select_Priority_Fixed_3
    2828target_dep      all     Select_Priority_Fixed_3.ngc
    2929target_dep      Select_Priority_Fixed_3.ngc     Select_Priority_Fixed_3.prj
    30 target_dep      Select_Priority_Fixed_3.prj     Select_Priority_Fixed_3_Pack.vhdl Select_Priority_Fixed_3.vhdl
     30target_dep      Select_Priority_Fixed_3.prj     Select_Priority_Fixed_3.vhdl Select_Priority_Fixed_3_Pack.vhdl
    3131
    3232# Select_Priority_Fixed_4
    3333target_dep      all     Select_Priority_Fixed_4.ngc
    3434target_dep      Select_Priority_Fixed_4.ngc     Select_Priority_Fixed_4.prj
    35 target_dep      Select_Priority_Fixed_4.prj     Select_Priority_Fixed_4_Pack.vhdl Select_Priority_Fixed_4.vhdl
     35target_dep      Select_Priority_Fixed_4.prj     Select_Priority_Fixed_4.vhdl Select_Priority_Fixed_4_Pack.vhdl
    3636
    3737# Select_Priority_Fixed_5
    3838target_dep      all     Select_Priority_Fixed_5.ngc
    3939target_dep      Select_Priority_Fixed_5.ngc     Select_Priority_Fixed_5.prj
    40 target_dep      Select_Priority_Fixed_5.prj     Select_Priority_Fixed_5_Pack.vhdl Select_Priority_Fixed_5.vhdl
     40target_dep      Select_Priority_Fixed_5.prj     Select_Priority_Fixed_5.vhdl Select_Priority_Fixed_5_Pack.vhdl
    4141
    4242# Select_Priority_Fixed_6
    4343target_dep      all     Select_Priority_Fixed_6.ngc
    4444target_dep      Select_Priority_Fixed_6.ngc     Select_Priority_Fixed_6.prj
    45 target_dep      Select_Priority_Fixed_6.prj     Select_Priority_Fixed_6_Pack.vhdl Select_Priority_Fixed_6.vhdl
     45target_dep      Select_Priority_Fixed_6.prj     Select_Priority_Fixed_6.vhdl Select_Priority_Fixed_6_Pack.vhdl
    4646
    4747# Select_Priority_Fixed_7
    4848target_dep      all     Select_Priority_Fixed_7.ngc
    4949target_dep      Select_Priority_Fixed_7.ngc     Select_Priority_Fixed_7.prj
    50 target_dep      Select_Priority_Fixed_7.prj     Select_Priority_Fixed_7_Pack.vhdl Select_Priority_Fixed_7.vhdl
     50target_dep      Select_Priority_Fixed_7.prj     Select_Priority_Fixed_7.vhdl Select_Priority_Fixed_7_Pack.vhdl
    5151
    5252# Select_Priority_Fixed_8
    5353target_dep      all     Select_Priority_Fixed_8.ngc
    5454target_dep      Select_Priority_Fixed_8.ngc     Select_Priority_Fixed_8.prj
    55 target_dep      Select_Priority_Fixed_8.prj     Select_Priority_Fixed_8_Pack.vhdl Select_Priority_Fixed_8.vhdl
     55target_dep      Select_Priority_Fixed_8.prj     Select_Priority_Fixed_8.vhdl Select_Priority_Fixed_8_Pack.vhdl
    5656
    5757# Select_Priority_Fixed_9
    5858target_dep      all     Select_Priority_Fixed_9.ngc
    5959target_dep      Select_Priority_Fixed_9.ngc     Select_Priority_Fixed_9.prj
    60 target_dep      Select_Priority_Fixed_9.prj     Select_Priority_Fixed_9_Pack.vhdl Select_Priority_Fixed_9.vhdl
     60target_dep      Select_Priority_Fixed_9.prj     Select_Priority_Fixed_9.vhdl Select_Priority_Fixed_9_Pack.vhdl
    6161
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