Changeset 78 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
- Timestamp:
- Mar 27, 2008, 11:04:49 AM (16 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
r72 r78 73 73 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 74 74 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 75 //sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str());75 sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str()); 76 76 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_IMMEDIAT = new sc_signal<Tgeneral_data_t > (rename.c_str()); 77 77 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RA = new sc_signal<Tgeneral_data_t > (rename.c_str()); 78 78 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RB = new sc_signal<Tgeneral_data_t > (rename.c_str()); 79 //sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str());80 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str());79 sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str()); 80 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str()); 81 81 sc_signal<Tgeneral_address_t> * in_MEMORY_IN_NUM_REG_RD = new sc_signal<Tgeneral_address_t> (rename.c_str()); 82 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str());83 //sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str());82 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str()); 83 sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str()); 84 84 85 85 sc_signal<Tcontrol_t > * out_MEMORY_OUT_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 89 89 sc_signal<Tcontext_t > * out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t >(rename.c_str()); 90 90 sc_signal<Tpacket_t > * out_MEMORY_OUT_PACKET_ID = new sc_signal<Tpacket_t >(rename.c_str()); 91 // sc_signal<Toperation_t > * out_MEMORY_OUT_OPERATION = new sc_signal<Toperation_t >(rename.c_str()); 92 sc_signal<Ttype_t > * out_MEMORY_OUT_TYPE = new sc_signal<Ttype_t >(rename.c_str()); 91 93 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RD = new sc_signal<Tcontrol_t >(rename.c_str()); 92 94 sc_signal<Tgeneral_address_t> * out_MEMORY_OUT_NUM_REG_RD = new sc_signal<Tgeneral_address_t>(rename.c_str()); 93 95 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_DATA_RD = new sc_signal<Tgeneral_data_t >(rename.c_str()); 94 //sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str());95 //sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str());96 //sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str());96 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str()); 97 sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str()); 98 sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str()); 97 99 sc_signal<Texception_t > * out_MEMORY_OUT_EXCEPTION = new sc_signal<Texception_t >(rename.c_str()); 100 sc_signal<Tcontrol_t > * out_MEMORY_OUT_NO_SEQUENCE = new sc_signal<Tcontrol_t >(rename.c_str()); 101 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_ADDRESS = new sc_signal<Tgeneral_data_t >(rename.c_str()); 98 102 99 103 sc_signal<Tcontrol_t > * out_DCACHE_REQ_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 112 116 sc_signal<Tdcache_error_t > * in_DCACHE_RSP_ERROR = new sc_signal<Tdcache_error_t >(rename.c_str()); 113 117 114 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_ size_load_queue];115 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_ size_load_queue];116 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_ size_load_queue];117 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_ size_load_queue];118 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_bypass_memory]; 119 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_bypass_memory]; 120 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory]; 121 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_bypass_memory]; 118 122 119 for (uint32_t i=0; i<_param->_ size_load_queue; i++)123 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 120 124 { 121 125 out_BYPASS_MEMORY_VAL [i] = new sc_signal<Tcontrol_t >(rename.c_str()); … … 137 141 (*(_Load_store_unit->out_MEMORY_IN_ACK ))(*(out_MEMORY_IN_ACK )); 138 142 if (_param->_have_port_context_id) 139 143 (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID ))(*( in_MEMORY_IN_CONTEXT_ID )); 140 144 if (_param->_have_port_front_end_id) 141 145 (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID ))(*( in_MEMORY_IN_FRONT_END_ID )); 142 146 if (_param->_have_port_ooo_engine_id) 143 147 (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID ))(*( in_MEMORY_IN_OOO_ENGINE_ID )); 144 148 if (_param->_have_port_packet_id) 145 149 (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); 146 150 (*(_Load_store_unit-> in_MEMORY_IN_OPERATION ))(*( in_MEMORY_IN_OPERATION )); 151 (*(_Load_store_unit-> in_MEMORY_IN_TYPE ))(*( in_MEMORY_IN_TYPE )); 147 152 (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE)); 153 if (_param->_have_port_load_queue_ptr) 148 154 (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE )); 149 //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT ));155 (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); 150 156 (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT ))(*( in_MEMORY_IN_IMMEDIAT )); 151 157 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA ))(*( in_MEMORY_IN_DATA_RA )); 152 158 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB ))(*( in_MEMORY_IN_DATA_RB )); 153 //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC ));154 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD ));159 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); 160 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); 155 161 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD ))(*( in_MEMORY_IN_NUM_REG_RD )); 156 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE ));157 //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE ));162 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); 163 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); 158 164 159 165 (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); 160 166 (*(_Load_store_unit-> in_MEMORY_OUT_ACK ))(*( in_MEMORY_OUT_ACK )); 161 167 if (_param->_have_port_context_id) 162 168 (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID ))(*(out_MEMORY_OUT_CONTEXT_ID )); 163 169 if (_param->_have_port_front_end_id) 164 170 (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID ))(*(out_MEMORY_OUT_FRONT_END_ID )); 165 171 if (_param->_have_port_ooo_engine_id) 166 172 (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID )); 167 173 if (_param->_have_port_packet_id) 168 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 174 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 175 // (*(_Load_store_unit->out_MEMORY_OUT_OPERATION ))(*(out_MEMORY_OUT_OPERATION )); 176 (*(_Load_store_unit->out_MEMORY_OUT_TYPE ))(*(out_MEMORY_OUT_TYPE )); 169 177 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); 170 178 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); 171 179 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); 172 //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE ));173 //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE ));174 //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE ));180 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); 181 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); 182 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); 175 183 (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); 184 (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE ))(*(out_MEMORY_OUT_NO_SEQUENCE )); 185 (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS ))(*(out_MEMORY_OUT_ADDRESS )); 176 186 177 187 (*(_Load_store_unit->out_DCACHE_REQ_VAL ))(*(out_DCACHE_REQ_VAL )); … … 192 202 (*(_Load_store_unit-> in_DCACHE_RSP_ERROR ))(*( in_DCACHE_RSP_ERROR )); 193 203 194 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)195 204 { 196 for (uint32_t i=0; i<_param->_ size_load_queue; i++)205 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 197 206 { 198 207 (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); … … 486 495 in_MEMORY_IN_TYPE ->write (fifo_request.top()._type ); 487 496 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write); 497 if (_param->_have_port_load_queue_ptr) 488 498 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write ); 489 499 in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat ); … … 563 573 TEST(Tcontext_t , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id); 564 574 TEST(Tpacket_t , out_MEMORY_OUT_PACKET_ID ->read(), tab_request[packet_id]._packet_id ); 575 // TEST(Toperation_t , out_MEMORY_OUT_OPERATION ->read(), tab_request[packet_id]._operation ); 576 TEST(Ttype_t , out_MEMORY_OUT_TYPE ->read(), TYPE_MEMORY ); 565 577 TEST(Tcontrol_t , out_MEMORY_OUT_WRITE_RD ->read(), tab_request[packet_id]._write_rd ); 566 578 TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD ->read(), tab_request[packet_id]._num_reg_rd ); … … 682 694 delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; 683 695 delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; 684 //delete in_MEMORY_IN_HAS_IMMEDIAT;696 delete in_MEMORY_IN_HAS_IMMEDIAT; 685 697 delete in_MEMORY_IN_IMMEDIAT ; 686 698 delete in_MEMORY_IN_DATA_RA ; 687 699 delete in_MEMORY_IN_DATA_RB ; 688 //delete in_MEMORY_IN_DATA_RC ;689 //delete in_MEMORY_IN_WRITE_RD ;700 delete in_MEMORY_IN_DATA_RC ; 701 delete in_MEMORY_IN_WRITE_RD ; 690 702 delete in_MEMORY_IN_NUM_REG_RD ; 691 //delete in_MEMORY_IN_WRITE_RE ;692 //delete in_MEMORY_IN_NUM_REG_RE ;703 delete in_MEMORY_IN_WRITE_RE ; 704 delete in_MEMORY_IN_NUM_REG_RE ; 693 705 694 706 delete out_MEMORY_OUT_VAL ; … … 698 710 delete out_MEMORY_OUT_OOO_ENGINE_ID; 699 711 delete out_MEMORY_OUT_PACKET_ID ; 712 // delete out_MEMORY_OUT_OPERATION ; 713 delete out_MEMORY_OUT_TYPE ; 700 714 delete out_MEMORY_OUT_WRITE_RD ; 701 715 delete out_MEMORY_OUT_NUM_REG_RD; 702 716 delete out_MEMORY_OUT_DATA_RD ; 703 //delete out_MEMORY_OUT_WRITE_RE ;704 //delete out_MEMORY_OUT_NUM_REG_RE;705 //delete out_MEMORY_OUT_DATA_RE ;717 delete out_MEMORY_OUT_WRITE_RE ; 718 delete out_MEMORY_OUT_NUM_REG_RE; 719 delete out_MEMORY_OUT_DATA_RE ; 706 720 delete out_MEMORY_OUT_EXCEPTION ; 721 delete out_MEMORY_OUT_NO_SEQUENCE; 722 delete out_MEMORY_OUT_ADDRESS ; 707 723 708 724 delete out_DCACHE_REQ_VAL ; … … 721 737 delete in_DCACHE_RSP_ERROR ; 722 738 723 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)724 739 { 725 740 delete [] out_BYPASS_MEMORY_VAL ;
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