Ignore:
Timestamp:
Mar 27, 2008, 11:04:49 AM (16 years ago)
Author:
rosiere
Message:

Add :

  • Execute_loop (must be test systemC)
  • Prediction
    • Direction : predifined scheme
    • Branch Target Buffer
  • iFetch_unit
    • ifetch_queue
    • pc management
  • Decod_unit
    • coming soon : support for custom operation
  • Rename_unit
    • RAT
    • Free_list
    • Dependence RAW check
    • Load store unit pointer
  • New Environnement (hierarchy_memory will remove in a next version)


Modif :

  • Manage Custom Operation
  • All component in execute_loop to use the new statistics management

Not Finish :

  • Return Address Stack
  • Environnement
File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp

    r77 r78  
    5252         2,  //_nb_port_check         
    5353         SPECULATIVE_LOAD_COMMIT,  //_speculative_load       
     54         0,  //_nb_bypass_memory
    5455         1,  //_nb_context             
    5556         1,  //_nb_front_end           
    … …  
    5758         128,//_nb_packet             
    5859         32, //_size_general_data     
    59          64  //_nb_general_register   
     60         2 , //_size_special_data     
     61         64, //_nb_general_register   
     62         16  //_nb_special_register   
    6063        );
    6164
    … …  
    8992  sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
    9093  sc_signal<Tlsq_ptr_t        > *   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = new sc_signal<Tlsq_ptr_t        > (rename.c_str());
    91   //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
     94  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_HAS_IMMEDIAT          = new sc_signal<Tcontrol_t        > (rename.c_str());
    9295  sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_IMMEDIAT              = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    9396  sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RA               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    9497  sc_signal<Tgeneral_data_t   > *   in_MEMORY_IN_DATA_RB               = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    95   //sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
    96 //   sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
     98  sc_signal<Tspecial_data_t   > *   in_MEMORY_IN_DATA_RC               = new sc_signal<Tspecial_data_t   > (rename.c_str());
     99  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RD              = new sc_signal<Tcontrol_t        > (rename.c_str());
    97100  sc_signal<Tgeneral_address_t> *   in_MEMORY_IN_NUM_REG_RD            = new sc_signal<Tgeneral_address_t> (rename.c_str());
    98   //sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
    99   //sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
     101  sc_signal<Tcontrol_t        > *   in_MEMORY_IN_WRITE_RE              = new sc_signal<Tcontrol_t        > (rename.c_str());
     102  sc_signal<Tspecial_address_t> *   in_MEMORY_IN_NUM_REG_RE            = new sc_signal<Tspecial_address_t> (rename.c_str());
    100103
    101104  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_VAL           = new sc_signal<Tcontrol_t        >(rename.c_str());
    … …  
    105108  sc_signal<Tcontext_t        > *  out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t        >(rename.c_str());
    106109  sc_signal<Tpacket_t         > *  out_MEMORY_OUT_PACKET_ID     = new sc_signal<Tpacket_t         >(rename.c_str());
     110//   sc_signal<Toperation_t      > *  out_MEMORY_OUT_OPERATION     = new sc_signal<Toperation_t      >(rename.c_str());
     111  sc_signal<Ttype_t           > *  out_MEMORY_OUT_TYPE          = new sc_signal<Ttype_t           >(rename.c_str());
    107112  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RD      = new sc_signal<Tcontrol_t        >(rename.c_str());
    108113  sc_signal<Tgeneral_address_t> *  out_MEMORY_OUT_NUM_REG_RD    = new sc_signal<Tgeneral_address_t>(rename.c_str());
    109114  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_DATA_RD       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
    110   //sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
    111   //sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
    112   //sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
     115  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_WRITE_RE      = new sc_signal<Tcontrol_t        >(rename.c_str());
     116  sc_signal<Tspecial_address_t> *  out_MEMORY_OUT_NUM_REG_RE    = new sc_signal<Tspecial_address_t>(rename.c_str());
     117  sc_signal<Tspecial_data_t   > *  out_MEMORY_OUT_DATA_RE       = new sc_signal<Tspecial_data_t   >(rename.c_str());
    113118  sc_signal<Texception_t      > *  out_MEMORY_OUT_EXCEPTION     = new sc_signal<Texception_t      >(rename.c_str());
     119  sc_signal<Tcontrol_t        > *  out_MEMORY_OUT_NO_SEQUENCE   = new sc_signal<Tcontrol_t        >(rename.c_str());
     120  sc_signal<Tgeneral_data_t   > *  out_MEMORY_OUT_ADDRESS       = new sc_signal<Tgeneral_data_t   >(rename.c_str());
    114121
    115122  sc_signal<Tcontrol_t        > * out_DCACHE_REQ_VAL        = new sc_signal<Tcontrol_t        >(rename.c_str());
    … …  
    128135  sc_signal<Tdcache_error_t   > *  in_DCACHE_RSP_ERROR      = new sc_signal<Tdcache_error_t   >(rename.c_str());
    129136 
    130   sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_size_load_queue];
    131   sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_size_load_queue];
    132   sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue];
    133   sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_size_load_queue];
     137  sc_signal<Tcontrol_t        > ** out_BYPASS_MEMORY_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
     138  sc_signal<Tcontext_t        > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
     139  sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
     140  sc_signal<Tgeneral_data_t   > ** out_BYPASS_MEMORY_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
    134141   
    135   for (uint32_t i=0; i<_param->_size_load_queue; i++)
     142  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
    136143    {
    137144      out_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        >(rename.c_str());
    … …  
    161168    (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID            ))(*( in_MEMORY_IN_PACKET_ID            ));
    162169  (*(_Load_store_unit-> in_MEMORY_IN_OPERATION            ))(*( in_MEMORY_IN_OPERATION            ));
     170  (*(_Load_store_unit-> in_MEMORY_IN_TYPE                 ))(*( in_MEMORY_IN_TYPE                 ));
    163171  (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE));
     172  if (_param->_have_port_load_queue_ptr)
    164173  (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ));
    165   //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
     174  (*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT         ))(*( in_MEMORY_IN_HAS_IMMEDIAT         ));
    166175  (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT             ))(*( in_MEMORY_IN_IMMEDIAT             ));
    167176  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA              ))(*( in_MEMORY_IN_DATA_RA              ));
    168177  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB              ))(*( in_MEMORY_IN_DATA_RB              ));
    169   //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
    170 //   (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
     178  (*(_Load_store_unit-> in_MEMORY_IN_DATA_RC              ))(*( in_MEMORY_IN_DATA_RC              ));
     179  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD             ))(*( in_MEMORY_IN_WRITE_RD             ));
    171180  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD           ))(*( in_MEMORY_IN_NUM_REG_RD           ));
    172   //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
    173   //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
     181  (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE             ))(*( in_MEMORY_IN_WRITE_RE             ));
     182  (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE           ))(*( in_MEMORY_IN_NUM_REG_RE           ));
    174183 
    175184  (*(_Load_store_unit->out_MEMORY_OUT_VAL           ))(*(out_MEMORY_OUT_VAL           ));
    … …  
    183192  if (_param->_have_port_packet_id)
    184193    (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID     ))(*(out_MEMORY_OUT_PACKET_ID     ));
     194//   (*(_Load_store_unit->out_MEMORY_OUT_OPERATION     ))(*(out_MEMORY_OUT_OPERATION     ));
     195  (*(_Load_store_unit->out_MEMORY_OUT_TYPE          ))(*(out_MEMORY_OUT_TYPE          ));
    185196  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD      ))(*(out_MEMORY_OUT_WRITE_RD      ));
    186197  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD    ))(*(out_MEMORY_OUT_NUM_REG_RD    ));
    187198  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD       ))(*(out_MEMORY_OUT_DATA_RD       ));
    188   //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
    189   //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
    190   //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
     199  (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE      ))(*(out_MEMORY_OUT_WRITE_RE      ));
     200  (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE    ))(*(out_MEMORY_OUT_NUM_REG_RE    ));
     201  (*(_Load_store_unit->out_MEMORY_OUT_DATA_RE       ))(*(out_MEMORY_OUT_DATA_RE       ));
    191202  (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION     ))(*(out_MEMORY_OUT_EXCEPTION     ));
     203  (*(_Load_store_unit->out_MEMORY_OUT_NO_SEQUENCE   ))(*(out_MEMORY_OUT_NO_SEQUENCE   ));
     204  (*(_Load_store_unit->out_MEMORY_OUT_ADDRESS       ))(*(out_MEMORY_OUT_ADDRESS       ));
    192205
    193206  (*(_Load_store_unit->out_DCACHE_REQ_VAL       ))(*(out_DCACHE_REQ_VAL       ));
    … …  
    208221  (*(_Load_store_unit-> in_DCACHE_RSP_ERROR     ))(*( in_DCACHE_RSP_ERROR     ));
    209222
    210   if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
    211223    {
    212       for (uint32_t i=0; i<_param->_size_load_queue; i++)
     224      for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
    213225        {
    214226          (*(_Load_store_unit->out_BYPASS_MEMORY_VAL           [i]))(*(out_BYPASS_MEMORY_VAL           [i]));
    … …  
    448460                  in_MEMORY_IN_TYPE                 ->write (fifo_request.top()._type                 );
    449461                  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);
     462                  if (_param->_have_port_load_queue_ptr)
    450463                  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );
    451464                  in_MEMORY_IN_IMMEDIAT             ->write (fifo_request.top()._immediat             );
    … …  
    533546                  TEST(Tcontext_t        , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id );
    534547                  TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id);
     548//                TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    ->read(), tab_request[packet_id]._operation    );
     549                  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         ->read(), TYPE_MEMORY                          );
    535550
    536551                  if (is_operation_memory_load (tab_request[packet_id]._operation))
    … …  
    721736  delete     in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
    722737  delete     in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ;
    723   //delete     in_MEMORY_IN_HAS_IMMEDIAT;
     738  delete     in_MEMORY_IN_HAS_IMMEDIAT;
    724739  delete     in_MEMORY_IN_IMMEDIAT    ;
    725740  delete     in_MEMORY_IN_DATA_RA     ;
    726741  delete     in_MEMORY_IN_DATA_RB     ;
    727   //delete     in_MEMORY_IN_DATA_RC     ;
    728 //   delete     in_MEMORY_IN_WRITE_RD    ;
     742  delete     in_MEMORY_IN_DATA_RC     ;
     743  delete     in_MEMORY_IN_WRITE_RD    ;
    729744  delete     in_MEMORY_IN_NUM_REG_RD  ;
    730   //delete     in_MEMORY_IN_WRITE_RE    ;
    731   //delete     in_MEMORY_IN_NUM_REG_RE  ;
     745  delete     in_MEMORY_IN_WRITE_RE    ;
     746  delete     in_MEMORY_IN_NUM_REG_RE  ;
    732747   
    733748  delete    out_MEMORY_OUT_VAL       ;
    … …  
    737752  delete    out_MEMORY_OUT_OOO_ENGINE_ID;
    738753  delete    out_MEMORY_OUT_PACKET_ID ;
     754//   delete    out_MEMORY_OUT_OPERATION ;
     755  delete    out_MEMORY_OUT_TYPE      ;
    739756  delete    out_MEMORY_OUT_WRITE_RD  ;
    740757  delete    out_MEMORY_OUT_NUM_REG_RD;
    741758  delete    out_MEMORY_OUT_DATA_RD   ;
    742   //delete    out_MEMORY_OUT_WRITE_RE  ;
    743   //delete    out_MEMORY_OUT_NUM_REG_RE;
    744   //delete    out_MEMORY_OUT_DATA_RE   ;
     759  delete    out_MEMORY_OUT_WRITE_RE  ;
     760  delete    out_MEMORY_OUT_NUM_REG_RE;
     761  delete    out_MEMORY_OUT_DATA_RE   ;
    745762  delete    out_MEMORY_OUT_EXCEPTION ;
     763  delete    out_MEMORY_OUT_NO_SEQUENCE;
     764  delete    out_MEMORY_OUT_ADDRESS   ;
    746765 
    747766  delete    out_DCACHE_REQ_VAL       ;
    … …  
    760779  delete     in_DCACHE_RSP_ERROR     ;
    761780 
    762   if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
    763781    {
    764782      delete [] out_BYPASS_MEMORY_VAL       ;
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