Changeset 81 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack

Timestamp:

Apr 15, 2008, 8:40:01 PM (16 years ago)

Author:

rosiere

Message:

• Finish Environment (and test)
• Continue predictor_unit
• Add external tools
• svn keyword "Id" set

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack

Files:

• Makefile (modified) (1 prop)
• Makefile.defs (modified) (1 prop)
• Makefile.deps (modified) (1 prop)
• SelfTest/Makefile (modified) (1 prop)
• SelfTest/config_mono_context.cfg (modified) (1 diff, 1 prop)
• SelfTest/config_multi_context.cfg (modified) (1 prop)
• SelfTest/include/test.h (modified) (1 prop)
• SelfTest/src/main.cpp (modified) (1 prop)
• SelfTest/src/test.cpp (modified) (6 diffs, 1 prop)
• doc/Makefile (modified) (1 prop)
• doc/Return_Address_Stack.tex (modified) (1 prop)
• doc/sty/header.sty (modified) (1 prop)
• doc/tex/01_introduction.tex (modified) (1 prop)
• doc/tex/02_features.tex (modified) (1 prop)
• doc/tex/03_description.tex (modified) (1 prop)
• doc/tex/04_pinout.tex (modified) (1 prop)
• doc/tex/05_parameters.tex (modified) (1 prop)
• doc/tex/06_performance.tex (modified) (1 prop)
• doc/tex/07_details.tex (modified) (1 prop)
• doc/tex/08_history.tex (modified) (1 prop)
• doc/tex/root.tex (modified) (1 prop)
• include/Parameters.h (modified) (1 prop)
• include/Return_Address_Stack.h (modified) (3 diffs, 1 prop)
• include/Types.h (modified) (1 prop)
• src/Parameters.cpp (modified) (1 prop)
• src/Parameters_msg_error.cpp (modified) (1 prop)
• src/Parameters_print.cpp (modified) (1 prop)
• src/Return_Address_Stack.cpp (modified) (2 diffs, 1 prop)
• src/Return_Address_Stack_allocation.cpp (modified) (2 diffs, 1 prop)
• src/Return_Address_Stack_deallocation.cpp (modified) (3 diffs, 1 prop)
• src/Return_Address_Stack_end_cycle.cpp (modified) (1 prop)
• src/Return_Address_Stack_genMealy_decod.cpp (modified) (1 diff, 1 prop)
• src/Return_Address_Stack_genMealy_predict.cpp (modified) (1 diff, 1 prop)
• src/Return_Address_Stack_statistics_allocation.cpp (modified) (1 prop)
• src/Return_Address_Stack_statistics_deallocation.cpp (modified) (1 prop)
• src/Return_Address_Stack_transition.cpp (modified) (5 diffs, 1 prop)
• src/Return_Address_Stack_vhdl.cpp (modified) (1 prop)
• src/Return_Address_Stack_vhdl_body.cpp (modified) (1 prop)
• src/Return_Address_Stack_vhdl_declaration.cpp (modified) (1 prop)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/config_mono_context.cfg

@@ -1 +1 @@
 Return_Address_Stack
 1       1       +1      # nb_context     
-2       2       *2      # size_queue     [0]
+2       4       *2      # size_queue     [0]
 32      32      *2      # size_address   
 1       1       +1      # nb_inst_predict

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/SelfTest/src/test.cpp

@@ -11 +11 @@
 #include "Behavioural/include/Allocation.h"
 
-#define NB_ITERATION  1024
-#define CYCLE_MAX     (128*NB_ITERATION)
+#define NB_ITERATION  16
+#define CYCLE_MAX     (1024*NB_ITERATION)
 
 #define LABEL(str...)                                                   \
@@ -21 +21 @@
   } while(0)
 
-#define SC_START(cycle_offset)                                                       \
-  do                                                                                 \
-    {                                                                                \
-      /*cout << "SC_START (begin)" << endl;*/                                        \
-                                                                                     \
-      uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time());          \
-      if (cycle_offset != 0)                                                         \
-        {                                                                            \
-          cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \
-        }                                                                            \
-                                                                                     \
-      if (cycle_current > CYCLE_MAX)                                                 \
-        {                                                                            \
-          TEST_KO("Maximal cycles Reached");                                         \
-        }                                                                            \
-                                                                                     \
-      sc_start(cycle_offset);                                                        \
-                                                                                     \
-      /*cout << "SC_START (end  )" << endl;*/                                        \
+#define SC_START(cycle_offset)                                          \
+  do                                                                    \
+    {                                                                   \
+      uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \
+      if (cycle_offset != 0)                                            \
+        {                                                               \
+          cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]"; \
+          cout << " (" << __LINE__ << ")" << endl;                      \
+        }                                                               \
+                                                                        \
+      if (cycle_current > CYCLE_MAX)                                    \
+        {                                                               \
+          TEST_KO("Maximal cycles Reached");                            \
+        }                                                               \
+                                                                        \
+      sc_start(cycle_offset);                                           \
+                                                                        \
     } while(0)
 
@@ -90 +88 @@
   ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS        ," in_UPDATE_ADDRESS        ",Taddress_t,_param->_nb_inst_update );
   ALLOC1_SC_SIGNAL( in_UPDATE_MISS_PREDICTION," in_UPDATE_MISS_PREDICTION",Tcontrol_t,_param->_nb_inst_update );
+  ALLOC1_SC_SIGNAL( in_UPDATE_PREDICTION_IFETCH," in_UPDATE_PREDICTION_IFETCH",Tcontrol_t,_param->_nb_inst_update );
   
   /********************************************************
@@ -127 +126 @@
   INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_ADDRESS        ,_param->_nb_inst_update );
   INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_MISS_PREDICTION,_param->_nb_inst_update );
+  INSTANCE1_SC_SIGNAL(_Return_Address_Stack, in_UPDATE_PREDICTION_IFETCH,_param->_nb_inst_update );
 
   msg(_("<%s> : Start Simulation ............\n"),name.c_str());
@@ -157 +157 @@
       LABEL("Iteration %d",iteration);
 
-      SC_START(1);
+      if (1)
+        {
+        uint32_t port = rand()%_param->_nb_inst_predict;
+
+        LABEL("PREDICT - PUSH");
+        
+        in_PREDICT_VAL  [port]->write(1);
+        in_PREDICT_PUSH [port]->write(1);
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j<_param->_size_queue[i]; j++)
+            {
+              in_PREDICT_CONTEXT_ID   [port]->write(i);
+              in_PREDICT_ADDRESS_PUSH [port]->write(0xdeadbeef+j);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_PREDICT_ACK  [port]->read(), 1);
+              TEST(Tptr_t    , out_PREDICT_INDEX[port]->read(),(j+1)%_param->_size_queue[i]);
+              
+              SC_START(1);
+              
+            }
+        in_PREDICT_VAL [port]->write(0);
+        
+        SC_START(1);
+        
+        in_PREDICT_VAL  [port]->write(1);
+        in_PREDICT_PUSH [port]->write(1);
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j<_param->_size_queue[i]; j++)
+            {
+              in_PREDICT_CONTEXT_ID   [port]->write(i);
+              in_PREDICT_ADDRESS_PUSH [port]->write(0x21071981+j);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_PREDICT_ACK        [port]->read(), 1);
+              TEST(Tptr_t    , out_PREDICT_INDEX      [port]->read(),(j+1)%_param->_size_queue[i]);
+              TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port]->read(),0xdeadbeef+j);
+              
+              SC_START(1);
+            }
+        in_PREDICT_VAL [port]->write(0);
+        
+        LABEL("PREDICT - POP");
+        
+        in_PREDICT_VAL  [port]->write(1);
+        in_PREDICT_PUSH [port]->write(0);
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j< _param->_size_queue[i]; j++)
+            {
+              in_PREDICT_CONTEXT_ID   [port]->write(i);
+              in_PREDICT_ADDRESS_PUSH [port]->write(0xbabedead);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_PREDICT_ACK        [port]->read(), 1);
+              TEST(Tcontrol_t, out_PREDICT_HIT        [port]->read(), 1);
+              uint32_t k=(_param->_size_queue[i]-j)%_param->_size_queue[i];
+              TEST(Tptr_t    , out_PREDICT_INDEX      [port]->read(), k);
+              TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port]->read(),(0x21071981+((k==0)?(_param->_size_queue[i]-1):(k-1))));
+              
+              SC_START(1);
+            }
+        in_PREDICT_VAL [port]->write(0);
+        }
+
+      // Now, the stack is empty
+
+      if (1)
+        {
+        uint32_t port1 = rand()%_param->_nb_inst_decod;
+        uint32_t port2 = rand()%_param->_nb_inst_predict;
+
+        LABEL("DECOD - without predict");
+        
+        LABEL("DECOD - PUSH");  
+        
+        in_DECOD_VAL             [port1]->write(1);
+        in_DECOD_PUSH            [port1]->write(1);
+        in_DECOD_MISS_PREDICTION [port1]->write(0);
+        
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j<_param->_size_queue[i]; j++)
+            {
+              in_DECOD_CONTEXT_ID   [port1]->write(i);
+              in_DECOD_ADDRESS_PUSH [port1]->write(0xbeefcaca+j);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_DECOD_ACK  [port1]->read(), 1);
+              TEST(Tptr_t    , out_DECOD_INDEX[port1]->read(),(j+1)%_param->_size_queue[i]);
+              
+              SC_START(1);
+              
+            }
+        in_DECOD_VAL [port1]->write(0);
+        
+        SC_START(1);
+        
+        in_DECOD_VAL  [port1]->write(1);
+        in_DECOD_PUSH [port1]->write(1);
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j<_param->_size_queue[i]; j++)
+            {
+              in_DECOD_CONTEXT_ID   [port1]->write(i);
+              in_DECOD_ADDRESS_PUSH [port1]->write(0x21071981+j);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_DECOD_ACK        [port1]->read(), 1);
+              TEST(Tptr_t    , out_DECOD_INDEX      [port1]->read(),(j+1)%_param->_size_queue[i]);
+              TEST(Taddress_t, out_DECOD_ADDRESS_POP[port1]->read(),0xbeefcaca+j);
+              
+              SC_START(1);
+            }
+        in_DECOD_VAL [port1]->write(0);
+        
+        LABEL("DECOD - POP");
+        
+        in_DECOD_VAL  [port1]->write(1);
+        in_DECOD_PUSH [port1]->write(0);
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j< _param->_size_queue[i]; j++)
+            {
+              in_DECOD_CONTEXT_ID   [port1]->write(i);
+              in_DECOD_ADDRESS_PUSH [port1]->write(0xbabedead);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_DECOD_ACK        [port1]->read(), 1);
+              TEST(Tcontrol_t, out_DECOD_HIT        [port1]->read(), 1);
+              uint32_t k=(_param->_size_queue[i]-j)%_param->_size_queue[i];
+              TEST(Tptr_t    , out_DECOD_INDEX      [port1]->read(), k);
+              TEST(Taddress_t, out_DECOD_ADDRESS_POP[port1]->read(),(0x21071981+((k==0)?(_param->_size_queue[i]-1):(k-1))));
+              
+              SC_START(1);
+            }
+        in_DECOD_VAL [port1]->write(0);
+
+        LABEL("DECOD - with predict");
+        
+        LABEL("DECOD - PUSH (size_queue/2)");  
+        
+        in_DECOD_VAL             [port1]->write(1);
+        in_DECOD_PUSH            [port1]->write(1);
+        in_DECOD_MISS_PREDICTION [port1]->write(1);
+        
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j<_param->_size_queue[i]/2;j++)
+            {
+              in_DECOD_CONTEXT_ID   [port1]->write(i);
+              in_DECOD_ADDRESS_PUSH [port1]->write(0x01234567+j);
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_DECOD_ACK  [port1]->read(), 1);
+              TEST(Tptr_t    , out_DECOD_INDEX[port1]->read(),(j+1)%_param->_size_queue[i]);
+              
+              SC_START(1);
+              
+            }
+        in_DECOD_VAL [port1]->write(0);
+
+        LABEL("PREDICT - PUSH (size_queue/2)");  
+        
+        in_PREDICT_VAL             [port2]->write(1);
+        in_PREDICT_PUSH            [port2]->write(1);
+        
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          for (uint32_t j=0; j<_param->_size_queue[i]/2;j++)
+            {
+              in_PREDICT_CONTEXT_ID   [port2]->write(i);
+              in_PREDICT_ADDRESS_PUSH [port2]->write((0x89abcdef+j)+(_param->_size_queue[i]/2));
+              
+              SC_START(0);
+              
+              TEST(Tcontrol_t, out_PREDICT_ACK  [port2]->read(), 1);
+              TEST(Tptr_t    , out_PREDICT_INDEX[port2]->read(),(j+1+(_param->_size_queue[i]/2))%_param->_size_queue[i]);
+              
+              SC_START(1);
+            }
+
+        in_PREDICT_VAL [port2]->write(0);
+
+        LABEL("PREDICT - POP (size_queue/2)");  
+
+        in_PREDICT_VAL  [port2]->write(1);
+        in_PREDICT_PUSH [port2]->write(0);
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          {
+            for (uint32_t j=0; j< _param->_size_queue[i]/2; j++)
+              {
+                in_PREDICT_CONTEXT_ID   [port2]->write(i);
+                in_PREDICT_ADDRESS_PUSH [port2]->write(0xbabedead);
+                
+                SC_START(0);
+                
+                TEST(Tcontrol_t, out_PREDICT_ACK        [port2]->read(), 1);
+                TEST(Tcontrol_t, out_PREDICT_HIT        [port2]->read(), 1);
+                uint32_t k=  (_param->_size_queue[i]-j)%_param->_size_queue[i];
+                TEST(Tptr_t    , out_PREDICT_INDEX      [port2]->read(), k);
+
+                Taddress_t res = (0x89abcdef+((k==0)?(_param->_size_queue[i]-1):(k-1)));
+                LABEL("k      : %d",k);
+                LABEL("res    : %x",res);
+                LABEL("@_pop  : %x",out_PREDICT_ADDRESS_POP[port2]->read());
+
+                TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port2]->read(),res);
+                
+                SC_START(1);
+              }
+
+            for (uint32_t j=0; j< _param->_size_queue[i]/2; j++)
+              {
+                in_PREDICT_CONTEXT_ID   [port2]->write(i);
+                in_PREDICT_ADDRESS_PUSH [port2]->write(0xbabedead);
+                
+                SC_START(0);
+                
+                TEST(Tcontrol_t, out_PREDICT_ACK        [port2]->read(), 1);
+                TEST(Tcontrol_t, out_PREDICT_HIT        [port2]->read(), 1);
+                uint32_t k=(_param->_size_queue[i]/2-j)%_param->_size_queue[i];
+                TEST(Tptr_t    , out_PREDICT_INDEX      [port2]->read(), k);
+
+                Taddress_t res = (0x01234567+((k==0)?(_param->_size_queue[i]/2-1):(k-1)));
+
+                LABEL("k      : %d",k);
+                LABEL("res    : %x",res);
+                LABEL("@_pop  : %x",out_PREDICT_ADDRESS_POP[port2]->read());
+
+                TEST(Taddress_t, out_PREDICT_ADDRESS_POP[port2]->read(),res);
+                
+                SC_START(1);
+              }
+          }
+
+        in_PREDICT_VAL [port2]->write(0);
+
+        in_DECOD_VAL  [port1]->write(1);
+        in_DECOD_PUSH [port1]->write(0);
+        in_DECOD_MISS_PREDICTION [port1]->write(0);
+
+        for (uint32_t i=0; i<_param->_nb_context; i++)
+          {
+            for (uint32_t j=0; j< _param->_size_queue[i]/2; j++)
+              {
+                in_DECOD_CONTEXT_ID   [port1]->write(i);
+                in_DECOD_ADDRESS_PUSH [port1]->write(0xbabedead);
+                
+                SC_START(0);
+                
+                TEST(Tcontrol_t, out_DECOD_ACK        [port1]->read(), 1);
+                TEST(Tcontrol_t, out_DECOD_HIT        [port1]->read(), 1);
+                uint32_t k=(_param->_size_queue[i]/2-j)%_param->_size_queue[i];
+                TEST(Tptr_t    , out_DECOD_INDEX      [port1]->read(), k);
+
+                Taddress_t res = (0x01234567+((k==0)?(_param->_size_queue[i]/2-1):(k-1)));
+
+                LABEL("k      : %d",k);
+                LABEL("res    : %x",res);
+                LABEL("@_pop  : %x",out_DECOD_ADDRESS_POP[port1]->read());
+
+                TEST(Taddress_t, out_DECOD_ADDRESS_POP[port1]->read(),res);
+                
+                SC_START(1);
+              }
+          }
+
+        in_DECOD_VAL [port1]->write(0);
+
+      }
     }
 
@@ -195 +466 @@
   delete []  in_UPDATE_INDEX         ;
   delete []  in_UPDATE_ADDRESS       ;
+  delete []  in_UPDATE_MISS_PREDICTION;
+  delete []  in_UPDATE_PREDICTION_IFETCH;
 
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/include/Return_Address_Stack.h

@@ -84 +84 @@
 
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_VAL            ; //[nb_inst_update]
-  public    : SC_OUT(Tcontrol_t)           ** out_UPDATE_ACK            ; //[nb_inst_update]
-  public    : SC_IN (Tcontext_t)           **  in_UPDATE_CONTEXT_ID     ; //[nb_inst_update] 
-  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_PUSH           ; //[nb_inst_update]  1 = push, else pop
-  public    : SC_IN (Taddress_t)           **  in_UPDATE_ADDRESS        ; //[nb_inst_update]
-  public    : SC_IN (Tptr_t    )           **  in_UPDATE_INDEX          ; //[nb_inst_update]
-  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_MISS_PREDICTION; //[nb_inst_update]
+  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_VAL              ; //[nb_inst_update]
+  public    : SC_OUT(Tcontrol_t)           ** out_UPDATE_ACK              ; //[nb_inst_update]
+  public    : SC_IN (Tcontext_t)           **  in_UPDATE_CONTEXT_ID       ; //[nb_inst_update] 
+  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_PUSH             ; //[nb_inst_update]  1 = push, else pop
+  public    : SC_IN (Taddress_t)           **  in_UPDATE_ADDRESS          ; //[nb_inst_update]
+  public    : SC_IN (Tptr_t    )           **  in_UPDATE_INDEX            ; //[nb_inst_update]
+  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_MISS_PREDICTION  ; //[nb_inst_update]
+  public    : SC_IN (Tcontrol_t)           **  in_UPDATE_PREDICTION_IFETCH; //[nb_inst_update] // prediction only ifetch
 
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -98 +99 @@
   private   : Tptr_t                        * reg_TOP           ; //[nb_context]
   private   : Tptr_t                        * reg_BOTTOM        ; //[nb_context]
-  private   : Tcontrol_t                    * reg_EMPTY         ; //[nb_context]
+  private   : Tptr_t                        * reg_NB_ELT        ; //[nb_context]
   private   : Tptr_t                        * reg_PREDICT_TOP   ; //[nb_context]
   private   : Tptr_t                        * reg_PREDICT_BOTTOM; //[nb_context]
-  private   : Tcontrol_t                    * reg_PREDICT_EMPTY ; //[nb_context]
+  private   : Tptr_t                        * reg_PREDICT_NB_ELT; //[nb_context]
 
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -143 +144 @@
   public  : void        transition                (void);
   public  : void        genMealy_predict          (void);
-//   public  : void        genMealy_decod            (void);
+  public  : void        genMealy_decod            (void);
 //   public  : void        genMealy_update           (void);
 #endif                                         

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack.cpp

@@ -94 +94 @@
 # endif    
 
+        log_printf(INFO,Return_Address_Stack,FUNCTION,"Method - genMealy_decod");
+
+        SC_METHOD (genMealy_decod);
+        dont_initialize ();
+        sensitive << (*(in_CLOCK)).neg(); // use internal registers
+        for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+          {
+            if (_param->_have_port_context_id)
+            sensitive << (*( in_DECOD_CONTEXT_ID [i])); 
+            sensitive << (*( in_DECOD_PUSH       [i]));
+          }
+
+# ifdef SYSTEMCASS_SPECIFIC
+        // List dependency information
+        for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+          {
+            if (_param->_have_port_context_id)
+            (*(out_DECOD_HIT         [i])) (*( in_DECOD_CONTEXT_ID [i]));
+            (*(out_DECOD_HIT         [i])) (*( in_DECOD_PUSH       [i]));
+
+            if (_param->_have_port_context_id)
+            (*(out_DECOD_ADDRESS_POP [i])) (*( in_DECOD_CONTEXT_ID [i]));
+            (*(out_DECOD_ADDRESS_POP [i])) (*( in_DECOD_PUSH       [i]));
+
+            if (_param->_have_port_context_id)
+            (*(out_DECOD_INDEX       [i])) (*( in_DECOD_CONTEXT_ID [i]));
+            (*(out_DECOD_INDEX       [i])) (*( in_DECOD_PUSH       [i]));
+          }
+# endif
+
         log_printf(INFO,Return_Address_Stack,FUNCTION,"Method - genMealy_predict");
 
@@ -122 +152 @@
             (*(out_PREDICT_INDEX       [i])) (*( in_PREDICT_PUSH       [i]));
           }
-# endif    
+# endif
 #endif
       }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_allocation.cpp

@@ -96 +96 @@
       ALLOC1_SIGNAL_IN ( in_UPDATE_INDEX          ,"index"          ,Tptr_t    ,_param->_size_index);
       ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1);
+      ALLOC1_SIGNAL_IN ( in_UPDATE_PREDICTION_IFETCH,"prediction_ifetch",Tcontrol_t,1);
     }
 
@@ -106 +107 @@
     reg_TOP              = new Tptr_t     [_param->_nb_context];
     reg_BOTTOM           = new Tptr_t     [_param->_nb_context];
-    reg_EMPTY            = new Tcontrol_t [_param->_nb_context];
+    reg_NB_ELT           = new Tptr_t     [_param->_nb_context];
 
     reg_PREDICT_TOP      = new Tptr_t     [_param->_nb_context];
     reg_PREDICT_BOTTOM   = new Tptr_t     [_param->_nb_context];
-    reg_PREDICT_EMPTY    = new Tcontrol_t [_param->_nb_context];
+    reg_PREDICT_NB_ELT   = new Tptr_t     [_param->_nb_context];
 
     internal_PREDICT_ACK = new Tcontrol_t [_param->_nb_inst_predict];

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_deallocation.cpp

@@ -1 @@
-*/*
+/*
  * $Id$
  *
@@ -54 +54 @@
         delete []  in_UPDATE_INDEX         ;
         delete []  in_UPDATE_ADDRESS       ;
+        delete []  in_UPDATE_MISS_PREDICTION;
+        delete []  in_UPDATE_PREDICTION_IFETCH;
       }
 
@@ -61 +63 @@
     delete [] reg_TOP;
     delete [] reg_BOTTOM;
-    delete [] reg_EMPTY;
+    delete [] reg_NB_ELT;
     delete [] reg_PREDICT_TOP;
     delete [] reg_PREDICT_BOTTOM;
-    delete [] reg_PREDICT_EMPTY;
+    delete [] reg_PREDICT_NB_ELT;
     
     delete [] internal_PREDICT_ACK;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_decod.cpp

@@ -48 +48 @@
         // if push : value is hit
         // if pop  : val and not miss
-        internal_DECOD_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss));
+        //   when the predictor : if hit = 0, wait (is not accurate)
+        internal_DECOD_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss and (reg_NB_ELT[context]>0)));
         PORT_WRITE(out_DECOD_HIT         [i], internal_DECOD_HIT [i]);
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_genMealy_predict.cpp

@@ -48 +48 @@
         // if push : value is hit
         // if pop  : val and not miss
-        internal_PREDICT_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss));
+        internal_PREDICT_HIT [i] = (push or (reg_stack[context][top]._val and not reg_stack[context][top]._miss and (reg_PREDICT_NB_ELT[context]>0)));
         PORT_WRITE(out_PREDICT_HIT         [i], internal_PREDICT_HIT [i]);
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/src/Return_Address_Stack_transition.cpp

@@ -24 +24 @@
     log_printf(FUNC,Return_Address_Stack,FUNCTION,"Begin");
 
-    if (PORT_READ(in_NRESET))
+    if (PORT_READ(in_NRESET)==0)
       {
         for (uint32_t i=0; i<_param->_nb_context; i++)
@@ -30 +30 @@
             reg_TOP    [i] = 0;
             reg_BOTTOM [i] = 0;
+            reg_NB_ELT [i] = 0;
 
             reg_PREDICT_TOP    [i] = 0;
             reg_PREDICT_BOTTOM [i] = 0;
+            reg_PREDICT_NB_ELT [i] = 0;
 
             for (uint32_t j=0; j<_param->_size_queue [i]; j++)
-              reg_stack[i][j]._val = false;
+              {
+                reg_stack[i][j]._val     = false;
+                reg_stack[i][j]._predict = false;
+                reg_stack[i][j]._miss    = false;
+              }
           }
       }
@@ -46 +52 @@
           if (PORT_READ(in_PREDICT_VAL [i]) and internal_PREDICT_ACK [i])
             {
-              Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0;
-              Tcontrol_t push    = PORT_READ(in_PREDICT_PUSH [i]);
-              Tptr_t     top_old = reg_PREDICT_TOP [i];
-              Tptr_t     top_new;
-
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"PREDICT[%d] : Transaction",i);
+              Tcontext_t context    = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0;
+              Tcontrol_t push       = PORT_READ(in_PREDICT_PUSH [i]);
+              Tptr_t     top_old    = reg_PREDICT_TOP    [context];
+              Tptr_t     top_new    = top_old;
+              Tptr_t     bottom_old = reg_PREDICT_BOTTOM [context];
+
+              log_printf(TRACE,Return_Address_Stack,FUNCTION," * context : %d",context);
+
+              // Hit  : push or (val and not miss and not empty)
+              // Miss : ifetch is stall, no update
               if (internal_PREDICT_HIT [i])
                 {
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION," * before");
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_predict_top     : %d",reg_PREDICT_TOP    [context]);
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_predict_bottom  : %d",reg_PREDICT_BOTTOM [context]);
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_predict_nb_elt  : %d",reg_PREDICT_NB_ELT [context]);
+
                   if (push)
                     {
-                      // push
+                      // push : increase the top (circular)
                       top_new = (top_old+1)%_param->_size_queue[context];
                       
                       reg_stack [context][top_new]._val     = true; // New addr
-                      reg_stack [context][top_new]._predict = true; // Is speculative (erase a old addr)
+                      reg_stack [context][top_new]._predict = true; // Is speculative (erase a old addr (or not))
                     //reg_stack [context][top_new]._miss    = ;
                       reg_stack [context][top_new]._address = PORT_READ(in_PREDICT_ADDRESS_PUSH [i]);
 
                       // the stack is full, erase the most old stack
-                      if (top_new == reg_PREDICT_BOTTOM [i])
-                        reg_PREDICT_BOTTOM [i] = (reg_PREDICT_BOTTOM [i]+1)%_param->_size_queue[context];
+
+                      // Test if full
+                      if (reg_PREDICT_NB_ELT[context]==_param->_size_queue[context])
+                        reg_PREDICT_BOTTOM [context] = (bottom_old+1)%_param->_size_queue[context];
+                      // A new data is write : the stack is not empty
+                      if (reg_PREDICT_NB_ELT[context]< _param->_size_queue[context])
+                        reg_PREDICT_NB_ELT[context]++;
                     }
                   else
                     {
                       // pop
-                      top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1);
+//                    top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1);
                       
                     //reg_stack [context][top_new]._val     = ;
@@ -78 +100 @@
 
                       // the stack is empty
-                      if (top_old == reg_PREDICT_BOTTOM [i])
-                        reg_PREDICT_BOTTOM [i] = top_new;
-
+                      if (reg_PREDICT_NB_ELT[context]>0)
+                        {
+                          top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1);
+                          reg_PREDICT_NB_ELT[context] --;
+                        }
                     }
                   
-                  reg_PREDICT_TOP [i] = top_new;
+                  reg_PREDICT_TOP [context] = top_new;
+
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION," * after");
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_predict_top     : %d",reg_PREDICT_TOP    [context]);
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_predict_bottom  : %d",reg_PREDICT_BOTTOM [context]);
+                  log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_predict_nb_elt  : %d",reg_PREDICT_NB_ELT [context]);
                 }
             }
 
-//      // ===================================================================
-//      // =====[ DECOD ]=====================================================
-//      // ===================================================================
-//      for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
-//        if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i])
-//          {
-//            Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0;
-//            Tcontrol_t push    = PORT_READ(in_DECOD_PUSH [i]);
-//            Tptr_t     top_old = reg_TOP [i];
-//            Tptr_t     top_new;
-
-//            Tcontrol_t hit  = PORT_READ(in_DECOD_HIT             [i]);
-//            Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]);
-
-//            if (push)
-//              {
-//                // push
-//                top_new = (top_old+1)%_param->_size_queue[context];
-
-//                reg_stack [context][top_new]._val     = true;
-//                reg_stack [context][top_new]._predict = false;
-//                reg_stack [context][top_new]._miss    = false;
-//                reg_stack [context][top_new]._address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]);
-
-//                // the stack is full, erase the most old stack
-//                if (top_old == reg_BOTTOM [i])
-//                  reg_BOTTOM [i] = top_new;
-//              }
-//            else
-//              {
-//                // pop
+        // ===================================================================
+        // =====[ DECOD ]=====================================================
+        // ===================================================================
+        for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
+          if (PORT_READ(in_DECOD_VAL [i]) and internal_DECOD_ACK [i])
+            {
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"DECOD[%d] : Transaction",i);
+              Tcontext_t context    = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0;
+              Tcontrol_t push       = PORT_READ(in_DECOD_PUSH [i]);
+              Tptr_t     top_old    = reg_TOP    [context];
+              Tptr_t     top_new    = top_old;
+              Tptr_t     bottom_old = reg_BOTTOM [context];
+              //Tcontrol_t hit        = internal_DECOD_HIT [i];
+              Tcontrol_t miss       = PORT_READ(in_DECOD_MISS_PREDICTION [i]);
+
+              log_printf(TRACE,Return_Address_Stack,FUNCTION," * context : %d",context);
+
+              log_printf(TRACE,Return_Address_Stack,FUNCTION," * before");
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_top     : %d",reg_TOP    [context]);
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_bottom  : %d",reg_BOTTOM [context]);
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_nb_elt  : %d",reg_NB_ELT [context]);
+
+              if (push)
+                {
+                  // push : increase the top (circular)
+                  top_new = (top_old+1)%_param->_size_queue[context];
+                  
+                  reg_stack [context][top_new]._val     = true;  // New address
+                  reg_stack [context][top_new]._predict = false; // No speculative
+                  reg_stack [context][top_new]._miss    = false;
+                  reg_stack [context][top_new]._address = PORT_READ(in_DECOD_ADDRESS_PUSH [i]);
+                  
+                  // Test if full : if true, then icrease the bottom (erase the most old stack)
+                  if (reg_NB_ELT[context]==_param->_size_queue[context])
+                    reg_BOTTOM [context] = (bottom_old+1)%_param->_size_queue[context];
+                  // A new data is write : the stack is not empty
+                  if (reg_NB_ELT[context]< _param->_size_queue[context])
+                    reg_NB_ELT[context]++;
+                }
+              else
+                {
+                  // pop
 //                top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1);
 
-//              //reg_stack [context][top_new]._val     = ;
-//              //reg_stack [context][top_new]._predict = ;
-//              //reg_stack [context][top_new]._miss    = ;
-//              //reg_stack [context][top_new]._address = ; 
-//              }
-
-//            reg_TOP [i] = top_new;
-
-//            // have previous miss of ifetch ?
-//            // 2 miss : 
-//            //   1) miss predict : is very limited (local at context), can be update very quickly
-//            //   2) miss decod   : result is in commit stage ... 
-//            if (miss)
-//              {
-//                reg_PREDICT_BOTTOM [i] = reg_BOTTOM [i];
-//                reg_PREDICT_TOP    [i] = reg_TOP    [i];
-
-//                for (uint32_t j=0; j<_param->_size_queue [i]; j++)
-//                  if (reg_stack [context][top_new]._predict)
-//                    {
-//                      reg_stack [context][top_new]._predict = false;
-//                      reg_stack [context][top_new]._miss    = true;
-//                    }
-//              }
-//          }
+                  //reg_stack [context][top_new]._val     = ;
+                  //reg_stack [context][top_new]._predict = ;
+                  //reg_stack [context][top_new]._miss    = ;
+                  //reg_stack [context][top_new]._address = ; 
+                  
+                  // the stack is empty
+                  if (reg_NB_ELT[context]>0)
+                    {
+                      top_new = (top_old==0)?(_param->_size_queue[context]-1):(top_old-1);
+                      reg_NB_ELT[context] --;
+                    }
+                }
+              
+              reg_TOP [context] = top_new;
+              
+              log_printf(TRACE,Return_Address_Stack,FUNCTION," * after");
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_top     : %d",reg_TOP    [context]);
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_bottom  : %d",reg_BOTTOM [context]);
+              log_printf(TRACE,Return_Address_Stack,FUNCTION,"   * reg_nb_elt  : %d",reg_NB_ELT [context]);
+
+              // have previous miss of ifetch ?
+              // 2 miss : 
+              //   1) miss predict : is very limited (local at context), can be update very quickly
+              //   2) miss decod   : result is in commit stage ... 
+              if (miss)
+                {
+                  reg_PREDICT_BOTTOM [context] = reg_BOTTOM [context];
+                  reg_PREDICT_TOP    [context] = reg_TOP    [context];
+                  reg_PREDICT_NB_ELT [context] = reg_NB_ELT [context];
+                  
+                  // Scan full assoc !!!
+                  for (uint32_t j=0; j<_param->_size_queue [i]; j++)
+                    // Test if this slot is tagged with "predict" : if true, tagged as miss
+                    if (reg_stack [context][j]._predict)
+                      {
+                        reg_stack [context][j]._predict = false;
+                        reg_stack [context][j]._miss    = true;
+                      }
+                }
+            }
 
         // ===================================================================
@@ -152 +207 @@
           if (PORT_READ(in_UPDATE_VAL [i]) and internal_UPDATE_ACK [i])
             {
-              Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0;
-              Tcontrol_t push    = PORT_READ(in_UPDATE_PUSH  [i]);
-              Tptr_t     index   = PORT_READ(in_UPDATE_INDEX [i]);
+              ERRORMORPHEO(FUNCTION,"Fonction à implémenter !!!!!!!!!!!!");
               
-              if (PORT_READ(in_UPDATE_MISS_PREDICTION [i]))
-                {
-                  if (push)
-                    {
-                      // push
-                      top_new = (top_old+1)%_param->_size_queue[context];
+
+//            Tcontrol_t miss   = PORT_READ(in_UPDATE_MISS_PREDICTION [i]);
+//            // 
+//            if (miss)
+//              {
+//                Tcontrol_t context = (_param->_have_port_context_id)?PORT_READ(in_UPDATE_CONTEXT_ID [i]):0;
+//                Tcontrol_t ifetch  = PORT_READ(in_UPDATE_PREDICTION_IFETCH [i]);
+//                Tcontrol_t push    = PORT_READ(in_UPDATE_PUSH             [i]);
+//                Tptr_t     index   = PORT_READ(in_UPDATE_INDEX            [i]);
+//                Taddress_t address = PORT_READ(in_UPDATE_ADDRESS          [i]);
+                  
+//                if (push)
+//                  {
+// //                 // push
+// //                 top_new = (top_old+1)%_param->_size_queue[context];
                       
-                      reg_stack [context][index]._val     = true;
-                      reg_stack [context][index]._predict = false;
-                      reg_stack [context][index]._miss    = false;
-                      reg_stack [context][index]._address = PORT_READ(in_UPDATE_ADDRESS [i]);
-
-                    }
-                  else
-                    {
-                    //reg_stack [context][top_new]._val     = ;
-                    //reg_stack [context][top_new]._predict = ;
-                    //reg_stack [context][top_new]._miss    = ;
-                    //reg_stack [context][top_new]._address = ; 
-                    }
-                  
-                  // Mouais bof .......
-                  reg_PREDICT_TOP [i] = index;
-                }
+// //                 reg_stack [context][index]._val     = true;
+// //                 reg_stack [context][index]._predict = false;
+// //                 reg_stack [context][index]._miss    = false;
+// //                 reg_stack [context][index]._address = PORT_READ(in_UPDATE_ADDRESS [i]);
+
+//                  }
+//                else
+//                  {
+// //               //reg_stack [context][top_new]._val     = ;
+// //               //reg_stack [context][top_new]._predict = ;
+// //               //reg_stack [context][top_new]._miss    = ;
+// //               //reg_stack [context][top_new]._address = ; 
+//                  }
+                  
+// // //                  // Mouais bof .......
+// // //                  reg_PREDICT_TOP [context] = index;
+//              }
             }
       }