Changeset 95 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp
- Timestamp:
- Dec 16, 2008, 5:24:26 PM (16 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp
r94 r95 7 7 */ 8 8 9 #define NB_ITERATION 810 #define CYCLE_MAX (1 28*NB_ITERATION)9 #define NB_ITERATION 16 10 #define CYCLE_MAX (1024*NB_ITERATION) 11 11 12 12 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" … … 136 136 ALLOC1_SC_SIGNAL(out_UPDATE_RAS_INDEX ,"out_UPDATE_RAS_INDEX ",Tptr_t ,_param->_nb_inst_update); 137 137 ALLOC1_SC_SIGNAL(out_UPDATE_RAS_PREDICTION_IFETCH ,"out_UPDATE_RAS_PREDICTION_IFETCH ",Tcontrol_t ,_param->_nb_inst_update); 138 139 ALLOC1_SC_SIGNAL( in_EVENT_STATE ," in_EVENT_STATE ",Tevent_state_t ,_param->_nb_context); 140 ALLOC1_SC_SIGNAL( in_EVENT_TYPE ," in_EVENT_TYPE ",Tevent_type_t ,_param->_nb_context); 141 ALLOC1_SC_SIGNAL( in_EVENT_DEPTH ," in_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context); 142 138 143 ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT ,"out_DEPTH_CURRENT ",Tdepth_t ,_param->_nb_context); 139 144 ALLOC1_SC_SIGNAL(out_DEPTH_MIN ,"out_DEPTH_MIN ",Tdepth_t ,_param->_nb_context); … … 225 230 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_INDEX ,_param->_nb_inst_update); 226 231 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_PREDICTION_IFETCH ,_param->_nb_inst_update); 232 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_EVENT_STATE ,_param->_nb_context); 233 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_EVENT_TYPE ,_param->_nb_context); 227 234 if (_param->_have_port_depth) 228 235 { 236 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_EVENT_DEPTH ,_param->_nb_context); 229 237 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_CURRENT ,_param->_nb_context); 230 238 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_MIN ,_param->_nb_context); … … 253 261 const int32_t percent_transaction_branch_event = 75; 254 262 255 const bool test1 = false;256 const bool test2 = false;257 const bool test3 = false;263 const bool test1 = true; 264 const bool test2 = true; 265 const bool test3 = true; 258 266 const bool test4 = true; 259 267 … … 270 278 in_NRESET->write(1); 271 279 272 Tdepth_t ufpt_bottom [_param->_nb_context]; 273 Tdepth_t ufpt_top [_param->_nb_context]; 274 275 Tdepth_t upt_bottom [_param->_nb_context]; 276 Tdepth_t upt_top [_param->_nb_context]; 280 Tdepth_t ufpt_bottom [_param->_nb_context]; 281 Tdepth_t ufpt_top [_param->_nb_context]; 282 283 Tdepth_t upt_bottom [_param->_nb_context]; 284 Tdepth_t upt_top [_param->_nb_context]; 285 Tdepth_t upt_top_event[_param->_nb_context]; 277 286 278 287 for (uint32_t i=0; i<_param->_nb_context; ++i) 279 288 { 280 ufpt_bottom [i] = 0; 281 ufpt_top [i] = 0; 282 upt_bottom [i] = 0; 283 upt_top [i] = 0; 289 ufpt_bottom [i] = 0; 290 ufpt_top [i] = 0; 291 upt_bottom [i] = 0; 292 upt_top [i] = 0; 293 upt_top_event[i] = 0; 284 294 } 285 295 … … 305 315 for (uint32_t i=0; i<_param->_nb_inst_update; ++i) 306 316 in_UPDATE_ACK [i]->write(0); 307 317 for (uint32_t i=0; i<_param->_nb_context; ++i) 318 { 319 in_EVENT_STATE [i]->write(EVENT_STATE_NO_EVENT); 320 in_EVENT_TYPE [i]->write(EVENT_TYPE_NONE ); 321 } 308 322 //--------------------------------------------------------------------- 309 323 //--------------------------------------------------------------------- … … 913 927 } 914 928 } 915 929 930 { 931 LABEL("EVENT_STATE"); 932 933 SC_START(1); 934 in_EVENT_STATE [context]->write(EVENT_STATE_END ); 935 in_EVENT_TYPE [context]->write(EVENT_TYPE_MISS_SPECULATION); 936 937 SC_START(1); 938 in_EVENT_STATE [context]->write(EVENT_STATE_NO_EVENT ); 939 in_EVENT_TYPE [context]->write(EVENT_TYPE_NONE ); 940 } 916 941 917 942 // Wait Garbage Collector … … 1337 1362 } 1338 1363 1364 { 1365 LABEL("EVENT_STATE"); 1366 1367 SC_START(1); 1368 in_EVENT_STATE [context]->write(EVENT_STATE_END ); 1369 in_EVENT_TYPE [context]->write(EVENT_TYPE_MISS_SPECULATION); 1370 1371 SC_START(1); 1372 in_EVENT_STATE [context]->write(EVENT_STATE_NO_EVENT ); 1373 in_EVENT_TYPE [context]->write(EVENT_TYPE_NONE ); 1374 } 1375 1339 1376 // Wait Garbage Collector 1340 1377 { … … 1378 1415 request.take_good = 1; 1379 1416 request.flag = (request.condition == BRANCH_CONDITION_FLAG_SET)?request.take_good:(not request.take_good); 1380 request.is_accurate = false;1417 request.is_accurate = true ; 1381 1418 request.miss_ifetch = false; 1382 1419 request.miss_decod = false; … … 1472 1509 LABEL("DECOD [%d] %d - %d", 1473 1510 port, 1474 in_ PREDICT_VAL [port]->read(),1475 out_ PREDICT_ACK [port]->read());1511 in_DECOD_VAL [port]->read(), 1512 out_DECOD_ACK [port]->read()); 1476 1513 1477 1514 if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read()) … … 1520 1557 request.take_good = 1; 1521 1558 request.flag = (request.condition == BRANCH_CONDITION_FLAG_SET)?request.take_good:(not request.take_good); 1522 request.is_accurate = false;1559 request.is_accurate = true ; 1523 1560 request.miss_ifetch = false; 1524 1561 request.miss_decod = false; … … 1583 1620 std::list<request_t>::iterator it_event; 1584 1621 { 1585 LABEL("BRANCH_COMPLETE - hitifetch");1622 LABEL("BRANCH_COMPLETE - Miss ifetch"); 1586 1623 1587 1624 uint32_t port = rand() % _param->_nb_inst_branch_complete; … … 1600 1637 1601 1638 if (update_ras(it_event->condition)) 1602 it_event->address_good = ~(it_event->address_dest); 1639 { 1640 it_event->address_good = ~(it_event->address_dest); 1641 } 1603 1642 else 1604 1643 { … … 1649 1688 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_event->address_good); 1650 1689 1651 upt_top [it_event->context] = it_event->upt_ptr; 1690 upt_top_event [it_event->context] = upt_top [it_event->context]; 1691 upt_top [it_event->context] = it_event->upt_ptr; 1692 } 1693 1694 SC_START(1); 1695 } while (not have_transaction); 1696 1697 in_BRANCH_COMPLETE_VAL [port]->write(0); 1698 1699 if (_param->_have_port_depth) 1700 TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]); 1701 TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]); 1702 } 1703 } 1704 1705 { 1706 LABEL("BRANCH_COMPLETE - Hit ifetch"); 1707 1708 uint32_t port = rand() % _param->_nb_inst_branch_complete; 1709 1710 LABEL(" * port : %d",port); 1711 1712 std::list<request_t>::iterator it_upt = upt.begin(); 1713 1714 while (it_upt != it_event) 1715 { 1716 bool have_transaction = false; 1717 1718 do 1719 { 1720 in_BRANCH_COMPLETE_VAL [port]->write((rand()%100)<percent_transaction_branch_complete); 1721 in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(it_upt->context ); 1722 in_BRANCH_COMPLETE_DEPTH [port]->write(it_upt->upt_ptr ); 1723 in_BRANCH_COMPLETE_ADDRESS [port]->write(it_upt->address_dest); 1724 in_BRANCH_COMPLETE_FLAG [port]->write(it_upt->flag ); 1725 1726 if (_param->_have_port_depth) 1727 TEST(Tdepth_t,out_DEPTH_MIN [context]->read(), upt_bottom [context]); 1728 TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]); 1729 1730 SC_START(0); 1731 1732 LABEL("BRANCH_COMPLETE [%d] %d - %d.",port,in_BRANCH_COMPLETE_VAL [port]->read(),out_BRANCH_COMPLETE_ACK [port]->read()); 1733 1734 if (in_BRANCH_COMPLETE_VAL [port]->read() and out_BRANCH_COMPLETE_ACK [port]->read()) 1735 { 1736 LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port); 1737 LABEL(" * CONTEXT_ID %d" ,it_upt->context ); 1738 LABEL(" * DEPTH %d" ,it_upt->upt_ptr ); 1739 LABEL(" * CONDITION %d" ,it_upt->condition ); 1740 LABEL(" * ADDRESS %.8x",it_upt->address_dest); 1741 LABEL(" * FLAG %d" ,it_upt->flag ); 1742 1743 have_transaction = true; 1744 1745 TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),it_upt->miss_commit ); 1746 TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),it_upt->take ); 1747 it_upt->take_good = it_upt->take; 1748 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),it_upt->address_src ); 1749 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),it_upt->address_dest); 1750 1751 it_upt++; 1652 1752 } 1653 1753 … … 1740 1840 1741 1841 { 1742 LABEL("UPDATE - upt ");1842 LABEL("UPDATE - upt (after event)"); 1743 1843 1744 1844 uint32_t port = 0; … … 1746 1846 LABEL(" * port : %d",port); 1747 1847 std::list<request_t>::iterator it_upt = upt.end(); 1748 --it_upt;1749 1848 1750 1849 // for (uint32_t i=0; i<upt.size(); i++) 1751 while (it_upt != it_event)1850 do 1752 1851 { 1852 --it_upt; 1853 1753 1854 bool have_transaction = false; 1754 1855 1856 if (need_update(it_upt->condition)) 1755 1857 do 1756 1858 { … … 1768 1870 { 1769 1871 LABEL("UPDATE [%d] - Transaction accepted",port); 1872 LABEL(" * address_src : %.8x",it_upt->address_src); 1873 LABEL(" * out_UPDATE_BTB_ADDRESS_SRC : %.8x",out_UPDATE_BTB_ADDRESS_SRC[port]->read()); 1874 1770 1875 have_transaction = true; 1771 1876 1877 bool btb_val = ((it_upt == it_event) and 1878 (update_btb(it_upt->condition))); 1879 bool dir_val = ((it_upt == it_event) and 1880 update_dir(it_upt->condition) and 1881 not (it_upt->miss_ifetch or it_upt->miss_decod)); 1882 bool ras_val = update_ras(it_upt->condition); 1883 1772 1884 if (_param->_have_port_context_id) 1773 1885 TEST(Tcontext_t ,out_UPDATE_CONTEXT_ID [port]->read(),it_upt->context); 1774 1886 TEST(Tcontrol_t ,out_UPDATE_MISS_PREDICTION [port]->read(),it_upt->miss_commit); 1775 TEST(Tcontrol_t ,out_UPDATE_ DIRECTION_GOOD [port]->read(),it_upt->take_good);1776 TEST(Tcontrol_t ,out_UPDATE_BTB_VAL [port]->read(),update_btb(it_upt->condition)); 1777 if ( update_btb(it_upt->condition))1887 TEST(Tcontrol_t ,out_UPDATE_BTB_VAL [port]->read(),btb_val); 1888 1889 if (btb_val) 1778 1890 { 1779 1891 TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_SRC [port]->read(),it_upt->address_src); … … 1781 1893 TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION [port]->read(),it_upt->condition); 1782 1894 } 1783 TEST(Tcontrol_t ,out_UPDATE_DIR_VAL [port]->read(), update_dir(it_upt->condition) and not (it_upt->miss_ifetch or it_upt->miss_decod));1895 TEST(Tcontrol_t ,out_UPDATE_DIR_VAL [port]->read(),dir_val); 1784 1896 1785 if (update_dir(it_upt->condition)) 1897 if (dir_val) 1898 { 1899 TEST(Tcontrol_t ,out_UPDATE_DIRECTION_GOOD [port]->read(),it_upt->take_good); 1786 1900 if (_param->_have_port_history) 1787 1901 TEST(Thistory_t ,out_UPDATE_DIR_HISTORY [port]->read(),it_upt->history); 1788 TEST(Tcontrol_t ,out_UPDATE_RAS_VAL [port]->read(),update_ras(it_upt->condition)); 1789 if (update_ras(it_upt->condition)) 1902 } 1903 TEST(Tcontrol_t ,out_UPDATE_RAS_VAL [port]->read(),ras_val); 1904 1905 if (ras_val) 1790 1906 { 1791 1907 // TEST(Tcontrol_t ,out_UPDATE_RAS_FLUSH [port]->read(),0); … … 1796 1912 } 1797 1913 1798 -- it_upt;1914 // -- it_upt; 1799 1915 } 1800 1916 … … 1808 1924 // TEST(Tdepth_t,out_DEPTH_MAX [context]->read(), upt_top [context]); 1809 1925 } 1926 while (it_upt != it_event); 1927 1810 1928 } 1811 // upt.clear(); // Not yet 1812 1929 1813 1930 { 1814 1931 LABEL("BRANCH_EVENT - have miss decod"); … … 1852 1969 } 1853 1970 } 1854 1971 1855 1972 { 1856 LABEL("UPDATE - upt"); 1973 LABEL("EVENT_STATE"); 1974 1975 SC_START(1); 1976 in_EVENT_STATE [context]->write(EVENT_STATE_END ); 1977 in_EVENT_TYPE [context]->write(EVENT_TYPE_MISS_SPECULATION); 1978 1979 SC_START(1); 1980 in_EVENT_STATE [context]->write(EVENT_STATE_NO_EVENT ); 1981 in_EVENT_TYPE [context]->write(EVENT_TYPE_NONE ); 1982 } 1983 1984 { 1985 LABEL("UPDATE - upt (before event)"); 1857 1986 1858 1987 uint32_t port = 0; 1859 1988 1860 1989 LABEL(" * port : %d",port); 1990 LABEL(" * size : %d",upt.size()); 1861 1991 std::list<request_t>::iterator it_upt = upt.begin(); 1862 1992 … … 1908 2038 } 1909 2039 1910 --it_upt;2040 ++ it_upt; 1911 2041 } 1912 2042 … … 1920 2050 } 1921 2051 } 1922 upt.clear(); // Not yet2052 upt.clear(); 1923 2053 1924 2054 // Wait Garbage Collector 1925 2055 { 1926 upt_bottom [context] = (upt_bottom [context]+1)%_param->_size_upt_queue[context]; 1927 // upt_top [context] = (upt_top [context]); 2056 LABEL("GARBAGE COLLECTOR"); 2057 LABEL(" * upt bottom : %d",upt_bottom [context]); 2058 LABEL(" * upt top : %d",upt_top [context]); 2059 2060 upt_top [context] = (upt_top_event [context]); 2061 upt_bottom [context] = (upt_top [context]); 1928 2062 1929 2063 while ((upt_bottom [context] != out_DEPTH_MIN [context]->read()) or 1930 2064 (upt_top [context] != out_DEPTH_MAX [context]->read())) 1931 SC_START(1); 2065 { 2066 SC_START(1); 2067 } 1932 2068 1933 2069 } … … 1993 2129 delete [] out_BRANCH_EVENT_VAL ; 1994 2130 delete [] in_BRANCH_EVENT_ACK ; 1995 // 1996 // 1997 // 2131 //delete [] in_BRANCH_EVENT_CONTEXT_ID ; 2132 //delete [] in_BRANCH_EVENT_DEPTH ; 2133 //delete [] out_BRANCH_EVENT_MISS_PREDICTION; 1998 2134 delete [] out_BRANCH_EVENT_ADDRESS_SRC ; 1999 2135 delete [] out_BRANCH_EVENT_ADDRESS_DEST_VAL; … … 2019 2155 delete [] out_UPDATE_RAS_PREDICTION_IFETCH; 2020 2156 2157 DELETE1_SC_SIGNAL( in_EVENT_STATE ,_param->_nb_context); 2158 DELETE1_SC_SIGNAL( in_EVENT_TYPE ,_param->_nb_context); 2159 DELETE1_SC_SIGNAL( in_EVENT_DEPTH ,_param->_nb_context); 2160 2021 2161 // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2022 2162 delete [] out_DEPTH_CURRENT;
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