source: PROJECT_SMART_EEG/trunk/hw/sync_sys/video_codec

Name Size Rev Age Author Last Change
../
video_codec.v 2.6 KB ​ 89   10 years szahmed Added Headline comments for Verilog files explaining their brief …
video_codec_hw.tcl 7.2 KB ​ 87   10 years lambert Adding generation simulation support for verilog
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