Changeset 1051 for trunk/platforms/tsar_generic_iob/top.cpp
- Timestamp:
- Apr 11, 2017, 11:50:57 PM (8 years ago)
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trunk/platforms/tsar_generic_iob/top.cpp
r1050 r1051 50 50 // - One L2 cache controller 51 51 // - One XICU component, 52 // - One - optional - single channel DMA controler, 53 // - One - optional - hardware coprocessor 52 // - One multi channels DMA controler (number of channels is defined by nprocs) 54 53 // The XICU component is mainly used to handle WTI IRQs, as at most 55 // 2HWI IRQs are connected to XICU in each cluster:54 // (nprocs + 1) HWI IRQs are connected to XICU in each cluster: 56 55 // - IRQ_IN[0] : MMC 57 // - IRQ_IN[1 ] : MWR56 // - IRQ_IN[1 to nprocs] : DMA 58 57 // 59 58 // All clusters are identical, but cluster(0,0) and cluster(XMAX-1,YMAX-1) … … 151 150 152 151 ////////////////////////////////////////////////////////////////// 153 // Coprocessor type (must be replicated in tsar_iob_cluster)154 //////////////////////////////////////////////////////////////////155 156 #define MWR_COPROC_CPY 0157 #define MWR_COPROC_DCT 1158 #define MWR_COPROC_GCD 2159 160 //////////////////////////////////////////////////////////////////161 152 // Virtual disk selection => OS selection 162 153 ////////////////////////////////////////////////////////////////// … … 271 262 // Two different initiators cannot have the same SRCID, but a given 272 263 // initiator can have two alias SRCIDs: 273 // - Internal initiators (procs, m wmr) are replicated in all clusters,264 // - Internal initiators (procs, mdma) are replicated in all clusters, 274 265 // and each initiator has one single SRCID. 275 266 // - External initiators (disk, cdma) are not replicated, but can be … … 285 276 286 277 #define PROC_LOCAL_SRCID 0x0 // from 0 to 7 287 #define M WMR_LOCAL_SRCID 0x8278 #define MDMA_LOCAL_SRCID 0x8 288 279 #define IOBX_LOCAL_SRCID 0x9 289 280 #define MEMC_LOCAL_SRCID 0xA … … 299 290 #define INT_MEMC_TGT_ID 0 300 291 #define INT_XICU_TGT_ID 1 301 #define INT_M WMR_TGT_ID 2292 #define INT_MDMA_TGT_ID 2 302 293 #define INT_IOBX_TGT_ID 3 303 294 304 295 #define INT_PROC_INI_ID 0 // from 0 to (NB_PROCS_MAX-1) 305 #define INT_M WMR_INI_ID (NB_PROCS_MAX)296 #define INT_MDMA_INI_ID (NB_PROCS_MAX) 306 297 #define INT_IOBX_INI_ID (NB_PROCS_MAX+1) 307 298 … … 478 469 "Error in tsar_generic_iob : You must have X_WIDTH == Y_WIDTH == 4"); 479 470 480 assert( ((USE_MWR_CPY + USE_MWR_GCD + USE_MWR_DCT) == 1) and481 "Error in tsar_generic_iob : No MWR coprocessor found in hard_config.h");482 483 471 assert( ((USE_IOC_HBA + USE_IOC_BDV + USE_IOC_SDC) == 1) and 484 472 "Error in tsar_generic_iob : NoIOC controller found in hard_config.h"); … … 536 524 // - two levels address decoding for commands 537 525 // - two levels srcid decoding for responses 538 // - NB_PROCS_MAX + 2 (M WMR, IOBX) local initiators per cluster539 // - 4 local targets (MEMC, XICU, M WMR, IOBX) per cluster526 // - NB_PROCS_MAX + 2 (MDMA, IOBX) local initiators per cluster 527 // - 4 local targets (MEMC, XICU, MDMA, IOBX) per cluster 540 528 ///////////////////////////////////////////////////////////////////// 541 529 MappingTable maptab_int( vci_address_width, … … 570 558 IntTab(cluster(x,y), INT_XICU_TGT_ID), not cacheable)); 571 559 572 std::ostringstream sm wmr;573 sm wmr << "int_seg_mwmr_" << x << "_" << y;574 maptab_int.add(Segment(sm wmr.str(), SEG_MWR_BASE+offset, SEG_MWR_SIZE,575 IntTab(cluster(x,y), INT_M WMR_TGT_ID), not cacheable));560 std::ostringstream smdma; 561 smdma << "int_seg_mdma_" << x << "_" << y; 562 maptab_int.add(Segment(smdma.str(), SEG_DMA_BASE+offset, SEG_DMA_SIZE, 563 IntTab(cluster(x,y), INT_MDMA_TGT_ID), not cacheable)); 576 564 577 565 // the following segments are only defined in cluster_iob0 or in cluster_iob1 … … 618 606 // and the port index on the local interconnect. 619 607 620 maptab_int.srcid_map( IntTab( cluster(x,y), M WMR_LOCAL_SRCID ),621 IntTab( cluster(x,y), INT_M WMR_INI_ID ) );608 maptab_int.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ), 609 IntTab( cluster(x,y), INT_MDMA_INI_ID ) ); 622 610 623 611 maptab_int.srcid_map( IntTab( cluster(x,y), IOBX_LOCAL_SRCID ), … … 1114 1102 dspin_ram_rsp_width>* clusters[XMAX][YMAX]; 1115 1103 1116 unsigned int coproc_type; 1117 if ( USE_MWR_CPY ) coproc_type = MWR_COPROC_CPY; 1118 if ( USE_MWR_DCT ) coproc_type = MWR_COPROC_DCT; 1119 if ( USE_MWR_GCD ) coproc_type = MWR_COPROC_GCD; 1104 unsigned int coproc_type = 0; 1120 1105 1121 1106 #if USE_OPENMP … … 1176 1161 INT_MEMC_TGT_ID, 1177 1162 INT_XICU_TGT_ID, 1178 INT_M WMR_TGT_ID,1163 INT_MDMA_TGT_ID, 1179 1164 INT_IOBX_TGT_ID, 1180 1165 1181 1166 INT_PROC_INI_ID, 1182 INT_M WMR_INI_ID,1167 INT_MDMA_INI_ID, 1183 1168 INT_IOBX_INI_ID, 1184 1169 … … 1692 1677 clusters[x][y]->signal_int_vci_ini_proc[l].print_trace(proc_signame.str()); 1693 1678 1679 // XICU 1694 1680 clusters[x][y]->xicu->print_trace(1); 1695 1681 std::ostringstream xicu_signame; … … 1697 1683 clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str()); 1698 1684 1699 // coprocessor in cluster(x,y) 1700 // clusters[x][y]->mwmr->print_trace(); 1701 // std::ostringstream mwmr_tgt_signame; 1702 // mwmr_tgt_signame << "[SIG]MWMR_TGT_" << x << "_" << y; 1703 // clusters[x][y]->signal_int_vci_tgt_mwmr.print_trace(mwmr_tgt_signame.str()); 1704 // std::ostringstream mwmr_ini_signame; 1705 // mwmr_ini_signame << "[SIG]MWMR_INI_" << x << "_" << y; 1706 // clusters[x][y]->signal_int_vci_ini_mwmr.print_trace(mwmr_ini_signame.str()); 1707 // if ( USE_MWR_CPY ) clusters[x][y]->cpy->print_trace(); 1708 // if ( USE_MWR_DCT ) clusters[x][y]->dct->print_trace(); 1709 // if ( USE_MWR_GCD ) clusters[x][y]->gcd->print_trace(); 1685 // MDMA 1686 // clusters[x][y]->mdma->print_trace(); 1687 // std::ostringstream mdma_tgt_signame; 1688 // mdma_tgt_signame << "[SIG]MDMA_TGT_" << x << "_" << y; 1689 // clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_tgt_signame.str()); 1690 // std::ostringstream mdma_ini_signame; 1691 // mdma_ini_signame << "[SIG]MDMA_INI_" << x << "_" << y; 1692 // clusters[x][y]->signal_int_vci_ini_mdma.print_trace(mdma_ini_signame.str()); 1710 1693 1711 1694 // local interrupts in cluster(x,y) … … 1714 1697 << " ACTIVE" << std::endl; 1715 1698 1716 if( clusters[x][y]->signal_irq_mwmr.read() ) 1717 std::cout << "### IRQ_MWR_" << std::dec << x << "_" << y 1718 << " ACTIVE" << std::endl; 1719 1720 for ( size_t c = 0 ; c < NB_PROCS_MAX ; c++ ) 1699 for( size_t i = 0 ; i < NB_PROCS_MAX ; i++ ) 1721 1700 { 1722 if( clusters[x][y]->signal_proc_it[c<<2].read() ) 1723 std::cout << "### IRQ_PROC_" << std::dec << x << "_" << y << "_" << c 1701 if( clusters[x][y]->signal_irq_mdma[i].read() ) 1702 std::cout << "### IRQ_DMA_" << std::dec << x << "_" << y << "_" << i 1703 << " ACTIVE" << std::endl; 1704 1705 if( clusters[x][y]->signal_proc_it[i<<2].read() ) 1706 std::cout << "### IRQ_PROC_" << std::dec << x << "_" << y << "_" << i 1724 1707 << " ACTIVE" << std::endl; 1725 1708 }
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