Changeset 255 for trunk/platforms/tsarv4_generic_mmu/top.cpp
- Timestamp:
- Aug 16, 2012, 7:36:04 PM (12 years ago)
- File:
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- 1 edited
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trunk/platforms/tsarv4_generic_mmu/top.cpp (modified) (28 diffs)
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trunk/platforms/tsarv4_generic_mmu/top.cpp
r249 r255 3 3 // Author: Alain Greiner 4 4 // Copyright: UPMC/LIP6 5 // Date : june 20115 // Date : august 2012 6 6 // This program is released under the GNU public license 7 7 ///////////////////////////////////////////////////////////////////////// … … 11 11 // - It uses the vci_cc_vcache_wrapper_v4 12 12 // - It uses the vci_mem_cache_v4 13 // - It uses one vci_xicu, one vci_multi_tty, 14 // and one vci_multi_dma controler per cluster. 15 // 13 // - It contains one vci_xicu and one vci_multi_dma per cluster. 14 // The peripherals BDEV, FBUF, MTTY, and the boot BROM 15 // are in the cluster containing address 0xBFC00000. 16 // 16 17 // It is build with one single component implementing a cluster: 17 18 // The Tsarv4ClusterMmu component is defined in files 18 19 // tsarv4_cluster_mmu.* (with * = cpp, h, sd) 19 20 // 21 // The IRQs are connected to XICUs as follow: 22 // - The IRQ_IN[0] to IRQ_IN[7] ports are not used in all clusters. 23 // - The DMA IRQs are connected to IRQ_IN[8] to IRQ_IN[15] in all clusters. 24 // - The TTY IRQs are connected to IRQ_IN[16] to IRQ_IN[30] in I/O cluster. 25 // - The BDEV IRQ is connected to IRQ_IN[31] in I/O cluster. 26 // 20 27 // The physical address space is 32 bits. 21 28 // The number of clusters cannot be larger than 256. 22 // The number of processors per cluster cannot be larger than 4. 23 // The parameters must be power of 2. 24 // - xmax : number of clusters in a row 25 // - ymax : number of clusters in a column 26 // - nprocs : number of processors per cluster 29 // The number of processors per cluster cannot be larger than 8. 27 30 // 28 // The peripherals BDEV, FBUF, and the boot BROM 29 // are in the cluster containing address 0xBFC00000. 30 // - The nprocs TTY IRQs are connected to IRQ_IN[0] to IRQ_IN[3] 31 // - The nprocs DMA IRQs are connected to IRQ_IN[4] to IRQ_IN[7] 32 // - The IOC IRQ is connected to IRQ_IN[8] 31 // The hardware parameters are : 32 // - xmax : number of clusters in a row (power of 2) 33 // - ymax : number of clusters in a column (power of 2) 34 // - nb_procs : number of processors per cluster (power of 2) 35 // - nb_dmas : number of DMA channels per cluster (< 9) 36 // - nb_ttys : number of TTYs in I/O cluster (< 16) 33 37 // 34 38 // General policy for 32 bits physical address decoding: … … 97 101 /////////////////////////////////////////////////// 98 102 99 #define MESH_XMAX 2 100 #define MESH_YMAX 2 101 102 #define NPROCS 4 103 #define XRAM_LATENCY 0 104 105 #define MEMC_WAYS 16 106 #define MEMC_SETS 256 107 108 #define L1_IWAYS 4 109 #define L1_ISETS 64 110 111 #define L1_DWAYS 4 112 #define L1_DSETS 64 113 114 #define FBUF_X_SIZE 512 115 #define FBUF_Y_SIZE 512 116 117 #define BDEV_SECTOR_SIZE 128 118 #define BDEV_IMAGE_NAME "../../softs/soft_transpose_giet/couple_512.raw" 119 120 #define BOOT_SOFT_NAME "../../softs/soft_transpose_giet/bin.soft" 121 122 #define MAX_FROZEN_CYCLES 100000 103 #define MESH_XMAX 2 104 #define MESH_YMAX 2 105 106 #define NB_PROCS 1 107 #define NB_TTYS 8 108 #define NB_DMAS 1 109 110 #define XRAM_LATENCY 0 111 112 #define MEMC_WAYS 16 113 #define MEMC_SETS 256 114 115 #define L1_IWAYS 4 116 #define L1_ISETS 64 117 118 #define L1_DWAYS 4 119 #define L1_DSETS 64 120 121 #define FBUF_X_SIZE 128 122 #define FBUF_Y_SIZE 128 123 124 #define BDEV_SECTOR_SIZE 512 125 #define BDEV_IMAGE_NAME "/Users/alain/Documents/licence/almo_svn_2011/soft/giet_vm/display/images.raw" 126 127 #define BOOT_SOFT_NAME "/Users/alain/Documents/licence/almo_svn_2011/soft/giet_vm/soft.elf" 128 129 #define MAX_FROZEN_CYCLES 10000 130 131 #define TRACE_MEMC_ID 1000000 132 #define TRACE_PROC_ID 1000000 123 133 124 134 ///////////////////////////////////////////////////////// … … 132 142 // There is 4 specific segments in the "IO" cluster 133 143 // (containing address 0xBF000000) 134 // - seg_reset 144 // - seg_reset -> BROM / BASE = 0xBFC00000 (1 Mbytes) 135 145 // - seg_fbuf -> FBUF / BASE = 0xBFD00000 (2 M bytes) 136 146 // - seg_bdev -> BDEV / BASE = 0xBFF10000 … … 142 152 /////////////////////////////////////////////////// 143 153 144 // specific segments in "IO" cluster 154 // specific segments in "IO" cluster : absolute physical address 145 155 146 156 #define BROM_BASE 0xBFC00000 147 157 #define BROM_SIZE 0x00100000 148 158 149 #define FBUF_BASE 0x BFD00000159 #define FBUF_BASE 0x80D00000 150 160 #define FBUF_SIZE 0x00200000 151 161 152 #define BDEV_BASE 0xBFF10000 153 #define BDEV_SIZE 0x00000020 154 155 #define MTTY_BASE 0xBFF20000 156 #define MTTY_SIZE 0x00000040 157 158 // replicated segments 162 #define BDEV_BASE 0x80F10000 163 #define BDEV_SIZE 0x00001000 164 165 #define MTTY_BASE 0x80F20000 166 #define MTTY_SIZE 0x00001000 167 168 // replicated segments : physical address is incremented by an offset 169 // offset = cluster(x,y) << (address_width-x_width-y_width); 159 170 160 171 #define MEMC_BASE 0x00000000 … … 165 176 166 177 #define CDMA_BASE 0x00F30000 167 #define CDMA_SIZE 0x00004000 168 169 #define PROC_BASE 0x00D00000 170 #define PROC_SIZE 0x00000010 178 #define CDMA_SIZE 0x00008000 171 179 172 180 //////////////////////////////////////////////////////////////////// … … 191 199 192 200 193 char soft_name[256] = BOOT_SOFT_NAME; 201 char soft_name[256] = BOOT_SOFT_NAME; // pathname to binary code 194 202 size_t ncycles = 1000000000; // simulated cycles 195 size_t xmax = MESH_XMAX; // number of clusters in a row203 size_t xmax = MESH_XMAX; // number of clusters in a row 196 204 size_t ymax = MESH_YMAX; // number of clusters in a column 197 size_t nprocs = NPROCS; // number of processors per cluster 198 size_t xfb = FBUF_X_SIZE; // frameBuffer column number 205 size_t nb_procs = NB_PROCS; // number of processors per cluster 206 size_t nb_dmas = NB_DMAS; // number of RDMA channels per cluster 207 size_t nb_ttys = NB_TTYS; // number of TTY terminals in I/O cluster 208 size_t xfb = FBUF_X_SIZE; // frameBuffer column number 199 209 size_t yfb = FBUF_Y_SIZE; // frameBuffer lines number 200 210 size_t memc_ways = MEMC_WAYS; … … 206 216 char disk_name[256] = BDEV_IMAGE_NAME; // pathname to the disk image 207 217 size_t blk_size = BDEV_SECTOR_SIZE; // block size (in bytes) 208 size_t xram_latency = XRAM_LATENCY; // external RAM latency 209 bool trace_ok = false; // trace activated 210 size_t trace_period = 1; // trace period 211 uint32_t from_cycle = 0; // debug start cycle 218 size_t xram_latency = XRAM_LATENCY; // external RAM latency 219 bool debug_ok = false; // trace activated 220 size_t debug_period = 1; // trace period 221 size_t debug_memc_id = TRACE_MEMC_ID; // index of memc to be traced (cluster_id) 222 size_t debug_proc_id = TRACE_PROC_ID; // index of proc to be traced 223 uint32_t debug_from = 0; // trace start cycle 212 224 uint32_t frozen_cycles = MAX_FROZEN_CYCLES; // monitoring frozen processor 213 225 214 226 ////////////// command line arguments ////////////////////// 215 if (argc > 1){ 216 for (int n = 1; n < argc; n = n + 2){ 217 if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc)){ 227 if (argc > 1) 228 { 229 for (int n = 1; n < argc; n = n + 2) 230 { 231 if ((strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc)) 232 { 218 233 ncycles = atoi(argv[n+1]); 219 234 } 220 else if ((strcmp(argv[n],"-NPROCS") == 0) && (n+1<argc)){ 221 nprocs = atoi(argv[n+1]); 222 assert( ((nprocs == 1) || (nprocs == 2) || (nprocs == 4)) && 223 "NPROCS must be equal to 1, 2, or 4"); 224 } 225 else if ((strcmp(argv[n],"-XMAX") == 0) && (n+1<argc)){ 235 else if ((strcmp(argv[n],"-NPROCS") == 0) && (n+1<argc)) 236 { 237 nb_procs = atoi(argv[n+1]); 238 assert( ((nb_procs == 1) || (nb_procs == 2) || 239 (nb_procs == 4) || (nb_procs == 8)) && 240 "NPROCS must be equal to 1, 2, 4, or 8"); 241 } 242 else if ((strcmp(argv[n],"-NTTYS") == 0) && (n+1<argc)) 243 { 244 nb_ttys = atoi(argv[n+1]); 245 assert( (nb_ttys < 16) && 246 "The number of TTY terminals cannot be larger than 15"); 247 } 248 else if ((strcmp(argv[n],"-NDMAS") == 0) && (n+1<argc)) 249 { 250 nb_dmas = atoi(argv[n+1]); 251 assert( (nb_dmas < 9) && 252 "The number of DMA channels per cluster cannot be larger than 8"); 253 } 254 else if ((strcmp(argv[n],"-XMAX") == 0) && (n+1<argc)) 255 { 226 256 xmax = atoi(argv[n+1]); 227 257 assert( ((xmax == 1) || (xmax == 2) || (xmax == 4) || (xmax == 8) || (xmax == 16)) … … 229 259 } 230 260 231 else if ((strcmp(argv[n],"-YMAX") == 0) && (n+1<argc)){ 261 else if ((strcmp(argv[n],"-YMAX") == 0) && (n+1<argc)) 262 { 232 263 ymax = atoi(argv[n+1]); 233 264 assert( ((ymax == 1) || (ymax == 2) || (ymax == 4) || (ymax == 8) || (ymax == 16)) 234 265 && "The YMAX parameter must be 2, 4, 8, or 16" ); 235 266 } 236 else if ((strcmp(argv[n],"-XFB") == 0) && (n+1<argc)){ 267 else if ((strcmp(argv[n],"-XFB") == 0) && (n+1<argc)) 268 { 237 269 xfb = atoi(argv[n+1]); 238 270 } 239 else if ((strcmp(argv[n],"-YFB") == 0) && (n+1<argc) ){ 271 else if ((strcmp(argv[n],"-YFB") == 0) && (n+1<argc) ) 272 { 240 273 yfb = atoi(argv[n+1]); 241 274 } 242 else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ){ 275 else if ((strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) 276 { 243 277 strcpy(soft_name, argv[n+1]); 244 278 } 245 else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ){ 279 else if ((strcmp(argv[n],"-DISK") == 0) && (n+1<argc) ) 280 { 246 281 strcpy(disk_name, argv[n+1]); 247 282 } 248 else if ((strcmp(argv[n],"-TRACE") == 0) && (n+1<argc) ){ 249 trace_ok = true; 250 from_cycle = atoi(argv[n+1]); 251 } 252 else if ((strcmp(argv[n], "-MCWAYS") == 0) && (n+1 < argc)){ 283 else if ((strcmp(argv[n],"-TRACE") == 0) && (n+1<argc) ) 284 { 285 debug_ok = true; 286 debug_from = atoi(argv[n+1]); 287 } 288 else if ((strcmp(argv[n],"-MEMCID") == 0) && (n+1<argc) ) 289 { 290 debug_memc_id = atoi(argv[n+1]); 291 assert( (debug_memc_id < (xmax*ymax) ) && 292 "debug_memc_id larger than XMAX * YMAX" ); 293 } 294 else if ((strcmp(argv[n],"-PROCID") == 0) && (n+1<argc) ) 295 { 296 debug_proc_id = atoi(argv[n+1]); 297 assert( (debug_proc_id < (xmax*ymax*nb_procs) ) && 298 "debug_proc_id larger than XMAX * YMAX * BN_PROCS" ); 299 } 300 else if ((strcmp(argv[n], "-MCWAYS") == 0) && (n+1 < argc)) 301 { 253 302 memc_ways = atoi(argv[n+1]); 254 303 } 255 else if ((strcmp(argv[n], "-MCSETS") == 0) && (n+1 < argc)){ 304 else if ((strcmp(argv[n], "-MCSETS") == 0) && (n+1 < argc)) 305 { 256 306 memc_sets = atoi(argv[n+1]); 257 307 } 258 else if ((strcmp(argv[n], "-XLATENCY") == 0) && (n+1 < argc)){ 308 else if ((strcmp(argv[n], "-XLATENCY") == 0) && (n+1 < argc)) 309 { 259 310 xram_latency = atoi(argv[n+1]); 260 311 } 261 else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc)){ 312 else if ((strcmp(argv[n], "-FROZEN") == 0) && (n+1 < argc)) 313 { 262 314 frozen_cycles = atoi(argv[n+1]); 263 315 } 264 else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc)){ 265 trace_period = atoi(argv[n+1]); 316 else if ((strcmp(argv[n], "-PERIOD") == 0) && (n+1 < argc)) 317 { 318 debug_period = atoi(argv[n+1]); 266 319 } 267 320 else … … 274 327 std::cout << " -NCYCLES number_of_simulated_cycles" << std::endl; 275 328 std::cout << " -NPROCS number_of_processors_per_cluster" << std::endl; 329 std::cout << " -NTTYS total_number_of_TTY_terminals" << std::endl; 330 std::cout << " -NDMAS number_of_DMA_channels_per_cluster" << std::endl; 276 331 std::cout << " -XMAX number_of_clusters_in_a_row" << std::endl; 277 332 std::cout << " -YMAX number_of_clusters_in_a_column" << std::endl; … … 284 339 std::cout << " -FROZEN max_number_of_lines" << std::endl; 285 340 std::cout << " -PERIOD number_of_cycles between trace" << std::endl; 341 std::cout << " -MEMCID index_memc_to_be_traced" << std::endl; 342 std::cout << " -PROCID index_proc_to_be_traced" << std::endl; 286 343 exit(0); 287 344 } … … 290 347 291 348 std::cout << std::endl; 292 std::cout << " - NPROCS = " << nprocs << std::endl; 293 std::cout << " - NCLUSTERS = " << xmax*ymax << std::endl; 294 std::cout << " - MAX FROZEN = " << frozen_cycles << std::endl; 349 std::cout << " - NB_CLUSTERS = " << xmax*ymax << std::endl; 350 std::cout << " - NB_PROCS = " << nb_procs << std::endl; 351 std::cout << " - NB_TTYS = " << nb_ttys << std::endl; 352 std::cout << " - NB_DMAS = " << nb_dmas << std::endl; 353 std::cout << " - MAX_FROZEN = " << frozen_cycles << std::endl; 295 354 std::cout << " - MEMC_WAYS = " << memc_ways << std::endl; 296 355 std::cout << " - MEMC_SETS = " << memc_sets << std::endl; … … 317 376 wrplen_width> vci_param; 318 377 319 size_t cluster_io_index; 378 // Define parameters depending on mesh size 379 size_t cluster_io_id; 320 380 size_t x_width; 321 381 size_t y_width; … … 333 393 else y_width = 4; 334 394 335 cluster_io_i ndex= 0xBF >> (8 - x_width - y_width);395 cluster_io_id = 0xBF >> (8 - x_width - y_width); 336 396 337 397 ///////////////////// … … 345 405 0x00FF0000); 346 406 347 for (size_t x = 0; x < xmax; x++){ 348 for (size_t y = 0; y < ymax; y++){ 407 for (size_t x = 0; x < xmax; x++) 408 { 409 for (size_t y = 0; y < ymax; y++) 410 { 349 411 sc_uint<address_width> offset = cluster(x,y) << (address_width-x_width-y_width); 350 412 … … 361 423 maptabd.add(Segment(sd.str(), CDMA_BASE+offset, CDMA_SIZE, IntTab(cluster(x,y),CDMA_TGTID), false)); 362 424 363 if ( cluster(x,y) == cluster_io_i ndex)364 { 365 maptabd.add(Segment("d_seg_mtty 366 maptabd.add(Segment("d_seg_fbuf 367 maptabd.add(Segment("d_seg_bdev 368 maptabd.add(Segment("d_seg_brom 425 if ( cluster(x,y) == cluster_io_id ) 426 { 427 maptabd.add(Segment("d_seg_mtty", MTTY_BASE, MTTY_SIZE, IntTab(cluster(x,y),MTTY_TGTID), false)); 428 maptabd.add(Segment("d_seg_fbuf", FBUF_BASE, FBUF_SIZE, IntTab(cluster(x,y),FBUF_TGTID), false)); 429 maptabd.add(Segment("d_seg_bdev", BDEV_BASE, BDEV_SIZE, IntTab(cluster(x,y),BDEV_TGTID), false)); 430 maptabd.add(Segment("d_seg_brom", BROM_BASE, BROM_SIZE, IntTab(cluster(x,y),BROM_TGTID), true)); 369 431 } 370 432 } … … 374 436 // coherence network 375 437 // - tgtid_c_proc = srcid_c_proc = local procid 376 // - tgtid_c_memc = srcid_c_memc = n procs438 // - tgtid_c_memc = srcid_c_memc = nb_procs 377 439 MappingTable maptabc(address_width, 378 440 IntTab(x_width + y_width, srcid_width - x_width - y_width), … … 380 442 0x00FF0000); 381 443 382 for (size_t x = 0; x < xmax; x++){ 383 for (size_t y = 0; y < ymax; y++){ 444 for (size_t x = 0; x < xmax; x++) 445 { 446 for (size_t y = 0; y < ymax; y++) 447 { 384 448 sc_uint<address_width> offset = cluster(x,y) << (address_width-x_width-y_width); 385 449 386 // cleanup requests regarding the memc segmentmust be routed to the memory cache450 // cleanup requests must be routed to the memory cache 387 451 std::ostringstream sh; 388 452 sh << "c_seg_memc_" << x << "_" << y; 389 maptabc.add(Segment(sh.str(), (nprocs << (address_width - srcid_width)) + offset, 0x10, IntTab(cluster(x,y), nprocs), false)); 453 maptabc.add(Segment(sh.str(), (nb_procs << (address_width - srcid_width)) + offset, 454 0x10, IntTab(cluster(x,y), nb_procs), false)); 390 455 391 456 // update & invalidate requests must be routed to the proper processor 392 for ( size_t p = 0 ; p < nprocs ; p++) { 457 for ( size_t p = 0 ; p < nb_procs ; p++) 458 { 393 459 std::ostringstream sp; 394 460 sp << "c_seg_proc_" << x << "_" << y << "_" << p; 395 maptabc.add( Segment( sp.str() , (p << (address_width - srcid_width)) + offset , 0x10 , IntTab(cluster(x,y), p) , false)); 461 maptabc.add( Segment( sp.str() , (p << (address_width - srcid_width)) + offset , 462 0x10 , IntTab(cluster(x,y), p) , false)); 396 463 } 397 464 } … … 402 469 MappingTable maptabx(address_width, IntTab(1), IntTab(x_width+y_width), 0xF0000000); 403 470 404 for (size_t x = 0; x < xmax; x++){ 405 for (size_t y = 0; y < ymax ; y++){ 471 for (size_t x = 0; x < xmax; x++) 472 { 473 for (size_t y = 0; y < ymax ; y++) 474 { 406 475 sc_uint<address_width> offset = cluster(x,y) << (address_width-x_width-y_width); 407 476 std::ostringstream sh; 408 477 sh << "x_seg_memc_" << x << "_" << y; 409 maptabx.add(Segment(sh.str(), MEMC_BASE+offset, MEMC_SIZE, IntTab(cluster(x,y)), false)); 478 maptabx.add(Segment(sh.str(), MEMC_BASE+offset, 479 MEMC_SIZE, IntTab(cluster(x,y)), false)); 410 480 } 411 481 } … … 472 542 { 473 543 #pragma omp for 474 for(size_t i = 0; i < (xmax * ymax); i++) {475 size_t x = i / ymax;476 size_t y = i %ymax;477 544 for(size_t i = 0; i < (xmax * ymax); i++) 545 { 546 size_t x = i / ymax; 547 size_t y = i % ymax; 478 548 #pragma omp critical 479 std::ostringstream sc; 480 sc << "cluster_" << x << "_" << y; 481 clusters[x][y] = new TsarV4ClusterMmu<vci_param, proc_iss, cmd_width, rsp_width> 549 550 std::cout << "building cluster_" << x << "_" << y << std::endl; 551 552 std::ostringstream sc; 553 sc << "cluster_" << x << "_" << y; 554 clusters[x][y] = new TsarV4ClusterMmu<vci_param, proc_iss, cmd_width, rsp_width> 482 555 (sc.str().c_str(), 483 nprocs, 556 nb_procs, 557 nb_ttys, 558 nb_dmas, 484 559 x, 485 560 y, … … 504 579 l1_d_sets, 505 580 xram_latency, 506 (cluster(x,y) == cluster_io_i ndex),581 (cluster(x,y) == cluster_io_id), 507 582 xfb, 508 583 yfb, … … 511 586 loader, 512 587 frozen_cycles, 513 from_cycle, 514 trace_ok and (cluster_io_index == cluster(x,y)) ); 515 } 588 debug_from, 589 debug_ok and (cluster(x,y) == debug_memc_id), 590 debug_ok and (cluster(x,y) == debug_proc_id) ); 591 592 std::cout << "cluster_" << x << "_" << y << " constructed" << std::endl; 593 594 } 516 595 } 517 596 518 597 #else // NO OPENMP 519 598 520 for (size_t x = 0; x < xmax; x++){ 521 for (size_t y = 0; y < ymax; y++){ 599 for (size_t x = 0; x < xmax; x++) 600 { 601 for (size_t y = 0; y < ymax; y++) 602 { 522 603 523 604 std::cout << "building cluster_" << x << "_" << y << std::endl; … … 527 608 clusters[x][y] = new TsarV4ClusterMmu<vci_param, proc_iss, cmd_width, rsp_width> 528 609 (sc.str().c_str(), 529 nprocs, 610 nb_procs, 611 nb_ttys, 612 nb_dmas, 530 613 x, 531 614 y, … … 550 633 l1_d_sets, 551 634 xram_latency, 552 (cluster(x,y) == cluster_io_i ndex),635 (cluster(x,y) == cluster_io_id), 553 636 xfb, 554 637 yfb, … … 557 640 loader, 558 641 frozen_cycles, 559 from_cycle, 560 trace_ok and (cluster_io_index == cluster(x,y)) ); 642 debug_from, 643 debug_ok and ( cluster(x,y) == debug_memc_id ), 644 debug_ok and ( cluster(x,y) == debug_proc_id ) ); 561 645 562 646 std::cout << "cluster_" << x << "_" << y << " constructed" << std::endl; … … 618 702 619 703 // East & West boundary cluster connections 620 for (size_t y = 0; y < ymax; y++){ 621 for (size_t k = 0; k < 2; k++){ 704 for (size_t y = 0; y < ymax; y++) 705 { 706 for (size_t k = 0; k < 2; k++) 707 { 622 708 clusters[0][y]->p_cmd_in[k][WEST] (signal_dspin_false_cmd_in[0][y][k][WEST]); 623 709 clusters[0][y]->p_cmd_out[k][WEST] (signal_dspin_false_cmd_out[0][y][k][WEST]); … … 633 719 634 720 // North & South boundary clusters connections 635 for (size_t x = 0; x < xmax; x++){ 636 for (size_t k = 0; k < 2; k++){ 721 for (size_t x = 0; x < xmax; x++) 722 { 723 for (size_t k = 0; k < 2; k++) 724 { 637 725 clusters[x][0]->p_cmd_in[k][SOUTH] (signal_dspin_false_cmd_in[x][0][k][SOUTH]); 638 726 clusters[x][0]->p_cmd_out[k][SOUTH] (signal_dspin_false_cmd_out[x][0][k][SOUTH]); … … 677 765 signal_resetn = true; 678 766 679 for (size_t n = 1; n < ncycles; n++){ 680 if (trace_ok and (n > from_cycle) and (n % trace_period == 0)){ 767 for (size_t n = 1; n < ncycles; n++) 768 { 769 770 if (debug_ok and (n > debug_from) and (n % debug_period == 0)) 771 { 681 772 std::cout << "****************** cycle " << std::dec << n ; 682 773 std::cout << " ************************************************" << std::endl; 683 774 684 // components cluster 00 ///////////////////// 685 // clusters[0][0]->proc[0]->print_trace(); 686 // clusters[0][0]->memc->print_trace(); 687 688 // signals cluster 00 //////////////////////// 689 // clusters[0][0]->signal_vci_ini_d_proc[0].print_trace("proc_0_0_0_ini_d"); 690 // clusters[0][0]->signal_vci_ini_c_proc[0].print_trace("proc_0_0_0_ini_c"); 691 // clusters[0][0]->signal_vci_tgt_c_proc[0].print_trace("proc_0_0_0_tgt_c"); 692 // clusters[0][0]->signal_vci_xram.print_trace("memc_0_0_xram"); 693 694 // components cluster 01 ///////////////////// 695 // clusters[0][1]->proc[0]->print_trace(); 696 // clusters[0][1]->memc->print_trace(); 697 698 // signals cluster 01 /////////////////////// 699 // clusters[0][1]->signal_vci_ini_d_proc[0].print_trace("proc_0_1_0_ini_d"); 700 // clusters[0][1]->signal_vci_ini_c_proc[0].print_trace("proc_0_1_0_ini_c"); 701 // clusters[0][1]->signal_vci_tgt_c_proc[0].print_trace("proc_0_1_0_tgt_c"); 702 // clusters[0][1]->signal_vci_xram.print_trace("memc_0_1_xram"); 703 704 // components cluster 10 //////////////////// 705 clusters[1][0]->proc[0]->print_trace(1); 706 clusters[1][0]->memc->print_trace(); 707 // clusters[1][0]->bdev->print_trace(); 708 // clusters[1][0]->mdma->print_trace(); 709 710 // signals cluster 10 /////////////////////// 711 clusters[1][0]->signal_vci_ini_d_proc[0].print_trace("proc_1_0_0_ini_d"); 712 // clusters[1][0]->signal_vci_ini_c_proc[0].print_trace("proc_1_0_0_ini_c"); 713 // clusters[1][0]->signal_vci_tgt_c_proc[0].print_trace("proc_1_0_0_tgt_c"); 714 clusters[1][0]->signal_vci_tgt_d_memc.print_trace("memc_1_0_tgt_d "); 715 // clusters[1][0]->signal_vci_ini_c_memc.print_trace("memc_1_0_ini_c "); 716 // clusters[1][0]->signal_vci_tgt_c_memc.print_trace("memc_1_0_tgt_c "); 717 // clusters[1][0]->signal_vci_tgt_d_bdev.print_trace("bdev_1_0_tgt_d "); 718 // clusters[1][0]->signal_vci_ini_d_bdev.print_trace("bdev_1_0_ini_d "); 719 // clusters[1][0]->signal_vci_tgt_d_mdma.print_trace("mdma_1_0_tgt_d "); 720 // clusters[1][0]->signal_vci_ini_d_mdma.print_trace("mdma_1_0_ini_d "); 721 clusters[1][0]->signal_vci_tgt_d_mtty.print_trace("mtty_1_0_tgt_d "); 722 clusters[1][0]->signal_vci_xram.print_trace("memc_1_0_xram"); 723 724 // components cluster 11 ///////////////////// 725 // clusters[1][1]->proc[0]->print_trace(); 726 // clusters[1][1]->memc->print_trace(); 727 728 // signals cluster 11 //////////////////////// 729 // clusters[1][1]->signal_vci_ini_d_proc[0].print_trace("proc_1_1_0_ini_d"); 730 // clusters[1][1]->signal_vci_ini_c_proc[0].print_trace("proc_1_1_0_ini_c"); 731 // clusters[1][1]->signal_vci_tgt_c_proc[0].print_trace("proc_1_1_0_tgt_c"); 732 // clusters[1][1]->signal_vci_xram.print_trace("memc_1_1_xram"); 775 // trace proc[debug_proc_id] 776 if ( debug_proc_id < (xmax * ymax * nb_procs) ) 777 { 778 size_t proc_x = debug_proc_id / ymax; 779 size_t proc_y = debug_proc_id % ymax; 780 781 clusters[proc_x][proc_y]->proc[0]->print_trace(); 782 783 clusters[proc_x][proc_y]->signal_vci_ini_d_proc[0].print_trace("proc_ini_d"); 784 clusters[proc_x][proc_y]->signal_vci_ini_c_proc[0].print_trace("proc_ini_c"); 785 clusters[proc_x][proc_y]->signal_vci_tgt_c_proc[0].print_trace("proc_tgt_c"); 786 } 787 788 // trace memc[debug_memc_id] 789 if ( debug_memc_id < (xmax * ymax) ) 790 { 791 size_t memc_x = debug_memc_id / ymax; 792 size_t memc_y = debug_memc_id % ymax; 793 794 clusters[memc_x][memc_y]->memc->print_trace(); 795 796 clusters[memc_x][memc_y]->signal_vci_tgt_d_memc.print_trace("memc_tgt_d"); 797 clusters[memc_x][memc_y]->signal_vci_ini_c_memc.print_trace("memc_ini_c"); 798 clusters[memc_x][memc_y]->signal_vci_tgt_c_memc.print_trace("memc_tgt_c"); 799 } 800 801 // clusters[0][0]->signal_vci_tgt_d_xicu.print_trace("xicu_0_0"); 802 // clusters[0][1]->signal_vci_tgt_d_xicu.print_trace("xicu_0_1"); 803 // clusters[1][0]->signal_vci_tgt_d_xicu.print_trace("xicu_1_0"); 804 // clusters[1][1]->signal_vci_tgt_d_xicu.print_trace("xicu_1_1"); 805 806 clusters[1][1]->mdma->print_trace(); 807 clusters[1][1]->signal_vci_tgt_d_mdma.print_trace("dma_tgt_1_1"); 808 clusters[1][1]->signal_vci_ini_d_mdma.print_trace("dma_ini_1_1"); 809 if ( clusters[1][1]->signal_irq_mdma[0].read() ) 810 std::cout << std::endl << " IRQ_DMA_1_1 activated" << std::endl; 811 if ( clusters[1][1]->signal_proc_it[0].read() ) 812 std::cout << " IRQ_PROC_1_1 activated" << std::endl << std::endl; 813 814 // trace peripherals components 815 if ( false ) 816 { 817 size_t io_x = cluster_io_id / ymax; 818 size_t io_y = cluster_io_id % ymax; 819 820 clusters[io_x][io_y]->bdev->print_trace(); 821 clusters[io_x][io_y]->mdma->print_trace(); 822 823 clusters[io_x][io_y]->signal_vci_tgt_d_bdev.print_trace("bdev_1_0_tgt_d "); 824 clusters[io_x][io_y]->signal_vci_ini_d_bdev.print_trace("bdev_1_0_ini_d "); 825 clusters[io_x][io_y]->signal_vci_tgt_d_mdma.print_trace("mdma_1_0_tgt_d "); 826 clusters[io_x][io_y]->signal_vci_ini_d_mdma.print_trace("mdma_1_0_ini_d "); 827 } 733 828 } 734 829
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