Changeset 392 for trunk/modules/vci_block_device_tsar/caba/source/include
- Timestamp:
- May 28, 2013, 12:35:01 AM (12 years ago)
- File:
-
- 1 edited
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trunk/modules/vci_block_device_tsar/caba/source/include/vci_block_device_tsar.h
r391 r392 40 40 // asserted when the transfer is completed. 41 41 // 42 // As a target this block device controler contains 8memory mapped registers,43 // taking 3 2bytes in the address space.44 // - BLOCK_DEVICE_BUFFER 0x00 (read/write) Memory buffer base address .42 // As a target this block device controler contains 9 memory mapped registers, 43 // taking 36 bytes in the address space. 44 // - BLOCK_DEVICE_BUFFER 0x00 (read/write) Memory buffer base address (32 LSB bits) 45 45 // - BLOCK_DEVICE_COUNT 0x04 (read/write) Number of blocks to be transfered. 46 46 // - BLOCK_DEVICE_LBA 0x08 (read/write) Index of first block in the file. … … 50 50 // - BLOCK_DEVICE_SIZE 0x18 (read-only) Number of addressable blocks. 51 51 // - BLOCK_DEVICE_BLOCK_SIZE 0x1C (read_only) Block size in bytes. 52 // - BLOCK_DEVICE_BUFFER_EXT 0x20 (read_only) Memory buffer base address (32 MSB bits) 52 53 // 53 54 // The following operations codes are supported: … … 96 97 97 98 // Registers 98 sc_signal<int> r_target_fsm;// target fsm state register99 sc_signal<int> r_initiator_fsm; // initiator fsm state register100 sc_signal<bool> r_irq_enable;// default value is true101 sc_signal<uint32_t> r_nblocks;// number of blocks in transfer102 sc_signal<uint 32_t> r_buf_address; // memory buffer address103 sc_signal<uint32_t> r_lba;// first block index104 sc_signal<bool> r_read;// requested operation105 sc_signal<uint32_t> r_index;// flit index in local buffer106 sc_signal<uint32_t> r_latency_count; // latency counter107 sc_signal<uint32_t> r_flit_count;// flit counter (in a burst)108 sc_signal<uint32_t> r_burst_count;// burst counter (in a block)109 sc_signal<uint32_t> r_block_count;// block counter (in a transfer)110 sc_signal<uint32_t> r_burst_offset; // number of non aligned flits111 sc_signal<uint32_t> r_burst_nflits; // number of flits in a burst112 sc_signal<bool> r_go;// command from T_FSM to M_FSM113 114 sc_signal<sc_dt::sc_uint<vci_param::S> > r_srcid; 115 sc_signal<sc_dt::sc_uint<vci_param::T> > r_trdid; 116 sc_signal<sc_dt::sc_uint<vci_param::P> > r_pktid; 117 118 uint32_t* r_local_buffer;// capacity is one block99 sc_signal<int> r_target_fsm; // target fsm state register 100 sc_signal<int> r_initiator_fsm; // initiator fsm state register 101 sc_signal<bool> r_irq_enable; // default value is true 102 sc_signal<uint32_t> r_nblocks; // number of blocks in transfer 103 sc_signal<uint64_t> r_buf_address; // memory buffer address 104 sc_signal<uint32_t> r_lba; // first block index 105 sc_signal<bool> r_read; // requested operation 106 sc_signal<uint32_t> r_index; // flit index in local buffer 107 sc_signal<uint32_t> r_latency_count; // latency counter 108 sc_signal<uint32_t> r_flit_count; // flit counter (in a burst) 109 sc_signal<uint32_t> r_burst_count; // burst counter (in a block) 110 sc_signal<uint32_t> r_block_count; // block counter (in a transfer) 111 sc_signal<uint32_t> r_burst_offset; // number of non aligned flits 112 sc_signal<uint32_t> r_burst_nflits; // number of flits in a burst 113 sc_signal<bool> r_go; // command from T_FSM to M_FSM 114 115 sc_signal<sc_dt::sc_uint<vci_param::S> > r_srcid; // save srcid 116 sc_signal<sc_dt::sc_uint<vci_param::T> > r_trdid; // save trdid 117 sc_signal<sc_dt::sc_uint<vci_param::P> > r_pktid; // save pktid 118 119 uint32_t* r_local_buffer; // capacity is one block 119 120 120 121 // structural parameters 121 soclib::common::Segment m_segment;// segment associated to target122 uint32_t m_srcid;// initiator index123 int m_fd;// File descriptor124 uint64_t m_device_size;// Total number of blocks125 const uint32_t m_flits_per_block;// number of flits in a block126 const uint32_t m_flits_per_burst;// number of flits in a burst127 const uint32_t m_bursts_per_block; // number of bursts in a block128 const uint32_t m_latency;// device latency122 soclib::common::Segment m_segment; // segment associated to target 123 uint32_t m_srcid; // initiator index 124 int m_fd; // File descriptor 125 uint64_t m_device_size; // Total number of blocks 126 const uint32_t m_flits_per_block; // number of flits in a block 127 const uint32_t m_flits_per_burst; // number of flits in a burst 128 const uint32_t m_bursts_per_block; // number of bursts in a block 129 const uint32_t m_latency; // device latency 129 130 130 131 // methods … … 156 157 T_WRITE_BUFFER = 1, 157 158 T_READ_BUFFER = 2, 158 T_WRITE_COUNT = 3, 159 T_READ_COUNT = 4, 160 T_WRITE_LBA = 5, 161 T_READ_LBA = 6, 162 T_WRITE_OP = 7, 163 T_READ_STATUS = 8, 164 T_WRITE_IRQEN = 9, 165 T_READ_IRQEN = 10, 166 T_READ_SIZE = 11, 167 T_READ_BLOCK = 12, 168 T_READ_ERROR = 13, 169 T_WRITE_ERROR = 14, 159 T_WRITE_BUFFER_EXT = 3, 160 T_READ_BUFFER_EXT = 4, 161 T_WRITE_COUNT = 5, 162 T_READ_COUNT = 6, 163 T_WRITE_LBA = 7, 164 T_READ_LBA = 8, 165 T_WRITE_OP = 9, 166 T_READ_STATUS = 10, 167 T_WRITE_IRQEN = 11, 168 T_READ_IRQEN = 12, 169 T_READ_SIZE = 13, 170 T_READ_BLOCK = 14, 171 T_READ_ERROR = 15, 172 T_WRITE_ERROR = 16, 170 173 }; 171 174
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