Changeset 814 for branches/RWT/modules/vci_mem_cache/caba/source/include
- Timestamp:
- Sep 24, 2014, 3:48:50 PM (10 years ago)
- Location:
- branches/RWT/modules/vci_mem_cache
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
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branches/RWT/modules/vci_mem_cache
- Property svn:mergeinfo changed
/trunk/modules/vci_mem_cache (added) merged: 597,599,601,603,605,617
- Property svn:mergeinfo changed
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branches/RWT/modules/vci_mem_cache/caba/source/include
- Property svn:mergeinfo changed
/trunk/modules/vci_mem_cache/caba/source/include (added) merged: 597,599,601,605
- Property svn:mergeinfo changed
-
branches/RWT/modules/vci_mem_cache/caba/source/include/mem_cache_directory.h
r495 r814 1 1 #ifndef SOCLIB_CABA_MEM_CACHE_DIRECTORY_H 2 #define SOCLIB_CABA_MEM_CACHE_DIRECTORY_H 2 #define SOCLIB_CABA_MEM_CACHE_DIRECTORY_H 3 3 4 4 #include <inttypes.h> … … 14 14 15 15 //////////////////////////////////////////////////////////////////////// 16 // A LRU entry 16 // A LRU entry 17 17 //////////////////////////////////////////////////////////////////////// 18 18 class LruEntry { … … 20 20 public: 21 21 22 bool recent; 22 bool recent; 23 23 24 24 void init() … … 33 33 //////////////////////////////////////////////////////////////////////// 34 34 class Owner{ 35 35 36 36 public: 37 37 // Fields … … 66 66 67 67 //////////////////////////////////////////////////////////////////////// 68 // A directory entry 68 // A directory entry 69 69 //////////////////////////////////////////////////////////////////////// 70 70 class DirectoryEntry { … … 81 81 tag_t tag; // tag of the entry 82 82 size_t count; // number of copies 83 Owner owner; // an owner of the line 83 Owner owner; // an owner of the line 84 84 size_t ptr; // pointer to the next owner 85 85 … … 109 109 owner = source.owner; 110 110 ptr = source.ptr; 111 } 112 113 ///////////////////////////////////////////////////////////////////// 114 // The init() function initializes the entry 111 } 112 113 ///////////////////////////////////////////////////////////////////// 114 // The init() function initializes the entry 115 115 ///////////////////////////////////////////////////////////////////// 116 116 void init() … … 125 125 126 126 ///////////////////////////////////////////////////////////////////// 127 // The copy() function copies an existing source entry to a target 127 // The copy() function copies an existing source entry to a target 128 128 ///////////////////////////////////////////////////////////////////// 129 129 void copy(const DirectoryEntry &source) 130 130 { 131 valid 131 valid = source.valid; 132 132 cache_coherent = source.cache_coherent; 133 133 is_cnt = source.is_cnt; 134 dirty 135 lock 136 tag 134 dirty = source.dirty; 135 lock = source.lock; 136 tag = source.tag; 137 137 count = source.count; 138 138 owner = source.owner; … … 141 141 142 142 //////////////////////////////////////////////////////////////////// 143 // The print() function prints the entry 143 // The print() function prints the entry 144 144 //////////////////////////////////////////////////////////////////// 145 145 void print() 146 146 { 147 std::cout << "Valid = " << valid 147 std::cout << "Valid = " << valid 148 148 << " ; COHERENCE = " << cache_coherent 149 << " ; IS COUNT = " << is_cnt 150 << " ; Dirty = " << dirty 151 << " ; Lock = " << lock 152 << " ; Tag = " << std::hex << tag << std::dec 153 << " ; Count = " << count 154 << " ; Owner = " << owner.srcid 155 << " " << owner.inst 149 << " ; IS COUNT = " << is_cnt 150 << " ; Dirty = " << dirty 151 << " ; Lock = " << lock 152 << " ; Tag = " << std::hex << tag << std::dec 153 << " ; Count = " << count 154 << " ; Owner = " << owner.srcid 155 << " " << owner.inst 156 156 << " ; Pointer = " << ptr << std::endl; 157 157 } … … 160 160 161 161 //////////////////////////////////////////////////////////////////////// 162 // The directory 162 // The directory 163 163 //////////////////////////////////////////////////////////////////////// 164 164 class CacheDirectory { … … 171 171 172 172 // Directory constants 173 size_t 174 size_t 175 size_t 176 size_t 177 uint32_t 173 size_t m_ways; 174 size_t m_sets; 175 size_t m_words; 176 size_t m_width; 177 uint32_t lfsr; 178 178 179 179 // the directory & lru tables 180 DirectoryEntry 181 LruEntry 180 DirectoryEntry **m_dir_tab; 181 LruEntry **m_lru_tab; 182 182 183 183 public: … … 186 186 // Constructor 187 187 //////////////////////// 188 CacheDirectory( size_t ways, size_t sets, size_t words, size_t address_width) 189 { 190 m_ways = ways; 188 CacheDirectory( size_t ways, size_t sets, size_t words, size_t address_width) 189 { 190 m_ways = ways; 191 191 m_sets = sets; 192 192 m_words = words; … … 223 223 // LRU is updated. 224 224 // Arguments : 225 // - address : the address of the entry 225 // - address : the address of the entry 226 226 // - way : (return argument) the way of the entry in case of hit 227 // The function returns a copy of a (valid or invalid) entry 227 // The function returns a copy of a (valid or invalid) entry 228 228 ///////////////////////////////////////////////////////////////////// 229 229 DirectoryEntry read(const addr_t &address, size_t &way) … … 240 240 bool valid = m_dir_tab[set][i].valid; 241 241 hit = equal && valid; 242 if ( hit ) { 242 if ( hit ) { 243 243 way = i; 244 244 break; 245 } 245 } 246 246 } 247 247 if ( hit ) { … … 255 255 ///////////////////////////////////////////////////////////////////// 256 256 // The inval function invalidate an entry defined by the set and 257 // way arguments. 257 // way arguments. 258 258 ///////////////////////////////////////////////////////////////////// 259 259 void inval( const size_t &way, const size_t &set ) … … 266 266 // changing the LRU 267 267 // Arguments : 268 // - address : the address of the entry 269 // The function returns a copy of a (valid or invalid) entry 270 ///////////////////////////////////////////////////////////////////// 271 DirectoryEntry read_neutral( const addr_t &address, 268 // - address : the address of the entry 269 // The function returns a copy of a (valid or invalid) entry 270 ///////////////////////////////////////////////////////////////////// 271 DirectoryEntry read_neutral( const addr_t &address, 272 272 size_t* ret_way, 273 273 size_t* ret_set ) … … 279 279 #undef L2 280 280 281 for ( size_t way = 0 ; way < m_ways ; way++ ) 281 for ( size_t way = 0 ; way < m_ways ; way++ ) 282 282 { 283 283 bool equal = ( m_dir_tab[set][way].tag == tag ); … … 286 286 { 287 287 *ret_set = set; 288 *ret_way = way; 288 *ret_way = way; 289 289 return DirectoryEntry(m_dir_tab[set][way]); 290 290 } 291 } 291 } 292 292 return DirectoryEntry(); 293 293 } // end read_neutral() 294 294 295 295 ///////////////////////////////////////////////////////////////////// 296 // The write function writes a new entry, 296 // The write function writes a new entry, 297 297 // and updates the LRU bits if necessary. 298 298 // Arguments : … … 301 301 // - entry : the entry value 302 302 ///////////////////////////////////////////////////////////////////// 303 void write( const size_t &set, 304 const size_t &way, 303 void write( const size_t &set, 304 const size_t &way, 305 305 const DirectoryEntry &entry) 306 306 { 307 assert( (set<m_sets) 307 assert( (set<m_sets) 308 308 && "Cache Directory write : The set index is invalid"); 309 assert( (way<m_ways) 309 assert( (way<m_ways) 310 310 && "Cache Directory write : The way index is invalid"); 311 311 … … 315 315 // update LRU bits 316 316 bool all_recent = true; 317 for ( size_t i=0 ; i<m_ways ; i++ ) 317 for ( size_t i=0 ; i<m_ways ; i++ ) 318 318 { 319 319 if ( i != way ) all_recent = m_lru_tab[set][i].recent && all_recent; 320 320 } 321 if ( all_recent ) 321 if ( all_recent ) 322 322 { 323 323 for( size_t i=0 ; i<m_ways ; i++ ) m_lru_tab[set][i].recent = false; 324 } 325 else 324 } 325 else 326 326 { 327 327 m_lru_tab[set][way].recent = true; … … 349 349 DirectoryEntry select(const size_t &set, size_t &way) 350 350 { 351 assert( (set < m_sets) 351 assert( (set < m_sets) 352 352 && "Cache Directory : (select) The set index is invalid"); 353 353 … … 404 404 405 405 ///////////////////////////////////////////////////////////////////// 406 // 406 // Global initialisation function 407 407 ///////////////////////////////////////////////////////////////////// 408 408 void init() 409 409 { 410 for ( size_t set=0 ; set<m_sets ; set++ ) 411 { 412 for ( size_t way=0 ; way<m_ways ; way++ ) 410 for ( size_t set=0 ; set<m_sets ; set++ ) 411 { 412 for ( size_t way=0 ; way<m_ways ; way++ ) 413 413 { 414 414 m_dir_tab[set][way].init(); … … 446 446 owner.inst = entry.owner.inst; 447 447 owner.srcid = entry.owner.srcid; 448 next 448 next = entry.next; 449 449 } // end constructor 450 450 451 451 ///////////////////////////////////////////////////////////////////// 452 // The copy() function copies an existing source entry to a target 452 // The copy() function copies an existing source entry to a target 453 453 ///////////////////////////////////////////////////////////////////// 454 454 void copy(const HeapEntry &entry) 455 455 { 456 owner.inst 457 owner.srcid 458 next 456 owner.inst = entry.owner.inst; 457 owner.srcid = entry.owner.srcid; 458 next = entry.next; 459 459 } // end copy() 460 460 461 461 //////////////////////////////////////////////////////////////////// 462 // The print() function prints the entry 462 // The print() function prints the entry 463 463 //////////////////////////////////////////////////////////////////// 464 464 void print(){ 465 std::cout 465 std::cout 466 466 << " -- owner.inst : " << std::dec << owner.inst << std::endl 467 467 << " -- owner.srcid : " << std::dec << owner.srcid << std::endl … … 473 473 474 474 //////////////////////////////////////////////////////////////////////// 475 // The Heap 475 // The Heap 476 476 //////////////////////////////////////////////////////////////////////// 477 477 class HeapDirectory{ 478 478 479 479 private: 480 480 // Registers and the heap … … 506 506 507 507 ///////////////////////////////////////////////////////////////////// 508 // 508 // Global initialisation function 509 509 ///////////////////////////////////////////////////////////////////// 510 510 void init(){ … … 541 541 if(ptr_temp == m_heap_tab[ptr_temp].next) end = true; 542 542 ptr_temp = m_heap_tab[ptr_temp].next; 543 } 543 } 544 544 } // end print_list() 545 545 … … 552 552 553 553 ///////////////////////////////////////////////////////////////////// 554 // The next_free_ptr() function returns the pointer 554 // The next_free_ptr() function returns the pointer 555 555 // to the next free entry. 556 556 ///////////////////////////////////////////////////////////////////// … … 560 560 561 561 ///////////////////////////////////////////////////////////////////// 562 // The next_free_entry() function returns 562 // The next_free_entry() function returns 563 563 // a copy of the next free entry. 564 564 ///////////////////////////////////////////////////////////////////// … … 566 566 return HeapEntry(m_heap_tab[ptr_free]); 567 567 } // end next_free_entry() 568 568 569 569 ///////////////////////////////////////////////////////////////////// 570 570 // The write_free_entry() function modify the next free entry. … … 624 624 625 625 //////////////////////////////////////////////////////////////////////// 626 // Cache Data 627 //////////////////////////////////////////////////////////////////////// 628 class CacheData 626 // Cache Data 627 //////////////////////////////////////////////////////////////////////// 628 class CacheData 629 629 { 630 630 private: … … 639 639 /////////////////////////////////////////////////////// 640 640 CacheData(uint32_t ways, uint32_t sets, uint32_t words) 641 : m_sets(sets), m_ways(ways), m_words(words) 641 : m_sets(sets), m_ways(ways), m_words(words) 642 642 { 643 643 m_cache_data = new uint32_t ** [ways]; 644 for ( size_t i=0 ; i < ways ; i++ ) 644 for ( size_t i=0 ; i < ways ; i++ ) 645 645 { 646 646 m_cache_data[i] = new uint32_t * [sets]; 647 647 } 648 for ( size_t i=0; i<ways; i++ ) 648 for ( size_t i=0; i<ways; i++ ) 649 649 { 650 for ( size_t j=0; j<sets; j++ ) 650 for ( size_t j=0; j<sets; j++ ) 651 651 { 652 652 m_cache_data[i][j] = new uint32_t [words]; … … 655 655 } 656 656 //////////// 657 ~CacheData() 657 ~CacheData() 658 658 { 659 659 for(size_t i=0; i<m_ways ; i++) … … 673 673 uint32_t read ( const uint32_t &way, 674 674 const uint32_t &set, 675 const uint32_t &word) const 675 const uint32_t &word) const 676 676 { 677 677 assert((set < m_sets ) && "Cache data error: Trying to read a wrong set" ); … … 697 697 const uint32_t &word, 698 698 const uint32_t &data, 699 const uint32_t &be = 0xF) 699 const uint32_t &be = 0xF) 700 700 { 701 701 … … 707 707 if (be == 0x0) return; 708 708 709 if (be == 0xF) 709 if (be == 0xF) 710 710 { 711 m_cache_data[way][set][word] = data; 711 m_cache_data[way][set][word] = data; 712 712 return; 713 713 } … … 719 719 if (be & 0x8) mask = mask | 0xFF000000; 720 720 721 m_cache_data[way][set][word] = 721 m_cache_data[way][set][word] = 722 722 (data & mask) | (m_cache_data[way][set][word] & ~mask); 723 723 } -
branches/RWT/modules/vci_mem_cache/caba/source/include/update_tab.h
r767 r814 8 8 9 9 //////////////////////////////////////////////////////////////////////// 10 // An update tab entry 10 // An update tab entry 11 11 //////////////////////////////////////////////////////////////////////// 12 12 class UpdateTabEntry { … … 17 17 public: 18 18 19 bool valid;// It is a valid pending transaction20 bool update;// It is an update transaction21 bool brdcast;// It is a broadcast invalidate22 bool rsp;// Response to the initiator required23 bool ack;// Acknowledge to the CONFIG FSM required24 size_t srcid;// The srcid of the initiator which wrote the data25 size_t trdid;// The trdid of the initiator which wrote the data26 size_t pktid;// The pktid of the initiator which wrote the data27 addr_t nline;// The identifier of the cache line28 size_t count;// The number of acknowledge responses to receive19 bool valid; // It is a valid pending transaction 20 bool update; // It is an update transaction 21 bool brdcast; // It is a broadcast invalidate 22 bool rsp; // Response to the initiator required 23 bool ack; // Acknowledge to the CONFIG FSM required 24 size_t srcid; // The srcid of the initiator which wrote the data 25 size_t trdid; // The trdid of the initiator which wrote the data 26 size_t pktid; // The pktid of the initiator which wrote the data 27 addr_t nline; // The identifier of the cache line 28 size_t count; // The number of acknowledge responses to receive 29 29 30 30 UpdateTabEntry() 31 31 { 32 valid 32 valid = false; 33 33 update = false; 34 34 brdcast = false; 35 35 rsp = false; 36 36 ack = false; 37 srcid 38 trdid 39 pktid 40 nline 41 count 42 } 43 44 UpdateTabEntry(bool i_valid, 37 srcid = 0; 38 trdid = 0; 39 pktid = 0; 40 nline = 0; 41 count = 0; 42 } 43 44 UpdateTabEntry(bool i_valid, 45 45 bool i_update, 46 46 bool i_brdcast, 47 47 bool i_rsp, 48 48 bool i_ack, 49 size_t i_srcid, 50 size_t i_trdid, 51 size_t i_pktid, 49 size_t i_srcid, 50 size_t i_trdid, 51 size_t i_pktid, 52 52 addr_t i_nline, 53 size_t i_count) 54 { 55 valid 56 update 53 size_t i_count) 54 { 55 valid = i_valid; 56 update = i_update; 57 57 brdcast = i_brdcast; 58 58 rsp = i_rsp; 59 59 ack = i_ack; 60 srcid 61 trdid 62 pktid 63 nline 64 count 60 srcid = i_srcid; 61 trdid = i_trdid; 62 pktid = i_pktid; 63 nline = i_nline; 64 count = i_count; 65 65 } 66 66 … … 80 80 81 81 //////////////////////////////////////////////////// 82 // The init() function initializes the entry 82 // The init() function initializes the entry 83 83 /////////////////////////////////////////////////// 84 84 void init() 85 85 { 86 valid = false;87 update = false;88 brdcast = false;89 rsp = false;90 ack = false;91 srcid = 0;92 trdid = 0;93 pktid = 0;94 nline = 0;95 count = 0;86 valid = false; 87 update = false; 88 brdcast = false; 89 rsp = false; 90 ack = false; 91 srcid = 0; 92 trdid = 0; 93 pktid = 0; 94 nline = 0; 95 count = 0; 96 96 } 97 97 … … 116 116 117 117 //////////////////////////////////////////////////////////////////// 118 // The print() function prints the entry 118 // The print() function prints the entry 119 119 //////////////////////////////////////////////////////////////////// 120 120 void print() 121 121 { 122 std::cout << " val = " << std::dec << valid 123 << " / updt = " << update 122 std::cout << " val = " << std::dec << valid 123 << " / updt = " << update 124 124 << " / bc = " << brdcast 125 << " / rsp = " << rsp 126 << " / ack = " << ack 125 << " / rsp = " << rsp 126 << " / ack = " << ack 127 127 << " / count = " << count 128 << " / srcid = " << std::hex << srcid 129 << " / trdid = " << trdid 128 << " / srcid = " << std::hex << srcid 129 << " / trdid = " << trdid 130 130 << " / pktid = " << pktid 131 131 << " / nline = " << nline << std::endl; … … 134 134 135 135 //////////////////////////////////////////////////////////////////////// 136 // The update tab 136 // The update tab 137 137 //////////////////////////////////////////////////////////////////////// 138 138 class UpdateTab{ … … 159 159 160 160 //////////////////////////////////////////////////////////////////// 161 // The size() function returns the size of the tab 161 // The size() function returns the size of the tab 162 162 //////////////////////////////////////////////////////////////////// 163 163 const size_t size() … … 167 167 168 168 //////////////////////////////////////////////////////////////////// 169 // The print() function diplays the tab content 169 // The print() function diplays the tab content 170 170 //////////////////////////////////////////////////////////////////// 171 171 void print() 172 172 { 173 173 std::cout << "UPDATE TABLE Content" << std::endl; 174 for(size_t i=0; i<size_tab; i++) 174 for(size_t i=0; i<size_tab; i++) 175 175 { 176 176 std::cout << "[" << std::dec << i << "] "; … … 181 181 182 182 ///////////////////////////////////////////////////////////////////// 183 // The init() function initializes the tab 183 // The init() function initializes the tab 184 184 ///////////////////////////////////////////////////////////////////// 185 185 void init() … … 189 189 190 190 ///////////////////////////////////////////////////////////////////// 191 // The reads() function reads an entry 191 // The reads() function reads an entry 192 192 // Arguments : 193 193 // - entry : the entry to read … … 211 211 // This function returns true if the write successed (an entry was empty). 212 212 /////////////////////////////////////////////////////////////////////////// 213 bool set(const bool 213 bool set(const bool update, 214 214 const bool brdcast, 215 215 const bool rsp, … … 222 222 size_t &index) 223 223 { 224 for ( size_t i=0 ; i<size_tab ; i++ ) 225 { 226 if( !tab[i].valid ) 224 for ( size_t i=0 ; i<size_tab ; i++ ) 225 { 226 if( !tab[i].valid ) 227 227 { 228 tab[i].valid 229 tab[i].update 230 tab[i].brdcast 231 tab[i].rsp 232 tab[i].ack 233 tab[i].srcid 234 tab[i].trdid 235 tab[i].pktid 236 tab[i].nline 237 tab[i].count 238 index 228 tab[i].valid = true; 229 tab[i].update = update; 230 tab[i].brdcast = brdcast; 231 tab[i].rsp = rsp; 232 tab[i].ack = ack; 233 tab[i].srcid = (size_t) srcid; 234 tab[i].trdid = (size_t) trdid; 235 tab[i].pktid = (size_t) pktid; 236 tab[i].nline = (addr_t) nline; 237 tab[i].count = (size_t) count; 238 index = i; 239 239 return true; 240 240 } … … 251 251 ///////////////////////////////////////////////////////////////////// 252 252 bool decrement( const size_t index, 253 size_t &counter ) 253 size_t &counter ) 254 254 { 255 255 assert((index<size_tab) && "Bad Update Tab Entry"); 256 if ( tab[index].valid ) 256 if ( tab[index].valid ) 257 257 { 258 258 tab[index].count--; 259 259 counter = tab[index].count; 260 260 return true; 261 } 262 else 261 } 262 else 263 263 { 264 264 return false; … … 298 298 { 299 299 assert(index<size_tab && "Bad Update Tab Entry"); 300 return tab[index].rsp; 300 return tab[index].rsp; 301 301 } 302 302 … … 309 309 { 310 310 assert(index<size_tab && "Bad Update Tab Entry"); 311 return tab[index].ack; 311 return tab[index].ack; 312 312 } 313 313 … … 320 320 { 321 321 assert(index<size_tab && "Bad Update Tab Entry"); 322 return tab[index].brdcast; 322 return tab[index].brdcast; 323 323 } 324 324 … … 331 331 { 332 332 assert(index<size_tab && "Bad Update Tab Entry"); 333 return tab[index].update; 333 return tab[index].update; 334 334 } 335 335 … … 342 342 { 343 343 assert(index<size_tab && "Bad Update Tab Entry"); 344 return tab[index].srcid; 344 return tab[index].srcid; 345 345 } 346 346 … … 353 353 { 354 354 assert(index<size_tab && "Bad Update Tab Entry"); 355 return tab[index].trdid; 355 return tab[index].trdid; 356 356 } 357 357 … … 364 364 { 365 365 assert(index<size_tab && "Bad Update Tab Entry"); 366 return tab[index].pktid; 366 return tab[index].pktid; 367 367 } 368 368 … … 403 403 // - nline : the line number of the entry in the directory 404 404 ///////////////////////////////////////////////////////////////////// 405 bool read_nline(const addr_t nline,size_t &index) 405 bool read_nline(const addr_t nline,size_t &index) 406 406 { 407 407 size_t i ; … … 422 422 // Arguments : 423 423 // - index : the index of the entry 424 ///////////////////////////////////////////////////////////////////// 424 ///////////////////////////////////////////////////////////////////// 425 425 void clear(const size_t index) 426 426 { 427 427 assert(index<size_tab && "Bad Update Tab Entry"); 428 428 tab[index].valid=false; 429 return; 429 return; 430 430 } 431 431 -
branches/RWT/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r787 r814 25 25 * SOCLIB_LGPL_HEADER_END 26 26 * 27 * Maintainers: alain.greiner@lip6.fr 27 * Maintainers: alain.greiner@lip6.fr 28 28 * eric.guthmuller@polytechnique.edu 29 29 * cesar.fuguet-tortolero@lip6.fr … … 62 62 using namespace sc_core; 63 63 64 template<typename vci_param_int, 64 template<typename vci_param_int, 65 65 typename vci_param_ext, 66 66 size_t dspin_in_width, … … 416 416 }; 417 417 418 // debug variables 418 // debug variables 419 419 bool m_debug; 420 420 bool m_debug_previous_valid; … … 479 479 uint32_t m_cpt_heap_unused; // NB cycles HEAP LOCK unused 480 480 uint32_t m_cpt_heap_slot_available; // NB HEAP slot available refresh at each cycles 481 uint32_t m_cpt_heap_min_slot_available; // NB HEAP : Min of slot available 481 uint32_t m_cpt_heap_min_slot_available; // NB HEAP : Min of slot available 482 482 483 483 uint32_t m_cpt_ncc_to_cc_read; // NB change from NCC to CC caused by a READ … … 525 525 526 526 #if MONITOR_MEMCACHE_FSM == 1 527 sc_out<int> p_read_fsm; 528 sc_out<int> p_write_fsm; 529 sc_out<int> p_xram_rsp_fsm; 530 sc_out<int> p_cas_fsm; 531 sc_out<int> p_cleanup_fsm; 532 sc_out<int> p_config_fsm; 533 sc_out<int> p_alloc_heap_fsm; 534 sc_out<int> p_alloc_dir_fsm; 535 sc_out<int> p_alloc_trt_fsm; 536 sc_out<int> p_alloc_upt_fsm; 537 sc_out<int> p_alloc_ivt_fsm; 538 sc_out<int> p_tgt_cmd_fsm; 539 sc_out<int> p_tgt_rsp_fsm; 540 sc_out<int> p_ixr_cmd_fsm; 541 sc_out<int> p_ixr_rsp_fsm; 542 sc_out<int> p_cc_send_fsm; 543 sc_out<int> p_cc_receive_fsm; 544 sc_out<int> p_multi_ack_fsm; 527 sc_out<int> p_read_fsm; 528 sc_out<int> p_write_fsm; 529 sc_out<int> p_xram_rsp_fsm; 530 sc_out<int> p_cas_fsm; 531 sc_out<int> p_cleanup_fsm; 532 sc_out<int> p_config_fsm; 533 sc_out<int> p_alloc_heap_fsm; 534 sc_out<int> p_alloc_dir_fsm; 535 sc_out<int> p_alloc_trt_fsm; 536 sc_out<int> p_alloc_upt_fsm; 537 sc_out<int> p_alloc_ivt_fsm; 538 sc_out<int> p_tgt_cmd_fsm; 539 sc_out<int> p_tgt_rsp_fsm; 540 sc_out<int> p_ixr_cmd_fsm; 541 sc_out<int> p_ixr_rsp_fsm; 542 sc_out<int> p_cc_send_fsm; 543 sc_out<int> p_cc_receive_fsm; 544 sc_out<int> p_multi_ack_fsm; 545 545 #endif 546 546 … … 558 558 const size_t max_copies, // max number of copies 559 559 const size_t heap_size=HEAP_ENTRIES, 560 const size_t trt_lines=TRT_ENTRIES, 561 const size_t upt_lines=UPT_ENTRIES, 562 const size_t ivt_lines=IVT_ENTRIES, 560 const size_t trt_lines=TRT_ENTRIES, 561 const size_t upt_lines=UPT_ENTRIES, 562 const size_t ivt_lines=IVT_ENTRIES, 563 563 const size_t debug_start_cycle=0, 564 564 const bool debug_ok=false ); … … 584 584 585 585 // Component attributes 586 std::list<soclib::common::Segment> m_seglist; // segments allocated 586 std::list<soclib::common::Segment> m_seglist; // segments allocated 587 587 size_t m_nseg; // number of segments 588 588 soclib::common::Segment **m_seg; // array of segments pointers … … 657 657 // Fifo between CC_RECEIVE fsm and CLEANUP fsm 658 658 GenericFifo<uint64_t> m_cc_receive_to_cleanup_fifo; 659 659 660 660 // Fifo between CC_RECEIVE fsm and MULTI_ACK fsm 661 661 GenericFifo<uint64_t> m_cc_receive_to_multi_ack_fifo; … … 686 686 sc_signal<int> r_config_fsm; // FSM state 687 687 sc_signal<bool> r_config_lock; // lock protecting exclusive access 688 sc_signal<int> r_config_cmd; // config request type 688 sc_signal<int> r_config_cmd; // config request type 689 689 sc_signal<addr_t> r_config_address; // target buffer physical address 690 690 sc_signal<size_t> r_config_srcid; // config request srcid … … 702 702 sc_signal<size_t> r_config_heap_next; // current pointer to scan HEAP 703 703 sc_signal<size_t> r_config_trt_index; // selected entry in TRT 704 sc_signal<size_t> r_config_ivt_index; // selected entry in IVT 704 sc_signal<size_t> r_config_ivt_index; // selected entry in IVT 705 705 706 706 // Buffer between CONFIG fsm and IXR_CMD fsm … … 744 744 sc_signal<addr_t> r_read_ll_key; // LL key from llsc_global_table 745 745 746 // Buffer between READ fsm and IXR_CMD fsm 746 // Buffer between READ fsm and IXR_CMD fsm 747 747 sc_signal<bool> r_read_to_ixr_cmd_req; // valid request 748 748 sc_signal<size_t> r_read_to_ixr_cmd_index; // TRT index … … 764 764 sc_signal<bool> r_read_to_cc_send_inst; 765 765 766 //RWT: Buffer between READ fsm and CLEANUP fsm (wait for the data coming from L1 cache) 766 //RWT: Buffer between READ fsm and CLEANUP fsm (wait for the data coming from L1 cache) 767 767 sc_signal<bool> r_read_to_cleanup_req; // valid request 768 768 sc_signal<addr_t> r_read_to_cleanup_nline; // cache line index … … 771 771 sc_signal<size_t> r_read_to_cleanup_length; 772 772 sc_signal<size_t> r_read_to_cleanup_first_word; 773 sc_signal<bool> r_read_to_cleanup_cached_read; 773 sc_signal<bool> r_read_to_cleanup_cached_read; 774 774 sc_signal<bool> r_read_to_cleanup_is_ll; 775 775 sc_signal<addr_t> r_read_to_cleanup_addr; … … 810 810 sc_signal<data_t> r_write_sc_key; // sc command key 811 811 sc_signal<bool> r_write_bc_data_we; // Write enable for data buffer 812 812 813 813 // Buffer between WRITE fsm and TGT_RSP fsm (acknowledge a write command from L1) 814 814 sc_signal<bool> r_write_to_tgt_rsp_req; // valid request … … 818 818 sc_signal<bool> r_write_to_tgt_rsp_sc_fail; // sc command failed 819 819 820 // Buffer between WRITE fsm and IXR_CMD fsm 820 // Buffer between WRITE fsm and IXR_CMD fsm 821 821 sc_signal<bool> r_write_to_ixr_cmd_req; // valid request 822 sc_signal<size_t> r_write_to_ixr_cmd_index; // TRT index 822 sc_signal<size_t> r_write_to_ixr_cmd_index; // TRT index 823 823 824 824 // Buffer between WRITE fsm and CC_SEND fsm (Update/Invalidate L1 caches) … … 908 908 sc_signal<size_t> r_cleanup_to_tgt_rsp_trdid; // transaction trdid 909 909 sc_signal<size_t> r_cleanup_to_tgt_rsp_pktid; // transaction pktid 910 sc_signal<addr_t> 910 sc_signal<addr_t> r_cleanup_to_tgt_rsp_ll_key; 911 911 912 912 //RWT … … 948 948 // Buffer between CAS fsm and IXR_CMD fsm (XRAM write) 949 949 sc_signal<bool> r_cas_to_ixr_cmd_req; // valid request 950 sc_signal<size_t> r_cas_to_ixr_cmd_index; // TRT index 950 sc_signal<size_t> r_cas_to_ixr_cmd_index; // TRT index 951 951 952 952 // Buffer between CAS fsm and TGT_RSP fsm … … 978 978 979 979 // Buffer between IXR_RSP fsm and CONFIG fsm (response from the XRAM) 980 sc_signal<bool> r_ixr_rsp_to_config_ack; // one single bit 980 sc_signal<bool> r_ixr_rsp_to_config_ack; // one single bit 981 981 982 982 // Buffer between IXR_RSP fsm and XRAM_RSP fsm (response from the XRAM) … … 1028 1028 GenericFifo<size_t> m_xram_rsp_to_cc_send_srcid_fifo; // fifo for srcids 1029 1029 1030 // Buffer between XRAM_RSP fsm and IXR_CMD fsm 1030 // Buffer between XRAM_RSP fsm and IXR_CMD fsm 1031 1031 sc_signal<bool> r_xram_rsp_to_ixr_cmd_req; // Valid request 1032 sc_signal<size_t> r_xram_rsp_to_ixr_cmd_index; // TRT index 1032 sc_signal<size_t> r_xram_rsp_to_ixr_cmd_index; // TRT index 1033 1033 1034 1034 //RWT … … 1041 1041 sc_signal<int> r_ixr_cmd_fsm; 1042 1042 sc_signal<size_t> r_ixr_cmd_word; // word index for a put 1043 sc_signal<size_t> r_ixr_cmd_trdid; // TRT index value 1043 sc_signal<size_t> r_ixr_cmd_trdid; // TRT index value 1044 1044 sc_signal<addr_t> r_ixr_cmd_address; // address to XRAM 1045 1045 sc_signal<data_t> * r_ixr_cmd_wdata; // cache line buffer … … 1112 1112 sc_signal<data_t> *r_cleanup_old_data; 1113 1113 sc_signal<bool> r_cleanup_contains_data; 1114 1114 1115 1115 sc_signal<bool> r_cleanup_ncc; 1116 1116 sc_signal<bool> r_cleanup_to_ixr_cmd_ncc_l1_dirty; 1117 1117 sc_signal<bool> r_xram_rsp_to_ixr_cmd_inval_ncc_pending; 1118 1118 1119 1119 sc_signal<bool> r_cleanup_to_ixr_cmd_req; 1120 1120 sc_signal<data_t> *r_cleanup_to_ixr_cmd_data; -
branches/RWT/modules/vci_mem_cache/caba/source/include/xram_transaction.h
r767 r814 10 10 11 11 //////////////////////////////////////////////////////////////////////// 12 // A transaction tab entry 12 // A transaction tab entry 13 13 //////////////////////////////////////////////////////////////////////// 14 14 15 class TransactionTabEntry 15 class TransactionTabEntry 16 16 { 17 17 typedef sc_dt::sc_uint<64> wide_data_t; … … 21 21 22 22 public: 23 bool valid; // entry valid24 bool xram_read;// read request to XRAM25 addr_t nline;// index (zy) of the requested line26 size_t srcid;// processor requesting the transaction27 size_t trdid;// processor requesting the transaction28 size_t pktid;// processor requesting the transaction29 bool proc_read;// read request from processor30 size_t read_length;// length of the read (for the response)31 size_t word_index;// index of the first read word (for the response)32 std::vector<data_t> wdata; 33 std::vector<be_t> wdata_be; 34 bool rerror; 35 data_t ll_key; 36 bool config; 37 38 ///////////////////////////////////////////////////////////////////// 39 // The init() function initializes the entry 23 bool valid; // entry valid 24 bool xram_read; // read request to XRAM 25 addr_t nline; // index (zy) of the requested line 26 size_t srcid; // processor requesting the transaction 27 size_t trdid; // processor requesting the transaction 28 size_t pktid; // processor requesting the transaction 29 bool proc_read; // read request from processor 30 size_t read_length; // length of the read (for the response) 31 size_t word_index; // index of the first read word (for the response) 32 std::vector<data_t> wdata; // write buffer (one cache line) 33 std::vector<be_t> wdata_be; // be for each data in the write buffer 34 bool rerror; // error returned by xram 35 data_t ll_key; // LL key returned by the llsc_global_table 36 bool config; // transaction required by CONFIG FSM 37 38 ///////////////////////////////////////////////////////////////////// 39 // The init() function initializes the entry 40 40 ///////////////////////////////////////////////////////////////////// 41 41 void init() 42 42 { 43 valid 44 rerror 45 config 43 valid = false; 44 rerror = false; 45 config = false; 46 46 } 47 47 … … 69 69 void copy(const TransactionTabEntry &source) 70 70 { 71 valid 72 xram_read 73 nline 74 srcid 75 trdid 76 pktid 77 proc_read 71 valid = source.valid; 72 xram_read = source.xram_read; 73 nline = source.nline; 74 srcid = source.srcid; 75 trdid = source.trdid; 76 pktid = source.pktid; 77 proc_read = source.proc_read; 78 78 read_length = source.read_length; 79 word_index 79 word_index = source.word_index; 80 80 wdata_be.assign(source.wdata_be.begin(),source.wdata_be.end()); 81 81 wdata.assign(source.wdata.begin(),source.wdata.end()); … … 86 86 87 87 //////////////////////////////////////////////////////////////////// 88 // The print() function prints the entry 88 // The print() function prints the entry 89 89 //////////////////////////////////////////////////////////////////// 90 90 void print() … … 99 99 std::cout << "proc_read = " << proc_read << std::endl; 100 100 std::cout << "read_length = " << read_length << std::endl; 101 std::cout << "word_index = " << word_index << std::endl; 101 std::cout << "word_index = " << word_index << std::endl; 102 102 for(size_t i=0; i<wdata_be.size() ; i++) 103 103 { 104 std::cout << "wdata_be[" << std::dec << i << "] = " 104 std::cout << "wdata_be[" << std::dec << i << "] = " 105 105 << std::hex << wdata_be[i] << std::endl; 106 106 } 107 107 for(size_t i=0; i<wdata.size() ; i++) 108 108 { 109 std::cout << "wdata[" << std::dec << i << "] = " 109 std::cout << "wdata[" << std::dec << i << "] = " 110 110 << std::hex << wdata[i] << std::endl; 111 111 } … … 117 117 118 118 ///////////////////////////////////////////////////////////////////// 119 // 119 // Constructors 120 120 ///////////////////////////////////////////////////////////////////// 121 121 … … 131 131 TransactionTabEntry(const TransactionTabEntry &source) 132 132 { 133 valid 134 xram_read 135 nline 136 srcid 137 trdid 138 pktid 139 proc_read 133 valid = source.valid; 134 xram_read = source.xram_read; 135 nline = source.nline; 136 srcid = source.srcid; 137 trdid = source.trdid; 138 pktid = source.pktid; 139 proc_read = source.proc_read; 140 140 read_length = source.read_length; 141 word_index 141 word_index = source.word_index; 142 142 wdata_be.assign(source.wdata_be.begin(),source.wdata_be.end()); 143 wdata.assign(source.wdata.begin(),source.wdata.end()); 143 wdata.assign(source.wdata.begin(),source.wdata.end()); 144 144 rerror = source.rerror; 145 145 ll_key = source.ll_key; … … 150 150 151 151 //////////////////////////////////////////////////////////////////////// 152 // The transaction tab 152 // The transaction tab 153 153 //////////////////////////////////////////////////////////////////////// 154 154 class TransactionTab … … 185 185 186 186 //////////////////////////////////////////////////////////////////// 187 // 187 // Constructors 188 188 //////////////////////////////////////////////////////////////////// 189 189 TransactionTab() … … 194 194 195 195 TransactionTab(const std::string &name, 196 size_t n_entries, 196 size_t n_entries, 197 197 size_t n_words ) 198 198 : tab_name( name ), 199 size_tab( n_entries ) 199 size_tab( n_entries ) 200 200 { 201 201 tab = new TransactionTabEntry[size_tab]; 202 for ( size_t i=0; i<size_tab; i++) 202 for ( size_t i=0; i<size_tab; i++) 203 203 { 204 204 tab[i].alloc(n_words); … … 222 222 void init() 223 223 { 224 for ( size_t i=0; i<size_tab; i++) 224 for ( size_t i=0; i<size_tab; i++) 225 225 { 226 226 tab[i].init(); … … 247 247 TransactionTabEntry read(const size_t index) 248 248 { 249 assert( (index < size_tab) and 249 assert( (index < size_tab) and 250 250 "MEMC ERROR: Invalid Transaction Tab Entry"); 251 251 … … 255 255 // The full() function returns the state of the transaction tab 256 256 // Arguments : 257 // - index : (return argument) the index of an empty entry 257 // - index : (return argument) the index of an empty entry 258 258 // The function returns true if the transaction tab is full 259 259 ///////////////////////////////////////////////////////////////////// … … 265 265 { 266 266 index=i; 267 return false; 267 return false; 268 268 } 269 269 } … … 271 271 } 272 272 ///////////////////////////////////////////////////////////////////// 273 // The hit_read() function checks if an XRAM read transaction exists 273 // The hit_read() function checks if an XRAM read transaction exists 274 274 // for a given cache line. 275 275 // Arguments : 276 // - index : (return argument) the index of the hit entry, if there is 276 // - index : (return argument) the index of the hit entry, if there is 277 277 // - nline : the index (zy) of the requested line 278 278 // The function returns true if a read request has already been sent … … 282 282 for(size_t i=0; i<size_tab; i++) 283 283 { 284 if((tab[i].valid && (nline==tab[i].nline)) && (tab[i].xram_read)) 284 if((tab[i].valid && (nline==tab[i].nline)) && (tab[i].xram_read)) 285 285 { 286 286 index=i; 287 return true; 287 return true; 288 288 } 289 289 } … … 291 291 } 292 292 /////////////////////////////////////////////////////////////////////// 293 // The hit_write() function looks if an XRAM write transaction exists 293 // The hit_write() function looks if an XRAM write transaction exists 294 294 // for a given line. 295 295 // Arguments : … … 301 301 for(size_t i=0; i<size_tab; i++) 302 302 { 303 if(tab[i].valid && (nline==tab[i].nline) && !(tab[i].xram_read)) 303 if(tab[i].valid && (nline==tab[i].nline) && !(tab[i].xram_read)) 304 304 { 305 return true; 305 return true; 306 306 } 307 307 } … … 310 310 311 311 /////////////////////////////////////////////////////////////////////// 312 // The hit_write() function looks if an XRAM write transaction exists 312 // The hit_write() function looks if an XRAM write transaction exists 313 313 // for a given line. 314 314 // Arguments : … … 322 322 if(tab[i].valid && (nline==tab[i].nline) && !(tab[i].xram_read)) { 323 323 *index = i; 324 return true; 324 return true; 325 325 } 326 326 } … … 330 330 // The write_data_mask() function writes a vector of data (a line). 331 331 // The data is written only if the corresponding bits are set 332 // in the be vector. 332 // in the be vector. 333 333 // Arguments : 334 334 // - index : the index of the request in the transaction tab 335 // - be : vector of be 335 // - be : vector of be 336 336 // - data : vector of data 337 337 ///////////////////////////////////////////////////////////////////// 338 void write_data_mask(const size_t index, 339 const std::vector<be_t> &be, 340 const std::vector<data_t> &data) 338 void write_data_mask(const size_t index, 339 const std::vector<be_t> &be, 340 const std::vector<data_t> &data) 341 341 { 342 342 assert( (index < size_tab) and … … 349 349 "MEMC ERROR: Bad data size in TRT write_data_mask()"); 350 350 351 for(size_t i=0; i<tab[index].wdata_be.size() ; i++) 351 for(size_t i=0; i<tab[index].wdata_be.size() ; i++) 352 352 { 353 353 tab[index].wdata_be[i] = tab[index].wdata_be[i] | be[i]; … … 384 384 const size_t word_index, 385 385 const std::vector<be_t> &data_be, 386 const std::vector<data_t> &data, 386 const std::vector<data_t> &data, 387 387 const data_t ll_key = 0, 388 const bool config = false) 388 const bool config = false) 389 389 { 390 390 assert( (index < size_tab) and 391 391 "MEMC ERROR: The selected entry is out of range in TRT set()"); 392 392 393 assert( (data_be.size()==tab[index].wdata_be.size()) and 393 assert( (data_be.size()==tab[index].wdata_be.size()) and 394 394 "MEMC ERROR: Bad data_be argument in TRT set()"); 395 395 396 assert( (data.size()==tab[index].wdata.size()) and 396 assert( (data.size()==tab[index].wdata.size()) and 397 397 "MEMC ERROR: Bad data argument in TRT set()"); 398 398 399 tab[index].valid 400 tab[index].xram_read 401 tab[index].nline 402 tab[index].srcid 403 tab[index].trdid 404 tab[index].pktid 405 tab[index].proc_read 406 tab[index].read_length 407 tab[index].word_index 408 tab[index].ll_key 409 tab[index].config 410 for(size_t i=0; i<tab[index].wdata.size(); i++) 399 tab[index].valid = true; 400 tab[index].xram_read = xram_read; 401 tab[index].nline = nline; 402 tab[index].srcid = srcid; 403 tab[index].trdid = trdid; 404 tab[index].pktid = pktid; 405 tab[index].proc_read = proc_read; 406 tab[index].read_length = read_length; 407 tab[index].word_index = word_index; 408 tab[index].ll_key = ll_key; 409 tab[index].config = config; 410 for(size_t i=0; i<tab[index].wdata.size(); i++) 411 411 { 412 412 tab[index].wdata_be[i] = data_be[i]; … … 416 416 417 417 ///////////////////////////////////////////////////////////////////// 418 // The write_rsp() function writes two 32 bits words of the response 418 // The write_rsp() function writes two 32 bits words of the response 419 419 // to a XRAM read transaction. 420 420 // The BE field in TRT is taken into account. … … 435 435 "MEMC ERROR: The selected entry is out of range in TRT write_rsp()"); 436 436 437 assert( (word < tab[index].wdata_be.size()) and 437 assert( (word < tab[index].wdata_be.size()) and 438 438 "MEMC ERROR: Bad word index in TRT write_rsp()"); 439 439 … … 467 467 void erase(const size_t index) 468 468 { 469 assert( (index < size_tab) and 469 assert( (index < size_tab) and 470 470 "MEMC ERROR: The selected entry is out of range in TRT erase()"); 471 471 472 tab[index].valid 473 tab[index].rerror 472 tab[index].valid = false; 473 tab[index].rerror = false; 474 474 } 475 475 /////////////////////////////////////////////////////////////////////
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