source:

Revision Log Mode:


Legend:

Added
Modified
Copied or renamed
Diff Rev Age Author Log Message
(edit) @375   12 years joannou Introducing vci_io_bridge component
(edit) @374   12 years joannou Introducing vci_block_device_tsar component
(edit) @373   12 years joannou Reintroducing softs : * tests_cc_vcache * tsar_boot
(edit) @372   12 years joannou Remove from trunk all obsolete components (saved in branch v4)
(edit) @371   12 years joannou Create TsarV4 branch from trunk as of now
(edit) @370   12 years joannou In tsarv5_generic_mmu : * top.cpp : go look for hard_config.h in …
(edit) @369   12 years joannou Bugfix in vci_cc_vcache_wrapper v5 : forgot to copy the nline when …
(edit) @368   12 years cfuguet Modification in tsar/trunk/softs/tsar_boot Writing the carriage …
(edit) @367   12 years cfuguet Modification in v5/vci_mem_cache Aligning to left the SRCID into the …
(edit) @366   12 years joannou In vci_cc_vcache_wrapper v5, * now using the new generic_cache_tsar …
(edit) @365   12 years joannou In generic_cache_tsar, added a new write_dir function that does not …
(edit) @364   12 years haoliu Bug fix in dcache fsm, in dcache_xtn_dc_inval_go state, set the slot …
(edit) @363   12 years joannou In tsarv5_generic_mmu platform, in tsar cluster, added l_width to …
(edit) @362   12 years cfuguet Bugfix in vci_mem_cache: In function "copy()" of the xram_transaction …
(edit) @361   12 years cfuguet Bugfix in vci_mem_cache_v4: In function "copy()" of the …
(edit) @360   12 years joannou In tsarv5_generic_mmu platform (tsarcluster): * connected vci to dspin …
(edit) @359   12 years joannou bugfix : correctly updating the r_preempt register
(edit) @358   12 years simerabe bugfix : preempt in case of broadcast, palloc in case of single flit
(edit) @357   12 years simerabe fixbug : test on eop in case of single_flit coherence request
(edit) @356   12 years cfuguet Modifying comments in the dspin_dhccp_param to comply the type …
(edit) @355   12 years joannou In vci_cc_vcache_wrapper v5 - added check for p_dspin_in.write in …
(edit) @354   12 years cfuguet Bugfix in branches/v5/vci_mem_cache Adding missing condition in …
(edit) @353   12 years cfuguet Bugfix in branches/v5/vci_mem_cache Adding missing fifo get in case of …
(edit) @352   12 years cfuguet Bugfix in vci_cc_vcache_wrapper_v4: In case of SC or CAS command, the …
(edit) @351   12 years joannou Got rid of intermediate v5 version. _dspin_coherence versions changed …
(edit) @350   12 years alain Introducing Platform tsarv5_dspin_array, that can be used for TSAR …
(edit) @349   12 years cfuguet Rearranging addresses in the function pointer table to keep backward …
(edit) @348   12 years cfuguet Adding the boot_putc and the boot_getc in the functions pointer table …
(edit) @347   12 years cfuguet Introducing dcache line invalidation mechanism in the boot_ioc_read …
(edit) @346   12 years alain New contructors for vci_mem_cache & vci_cc_vcache, as we don't need …
(edit) @345   12 years alain Introducing the cluster component in tsarv5_generic_mmu platform.
(edit) @344   12 years alain Introducing the tsarv5_generic_mmu platform.
(edit) @343   12 years cfuguet Using the Xicu SOFT IRQs (IPIs). Adding them on the Xicu constructor
(edit) @342   12 years joannou Introducing tsar_generic_mmu_dspin_coherence platform (ring dspin for …
(edit) @341   12 years joannou In vci_cc_vcache_wrapper_dspin_coherence, DCACHE_TLB_PTE1_MISS and …
(edit) @340   12 years cfuguet Erasing always false condition in the if statement of the …
(edit) @339   12 years cfuguet Erasing always false condition in the if statement of the …
(edit) @338   12 years joannou * In vci_cc_vcache_wrapper_dspin_coherence, modified both states …
(edit) @337   12 years joannou In generic_cache_tsar, added new read function that returns 2 32bits …
(edit) @336   12 years cfuguet Bug fix in the vci_cc_vcache_wrapper and vci_mem_cache components (and …
(edit) @335   12 years joannou Added llsc table initialization in both vci_mem_cache and …
(edit) @334   12 years joannou Separated stat counters resets from internal registers resets
(edit) @333   12 years joannou - In vci_cc_vcache_wrapper_dspin_coherence : initializing …
(edit) @332   12 years joannou Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
(edit) @331   12 years joannou Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …
(edit) @330   12 years joannou * Commented debug in dspin_local_ring_fast_c * Added test on plen …
(edit) @329   12 years joannou Added test on INST/DATA for the CLACK in the …
(edit) @328   12 years cfuguet Including TYPE_CLEANUP_ACK_INST and TYPE_CLEANUP_ACK_DATA in the …
(edit) @327   12 years simerabe introducing topcell examples using dspin ring interconnect
(edit) @326   12 years simerabe introducing 2 new components : simple and local ring interconnect …
(edit) @325   12 years joannou bugfix in vci_cc_vcache_wrapper_dspin_coherence : - consume fifo in …
(edit) @324   12 years joannou updated the test_interrupt_delayslot : now testing for several delay values
(edit) @323   12 years joannou removed unusefull flipflop r_*cache_cc_fifo_done + syntax correction …
(edit) @322   12 years cfuguet Erasing binary generated files in tests_ccvcache_v4/test_sync from the repo
(edit) @321   12 years joannou bugfix in vci_cc_vcache_wrapper_dspin_coherence in coherence type checking
(edit) @320   12 years cfuguet vci_mem_cache_dspin_coherence: - Fixing typo error in …
(edit) @319   12 years cfuguet Fix bug in vci_mem_cache_dspin_coherence. The write signal in the …
(edit) @318   12 years joannou vci_cc_vcache_wrapper_dspin_coherence now use DspinDhccpParam::* types …
(edit) @317   12 years cfuguet Introducing missing debug strings in the vci_mem_cache cpp file
(edit) @316   12 years joannou Introducing new tsar_mono_mmu_dspin_coherence platform Same as …
(edit) @315   12 years joannou Introducing new dspin interface for …
(edit) @314   12 years cfuguet Erasing old comments in the reset.s file of the pre-loader
(edit) @313   12 years cfuguet Erasing useless template parameters for the …
(edit) @312   12 years cfuguet Updating width of the way index in DSPIN coherence flits. Using 2 bits …
(edit) @311   12 years cfuguet Including GET and SET methods for the FROM_L1_BC and FROM_MC_BC bit in …
(edit) @310   12 years cfuguet Introducing FROM_L1_BC and FROM_MC_BC in dspin param class to access …
(edit) @309   12 years joannou Bugfix : typo in component name (was 'dhcpp', is now 'dhccp')
(edit) @308   12 years cfuguet Fixing parameter name error in metadata of vci_mem_cache
(edit) @307   12 years cfuguet Including vci_mem_cache v5 using dspin interface for the coherence …
(edit) @306   12 years joannou Added tsar_mono_mmu and tsar_generic_mmu platforms
(edit) @305   12 years joannou In vci_mem_cache component: Adding an assert for cleanup commands …
(edit) @304   12 years joannou Bug fixing in vci_cc_vcache_wrapper component : - In TGT_RSP_DCACHE, …
(edit) @303   12 years joannou Bug fix in generic_cache_tsar component : In the read_select function, …
(edit) @302   12 years cfuguet Introducing IRQ_PER_PROC constant in the tsar boot loader …
(edit) @301   12 years joannou bugfix in vci_block_device_tsar_v4 : the component used a vci …
(edit) @300   12 years joannou Moved tsar modules vci_cc_vcache_wrapper and vci_mem_cache under the …
(edit) @299   12 years alain bug fixing: coherence interrupt must be taken in the MISS_DIR_UPDT states.
(edit) @298   12 years alain Bug fixing in the NIC constructor
(edit) @297   12 years alain Introducing the 3 states (EMPTY,VALID,ZOMBI) states in cache directory
(edit) @296   12 years alain introducing major modifications in vci_cc_vcache_wrappers - remove …
(edit) @295   12 years cfuguet Introducing branches/v5/ components directory. This branch will be …
(edit) @294   12 years cfuguet Creating branch repertory for the TSAR svn repository. Copying the …
(edit) @293   12 years cfuguet Including Makefile for tsar boot loader
(edit) @292   12 years cfuguet Changing directory structure of the TSAR boot loader. A README.txt …
(edit) @291   12 years joannou Introducing new generic_llsc_local_table and generic_llsc_global_table …
(edit) @290   12 years cfuguet Erasing in the vci_mem_cache_v4 CLEANUP FSM the transition between the …
(edit) @289   12 years cfuguet Introducing cache data ram with bit masking in the Memory Cache. The …
(edit) @288   12 years joannou Bug fix in vci_cc_vcache_wrapper_v4 : unwanted reset of the …
(edit) @287   12 years joannou Updated vci_vdspin_initiator_wrapper and vci_vdspin_target_wrapper to …
(edit) @286   12 years cfuguet Fixing bug in boot_tty.c: Use address of tty status when reading with …
(edit) @285   12 years alain Fixing a bug identified by Hao: there was a dead-lock condition if: - …
(edit) @284   12 years joannou Updated of the vci trdid/rtrdid and pktid/rpktid fields for the direct …
(edit) @283   12 years joannou Changed default value to 0 for the L1_MULTI_CACHE define Fixed some …
(edit) @282   12 years bouyer Complete r281: Keep BEV bit set in STATUS register, and add an …
(edit) @281   12 years bouyer Keep BEV bit set in STATUS register, and add an exception handler at …
(edit) @280   12 years bouyer Remove unused base_addresses
(edit) @279   12 years cfuguet Introducing multi block read in the ioc_read function for the FPGA platform
(edit) @278   12 years bouyer The ring is cpu-ungry, so give one thread per ring when running under …
(edit) @277   12 years cfuguet Fixing bug in the alloc dir FSM. The READ FSM release the lock on the …
(edit) @276   12 years bouyer A boot loader to be stored in ROM of a TSAR platform. Based on Cesar …
Note: See TracRevisionLog for help on using the revision log.