- Timestamp:
- Feb 8, 2010, 12:22:11 PM (15 years ago)
- Location:
- anr
- Files:
-
- 3 edited
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- Unmodified
- Added
- Removed
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anr/task-4.tex
r110 r111 56 56 \begin{livrable} 57 57 \itemL{18}{24}{x}{\Stima}{UGH enhancement 1}{0:9:0} 58 The UGH software whith support for treating automatically data dominated sections58 Release of the UGH software with support for treating automatically data dominated sections 59 59 included into a control dominated application. 60 60 \itemL{21}{27}{x}{\Stima}{UGH enhancement 2}{0:3:6} 61 The UGH software that isable to generate a micro-architecture without the61 Release of the UGH software able to generate a micro-architecture without the 62 62 variable binding currently done by the designer. 63 63 \itemL{6}{18}{x}{\Subs}{GAUT enhancement 1}{0:0:0} … … 78 78 Release of the GAUT software that supports the features defined in \ST ????. 79 79 \end{livrable} 80 \item In FPGA-SoC, the frequency is given by the processor s and theBUS. The coprocessors80 \item In FPGA-SoC, the frequency is given by the processor(s) and the system BUS. The coprocessors 81 81 generated by HLS synthesis must respect this frequency. However, the HLS tools can not 82 82 guarantee that the micro-architectures they generate accurately respect this 83 83 frequency. This is especially the case when the target is a FPGA device, because the 84 84 delays are really known only after the RTL synthesis and that estimated delays used 85 by the HLS are very i mprecize. The goal of this \ST is to provide a tool to adapt85 by the HLS are very inaccurate. The goal of this \ST is to provide a tool that adapts 86 86 the coprocessors frequency to the FPGA-SoC frequency after the coprocessor RTL 87 87 synthesis. … … 93 93 \itemL{24}{33}{x}{\Supmc}{frequency calibration}{2:.5:3.5} 94 94 The frequency calibration software consists of a driver in the FPGA-SoC operating 95 system and of a control software on a PC. 95 system and of a control software on a PC. %FIXME == {Pas clair pour le HPC. Comprends pas} 96 96 \end{livrable} 97 97 \end{workpackage} -
anr/task-5.tex
r63 r111 12 12 figures~\ref{coach-flow} and \ref{archi-hpc}. It consists in 13 13 \begin{itemize} 14 \item Helpingthe HPC designer to find a good partition of the initial application14 \item Providing a software tool that helps the HPC designer to find a good partition of the initial application 15 15 (figure~\ref{archi-hpc}). 16 16 \item Providing communication schemes between the software part running on the PC and the 17 FPGA-SoC. 17 FPGA-SoC. %FIXME = {Quelle difference avec l'item qui suit ???} 18 18 \item Implementing the communication scheme at all levels: partition help, software 19 19 implementation both on the PC and in the operating system of the FPGA-SoC, hardware. … … 25 25 transfers. The reasons of this choices are that both ALTERA and Xilinx provide PCI/X IP for 26 26 their FPGA and that GPU HPC softwares use also it. 27 This will allow us at least to be inspired by GPU communication schemes and may be to reuse 28 parts of the GPU softwares. 27 %FIXME == {ai supprime (mis en commentaire) la phrse qui suivait} 28 %This will allow us at least to be inspired by GPU communication schemes and may be to reuse 29 %parts of the GPU softwares. 29 30 30 31 \end{objectif} 31 32 % 33 %FIXME == {Ne doit onpas fusionner les taches ST6-1, ST6-2, ST6-3 et pourquoi pas ST6-4 ???} 32 34 \begin{workpackage} 33 35 \item This \ST is the definition of the communication schemes as a software API … … 37 39 \itemL{0}{6}{d}{\Supmc}{HPC communication API}{1.0:0:0} 38 40 \setMacroInAuxFile{hpcCommApi} 39 User reference manualdescribing the API.41 Specification describing the API. 40 42 \end{livrable} 41 43 \item This \ST consists in helping to partition applications. -
anr/task-7.tex
r99 r111 31 31 adding, suppressing, replacing pages). 32 32 Especialy the user reference manuals provided in the other tasks will be published 33 in this site. The published articles will be also be installed in this site.33 on this site. The published articles will be also be installed in this site. 34 34 \itemL{6}{36}{}{\Supmc}{release handling}{1:.5:.5} 35 35 This deliverable deals with the elaboration of the COACH software milestones and
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