Changeset 126 for anr/task-2.tex

Timestamp:

Feb 10, 2010, 5:59:35 PM (14 years ago)

Author:

coach

Message:

OM modification pendant la réunion du 10 février

File:

• anr/task-2.tex (modified) (4 diffs)

anr/task-2.tex

@@ -16 +16 @@
 \item the development of all the missing components (SytemC models and/or synthesizable VHDL models 
 of the IP-cores),
-\item the configuration and the development of drivers \mustbecompleted{FIXME:: driver de quoi ???}
-of the operating systems,
-\item the CSG software that generates the SystemC simulators for prototyping and the synthesizable description 
-of the FPGA-SoC system (i.e. its bitstream), \mustbecompleted{FIXME:: VHDL ou bitstream ???}
+\item the configuration and the development of drivers of the operating systems (Board Support Package, HAL),
+\item the CSG software that generates the SystemC simulators for prototyping and the FPGA-SoC system
+including its bitstream and software executable code,
 \item the specification of enhanced communication schemes and their sofware and hardware implementations.
 \end{itemize}
@@ -35 +34 @@
         hardware architecture template.
     \itemV{12}{18}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgPrototypingOnly}
-        This milestone adds to CSG the support to the XILINX and ALTERA architectural
-        templates and to the enhanced communication system.
-        In this milestone only the SystemC prototyping will be supported for the XILINX
-        and ALTERA architectural template.
-        HAS is available. \mustbecompleted{FIXME:: ca veut dire ???}
+        The second release of CSG supports the XILINX and ALTERA architectural
+        templates and the enhanced communication system, but only for SystemC prototyping.
+        This release integrates a first integration of HLS tools.
     \itemV{18}{24}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgAllArch}
         This milestone extends CSG (\csgPrototypingOnly) to
         FPGA-SoC generation for the XILINX and ALTERA architectural template.
     \itemL{24}{36}{x}{\Supmc}{CSG}{6:6:6}
-        Maintenance work of CSG.
+        Final release of CSG.
     \end{livrable}
 \subtask This \ST deals with the components of the architectural templates.
     \\
-    For the COACH architectural template, it consists of the devlopment of the VHDL
-    synthesizable description of the missing components. \mustbecompleted{FIXME :: pas clair missing components} 
+    For the COACH architectural template, it consists of the development of the VHDL
+    synthesizable description of the missing communication components (MWMR)
+        in order to support the process network communication model. 
     Notice that the SystemC models
     comes from the SocLib ANR project, the processor with its cache comes from the TSAR
@@ -55 +53 @@
     \\
     For the XILINX and ALTERA architectural templates, we use the XILINX and ALTERA IPs (NIOS, Microblaze, memories, busses...).
-    The missing component is the MWMR used for communication between the tasks of the
-    application.
     \begin{livrable}
     \itemL{0}{12}{h}{\Supmc}{COACH architecture}{1:0:0}
@@ -111 +107 @@
     \begin{livrable}
     \itemV{6}{8}{x}{\Supmc}{MUTEK OS}
-        The drivers \mustbecompleted{FIXME :: ???}
-        required for the first CSG milestone (delivrable \csgCoachArch).
+        The drivers required for the first CSG milestone (delivrable \csgCoachArch).
     \itemV{8}{18}{x}{\Supmc}{MUTEK 0S}
         The drivers required for the second CSG milestone ({\csgPrototypingOnly}).