Changeset 277 for anr/section-4.1.tex


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Timestamp:
Nov 23, 2010, 6:02:16 PM (14 years ago)
Author:
coach
Message:
 
File:
1 edited

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  • anr/section-4.1.tex

    r275 r277  
    3131hardware) either \ADDED{ as an IP under IP-XACT to integrate the SoC in larger
    3232design or}
    33 as a SystemC simulator (cycla accurate and/or TLM) to prototype and explore quickly the
     33as a SystemC simulator (cycle accurate and/or TLM) to prototype and explore quickly the
    3434design space or as a bitstream\footnote{COACH generates synthesizable VHDL, and
    3535launch the \xilinx or \altera RTL synthesis tools.} directly downloadable on the
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