Changeset 32 for anr/section-2.tex

Timestamp:

Jan 13, 2010, 3:20:27 PM (14 years ago)

Author:

coach

Message:

amélioration de la section 2.1

M anr/section-2.tex
M anr/section-2.1.tex

File:

• anr/section-2.tex (modified) (1 diff)

anr/section-2.tex

@@ -1 +1 @@
 The emerging complex and integrated heterogeneous embedded system platforms require
-adequate design methods able to efficiently model, explore, analyze and design the ever complex SW
-and HW architectures. Future Embedded Systems suppliers, in order to meet rapidly increasing
-performance requirements linked with a pressure to lower development cost and shorten time-tomarket,
-will have to adopt new design methods and flows able to keep pace with the increasing
+adequate design methods  to efficiently model, explore, analyze and design the ever complex software
+and hardware architectures. Future Embedded Systems suppliers, in order to meet rapidly increasing
+performance requirements and a pressure to lower development cost and shorten time-to-market,
+will have to adopt new design methods and flows in order to keep pace with the increasing
 complexity of design problems. Such methods, addressing these challenges starting from high levels of
-abstraction, will have to perform large solution space exploration jointly for SW and HW (possibly
-reconfigurable), involving almost marginal design effort and offering a high predictability of results
-with respect to cost- and performance-functions.
+abstraction, will have to perform large solution space explorations both for software and (possibly
+reconfigurable) hrdware, involving almost marginal design effort and offering a high predictability of results
+with respect to cost- and performance- objectives.
 Current design methodologies provide quite low-level abstraction capabilities. However in a few years
-from now tens of programmable processors will be embedded in an IC with together over 100M
-transistors adding to the complexity of the problem of architecting such systems. Taking into account
-that the complexity of the SW part is pacing up at an even faster speed, current solutions to perform
-design space exploration, mainly manually based, by no means do supply a performance of adequate
-sufficiency.
+from now tens of programmable processors will be embedded in an IC with more than 100M
+transistors adding to the complexity of the problem of designing such systems. Taking into account
+that the complexity of the software part is increasing at an even faster rate, current solutions for
+design space exploration, mainly manually based, by no means do supply an adequate performance.
 Consequently, there is an urgent need to leverage system level
 exploration through the use of a high level specification of the application and an early design
-space exploration steps. The first system oriented approaches are appearing, among which those
-based on C/C++ and SystemC are most popular. Such approaches can take place before and/or after
-the co-design or architecture refinement steps and targets the design space pruning in order to fully
+space exploration step. The first system oriented approaches are appearing, among which those
+based on C/C++ and SystemC are the most popular. Such approaches can take place before and/or after
+the co-design or architecture refinement steps and target the design space pruning in order to fully
 exploit potential solutions that meet design and application constraints (power, latency,
 throughput) within the design and market timeframe.
 \\
 Thus, new system-level design flows need to be developed, enabling the exploration of an application
-independently of the implementation, this almost at the beginning of the design process. A
+independently of the implementation, almost at the beginning of the design process. A
 fundamental element of this evolution is the definition of abstraction layers that should allow the
-systematic re-use of SW and HW components at the system level driven by performance estimation
-and analysis. It is the context in which the COACH modeling and estimation methods combined with 
+systematic re-use of software and hardware components at the system level driven by performance estimation
+and analysis. In this context, COACH will combine modeling and estimation methods and 
 compilers and design space exploration techniques. This approach will cause a real breakthrough in 
 the embedded system design methodology, i.e. one of the radical innovations.