Changeset 38 for anr/task-5.tex
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- Jan 19, 2010, 11:01:35 AM (15 years ago)
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anr/task-5.tex
r36 r38 11 11 \item Helping the HPC designer to find a good partition of the initial application 12 12 (figure~\ref{archi-hpc}. 13 \item Providing communication schem s between the software part runing on the PC and the13 \item Providing communication schemes between the software part runing on the PC and the 14 14 FPGA-SoC. 15 \item Implementing the communication schem at all levels: partition help, software15 \item Implementing the communication scheme at all levels: partition help, software 16 16 implementation both on the PC and in the operating system of the FPGA-SoC, hardware. 17 17 \item FPGA reconfiguration. \mustbecompleted{FIXME:TIMA} … … 20 20 transfers. The reasons of this choices are that both ALTERA and Xilinx provide PCI/X IP for 21 21 their FPGA and that GPU HPC softwares use also it. 22 This will allow us at least to be inspired by GPU communication schem s and may be to reuse22 This will allow us at least to be inspired by GPU communication schemes and may be to reuse 23 23 parts of the GPU softwares. 24 24 \end{objectif} 25 25 % 26 26 \begin{workpackage}{D5} 27 \item This \ST is the definition of the communication schem s as a software API27 \item This \ST is the definition of the communication schemes as a software API 28 28 (Application Programing Interface) between the application part running on the PC and 29 29 the application part running on the FPGA-SoC.
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